Tizen 2.0 Release
[profile/ivi/osmesa.git] / src / gallium / drivers / i915 / i915_state_static.c
1 /**************************************************************************
2  *
3  * Copyright © 2010 Jakob Bornecrantz
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  **************************************************************************/
25
26
27 #include "i915_reg.h"
28 #include "i915_context.h"
29 #include "i915_state.h"
30 #include "i915_resource.h"
31 #include "i915_screen.h"
32
33
34
35 /***********************************************************************
36  * Update framebuffer state
37  */
38 static unsigned translate_format(enum pipe_format format)
39 {
40    switch (format) {
41    case PIPE_FORMAT_B8G8R8A8_UNORM:
42       return COLOR_BUF_ARGB8888;
43    case PIPE_FORMAT_B5G6R5_UNORM:
44       return COLOR_BUF_RGB565;
45    case PIPE_FORMAT_R8G8B8A8_UNORM:
46       return COLOR_BUF_ARGB8888;
47    case PIPE_FORMAT_L8_UNORM:
48    case PIPE_FORMAT_A8_UNORM:
49    case PIPE_FORMAT_I8_UNORM:
50       return COLOR_BUF_8BIT;
51    default:
52       assert(0);
53       return 0;
54    }
55 }
56
57 static unsigned translate_depth_format(enum pipe_format zformat)
58 {
59    switch (zformat) {
60    case PIPE_FORMAT_Z24X8_UNORM:
61    case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
62       return DEPTH_FRMT_24_FIXED_8_OTHER;
63    case PIPE_FORMAT_Z16_UNORM:
64       return DEPTH_FRMT_16_FIXED;
65    default:
66       assert(0);
67       return 0;
68    }
69 }
70
71 static inline uint32_t
72 buf_3d_tiling_bits(enum i915_winsys_buffer_tile tiling)
73 {
74    uint32_t tiling_bits = 0;
75
76    switch (tiling) {
77    case I915_TILE_Y:
78       tiling_bits |= BUF_3D_TILE_WALK_Y;
79    case I915_TILE_X:
80       tiling_bits |= BUF_3D_TILED_SURFACE;
81    case I915_TILE_NONE:
82       break;
83    }
84
85    return tiling_bits;
86 }
87
88 static void update_framebuffer(struct i915_context *i915)
89 {
90    struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0];
91    struct pipe_surface *depth_surface = i915->framebuffer.zsbuf;
92    unsigned x, y;
93    int layer;
94    uint32_t draw_offset, draw_size;
95
96    if (cbuf_surface) {
97       struct i915_texture *tex = i915_texture(cbuf_surface->texture);
98       assert(tex);
99
100       i915->current.cbuf_bo = tex->buffer;
101       i915->current.cbuf_flags = BUF_3D_ID_COLOR_BACK |
102                                  BUF_3D_PITCH(tex->stride) |  /* pitch in bytes */
103                                  buf_3d_tiling_bits(tex->tiling);
104
105       layer = cbuf_surface->u.tex.first_layer;
106
107       x = tex->image_offset[cbuf_surface->u.tex.level][layer].nblocksx;
108       y = tex->image_offset[cbuf_surface->u.tex.level][layer].nblocksy;
109    } else {
110       i915->current.cbuf_bo = NULL;
111       x = y = 0;
112    }
113    i915->static_dirty |= I915_DST_BUF_COLOR;
114
115    /* What happens if no zbuf??
116     */
117    if (depth_surface) {
118       struct i915_texture *tex = i915_texture(depth_surface->texture);
119       unsigned offset = i915_texture_offset(tex, depth_surface->u.tex.level,
120                                             depth_surface->u.tex.first_layer);
121       assert(tex);
122       assert(offset == 0);
123
124       i915->current.depth_bo = tex->buffer;
125       i915->current.depth_flags = BUF_3D_ID_DEPTH |
126                                   BUF_3D_PITCH(tex->stride) |  /* pitch in bytes */
127                                   buf_3d_tiling_bits(tex->tiling);
128    } else
129       i915->current.depth_bo = NULL;
130    i915->static_dirty |= I915_DST_BUF_DEPTH;
131
132    /* drawing rect calculations */
133    draw_offset = x | (y << 16);
134    draw_size = (i915->framebuffer.width - 1 + x) |
135                ((i915->framebuffer.height - 1 + y) << 16);
136    if (i915->current.draw_offset != draw_offset) {
137       i915->current.draw_offset = draw_offset;
138       i915_set_flush_dirty(i915, I915_PIPELINE_FLUSH);
139       i915->static_dirty |= I915_DST_RECT;
140    }
141    if (i915->current.draw_size != draw_size) {
142       i915->current.draw_size = draw_size;
143       i915->static_dirty |= I915_DST_RECT;
144    }
145
146    /* we also send a new program to make sure the fixup for RGBA surfaces happens */
147    i915->hardware_dirty |= I915_HW_STATIC | I915_HW_PROGRAM;
148
149    /* flush the cache in case we sample from the old renderbuffers */
150    i915_set_flush_dirty(i915, I915_FLUSH_CACHE);
151 }
152
153 struct i915_tracked_state i915_hw_framebuffer = {
154    "framebuffer",
155    update_framebuffer,
156    I915_NEW_FRAMEBUFFER
157 };
158
159 static void update_dst_buf_vars(struct i915_context *i915)
160 {
161    struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0];
162    struct pipe_surface *depth_surface = i915->framebuffer.zsbuf;
163    uint32_t dst_buf_vars, cformat, zformat;
164    uint32_t early_z = 0;
165
166    if (cbuf_surface)
167       cformat = cbuf_surface->format;
168    else
169       cformat = PIPE_FORMAT_B8G8R8A8_UNORM; /* arbitrary */
170    cformat = translate_format(cformat);
171
172    if (depth_surface) {
173       struct i915_texture *tex = i915_texture(depth_surface->texture);
174       struct i915_screen *is = i915_screen(i915->base.screen);
175
176       zformat = translate_depth_format(depth_surface->format);
177
178       if (is->is_i945 && tex->tiling != I915_TILE_NONE
179             && !i915->fs->info.writes_z)
180          early_z = CLASSIC_EARLY_DEPTH;
181    } else
182       zformat = 0;
183
184    dst_buf_vars = DSTORG_HORT_BIAS(0x8) | /* .5 */
185                   DSTORG_VERT_BIAS(0x8) | /* .5 */
186                   LOD_PRECLAMP_OGL |
187                   TEX_DEFAULT_COLOR_OGL |
188                   cformat |
189                   zformat |
190                   early_z;
191
192    if (i915->current.dst_buf_vars != dst_buf_vars) {
193       if (early_z != (i915->current.dst_buf_vars & CLASSIC_EARLY_DEPTH))
194          i915_set_flush_dirty(i915, I915_PIPELINE_FLUSH);
195
196       i915->current.dst_buf_vars = dst_buf_vars;
197       i915->static_dirty |= I915_DST_VARS;
198       i915->hardware_dirty |= I915_HW_STATIC;
199    }
200 }
201
202 struct i915_tracked_state i915_hw_dst_buf_vars = {
203    "dst buf vars",
204    update_dst_buf_vars,
205    I915_NEW_FRAMEBUFFER | I915_NEW_FS
206 };