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[profile/ivi/mesa.git] / src / gallium / drivers / i915 / i915_state_emit.c
1 /**************************************************************************
2  * 
3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4  * All Rights Reserved.
5  * 
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the
8  * "Software"), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sub license, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  * 
14  * The above copyright notice and this permission notice (including the
15  * next paragraph) shall be included in all copies or substantial portions
16  * of the Software.
17  * 
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25  * 
26  **************************************************************************/
27
28
29 #include "i915_reg.h"
30 #include "i915_context.h"
31 #include "i915_batch.h"
32 #include "i915_reg.h"
33 #include "i915_resource.h"
34
35 #include "pipe/p_context.h"
36 #include "pipe/p_defines.h"
37
38 static unsigned translate_format( enum pipe_format format )
39 {
40    switch (format) {
41    case PIPE_FORMAT_B8G8R8A8_UNORM:
42       return COLOR_BUF_ARGB8888;
43    case PIPE_FORMAT_B5G6R5_UNORM:
44       return COLOR_BUF_RGB565;
45    default:
46       assert(0);
47       return 0;
48    }
49 }
50
51 static unsigned translate_depth_format( enum pipe_format zformat )
52 {
53    switch (zformat) {
54    case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
55       return DEPTH_FRMT_24_FIXED_8_OTHER;
56    case PIPE_FORMAT_Z16_UNORM:
57       return DEPTH_FRMT_16_FIXED;
58    default:
59       assert(0);
60       return 0;
61    }
62 }
63
64
65 /**
66  * Examine framebuffer state to determine width, height.
67  */
68 static boolean
69 framebuffer_size(const struct pipe_framebuffer_state *fb,
70                  uint *width, uint *height)
71 {
72    if (fb->cbufs[0]) {
73       *width = fb->cbufs[0]->width;
74       *height = fb->cbufs[0]->height;
75       return TRUE;
76    }
77    else if (fb->zsbuf) {
78       *width = fb->zsbuf->width;
79       *height = fb->zsbuf->height;
80       return TRUE;
81    }
82    else {
83       *width = *height = 0;
84       return FALSE;
85    }
86 }
87
88
89 /* Push the state into the sarea and/or texture memory.
90  */
91 void
92 i915_emit_hardware_state(struct i915_context *i915 )
93 {
94    /* XXX: there must be an easier way */
95    const unsigned dwords = ( 14 + 
96                              7 + 
97                              I915_MAX_DYNAMIC + 
98                              8 + 
99                              2 + I915_TEX_UNITS*3 + 
100                              2 + I915_TEX_UNITS*3 +
101                              2 + I915_MAX_CONSTANT*4 + 
102 #if 0
103                              i915->current.program_len + 
104 #else
105                              i915->fs->program_len + 
106 #endif
107                              6 
108                            ) * 3/2; /* plus 50% margin */
109    const unsigned relocs = ( I915_TEX_UNITS +
110                              3
111                            ) * 3/2; /* plus 50% margin */
112
113 #if 0
114    debug_printf("i915_emit_hardware_state: %d dwords, %d relocs\n", dwords, relocs);
115 #endif
116    
117    if(!BEGIN_BATCH(dwords, relocs)) {
118       FLUSH_BATCH(NULL);
119       assert(BEGIN_BATCH(dwords, relocs));
120    }
121
122    /* 14 dwords, 0 relocs */
123    if (i915->hardware_dirty & I915_HW_INVARIENT)
124    {
125       OUT_BATCH(_3DSTATE_AA_CMD |
126                 AA_LINE_ECAAR_WIDTH_ENABLE |
127                 AA_LINE_ECAAR_WIDTH_1_0 |
128                 AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0);
129
130       OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD);
131       OUT_BATCH(0);
132
133       OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD);
134       OUT_BATCH(0);
135       
136       OUT_BATCH(_3DSTATE_DFLT_Z_CMD);
137       OUT_BATCH(0);
138
139       OUT_BATCH(_3DSTATE_COORD_SET_BINDINGS |
140                 CSB_TCB(0, 0) |
141                 CSB_TCB(1, 1) |
142                 CSB_TCB(2, 2) |
143                 CSB_TCB(3, 3) |
144                 CSB_TCB(4, 4) | 
145                 CSB_TCB(5, 5) | 
146                 CSB_TCB(6, 6) | 
147                 CSB_TCB(7, 7));
148
149       OUT_BATCH(_3DSTATE_RASTER_RULES_CMD |
150                 ENABLE_POINT_RASTER_RULE |
151                 OGL_POINT_RASTER_RULE |
152                 ENABLE_LINE_STRIP_PROVOKE_VRTX |
153                 ENABLE_TRI_FAN_PROVOKE_VRTX |
154                 LINE_STRIP_PROVOKE_VRTX(1) |
155                 TRI_FAN_PROVOKE_VRTX(2) | 
156                 ENABLE_TEXKILL_3D_4D | 
157                 TEXKILL_4D);
158
159       /* Need to initialize this to zero.
160        */
161       OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | (0));
162       OUT_BATCH(0);
163
164       OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE);
165
166       /* disable indirect state for now
167        */
168       OUT_BATCH(_3DSTATE_LOAD_INDIRECT | 0);
169       OUT_BATCH(0);
170    }
171    
172    /* 7 dwords, 1 relocs */
173    if (i915->hardware_dirty & I915_HW_IMMEDIATE)
174    {
175       OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | 
176                 I1_LOAD_S(0) |
177                 I1_LOAD_S(1) |
178                 I1_LOAD_S(2) |
179                 I1_LOAD_S(4) |
180                 I1_LOAD_S(5) |
181                 I1_LOAD_S(6) | 
182                 (5));
183       
184       if(i915->vbo)
185          OUT_RELOC(i915->vbo,
186                    I915_USAGE_VERTEX,
187                    i915->current.immediate[I915_IMMEDIATE_S0]);
188       else
189          /* FIXME: we should not do this */
190          OUT_BATCH(0);
191       OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S1]);
192       OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S2]);
193       OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S4]);
194       OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S5]);
195       OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S6]);
196    } 
197    
198    /* I915_MAX_DYNAMIC dwords, 0 relocs */
199    if (i915->hardware_dirty & I915_HW_DYNAMIC) 
200    {
201       int i;
202       for (i = 0; i < I915_MAX_DYNAMIC; i++) {
203          OUT_BATCH(i915->current.dynamic[i]);
204       }
205    }
206    
207    /* 8 dwords, 2 relocs */
208    if (i915->hardware_dirty & I915_HW_STATIC)
209    {
210       struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0];
211       struct pipe_surface *depth_surface = i915->framebuffer.zsbuf;
212
213       if (cbuf_surface) {
214          unsigned ctile = BUF_3D_USE_FENCE;
215          struct i915_texture *tex = i915_texture(cbuf_surface->texture);
216          assert(tex);
217
218          if (tex && tex->sw_tiled) {
219             ctile = BUF_3D_TILED_SURFACE;
220          }
221
222          OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
223
224          OUT_BATCH(BUF_3D_ID_COLOR_BACK |
225                    BUF_3D_PITCH(tex->stride) |  /* pitch in bytes */
226                    ctile);
227
228          OUT_RELOC(tex->buffer,
229                    I915_USAGE_RENDER,
230                    cbuf_surface->offset);
231       }
232
233       /* What happens if no zbuf??
234        */
235       if (depth_surface) {
236          unsigned ztile = BUF_3D_USE_FENCE;
237          struct i915_texture *tex = i915_texture(depth_surface->texture);
238          assert(tex);
239
240          if (tex && tex->sw_tiled) {
241             ztile = BUF_3D_TILED_SURFACE;
242          }
243
244          OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
245
246          assert(tex);
247          OUT_BATCH(BUF_3D_ID_DEPTH |
248                    BUF_3D_PITCH(tex->stride) |  /* pitch in bytes */
249                    ztile);
250
251          OUT_RELOC(tex->buffer,
252                    I915_USAGE_RENDER,
253                    depth_surface->offset);
254       }
255    
256       {
257          unsigned cformat, zformat = 0;
258       
259          if (cbuf_surface)
260             cformat = cbuf_surface->format;
261          else
262             cformat = PIPE_FORMAT_B8G8R8A8_UNORM; /* arbitrary */
263          cformat = translate_format(cformat);
264
265          if (depth_surface) 
266             zformat = translate_depth_format( i915->framebuffer.zsbuf->format );
267
268          OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD);
269          OUT_BATCH(DSTORG_HORT_BIAS(0x8) | /* .5 */
270                    DSTORG_VERT_BIAS(0x8) | /* .5 */
271                    LOD_PRECLAMP_OGL |
272                    TEX_DEFAULT_COLOR_OGL |
273                    cformat |
274                    zformat );
275       }
276    }
277
278 #if 01
279       /* texture images */
280       /* 2 + I915_TEX_UNITS*3 dwords, I915_TEX_UNITS relocs */
281       if (i915->hardware_dirty & (I915_HW_MAP | I915_HW_SAMPLER))
282       {
283          const uint nr = i915->current.sampler_enable_nr;
284          if (nr) {
285             const uint enabled = i915->current.sampler_enable_flags;
286             uint unit;
287             uint count = 0;
288             OUT_BATCH(_3DSTATE_MAP_STATE | (3 * nr));
289             OUT_BATCH(enabled);
290             for (unit = 0; unit < I915_TEX_UNITS; unit++) {
291                if (enabled & (1 << unit)) {
292                   struct i915_texture *texture = i915_texture(i915->fragment_sampler_views[unit]->texture);
293                   struct i915_winsys_buffer *buf = texture->buffer;
294                   uint offset = 0;
295                   assert(buf);
296
297                   count++;
298
299                   OUT_RELOC(buf, I915_USAGE_SAMPLER, offset);
300                   OUT_BATCH(i915->current.texbuffer[unit][0]); /* MS3 */
301                   OUT_BATCH(i915->current.texbuffer[unit][1]); /* MS4 */
302                }
303             }
304             assert(count == nr);
305          }
306       }
307 #endif
308
309 #if 01
310    /* samplers */
311    /* 2 + I915_TEX_UNITS*3 dwords, 0 relocs */
312    if (i915->hardware_dirty & I915_HW_SAMPLER) 
313    {
314       if (i915->current.sampler_enable_nr) {
315          int i;
316          
317          OUT_BATCH( _3DSTATE_SAMPLER_STATE | 
318                     (3 * i915->current.sampler_enable_nr) );
319
320          OUT_BATCH( i915->current.sampler_enable_flags );
321
322          for (i = 0; i < I915_TEX_UNITS; i++) {
323             if (i915->current.sampler_enable_flags & (1<<i)) {
324                OUT_BATCH( i915->current.sampler[i][0] );
325                OUT_BATCH( i915->current.sampler[i][1] );
326                OUT_BATCH( i915->current.sampler[i][2] );
327             }
328          }
329       }
330    }
331 #endif
332
333    /* constants */
334    /* 2 + I915_MAX_CONSTANT*4 dwords, 0 relocs */
335    if (i915->hardware_dirty & I915_HW_PROGRAM)
336    {
337       /* Collate the user-defined constants with the fragment shader's
338        * immediates according to the constant_flags[] array.
339        */
340       const uint nr = i915->fs->num_constants;
341       if (nr) {
342          uint i;
343
344          OUT_BATCH( _3DSTATE_PIXEL_SHADER_CONSTANTS | (nr * 4) );
345          OUT_BATCH( (1 << (nr - 1)) | ((1 << (nr - 1)) - 1) );
346
347          for (i = 0; i < nr; i++) {
348             const uint *c;
349             if (i915->fs->constant_flags[i] == I915_CONSTFLAG_USER) {
350                /* grab user-defined constant */
351                c = (uint *) i915->current.constants[PIPE_SHADER_FRAGMENT][i];
352             }
353             else {
354                /* emit program constant */
355                c = (uint *) i915->fs->constants[i];
356             }
357 #if 0 /* debug */
358             {
359                float *f = (float *) c;
360                printf("Const %2d: %f %f %f %f %s\n", i, f[0], f[1], f[2], f[3],
361                       (i915->fs->constant_flags[i] == I915_CONSTFLAG_USER
362                        ? "user" : "immediate"));
363             }
364 #endif
365             OUT_BATCH(*c++);
366             OUT_BATCH(*c++);
367             OUT_BATCH(*c++);
368             OUT_BATCH(*c++);
369          }
370       }
371    }
372
373    /* Fragment program */
374    /* i915->current.program_len dwords, 0 relocs */
375    if (i915->hardware_dirty & I915_HW_PROGRAM)
376    {
377       uint i;
378       /* we should always have, at least, a pass-through program */
379       assert(i915->fs->program_len > 0);
380       for (i = 0; i < i915->fs->program_len; i++) {
381          OUT_BATCH(i915->fs->program[i]);
382       }
383    }
384
385    /* drawing surface size */
386    /* 6 dwords, 0 relocs */
387    {
388       uint w, h;
389       boolean k = framebuffer_size(&i915->framebuffer, &w, &h);
390       (void)k;
391       assert(k);
392
393       OUT_BATCH(_3DSTATE_DRAW_RECT_CMD);
394       OUT_BATCH(0);
395       OUT_BATCH(0);
396       OUT_BATCH(((w - 1) & 0xffff) | ((h - 1) << 16));
397       OUT_BATCH(0);
398       OUT_BATCH(0);
399    }
400
401
402    i915->hardware_dirty = 0;
403 }