2 * (C) Copyright Eric Anholt 2006
3 * (C) Copyright IBM Corporation 2006
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29 * Access the kernel PCI support using /dev/pci's ioctl and mmap interface.
31 * \author Eric Anholt <eric@anholt.net>
40 #include <sys/types.h>
41 #include <sys/pciio.h>
44 #include "pciaccess.h"
45 #include "pciaccess_private.h"
48 * FreeBSD private pci_system structure that extends the base pci_system
51 * It is initialized once and used as a global, just as pci_system is used.
53 struct freebsd_pci_system {
54 struct pci_system pci_sys;
56 int pcidev; /**< fd for /dev/pci */
60 * Map a memory region for a device using /dev/mem.
62 * \param dev Device whose memory region is to be mapped.
63 * \param region Region, on the range [0, 5], that is to be mapped.
64 * \param write_enable Map for writing (non-zero).
67 * Zero on success or an \c errno value on failure.
70 pci_device_freebsd_map( struct pci_device *dev, unsigned region,
73 int fd, err = 0, prot;
75 fd = open( "/dev/mem", write_enable ? O_RDWR : O_RDONLY );
79 prot = write_enable ? (PROT_READ | PROT_WRITE) : PROT_READ;
80 dev->regions[ region ].memory = mmap( NULL, dev->regions[ region ].size,
82 dev->regions[ region ].base_addr);
84 if ( dev->regions[ region ].memory == MAP_FAILED ) {
85 dev->regions[ region ].memory = NULL;
95 * Unmap the specified region.
97 * \param dev Device whose memory region is to be unmapped.
98 * \param region Region, on the range [0, 5], that is to be unmapped.
101 * Zero on success or an \c errno value on failure.
104 pci_device_freebsd_unmap( struct pci_device * dev, unsigned region )
108 if ( munmap( dev->regions[ region ].memory,
109 dev->regions[ region ].size ) == -1) {
113 dev->regions[ region ].memory = NULL;
119 pci_device_freebsd_read( struct pci_device * dev, void * data,
120 pciaddr_t offset, pciaddr_t size,
121 pciaddr_t * bytes_read )
125 io.pi_sel.pc_bus = dev->bus;
126 io.pi_sel.pc_dev = dev->dev;
127 io.pi_sel.pc_func = dev->func;
131 int toread = (size < 4) ? size : 4;
133 /* Only power of two allowed. */
138 io.pi_width = toread;
140 if ( ioctl( freebsd_pci_sys->pcidev, PCIOCREAD, &io ) < 0 )
143 memcpy(data, &io.pi_data, toread );
146 data = (char *)data + toread;
148 *bytes_read += toread;
156 pci_device_freebsd_write( struct pci_device * dev, const void * data,
157 pciaddr_t offset, pciaddr_t size,
158 pciaddr_t * bytes_written )
162 io.pi_sel.pc_bus = dev->bus;
163 io.pi_sel.pc_dev = dev->dev;
164 io.pi_sel.pc_func = dev->func;
168 int towrite = (size < 4 ? size : 4);
171 io.pi_width = towrite;
172 memcpy( &io.pi_data, data, towrite );
174 if ( ioctl( freebsd_pci_sys->pcidev, PCIOCWRITE, &io ) < 0 )
178 data = (char *)data + towrite;
180 *bytes_written += towrite;
186 /** Returns the number of regions (base address registers) the device has */
189 pci_device_freebsd_get_num_regions( struct pci_device * dev )
191 struct pci_device_private *priv = (struct pci_device_private *) dev;
193 switch (priv->header_type & 0x7f) {
201 printf("unknown header type %02x\n", priv->header_type);
206 /** Masks out the flag bigs of the base address register value */
208 get_map_base( uint32_t val )
216 /** Returns the size of a region based on the all-ones test value */
218 get_test_val_size( uint32_t testval )
225 /* Mask out the flag bits */
226 testval = get_map_base( testval );
228 while ((testval & 1) == 0) {
237 * Sets the address and size information for the region from config space
240 * This would be much better provided by a kernel interface.
242 * \return 0 on success, or an errno value.
245 pci_device_freebsd_get_region_info( struct pci_device * dev, int region,
248 uint32_t addr, testval;
251 /* Get the base address */
252 err = pci_device_cfg_read_u32( dev, &addr, bar );
256 /* Test write all ones to the register, then restore it. */
257 err = pci_device_cfg_write_u32( dev, 0xffffffff, bar );
260 pci_device_cfg_read_u32( dev, &testval, bar );
261 err = pci_device_cfg_write_u32( dev, addr, bar );
264 dev->regions[region].is_IO = 1;
266 dev->regions[region].is_64 = 1;
268 dev->regions[region].is_prefetchable = 1;
271 dev->regions[region].size = get_test_val_size( testval );
273 /* Set the base address value */
274 if (dev->regions[region].is_64) {
277 err = pci_device_cfg_read_u32( dev, &top, bar + 4 );
281 dev->regions[region].base_addr = ((uint64_t)top << 32) |
284 dev->regions[region].base_addr = get_map_base(addr);
291 pci_device_freebsd_probe( struct pci_device * dev )
293 struct pci_device_private *priv = (struct pci_device_private *) dev;
297 /* Many of the fields were filled in during initial device enumeration.
298 * At this point, we need to fill in regions, rom_size, and irq.
301 err = pci_device_cfg_read_u8( dev, &irq, 60 );
306 err = pci_device_cfg_read_u8( dev, &priv->header_type, 0x0e );
311 for (i = 0; i < pci_device_freebsd_get_num_regions( dev ); i++) {
312 pci_device_freebsd_get_region_info( dev, i, bar );
313 if (dev->regions[i].is_64)
323 pci_system_freebsd_destroy()
325 close(freebsd_pci_sys->pcidev);
326 free(freebsd_pci_sys->pci_sys.devices);
327 free(freebsd_pci_sys);
328 freebsd_pci_sys = NULL;
331 static const struct pci_system_methods freebsd_pci_methods = {
332 .destroy = pci_system_freebsd_destroy,
333 .destroy_device = NULL,
334 .read_rom = NULL, /* XXX: Fill me in */
335 .probe = pci_device_freebsd_probe,
336 .map = pci_device_freebsd_map,
337 .unmap = pci_device_freebsd_unmap,
338 .read = pci_device_freebsd_read,
339 .write = pci_device_freebsd_write,
340 .fill_capabilities = pci_fill_capabilities_generic,
344 * Attempt to access the FreeBSD PCI interface.
347 pci_system_freebsd_create( void )
349 struct pci_conf_io pciconfio;
350 struct pci_conf pciconf[255];
354 /* Try to open the PCI device */
355 pcidev = open( "/dev/pci", O_RDWR );
359 freebsd_pci_sys = calloc( 1, sizeof( struct freebsd_pci_system ) );
360 if ( freebsd_pci_sys == NULL ) {
364 pci_sys = &freebsd_pci_sys->pci_sys;
366 pci_sys->methods = & freebsd_pci_methods;
367 freebsd_pci_sys->pcidev = pcidev;
369 /* Probe the list of devices known by the system */
370 bzero( &pciconfio, sizeof( struct pci_conf_io ) );
371 pciconfio.match_buf_len = sizeof(pciconf);
372 pciconfio.matches = pciconf;
374 if ( ioctl( pcidev, PCIOCGETCONF, &pciconfio ) == -1) {
380 if (pciconfio.status == PCI_GETCONF_ERROR ) {
386 /* Translate the list of devices into pciaccess's format. */
387 pci_sys->num_devices = pciconfio.num_matches;
388 pci_sys->devices = calloc( pciconfio.num_matches,
389 sizeof( struct pci_device_private ) );
391 for ( i = 0; i < pciconfio.num_matches; i++ ) {
392 struct pci_conf *p = &pciconf[ i ];
394 pci_sys->devices[ i ].base.domain = 0; /* XXX */
395 pci_sys->devices[ i ].base.bus = p->pc_sel.pc_bus;
396 pci_sys->devices[ i ].base.dev = p->pc_sel.pc_dev;
397 pci_sys->devices[ i ].base.func = p->pc_sel.pc_func;
398 pci_sys->devices[ i ].base.vendor_id = p->pc_vendor;
399 pci_sys->devices[ i ].base.device_id = p->pc_device;
400 pci_sys->devices[ i ].base.subvendor_id = p->pc_subvendor;
401 pci_sys->devices[ i ].base.device_class = (uint32_t)p->pc_class << 16 |
402 (uint32_t)p->pc_subclass << 8 | (uint32_t)p->pc_progif;