2 * (C) Copyright Eric Anholt 2006
3 * (C) Copyright IBM Corporation 2006
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29 * Access the kernel PCI support using /dev/pci's ioctl and mmap interface.
31 * \author Eric Anholt <eric@anholt.net>
40 #include <sys/types.h>
41 #include <sys/param.h>
42 #include <sys/pciio.h>
44 #include <sys/memrange.h>
46 #if __FreeBSD_version >= 700053
47 #define DOMAIN_SUPPORT 1
49 #define DOMAIN_SUPPORT 0
52 #include "pciaccess.h"
53 #include "pciaccess_private.h"
55 #define PCIC_DISPLAY 0x03
56 #define PCIS_DISPLAY_VGA 0x00
57 #define PCIS_DISPLAY_XGA 0x01
58 #define PCIS_DISPLAY_3D 0x02
59 #define PCIS_DISPLAY_OTHER 0x80
62 * FreeBSD private pci_system structure that extends the base pci_system
65 * It is initialized once and used as a global, just as pci_system is used.
67 struct freebsd_pci_system {
68 /* This must be the first entry in the structure, as pci_system_cleanup()
71 struct pci_system pci_sys;
73 int pcidev; /**< fd for /dev/pci */
77 * Map a memory region for a device using /dev/mem.
79 * \param dev Device whose memory region is to be mapped.
80 * \param map Parameters of the mapping that is to be created.
83 * Zero on success or an \c errno value on failure.
86 pci_device_freebsd_map_range(struct pci_device *dev,
87 struct pci_device_mapping *map)
89 const int prot = ((map->flags & PCI_DEV_MAP_FLAG_WRITABLE) != 0)
90 ? (PROT_READ | PROT_WRITE) : PROT_READ;
91 struct mem_range_desc mrd;
92 struct mem_range_op mro;
96 fd = open("/dev/mem", O_RDWR);
100 map->memory = mmap(NULL, map->size, prot, MAP_SHARED, fd, map->base);
102 if (map->memory == MAP_FAILED) {
106 mrd.mr_base = map->base;
107 mrd.mr_len = map->size;
108 strncpy(mrd.mr_owner, "pciaccess", sizeof(mrd.mr_owner));
109 if (map->flags & PCI_DEV_MAP_FLAG_CACHABLE)
110 mrd.mr_flags = MDF_WRITEBACK;
111 else if (map->flags & PCI_DEV_MAP_FLAG_WRITE_COMBINE)
112 mrd.mr_flags = MDF_WRITECOMBINE;
114 mrd.mr_flags = MDF_UNCACHEABLE;
116 mro.mo_arg[0] = MEMRANGE_SET_UPDATE;
118 /* No need to set an MTRR if it's the default mode. */
119 if (mrd.mr_flags != MDF_UNCACHEABLE) {
120 if (ioctl(fd, MEMRANGE_SET, &mro)) {
121 fprintf(stderr, "failed to set mtrr: %s\n", strerror(errno));
131 pci_device_freebsd_unmap_range( struct pci_device *dev,
132 struct pci_device_mapping *map )
134 struct mem_range_desc mrd;
135 struct mem_range_op mro;
138 if ((map->flags & PCI_DEV_MAP_FLAG_CACHABLE) ||
139 (map->flags & PCI_DEV_MAP_FLAG_WRITE_COMBINE))
141 fd = open("/dev/mem", O_RDWR);
143 mrd.mr_base = map->base;
144 mrd.mr_len = map->size;
145 strncpy(mrd.mr_owner, "pciaccess", sizeof(mrd.mr_owner));
146 mrd.mr_flags = MDF_UNCACHEABLE;
148 mro.mo_arg[0] = MEMRANGE_SET_REMOVE;
150 if (ioctl(fd, MEMRANGE_SET, &mro)) {
151 fprintf(stderr, "failed to unset mtrr: %s\n", strerror(errno));
156 fprintf(stderr, "Failed to open /dev/mem\n");
160 return pci_device_generic_unmap_range(dev, map);
164 pci_device_freebsd_read( struct pci_device * dev, void * data,
165 pciaddr_t offset, pciaddr_t size,
166 pciaddr_t * bytes_read )
171 io.pi_sel.pc_domain = dev->domain;
173 io.pi_sel.pc_bus = dev->bus;
174 io.pi_sel.pc_dev = dev->dev;
175 io.pi_sel.pc_func = dev->func;
179 int toread = (size < 4) ? size : 4;
181 /* Only power of two allowed. */
186 io.pi_width = toread;
188 if ( ioctl( freebsd_pci_sys->pcidev, PCIOCREAD, &io ) < 0 )
191 memcpy(data, &io.pi_data, toread );
194 data = (char *)data + toread;
196 *bytes_read += toread;
204 pci_device_freebsd_write( struct pci_device * dev, const void * data,
205 pciaddr_t offset, pciaddr_t size,
206 pciaddr_t * bytes_written )
211 io.pi_sel.pc_domain = dev->domain;
213 io.pi_sel.pc_bus = dev->bus;
214 io.pi_sel.pc_dev = dev->dev;
215 io.pi_sel.pc_func = dev->func;
219 int towrite = (size < 4 ? size : 4);
222 io.pi_width = towrite;
223 memcpy( &io.pi_data, data, towrite );
225 if ( ioctl( freebsd_pci_sys->pcidev, PCIOCWRITE, &io ) < 0 )
229 data = (char *)data + towrite;
231 *bytes_written += towrite;
238 * Read a VGA rom using the 0xc0000 mapping.
240 * This function should be extended to handle access through PCI resources,
241 * which should be more reliable when available.
244 pci_device_freebsd_read_rom( struct pci_device * dev, void * buffer )
249 if ( ( dev->device_class & 0x00ffff00 ) !=
250 ( ( PCIC_DISPLAY << 16 ) | ( PCIS_DISPLAY_VGA << 8 ) ) )
255 memfd = open( "/dev/mem", O_RDONLY );
259 bios = mmap( NULL, dev->rom_size, PROT_READ, 0, memfd, 0xc0000 );
260 if ( bios == MAP_FAILED ) {
265 memcpy( buffer, bios, dev->rom_size );
267 munmap( bios, dev->rom_size );
273 /** Returns the number of regions (base address registers) the device has */
276 pci_device_freebsd_get_num_regions( struct pci_device * dev )
278 struct pci_device_private *priv = (struct pci_device_private *) dev;
280 switch (priv->header_type & 0x7f) {
288 printf("unknown header type %02x\n", priv->header_type);
293 /** Masks out the flag bigs of the base address register value */
295 get_map_base( uint32_t val )
303 /** Returns the size of a region based on the all-ones test value */
305 get_test_val_size( uint32_t testval )
312 /* Mask out the flag bits */
313 testval = get_map_base( testval );
315 while ((testval & 1) == 0) {
324 * Sets the address and size information for the region from config space
327 * This would be much better provided by a kernel interface.
329 * \return 0 on success, or an errno value.
332 pci_device_freebsd_get_region_info( struct pci_device * dev, int region,
335 uint32_t addr, testval;
338 /* Get the base address */
339 err = pci_device_cfg_read_u32( dev, &addr, bar );
343 /* Test write all ones to the register, then restore it. */
344 err = pci_device_cfg_write_u32( dev, 0xffffffff, bar );
347 pci_device_cfg_read_u32( dev, &testval, bar );
348 err = pci_device_cfg_write_u32( dev, addr, bar );
351 dev->regions[region].is_IO = 1;
353 dev->regions[region].is_64 = 1;
355 dev->regions[region].is_prefetchable = 1;
358 dev->regions[region].size = get_test_val_size( testval );
360 /* Set the base address value */
361 if (dev->regions[region].is_64) {
364 err = pci_device_cfg_read_u32( dev, &top, bar + 4 );
368 dev->regions[region].base_addr = ((uint64_t)top << 32) |
371 dev->regions[region].base_addr = get_map_base(addr);
378 pci_device_freebsd_probe( struct pci_device * dev )
380 struct pci_device_private *priv = (struct pci_device_private *) dev;
384 /* Many of the fields were filled in during initial device enumeration.
385 * At this point, we need to fill in regions, rom_size, and irq.
388 err = pci_device_cfg_read_u8( dev, &irq, 60 );
393 err = pci_device_cfg_read_u8( dev, &priv->header_type, 0x0e );
398 for (i = 0; i < pci_device_freebsd_get_num_regions( dev ); i++) {
399 pci_device_freebsd_get_region_info( dev, i, bar );
400 if (dev->regions[i].is_64) {
407 /* If it's a VGA device, set up the rom size for read_rom using the
410 if ((dev->device_class & 0x00ffff00) ==
411 ((PCIC_DISPLAY << 16) | (PCIS_DISPLAY_VGA << 8)))
413 dev->rom_size = 64 * 1024;
420 pci_system_freebsd_destroy(void)
422 close(freebsd_pci_sys->pcidev);
423 free(freebsd_pci_sys->pci_sys.devices);
424 freebsd_pci_sys = NULL;
427 static const struct pci_system_methods freebsd_pci_methods = {
428 .destroy = pci_system_freebsd_destroy,
429 .destroy_device = NULL, /* nothing to do for this */
430 .read_rom = pci_device_freebsd_read_rom,
431 .probe = pci_device_freebsd_probe,
432 .map_range = pci_device_freebsd_map_range,
433 .unmap_range = pci_device_freebsd_unmap_range,
434 .read = pci_device_freebsd_read,
435 .write = pci_device_freebsd_write,
436 .fill_capabilities = pci_fill_capabilities_generic,
440 * Attempt to access the FreeBSD PCI interface.
443 pci_system_freebsd_create( void )
445 struct pci_conf_io pciconfio;
446 struct pci_conf pciconf[255];
450 /* Try to open the PCI device */
451 pcidev = open( "/dev/pci", O_RDWR );
455 freebsd_pci_sys = calloc( 1, sizeof( struct freebsd_pci_system ) );
456 if ( freebsd_pci_sys == NULL ) {
460 pci_sys = &freebsd_pci_sys->pci_sys;
462 pci_sys->methods = & freebsd_pci_methods;
463 freebsd_pci_sys->pcidev = pcidev;
465 /* Probe the list of devices known by the system */
466 bzero( &pciconfio, sizeof( struct pci_conf_io ) );
467 pciconfio.match_buf_len = sizeof(pciconf);
468 pciconfio.matches = pciconf;
470 if ( ioctl( pcidev, PCIOCGETCONF, &pciconfio ) == -1) {
476 if (pciconfio.status == PCI_GETCONF_ERROR ) {
482 /* Translate the list of devices into pciaccess's format. */
483 pci_sys->num_devices = pciconfio.num_matches;
484 pci_sys->devices = calloc( pciconfio.num_matches,
485 sizeof( struct pci_device_private ) );
487 for ( i = 0; i < pciconfio.num_matches; i++ ) {
488 struct pci_conf *p = &pciconf[ i ];
491 pci_sys->devices[ i ].base.domain = p->pc_sel.pc_domain;
493 pci_sys->devices[ i ].base.domain = 0;
495 pci_sys->devices[ i ].base.bus = p->pc_sel.pc_bus;
496 pci_sys->devices[ i ].base.dev = p->pc_sel.pc_dev;
497 pci_sys->devices[ i ].base.func = p->pc_sel.pc_func;
498 pci_sys->devices[ i ].base.vendor_id = p->pc_vendor;
499 pci_sys->devices[ i ].base.device_id = p->pc_device;
500 pci_sys->devices[ i ].base.subvendor_id = p->pc_subvendor;
501 pci_sys->devices[ i ].base.subdevice_id = p->pc_subdevice;
502 pci_sys->devices[ i ].base.device_class = (uint32_t)p->pc_class << 16 |
503 (uint32_t)p->pc_subclass << 8 | (uint32_t)p->pc_progif;