1 /**************************************************************************
3 * Copyright 2005 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #ifndef CAIRO_DRM_INTEL_BRW_STRUCTS_H
29 #define CAIRO_DRM_INTEL_BRW_STRUCTS_H
31 #include "cairo-types-private.h"
36 unsigned int length:16;
37 unsigned int opcode:16;
45 struct brw_3d_control {
47 unsigned int length:8;
48 unsigned int notify_enable:1;
50 unsigned int wc_flush_enable:1;
51 unsigned int depth_stall_enable:1;
52 unsigned int operation:2;
53 unsigned int opcode:16;
58 unsigned int dest_addr_type:1;
59 unsigned int dest_addr:29;
67 struct brw_3d_primitive {
69 unsigned int length:8;
71 unsigned int topology:5;
72 unsigned int indexed:1;
73 unsigned int opcode:16;
76 unsigned int verts_per_instance;
77 unsigned int start_vert_location;
78 unsigned int instance_count;
79 unsigned int start_instance_location;
80 unsigned int base_vert_location;
83 /* These seem to be passed around as function args, so it works out
84 * better to keep them as #defines:
86 #define BRW_FLUSH_READ_CACHE 0x1
87 #define BRW_FLUSH_STATE_CACHE 0x2
88 #define BRW_INHIBIT_FLUSH_RENDER_CACHE 0x4
89 #define BRW_FLUSH_SNAPSHOT_COUNTERS 0x8
94 unsigned int opcode:16;
97 struct brw_vf_statistics {
98 unsigned int statistics_enable:1;
100 unsigned int opcode:16;
104 struct brw_binding_table_pointers {
105 struct header header;
113 struct brw_blend_constant_color {
114 struct header header;
115 float blend_constant_color[4];
118 struct brw_depthbuffer {
119 union header_union header;
123 unsigned int pitch:18;
124 unsigned int format:3;
126 unsigned int depth_offset_disable:1;
127 unsigned int tile_walk:1;
128 unsigned int tiled_surface:1;
130 unsigned int surface_type:3;
135 unsigned int dword2_base_addr;
140 unsigned int mipmap_layout:1;
142 unsigned int width:13;
143 unsigned int height:13;
151 unsigned int min_array_element:9;
152 unsigned int depth:11;
158 struct brw_drawrect {
159 struct header header;
160 unsigned int xmin:16;
161 unsigned int ymin:16;
162 unsigned int xmax:16;
163 unsigned int ymax:16;
164 unsigned int xorg:16;
165 unsigned int yorg:16;
168 struct brw_global_depth_offset_clamp {
169 struct header header;
170 float depth_offset_clamp;
173 struct brw_indexbuffer {
176 unsigned int length:8;
177 unsigned int index_format:2;
178 unsigned int cut_index_enable:1;
180 unsigned int opcode:16;
184 unsigned int buffer_start;
185 unsigned int buffer_end;
189 struct brw_line_stipple {
190 struct header header;
193 unsigned int pattern:16;
198 unsigned int repeat_count:9;
200 unsigned int inverse_repeat_count:16;
204 struct brw_pipelined_state_pointers {
205 struct header header;
209 unsigned int offset:27;
213 unsigned int enable:1;
215 unsigned int offset:27;
219 unsigned int enable:1;
221 unsigned int offset:27;
226 unsigned int offset:27;
231 unsigned int offset:27;
236 unsigned int offset:26;
240 struct brw_polygon_stipple_offset {
241 struct header header;
244 unsigned int y_offset:5;
246 unsigned int x_offset:5;
247 unsigned int pad0:19;
251 struct brw_polygon_stipple {
252 struct header header;
253 unsigned int stipple[32];
256 struct brw_pipeline_select {
258 unsigned int pipeline_select:1;
260 unsigned int opcode:16;
264 struct brw_pipe_control {
266 unsigned int length:8;
267 unsigned int notify_enable:1;
269 unsigned int instruction_state_cache_flush_enable:1;
270 unsigned int write_cache_flush_enable:1;
271 unsigned int depth_stall_enable:1;
272 unsigned int post_sync_operation:2;
274 unsigned int opcode:16;
279 unsigned int dest_addr_type:1;
280 unsigned int dest_addr:29;
288 struct brw_urb_fence {
290 unsigned int length:8;
291 unsigned int vs_realloc:1;
292 unsigned int gs_realloc:1;
293 unsigned int clp_realloc:1;
294 unsigned int sf_realloc:1;
295 unsigned int vfe_realloc:1;
296 unsigned int cs_realloc:1;
298 unsigned int opcode:16;
302 unsigned int vs_fence:10;
303 unsigned int gs_fence:10;
304 unsigned int clp_fence:10;
309 unsigned int sf_fence:10;
310 unsigned int vf_fence:10;
311 unsigned int cs_fence:10;
316 struct brw_constant_buffer_state {
317 struct header header;
320 unsigned int nr_urb_entries:3;
322 unsigned int urb_entry_size:5;
323 unsigned int pad0:23;
327 struct brw_constant_buffer {
329 unsigned int length:8;
330 unsigned int valid:1;
332 unsigned int opcode:16;
336 unsigned int buffer_length:6;
337 unsigned int buffer_address:26;
341 struct brw_state_base_address {
342 struct header header;
345 unsigned int modify_enable:1;
347 unsigned int general_state_address:27;
351 unsigned int modify_enable:1;
353 unsigned int surface_state_address:27;
357 unsigned int modify_enable:1;
359 unsigned int indirect_object_state_address:27;
363 unsigned int modify_enable:1;
365 unsigned int general_state_upper_bound:20;
369 unsigned int modify_enable:1;
371 unsigned int indirect_object_state_upper_bound:20;
375 struct brw_state_prefetch {
376 struct header header;
379 unsigned int prefetch_count:3;
381 unsigned int prefetch_pointer:26;
385 struct brw_system_instruction_pointer {
386 struct header header;
390 unsigned int system_instruction_pointer:28;
395 /* State structs for the various fixed function units:
400 unsigned int grf_reg_count:3;
402 unsigned int kernel_start_pointer:26;
406 unsigned int ext_halt_exception_enable:1;
407 unsigned int sw_exception_enable:1;
408 unsigned int mask_stack_exception_enable:1;
409 unsigned int timeout_exception_enable:1;
410 unsigned int illegal_op_exception_enable:1;
412 unsigned int depth_coef_urb_read_offset:6; /* WM only */
414 unsigned int floating_point_mode:1;
415 unsigned int thread_priority:1;
416 unsigned int binding_table_entry_count:8;
418 unsigned int single_program_flow:1;
422 unsigned int per_thread_scratch_space:4;
424 unsigned int scratch_space_base_pointer:22;
428 unsigned int dispatch_grf_start_reg:4;
429 unsigned int urb_entry_read_offset:6;
431 unsigned int urb_entry_read_length:6;
433 unsigned int const_urb_entry_read_offset:6;
435 unsigned int const_urb_entry_read_length:6;
439 struct brw_clip_unit_state {
440 struct thread0 thread0;
441 struct thread1 thread1;
442 struct thread2 thread2;
443 struct thread3 thread3;
447 unsigned int gs_output_stats:1; /* not always */
448 unsigned int stats_enable:1;
449 unsigned int nr_urb_entries:7;
451 unsigned int urb_entry_allocation_size:5;
453 unsigned int max_threads:6; /* may be less */
458 unsigned int pad0:13;
459 unsigned int clip_mode:3;
460 unsigned int userclip_enable_flags:8;
461 unsigned int userclip_must_clip:1;
463 unsigned int guard_band_enable:1;
464 unsigned int viewport_z_clip_enable:1;
465 unsigned int viewport_xy_clip_enable:1;
466 unsigned int vertex_position_space:1;
467 unsigned int api_mode:1;
473 unsigned int clipper_viewport_state_ptr:27;
482 struct brw_cc_unit_state {
485 unsigned int bf_stencil_pass_depth_pass_op:3;
486 unsigned int bf_stencil_pass_depth_fail_op:3;
487 unsigned int bf_stencil_fail_op:3;
488 unsigned int bf_stencil_func:3;
489 unsigned int bf_stencil_enable:1;
491 unsigned int stencil_write_enable:1;
492 unsigned int stencil_pass_depth_pass_op:3;
493 unsigned int stencil_pass_depth_fail_op:3;
494 unsigned int stencil_fail_op:3;
495 unsigned int stencil_func:3;
496 unsigned int stencil_enable:1;
500 unsigned int bf_stencil_ref:8;
501 unsigned int stencil_write_mask:8;
502 unsigned int stencil_test_mask:8;
503 unsigned int stencil_ref:8;
507 unsigned int logicop_enable:1;
508 unsigned int pad0:10;
509 unsigned int depth_write_enable:1;
510 unsigned int depth_test_function:3;
511 unsigned int depth_test:1;
512 unsigned int bf_stencil_write_mask:8;
513 unsigned int bf_stencil_test_mask:8;
518 unsigned int alpha_test_func:3;
519 unsigned int alpha_test:1;
520 unsigned int blend_enable:1;
521 unsigned int ia_blend_enable:1;
523 unsigned int alpha_test_format:1;
524 unsigned int pad2:16;
529 unsigned int cc_viewport_state_offset:27;
534 unsigned int ia_dest_blend_factor:5;
535 unsigned int ia_src_blend_factor:5;
536 unsigned int ia_blend_function:3;
537 unsigned int statistics_enable:1;
538 unsigned int logicop_func:4;
539 unsigned int pad1:11;
540 unsigned int dither_enable:1;
544 unsigned int clamp_post_alpha_blend:1;
545 unsigned int clamp_pre_alpha_blend:1;
546 unsigned int clamp_range:2;
547 unsigned int pad0:11;
548 unsigned int y_dither_offset:2;
549 unsigned int x_dither_offset:2;
550 unsigned int dest_blend_factor:5;
551 unsigned int src_blend_factor:5;
552 unsigned int blend_function:3;
563 struct brw_sf_unit_state {
564 struct thread0 thread0;
567 unsigned int sw_exception_enable:1;
569 unsigned int mask_stack_exception_enable:1;
571 unsigned int illegal_op_exception_enable:1;
573 unsigned int floating_point_mode:1;
574 unsigned int thread_priority:1;
575 unsigned int binding_table_entry_count:8;
577 unsigned int single_program_flow:1;
580 struct thread2 thread2;
581 struct thread3 thread3;
584 unsigned int pad0:10;
585 unsigned int stats_enable:1;
586 unsigned int nr_urb_entries:7;
588 unsigned int urb_entry_allocation_size:5;
590 unsigned int max_threads:6;
595 unsigned int front_winding:1;
596 unsigned int viewport_transform:1;
598 unsigned int sf_viewport_state_offset:27;
603 unsigned int dest_org_vbias:4;
604 unsigned int dest_org_hbias:4;
605 unsigned int scissor:1;
606 unsigned int disable_2x2_trifilter:1;
607 unsigned int disable_zero_pix_trifilter:1;
608 unsigned int point_rast_rule:2;
609 unsigned int line_endcap_aa_region_width:2;
610 unsigned int line_width:4;
611 unsigned int fast_scissor_disable:1;
612 unsigned int cull_mode:2;
613 unsigned int aa_enable:1;
617 unsigned int point_size:11;
618 unsigned int use_point_size_state:1;
619 unsigned int subpixel_precision:1;
620 unsigned int sprite_point:1;
621 unsigned int pad0:11;
622 unsigned int trifan_pv:2;
623 unsigned int linestrip_pv:2;
624 unsigned int tristrip_pv:2;
625 unsigned int line_last_pixel_enable:1;
629 struct brw_gs_unit_state {
630 struct thread0 thread0;
631 struct thread1 thread1;
632 struct thread2 thread2;
633 struct thread3 thread3;
636 unsigned int pad0:10;
637 unsigned int stats_enable:1;
638 unsigned int nr_urb_entries:7;
640 unsigned int urb_entry_allocation_size:5;
642 unsigned int max_threads:1;
647 unsigned int sampler_count:3;
649 unsigned int sampler_state_pointer:27;
653 unsigned int max_vp_index:4;
654 unsigned int pad0:26;
655 unsigned int reorder_enable:1;
660 struct brw_vs_unit_state {
661 struct thread0 thread0;
662 struct thread1 thread1;
663 struct thread2 thread2;
664 struct thread3 thread3;
667 unsigned int pad0:10;
668 unsigned int stats_enable:1;
669 unsigned int nr_urb_entries:7;
671 unsigned int urb_entry_allocation_size:5;
673 unsigned int max_threads:4;
678 unsigned int sampler_count:3;
680 unsigned int sampler_state_pointer:27;
684 unsigned int vs_enable:1;
685 unsigned int vert_cache_disable:1;
686 unsigned int pad0:30;
690 struct brw_wm_unit_state {
691 struct thread0 thread0;
692 struct thread1 thread1;
693 struct thread2 thread2;
694 struct thread3 thread3;
697 unsigned int stats_enable:1;
699 unsigned int sampler_count:3;
700 unsigned int sampler_state_pointer:27;
704 unsigned int enable_8_pix:1;
705 unsigned int enable_16_pix:1;
706 unsigned int enable_32_pix:1;
708 unsigned int legacy_global_depth_bias:1;
709 unsigned int line_stipple:1;
710 unsigned int depth_offset:1;
711 unsigned int polygon_stipple:1;
712 unsigned int line_aa_region_width:2;
713 unsigned int line_endcap_aa_region_width:2;
714 unsigned int early_depth_test:1;
715 unsigned int thread_dispatch_enable:1;
716 unsigned int program_uses_depth:1;
717 unsigned int program_computes_depth:1;
718 unsigned int program_uses_killpixel:1;
719 unsigned int legacy_line_rast: 1;
720 unsigned int transposed_urb_read:1;
721 unsigned int max_threads:7;
724 float global_depth_offset_constant;
725 float global_depth_offset_scale;
728 /* The hardware supports two different modes for border color. The
729 * default (OpenGL) mode uses floating-point color channels, while the
730 * legacy mode uses 4 bytes.
732 * More significantly, the legacy mode respects the components of the
733 * border color for channels not present in the source, (whereas the
734 * default mode will ignore the border color's alpha channel and use
735 * alpha==1 for an RGB source, for example).
737 * The legacy mode matches the semantics specified by the Render
740 struct brw_sampler_default_border_color {
744 struct brw_sampler_legacy_border_color {
748 struct brw_sampler_state {
750 unsigned int shadow_function:3;
751 unsigned int lod_bias:11;
752 unsigned int min_filter:3;
753 unsigned int mag_filter:3;
754 unsigned int mip_filter:2;
755 unsigned int base_level:5;
757 unsigned int lod_preclamp:1;
758 unsigned int border_color_mode:1;
760 unsigned int disable:1;
764 unsigned int r_wrap_mode:3;
765 unsigned int t_wrap_mode:3;
766 unsigned int s_wrap_mode:3;
768 unsigned int max_lod:10;
769 unsigned int min_lod:10;
774 unsigned int border_color_pointer:27;
779 unsigned int max_aniso:3;
780 unsigned int chroma_key_mode:1;
781 unsigned int chroma_key_index:2;
782 unsigned int chroma_key_enable:1;
783 unsigned int monochrome_filter_width:3;
784 unsigned int monochrome_filter_height:3;
788 struct brw_clipper_viewport {
795 struct brw_cc_viewport {
800 struct brw_sf_viewport {
818 /* Documented in the subsystem/shared-functions/sampler chapter...
820 struct brw_surface_state {
822 unsigned int cube_pos_z:1;
823 unsigned int cube_neg_z:1;
824 unsigned int cube_pos_y:1;
825 unsigned int cube_neg_y:1;
826 unsigned int cube_pos_x:1;
827 unsigned int cube_neg_x:1;
829 unsigned int render_cache_read_mode:1;
830 unsigned int mipmap_layout_mode:1;
831 unsigned int vert_line_stride_ofs:1;
832 unsigned int vert_line_stride:1;
833 unsigned int color_blend:1;
834 unsigned int writedisable_blue:1;
835 unsigned int writedisable_green:1;
836 unsigned int writedisable_red:1;
837 unsigned int writedisable_alpha:1;
838 unsigned int surface_format:9;
839 unsigned int data_return_format:1;
841 unsigned int surface_type:3;
845 unsigned int base_addr;
849 unsigned int render_target_rotation:2;
850 unsigned int mip_count:4;
851 unsigned int width:13;
852 unsigned int height:13;
856 unsigned int tile_walk:1;
857 unsigned int tiled_surface:1;
859 unsigned int pitch:18;
860 unsigned int depth:11;
865 unsigned int min_array_elt:9;
866 unsigned int min_lod:4;
871 unsigned int y_offset:4;
873 unsigned int x_offset:7;
877 struct brw_vertex_buffer_state {
879 unsigned int pitch:11;
881 unsigned int access_type:1;
882 unsigned int vb_index:5;
885 unsigned int start_addr;
886 unsigned int max_index;
888 unsigned int instance_data_step_rate; /* not included for sequential/random vertices? */
892 #define BRW_VBP_MAX 17
894 struct brw_vb_array_state {
895 struct header header;
896 struct brw_vertex_buffer_state vb[BRW_VBP_MAX];
899 struct brw_vertex_element_state {
901 unsigned int src_offset:11;
903 unsigned int src_format:9;
905 unsigned int valid:1;
906 unsigned int vertex_buffer_index:5;
910 unsigned int dst_offset:8;
912 unsigned int vfcomponent3:4;
913 unsigned int vfcomponent2:4;
914 unsigned int vfcomponent1:4;
915 unsigned int vfcomponent0:4;
919 #define BRW_VEP_MAX 18
921 struct brw_vertex_element_packet {
922 struct header header;
923 struct brw_vertex_element_state ve[BRW_VEP_MAX];
926 struct brw_urb_immediate {
927 unsigned int opcode:4;
928 unsigned int offset:6;
929 unsigned int swizzle_control:2;
931 unsigned int allocate:1;
933 unsigned int complete:1;
934 unsigned int response_length:4;
935 unsigned int msg_length:4;
936 unsigned int msg_target:4;
938 unsigned int end_of_thread:1;
941 /* Instruction format for the execution units: */
943 struct brw_instruction {
945 unsigned int opcode:7;
947 unsigned int access_mode:1;
948 unsigned int mask_control:1;
949 unsigned int dependency_control:2;
950 unsigned int compression_control:2;
951 unsigned int thread_control:2;
952 unsigned int predicate_control:4;
953 unsigned int predicate_inverse:1;
954 unsigned int execution_size:3;
955 unsigned int destreg__conditonalmod:4; /* destreg - send, conditionalmod - others */
957 unsigned int debug_control:1;
958 unsigned int saturate:1;
963 unsigned int dest_reg_file:2;
964 unsigned int dest_reg_type:3;
965 unsigned int src0_reg_file:2;
966 unsigned int src0_reg_type:3;
967 unsigned int src1_reg_file:2;
968 unsigned int src1_reg_type:3;
970 unsigned int dest_subreg_nr:5;
971 unsigned int dest_reg_nr:8;
972 unsigned int dest_horiz_stride:2;
973 unsigned int dest_address_mode:1;
977 unsigned int dest_reg_file:2;
978 unsigned int dest_reg_type:3;
979 unsigned int src0_reg_file:2;
980 unsigned int src0_reg_type:3;
982 int dest_indirect_offset:10; /* offset against the deref'd address reg */
983 unsigned int dest_subreg_nr:3; /* subnr for the address reg a0.x */
984 unsigned int dest_horiz_stride:2;
985 unsigned int dest_address_mode:1;
989 unsigned int dest_reg_file:2;
990 unsigned int dest_reg_type:3;
991 unsigned int src0_reg_file:2;
992 unsigned int src0_reg_type:3;
993 unsigned int src1_reg_file:2;
994 unsigned int src1_reg_type:3;
996 unsigned int dest_writemask:4;
997 unsigned int dest_subreg_nr:1;
998 unsigned int dest_reg_nr:8;
1000 unsigned int dest_address_mode:1;
1004 unsigned int dest_reg_file:2;
1005 unsigned int dest_reg_type:3;
1006 unsigned int src0_reg_file:2;
1007 unsigned int src0_reg_type:3;
1008 unsigned int pad0:6;
1009 unsigned int dest_writemask:4;
1010 int dest_indirect_offset:6;
1011 unsigned int dest_subreg_nr:3;
1012 unsigned int pad1:2;
1013 unsigned int dest_address_mode:1;
1020 unsigned int src0_subreg_nr:5;
1021 unsigned int src0_reg_nr:8;
1022 unsigned int src0_abs:1;
1023 unsigned int src0_negate:1;
1024 unsigned int src0_address_mode:1;
1025 unsigned int src0_horiz_stride:2;
1026 unsigned int src0_width:3;
1027 unsigned int src0_vert_stride:4;
1028 unsigned int flag_reg_nr:1;
1033 int src0_indirect_offset:10;
1034 unsigned int src0_subreg_nr:3;
1035 unsigned int src0_abs:1;
1036 unsigned int src0_negate:1;
1037 unsigned int src0_address_mode:1;
1038 unsigned int src0_horiz_stride:2;
1039 unsigned int src0_width:3;
1040 unsigned int src0_vert_stride:4;
1041 unsigned int flag_reg_nr:1;
1046 unsigned int src0_swz_x:2;
1047 unsigned int src0_swz_y:2;
1048 unsigned int src0_subreg_nr:1;
1049 unsigned int src0_reg_nr:8;
1050 unsigned int src0_abs:1;
1051 unsigned int src0_negate:1;
1052 unsigned int src0_address_mode:1;
1053 unsigned int src0_swz_z:2;
1054 unsigned int src0_swz_w:2;
1055 unsigned int pad0:1;
1056 unsigned int src0_vert_stride:4;
1057 unsigned int flag_reg_nr:1;
1058 unsigned int pad1:6;
1062 unsigned int src0_swz_x:2;
1063 unsigned int src0_swz_y:2;
1064 int src0_indirect_offset:6;
1065 unsigned int src0_subreg_nr:3;
1066 unsigned int src0_abs:1;
1067 unsigned int src0_negate:1;
1068 unsigned int src0_address_mode:1;
1069 unsigned int src0_swz_z:2;
1070 unsigned int src0_swz_w:2;
1071 unsigned int pad0:1;
1072 unsigned int src0_vert_stride:4;
1073 unsigned int flag_reg_nr:1;
1074 unsigned int pad1:6;
1081 unsigned int src1_subreg_nr:5;
1082 unsigned int src1_reg_nr:8;
1083 unsigned int src1_abs:1;
1084 unsigned int src1_negate:1;
1086 unsigned int src1_horiz_stride:2;
1087 unsigned int src1_width:3;
1088 unsigned int src1_vert_stride:4;
1089 unsigned int pad0:7;
1093 unsigned int src1_swz_x:2;
1094 unsigned int src1_swz_y:2;
1095 unsigned int src1_subreg_nr:1;
1096 unsigned int src1_reg_nr:8;
1097 unsigned int src1_abs:1;
1098 unsigned int src1_negate:1;
1099 unsigned int pad0:1;
1100 unsigned int src1_swz_z:2;
1101 unsigned int src1_swz_w:2;
1102 unsigned int pad1:1;
1103 unsigned int src1_vert_stride:4;
1104 unsigned int pad2:7;
1108 int src1_indirect_offset:10;
1109 unsigned int src1_subreg_nr:3;
1110 unsigned int src1_abs:1;
1111 unsigned int src1_negate:1;
1112 unsigned int pad0:1;
1113 unsigned int src1_horiz_stride:2;
1114 unsigned int src1_width:3;
1115 unsigned int src1_vert_stride:4;
1116 unsigned int flag_reg_nr:1;
1117 unsigned int pad1:6;
1121 unsigned int src1_swz_x:2;
1122 unsigned int src1_swz_y:2;
1123 int src1_indirect_offset:6;
1124 unsigned int src1_subreg_nr:3;
1125 unsigned int src1_abs:1;
1126 unsigned int src1_negate:1;
1127 unsigned int pad0:1;
1128 unsigned int src1_swz_z:2;
1129 unsigned int src1_swz_w:2;
1130 unsigned int pad1:1;
1131 unsigned int src1_vert_stride:4;
1132 unsigned int flag_reg_nr:1;
1133 unsigned int pad2:6;
1137 int jump_count:16; /* note: signed */
1138 unsigned int pop_count:4;
1139 unsigned int pad0:12;
1143 unsigned int function:4;
1144 unsigned int int_type:1;
1145 unsigned int precision:1;
1146 unsigned int saturate:1;
1147 unsigned int data_type:1;
1148 unsigned int pad0:8;
1149 unsigned int response_length:4;
1150 unsigned int msg_length:4;
1151 unsigned int msg_target:4;
1152 unsigned int pad1:3;
1153 unsigned int end_of_thread:1;
1157 unsigned int binding_table_index:8;
1158 unsigned int sampler:4;
1159 unsigned int return_format:2;
1160 unsigned int msg_type:2;
1161 unsigned int response_length:4;
1162 unsigned int msg_length:4;
1163 unsigned int msg_target:4;
1164 unsigned int pad1:3;
1165 unsigned int end_of_thread:1;
1169 uint32_t binding_table_index:8;
1171 uint32_t msg_type:4;
1172 uint32_t response_length:4;
1173 uint32_t msg_length:4;
1174 uint32_t msg_target:4;
1176 uint32_t end_of_thread:1;
1179 struct brw_urb_immediate urb;
1182 unsigned int binding_table_index:8;
1183 unsigned int msg_control:4;
1184 unsigned int msg_type:2;
1185 unsigned int target_cache:2;
1186 unsigned int response_length:4;
1187 unsigned int msg_length:4;
1188 unsigned int msg_target:4;
1189 unsigned int pad1:3;
1190 unsigned int end_of_thread:1;
1194 unsigned int binding_table_index:8;
1195 unsigned int msg_control:3;
1196 unsigned int pixel_scoreboard_clear:1;
1197 unsigned int msg_type:3;
1198 unsigned int send_commit_msg:1;
1199 unsigned int response_length:4;
1200 unsigned int msg_length:4;
1201 unsigned int msg_target:4;
1202 unsigned int pad1:3;
1203 unsigned int end_of_thread:1;
1207 unsigned int pad:16;
1208 unsigned int response_length:4;
1209 unsigned int msg_length:4;
1210 unsigned int msg_target:4;
1211 unsigned int pad1:3;
1212 unsigned int end_of_thread:1;
1220 /* media pipeline */
1222 struct brw_vfe_state {
1224 unsigned int per_thread_scratch_space:4;
1225 unsigned int pad3:3;
1226 unsigned int extend_vfe_state_present:1;
1227 unsigned int pad2:2;
1228 unsigned int scratch_base:22;
1232 unsigned int debug_counter_control:2;
1233 unsigned int children_present:1;
1234 unsigned int vfe_mode:4;
1235 unsigned int pad2:2;
1236 unsigned int num_urb_entries:7;
1237 unsigned int urb_entry_alloc_size:9;
1238 unsigned int max_threads:7;
1242 unsigned int pad4:4;
1243 unsigned int interface_descriptor_base:28;
1247 struct brw_vld_state {
1249 unsigned int pad6:6;
1250 unsigned int scan_order:1;
1251 unsigned int intra_vlc_format:1;
1252 unsigned int quantizer_scale_type:1;
1253 unsigned int concealment_motion_vector:1;
1254 unsigned int frame_predict_frame_dct:1;
1255 unsigned int top_field_first:1;
1256 unsigned int picture_structure:2;
1257 unsigned int intra_dc_precision:2;
1258 unsigned int f_code_0_0:4;
1259 unsigned int f_code_0_1:4;
1260 unsigned int f_code_1_0:4;
1261 unsigned int f_code_1_1:4;
1265 unsigned int pad2:9;
1266 unsigned int picture_coding_type:2;
1267 unsigned int pad:21;
1271 unsigned int index_0:4;
1272 unsigned int index_1:4;
1273 unsigned int index_2:4;
1274 unsigned int index_3:4;
1275 unsigned int index_4:4;
1276 unsigned int index_5:4;
1277 unsigned int index_6:4;
1278 unsigned int index_7:4;
1279 } desc_remap_table0;
1282 unsigned int index_8:4;
1283 unsigned int index_9:4;
1284 unsigned int index_10:4;
1285 unsigned int index_11:4;
1286 unsigned int index_12:4;
1287 unsigned int index_13:4;
1288 unsigned int index_14:4;
1289 unsigned int index_15:4;
1290 } desc_remap_table1;
1293 struct brw_interface_descriptor {
1295 unsigned int grf_reg_blocks:4;
1297 unsigned int kernel_start_pointer:26;
1302 unsigned int software_exception:1;
1303 unsigned int pad2:3;
1304 unsigned int maskstack_exception:1;
1305 unsigned int pad3:1;
1306 unsigned int illegal_opcode_exception:1;
1307 unsigned int pad4:2;
1308 unsigned int floating_point_mode:1;
1309 unsigned int thread_priority:1;
1310 unsigned int single_program_flow:1;
1311 unsigned int pad5:1;
1312 unsigned int const_urb_entry_read_offset:6;
1313 unsigned int const_urb_entry_read_len:6;
1318 unsigned int sampler_count:3;
1319 unsigned int sampler_state_pointer:27;
1323 unsigned int binding_table_entry_count:5;
1324 unsigned int binding_table_pointer:27;