1 // Licensed to the .NET Foundation under one or more agreements.
2 // The .NET Foundation licenses this file to you under the MIT license.
4 /*****************************************************************************
5 * RISCV64 instructions for JIT compiler
7 * id -- the enum name for the instruction
8 * nm -- textual name (for assembly dipslay)
9 * ld/st/cmp -- load/store/compare instruction
10 * encode -- encoding 1
12 ******************************************************************************/
14 #if !defined(TARGET_RISCV64)
15 #error Unexpected target type
19 #error INST must be defined before including this file.
22 /*****************************************************************************/
23 /* The following is RISCV64-specific */
24 /*****************************************************************************/
26 // If you're adding a new instruction:
27 // You need not only to fill in one of these macros describing the instruction, but also:
28 // * If the instruction writes to more than one destination register, update the function
29 // emitInsMayWriteMultipleRegs in emitriscv64.cpp.
34 INST(invalid, "INVALID", 0, BAD_CODE)
35 INST(nop, "nop", 0, 0x00000013)
38 INST(mov, "mv", 0, 0x00000013)
39 INST(sext_w, "sext.w", 0, 0x0000001b)
42 INST(lui, "lui", 0, 0x00000037)
43 INST(auipc, "auipc", 0, 0x00000017)
46 INST(addi, "addi", 0, 0x00000013)
47 INST(slti, "slti", 0, 0x00002013)
48 INST(sltiu, "sltiu", 0, 0x00003013)
49 INST(xori, "xori", 0, 0x00004013)
50 INST(ori, "ori", 0, 0x00006013)
51 INST(andi, "andi", 0, 0x00007013)
52 INST(slli, "slli", 0, 0x00001013)
53 INST(srli, "srli", 0, 0x00005013)
54 INST(srai, "srai", 0, 0x40005013)
57 INST(add, "add", 0, 0x00000033)
58 INST(sub, "sub", 0, 0x40000033)
59 INST(sll, "sll", 0, 0x00001033)
60 INST(slt, "slt", 0, 0x00002033)
61 INST(sltu, "sltu", 0, 0x00003033)
62 INST(xor, "xor", 0, 0x00004033)
63 INST(srl, "srl", 0, 0x00005033)
64 INST(sra, "sra", 0, 0x40005033)
65 INST(or, "or", 0, 0x00006033)
66 INST(and, "and", 0, 0x00007033)
68 INST(fence, "fence", 0, 0x0000000f)
69 INST(fence_i, "fence.i", 0, 0x0000100f)
72 INST(csrrw, "csrrw", 0, 0x00001073)
73 INST(csrrs, "csrrs", 0, 0x00002073)
74 INST(csrrc, "csrrc", 0, 0x00003073)
77 INST(csrrwi, "csrrwi", 0, 0x00005073)
78 INST(csrrsi, "csrrsi", 0, 0x00006073)
79 INST(csrrci, "csrrci", 0, 0x00007073)
81 INST(ecall, "ecall", 0, 0x00000073)
82 INST(ebreak, "ebreak", 0, 0x00100073)
83 INST(uret, "uret", 0, 0x00200073)
84 INST(sret, "sret", 0, 0x10200073)
85 INST(mret, "mret", 0, 0x30200073)
86 INST(wfi, "wfi", 0, 0x10500073)
87 INST(sfence_vma, "sfence.vma", 0, 0x12000073)
90 INST(lb, "lb", LD, 0x00000003)
91 INST(lh, "lh", LD, 0x00001003)
92 INST(lw, "lw", LD, 0x00002003)
93 INST(lbu, "lbu", LD, 0x00004003)
94 INST(lhu, "lhu", LD, 0x00005003)
96 INST(sb, "sb", ST, 0x00000023)
97 INST(sh, "sh", ST, 0x00001023)
98 INST(sw, "sw", ST, 0x00002023)
101 INST(jal, "jal", 0, 0x0000006f)
102 INST(j, "j", 0, 0x0000006f)
103 INST(beqz, "beqz", 0, 0x00000063)
104 INST(bnez, "bnez", 0, 0x00001063)
107 INST(jalr, "jalr", 0, 0x00000067)
108 INST(beq, "beq", 0, 0x00000063)
109 INST(bne, "bne", 0, 0x00001063)
110 INST(blt, "blt", 0, 0x00004063)
111 INST(bge, "bge", 0, 0x00005063)
112 INST(bltu, "bltu", 0, 0x00006063)
113 INST(bgeu, "bgeu", 0, 0x00007063)
117 INST(addiw, "addiw", 0, 0x0000001b)
118 INST(slliw, "slliw", 0, 0x0000101b)
119 INST(srliw, "srliw", 0, 0x0000501b)
120 INST(sraiw, "sraiw", 0, 0x4000501b)
123 INST(addw, "addw", 0, 0x0000003b)
124 INST(subw, "subw", 0, 0x4000003b)
125 INST(sllw, "sllw", 0, 0x0000103b)
126 INST(srlw, "srlw", 0, 0x0000503b)
127 INST(sraw, "sraw", 0, 0x4000503b)
130 INST(lwu, "lwu", LD, 0x00006003)
131 INST(ld, "ld", LD, 0x00003003)
132 INST(sd, "sd", ST, 0x00003023)
137 INST(mul, "mul", 0, 0x02000033)
138 INST(mulh, "mulh", 0, 0x02001033)
139 INST(mulhsu, "mulhsu", 0, 0x02002033)
140 INST(mulhu, "mulhu", 0, 0x02003033)
141 INST(div, "div", 0, 0x02004033)
142 INST(divu, "divu", 0, 0x02005033)
143 INST(rem, "rem", 0, 0x02006033)
144 INST(remu, "remu", 0, 0x02007033)
149 INST(mulw, "mulw", 0, 0x0200003b)
150 INST(divw, "divw", 0, 0x0200403b)
151 INST(divuw, "divuw", 0, 0x0200503b)
152 INST(remw, "remw", 0, 0x0200603b)
153 INST(remuw, "remuw", 0, 0x0200703b)
157 INST(fmadd_s, "fmadd.s", 0, 0x00000043)
158 INST(fmsub_s, "fmsub.s", 0, 0x00000047)
159 INST(fnmsub_s, "fnmsub.s", 0, 0x0000004b)
160 INST(fnmadd_s, "fnmadd.s", 0, 0x0000004f)
163 INST(fadd_s, "fadd.s", 0, 0x00000053)
164 INST(fsub_s, "fsub.s", 0, 0x08000053)
165 INST(fmul_s, "fmul.s", 0, 0x10000053)
166 INST(fdiv_s, "fdiv.s", 0, 0x18000053)
167 INST(fsqrt_s, "fsqrt.s", 0, 0x58000053)
168 INST(fsgnj_s, "fsgnj.s", 0, 0x20000053)
169 INST(fsgnjn_s, "fsgnjn.s", 0, 0x20001053)
170 INST(fsgnjx_s, "fsgnjx.s", 0, 0x20002053)
171 INST(fmin_s, "fmin.s", 0, 0x28000053)
172 INST(fmax_s, "fmax.s", 0, 0x28001053)
175 INST(fcvt_w_s, "fcvt.w.s", 0, 0xc0000053)
176 INST(fcvt_wu_s, "fcvt.wu.s", 0, 0xc0100053)
177 INST(fmv_x_w, "fmv.x.w", 0, 0xe0000053)
180 INST(feq_s, "feq.s", 0, 0xa0002053)
181 INST(flt_s, "flt.s", 0, 0xa0001053)
182 INST(fle_s, "fle.s", 0, 0xa0000053)
185 INST(fclass_s, "fclass.s", 0, 0xe0001053)
186 INST(fcvt_s_w, "fcvt.s.w", 0, 0xd0000053)
187 INST(fcvt_s_wu, "fcvt.s.wu", 0, 0xd0100053)
188 INST(fmv_w_x, "fmv.w.x", 0, 0xf0000053)
191 INST(fmadd_d, "fmadd.d", 0, 0x02000043)
192 INST(fmsub_d, "fmsub.d", 0, 0x02000047)
193 INST(fnmsub_d, "fnmsub.d", 0, 0x0200004b)
194 INST(fnmadd_d, "fnmadd.d", 0, 0x0200004f)
197 INST(fadd_d, "fadd.d", 0, 0x02000053)
198 INST(fsub_d, "fsub.d", 0, 0x0a000053)
199 INST(fmul_d, "fmul.d", 0, 0x12000053)
200 INST(fdiv_d, "fdiv.d", 0, 0x1a000053)
201 INST(fsqrt_d, "fsqrt.d", 0, 0x5a000053)
202 INST(fsgnj_d, "fsgnj.d", 0, 0x22000053)
203 INST(fsgnjn_d, "fsgnjn.d", 0, 0x22001053)
204 INST(fsgnjx_d, "fsgnjx.d", 0, 0x22002053)
205 INST(fmin_d, "fmin.d", 0, 0x2a000053)
206 INST(fmax_d, "fmax.d", 0, 0x2a001053)
209 INST(fcvt_s_d, "fcvt.s.d", 0, 0x40100053)
210 INST(fcvt_d_s, "fcvt.d.s", 0, 0x42000053)
213 INST(feq_d, "feq.d", 0, 0xa2002053)
214 INST(flt_d, "flt.d", 0, 0xa2001053)
215 INST(fle_d, "fle.d", 0, 0xa2000053)
218 INST(fclass_d, "fclass.d", 0, 0xe2001053)
219 INST(fcvt_w_d, "fcvt.w.d", 0, 0xc2000053)
220 INST(fcvt_wu_d, "fcvt.wu.d", 0, 0xc2100053)
221 INST(fcvt_d_w, "fcvt.d.w", 0, 0xd2000053)
222 INST(fcvt_d_wu, "fcvt.d.wu", 0, 0xd2100053)
225 INST(flw, "flw", LD, 0x00002007)
226 INST(fsw, "fsw", ST, 0x00002027)
227 INST(fld, "fld", LD, 0x00003007)
228 INST(fsd, "fsd", ST, 0x00003027)
232 INST(fcvt_l_s, "fcvt.l.s", 0, 0xc0200053)
233 INST(fcvt_lu_s, "fcvt.lu.s", 0, 0xc0300053)
234 INST(fcvt_s_l, "fcvt.s.l", 0, 0xd0200053)
235 INST(fcvt_s_lu, "fcvt.s.lu", 0, 0xd0300053)
238 INST(fcvt_l_d, "fcvt.l.d", 0, 0xc2200053)
239 INST(fcvt_lu_d, "fcvt.lu.d", 0, 0xc2300053)
240 INST(fmv_x_d, "fmv.x.d", 0, 0xe2000053)
241 INST(fcvt_d_l, "fcvt.d.l", 0, 0xd2200053)
242 INST(fcvt_d_lu, "fcvt.d.lu", 0, 0xd2300053)
243 INST(fmv_d_x, "fmv.d.x", 0, 0xf2000053)
245 // RV32A + RV64A (R-type, R_R_R)
246 INST(lr_w, "lr.w", 0, 0x1000202f) // funct5:00010
247 INST(lr_d, "lr.d", 0, 0x1000302f) // funct5:00010
248 INST(sc_w, "sc.w", 0, 0x1800202f) // funct5:00011
249 INST(sc_d, "sc.d", 0, 0x1800302f) // funct5:00011
250 INST(amoswap_w, "amoswap.w", 0, 0x0800202f) // funct5:00001
251 INST(amoswap_d, "amoswap.d", 0, 0x0800302f) // funct5:00001
252 INST(amoadd_w, "amoadd.w", 0, 0x0000202f) // funct5:00000
253 INST(amoadd_d, "amoadd.d", 0, 0x0000302f) // funct5:00000
254 INST(amoxor_w, "amoxor.w", 0, 0x2000202f) // funct5:00100
255 INST(amoxor_d, "amoxor.d", 0, 0x2000302f) // funct5:00100
256 INST(amoand_w, "amoand.w", 0, 0x6000202f) // funct5:01100
257 INST(amoand_d, "amoand.d", 0, 0x6000302f) // funct5:01100
258 INST(amoor_w, "amoor.w", 0, 0x4000202f) // funct5:01000
259 INST(amoor_d, "amoor.d", 0, 0x4000302f) // funct5:01000
260 INST(amomin_w, "amomin.w", 0, 0x8000202f) // funct5:10000
261 INST(amomin_d, "amomin.d", 0, 0x8000302f) // funct5:10000
262 INST(amomax_w, "amomax.w", 0, 0xa000202f) // funct5:10100
263 INST(amomax_d, "amomax.d", 0, 0xa000302f) // funct5:10100
264 INST(amominu_w, "amominu.w", 0, 0xc000202f) // funct5:11000
265 INST(amominu_d, "amominu.d", 0, 0xc000302f) // funct5:11000
266 INST(amomaxu_w, "amomaxu.w", 0, 0xe000202f) // funct5:11100
267 INST(amomaxu_d, "amomaxu.d", 0, 0xe000302f) // funct5:11100
269 /*****************************************************************************/
271 /*****************************************************************************/