2 * Copyright (c) 2017-2018 ARM Limited.
4 * SPDX-License-Identifier: MIT
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 #ifndef ARM_COMPUTE_HELPERS_ASYMM_H
25 #define ARM_COMPUTE_HELPERS_ASYMM_H
29 /** Correctly-rounded-to-nearest division by a power-of-two.
31 * @param[in] size Size of vector.
33 * @return Correctly-rounded-to-nearest division by a power-of-two.
35 #define ASYMM_ROUNDING_DIVIDE_BY_POW2_IMPL(size) \
36 inline VEC_DATA_TYPE(int, size) asymm_rounding_divide_by_POW2_##size(VEC_DATA_TYPE(int, size) x, int exponent) \
38 VEC_DATA_TYPE(int, size) \
39 mask = (1 << exponent) - 1; \
40 const VEC_DATA_TYPE(int, size) zero = 0; \
41 const VEC_DATA_TYPE(int, size) one = 1; \
42 VEC_DATA_TYPE(int, size) \
43 threshold = (mask >> 1) + select(zero, one, x < 0); \
44 return (x >> exponent) + select(zero, one, (x & mask) > threshold); \
47 /** Product of two numbers, interpreting them as fixed-point values in the interval [-1, 1),
48 * rounding to the nearest value, and saturating -1 * -1 to the maximum value.
50 * @param[in] size Size of vector.
52 * @return Product of two fixed-point numbers.
54 #define ASYMM_MULT_IMPL(size) \
55 inline VEC_DATA_TYPE(int, size) asymm_mult##size(VEC_DATA_TYPE(int, size) a, VEC_DATA_TYPE(int, size) b) \
57 VEC_DATA_TYPE(int, size) \
58 overflow = a == b && a == INT_MIN; \
59 VEC_DATA_TYPE(long, size) \
60 a_64 = convert_long##size(a); \
61 VEC_DATA_TYPE(long, size) \
62 b_64 = convert_long##size(b); \
63 VEC_DATA_TYPE(long, size) \
64 ab_64 = a_64 * b_64; \
66 VEC_DATA_TYPE(int, size) \
67 ab_x2_high32 = convert_int##size(((ab_64 + (1 << 30)) >> 31)); \
68 return select(ab_x2_high32, INT_MAX, overflow); \
71 /** Calculates \f$ exp(x) \f$ for x in [-1/4, 0).
73 * @param[in] size Size of vector.
75 * @return Result in fixed-point format Q0.
77 #define ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL_IMPL(size) \
78 inline VEC_DATA_TYPE(int, size) asymm_exp_on_interval_between_negative_one_quarter_and_0_excl##size(VEC_DATA_TYPE(int, size) a) \
80 const VEC_DATA_TYPE(int, size) constant_term = 1895147668; \
81 const VEC_DATA_TYPE(int, size) constant_1_over_3 = 715827883; \
82 const int k_fractional_bits = 31; \
83 VEC_DATA_TYPE(int, size) \
84 x = a + (1 << (k_fractional_bits - 3)); \
85 VEC_DATA_TYPE(int, size) \
86 x2 = ASYMM_MULT(x, x, size); \
87 VEC_DATA_TYPE(int, size) \
88 x3 = ASYMM_MULT(x2, x, size); \
89 VEC_DATA_TYPE(int, size) \
90 x4 = ASYMM_MULT(x2, x2, size); \
91 VEC_DATA_TYPE(int, size) \
92 x4_over_4 = ASYMM_ROUNDING_DIVIDE_BY_POW2(x4, 2, size); \
93 VEC_DATA_TYPE(int, size) \
94 x4_over_24_plus_x3_over_6_plus_x2 = ASYMM_MULT((x4_over_4 + x3), constant_1_over_3, size) + x2; \
95 VEC_DATA_TYPE(int, size) \
96 x4_over_24_plus_x3_over_6_plus_x2_over_2 = ASYMM_ROUNDING_DIVIDE_BY_POW2(x4_over_24_plus_x3_over_6_plus_x2, 1, size); \
97 return constant_term + ASYMM_MULT(constant_term, x + x4_over_24_plus_x3_over_6_plus_x2_over_2, size); \
100 /** Each bit of the result is set to the corresponding bit of either then_val or
101 * else_val depending on whether the corresponding bit of if_mask is set.
102 * Equivalent to the VBSL instruction in ARM NEON.
104 * @param[in] size Size of vector.
106 * @returns Result contaning bits from @p then_val or from @p else_val depending on corresponding bit in @p if_mask is set or not.
108 #define ASYMM_SELECT_USING_MASK_IMPL(size) \
109 inline VEC_DATA_TYPE(int, size) asymm_select_using_mask##size(VEC_DATA_TYPE(int, size) if_mask, VEC_DATA_TYPE(int, size) then_val, VEC_DATA_TYPE(int, size) else_val) \
111 return (if_mask & then_val) ^ (~if_mask & else_val); \
114 /** For each element of input vector, the corresponding bits of the result item are set
115 * if the input item is zero.
117 * @param[in] size Size of vector.
119 * @returns Output vector with bits set when corresponding bit in @p a is zero.
121 #define ASYMM_MASK_IF_ZERO_IMPL(size) \
122 inline VEC_DATA_TYPE(int, size) asymm_mask_if_zero##size(VEC_DATA_TYPE(int, size) a) \
124 const VEC_DATA_TYPE(int, size) all_zeros = 0; \
125 const VEC_DATA_TYPE(int, size) all_ones = ~0; \
126 return select(all_zeros, all_ones, a == 0); \
129 /** For each element of input vector, the corresponding bits of the result item are set
130 * if the input item is non-zero.
132 * @param[in] size Size of vector.
134 * @returns Output vector with bits set when corresponding bit in @p a is non zero.
136 #define ASYMM_MASK_IF_NON_ZERO_IMPL(size) \
137 inline VEC_DATA_TYPE(int, size) asymm_mask_if_non_zero##size(VEC_DATA_TYPE(int, size) a) \
139 const VEC_DATA_TYPE(int, size) all_zeros = 0; \
140 const VEC_DATA_TYPE(int, size) all_ones = ~0; \
141 return select(all_zeros, all_ones, a != 0); \
144 #define EXP_BARREL_SHIFTER_IMPL(size) \
145 inline VEC_DATA_TYPE(int, size) exp_barrel_shifter##size(VEC_DATA_TYPE(int, size) result, int exponent, int fp_multiplier, int k_integer_bits, int k_fractional_bits, VEC_DATA_TYPE(int, size) remainder) \
147 if(k_integer_bits > exponent) \
149 const int k_shift_amount = k_integer_bits > exponent ? k_fractional_bits + exponent : 0; \
150 return ASYMM_SELECT_USING_MASK( \
151 ASYMM_MASK_IF_NON_ZERO(remainder & (1 << k_shift_amount), size), \
152 ASYMM_MULT(result, fp_multiplier, size), result, size); \
158 /** Calculates \f$ exp(x) \f$ for x < 0.
160 * @param[in] size Size of vector.
162 * @return Result in fixed-point format Q0.
164 #define ASYMM_EXP_ON_NEGATIVE_VALUES_IMPL(size) \
165 inline VEC_DATA_TYPE(int, size) asymm_exp_on_negative_values##size(VEC_DATA_TYPE(int, size) a, int k_integer_bits) \
167 const int k_fractional_bits = 31 - k_integer_bits; \
168 VEC_DATA_TYPE(int, size) \
169 k_one_quarter = 1 << (k_fractional_bits - 2); \
170 VEC_DATA_TYPE(int, size) \
171 mask = k_one_quarter - 1; \
172 VEC_DATA_TYPE(int, size) \
173 a_mod_quarter_minus_one_quarter = (a & mask) - k_one_quarter; \
174 VEC_DATA_TYPE(int, size) \
175 a_mod_quarter_minus_one_quarter_scaled = a_mod_quarter_minus_one_quarter << k_integer_bits; \
176 VEC_DATA_TYPE(int, size) \
177 result = ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL(a_mod_quarter_minus_one_quarter_scaled, size); \
178 VEC_DATA_TYPE(int, size) \
179 remainder = a_mod_quarter_minus_one_quarter - a; \
181 result = EXP_BARREL_SHIFTER(result, -2, 1672461947, k_integer_bits, k_fractional_bits, remainder, size); \
182 result = EXP_BARREL_SHIFTER(result, -1, 1302514674, k_integer_bits, k_fractional_bits, remainder, size); \
183 result = EXP_BARREL_SHIFTER(result, +0, 790015084, k_integer_bits, k_fractional_bits, remainder, size); \
184 result = EXP_BARREL_SHIFTER(result, +1, 290630308, k_integer_bits, k_fractional_bits, remainder, size); \
185 result = EXP_BARREL_SHIFTER(result, +2, 39332535, k_integer_bits, k_fractional_bits, remainder, size); \
186 result = EXP_BARREL_SHIFTER(result, +3, 720401, k_integer_bits, k_fractional_bits, remainder, size); \
187 result = EXP_BARREL_SHIFTER(result, +4, 242, k_integer_bits, k_fractional_bits, remainder, size); \
189 if(k_integer_bits > 5) \
191 const VEC_DATA_TYPE(int, size) clamp = -(1 << (k_fractional_bits + 5)); \
192 result = ASYMM_SELECT_USING_MASK(ASYMM_MASK_IF_NON_ZERO(a < clamp, size), 0, result, size); \
195 const VEC_DATA_TYPE(int, size) Q0_one = INT_MAX; \
196 return ASYMM_SELECT_USING_MASK(ASYMM_MASK_IF_ZERO(a, size), Q0_one, result, size); \
199 /** Calculates the product of a integer value by a power of two, with either a positive exponent
200 * (equivalent to an arithmetic left shift, saturating) or a negative exponent
201 * (equivalent to an arithmetic right shift, rounding to nearest).
203 * @param[in] size Size of vector.
205 * @return Arithmetic left or right shift.
207 #define ASYMM_SATURATING_ROUNDING_MULT_BY_POW2_IMPL(size) \
208 inline VEC_DATA_TYPE(int, size) asymm_saturating_rounding_mult_by_pow2##size(VEC_DATA_TYPE(int, size) x, int exponent) \
212 return ASYMM_ROUNDING_DIVIDE_BY_POW2(x, -exponent, size); \
215 const VEC_DATA_TYPE(int, size) min = INT_MIN; \
216 const VEC_DATA_TYPE(int, size) max = INT_MAX; \
217 int threshold = ((1 << (31 - exponent)) - 1); \
218 VEC_DATA_TYPE(int, size) \
219 positive_mask = ASYMM_MASK_IF_NON_ZERO(x > threshold, size); \
220 VEC_DATA_TYPE(int, size) \
221 negative_mask = ASYMM_MASK_IF_NON_ZERO(x < -threshold, size); \
222 VEC_DATA_TYPE(int, size) \
223 result = x << exponent; \
224 result = ASYMM_SELECT_USING_MASK(positive_mask, max, result, size); \
225 result = ASYMM_SELECT_USING_MASK(negative_mask, min, result, size); \
229 /** Calculates (a+b)/2, rounded to the nearest integer.
230 * Equivalent to VRHADD in the ARM NEON instruction set.
232 * @param[in] size Size of vector.
234 * @return (a+b)/2, rounded to the nearest integer.
236 #define ASYMM_ROUNDING_HALF_SUM_IMPL(size) \
237 inline VEC_DATA_TYPE(int, size) asymm_rounding_half_sum##size(VEC_DATA_TYPE(int, size) a, VEC_DATA_TYPE(int, size) b) \
239 VEC_DATA_TYPE(long, size) \
240 a64 = convert_long##size(a); \
241 VEC_DATA_TYPE(long, size) \
242 b64 = convert_long##size(b); \
243 VEC_DATA_TYPE(long, size) \
245 const VEC_DATA_TYPE(long, size) one = 1; \
246 const VEC_DATA_TYPE(long, size) minus_one = -1; \
247 VEC_DATA_TYPE(long, size) \
248 sign = select(minus_one, one, sum >= 0); \
249 return convert_int##size((sum + sign) / 2); \
252 /** Calculates \f$ 1 / (1 + x) \f$ for x in (0, 1).
254 * @param[in] size Size of vector.
256 * @return Result in fixed-point format Q0.
258 #define ASYMM_ONE_OVER_ONE_PLUS_X_FOR_X_IN_0_1_IMPL(size) \
259 inline VEC_DATA_TYPE(int, size) asymm_one_over_one_plus_x_for_x_in_0_1##size(VEC_DATA_TYPE(int, size) a) \
261 const VEC_DATA_TYPE(int, size) Q0_one = INT_MAX; \
262 const VEC_DATA_TYPE(int, size) Q2_one = 1 << (31 - 2); \
263 VEC_DATA_TYPE(int, size) \
264 half_denominator = ASYMM_ROUNDING_HALF_SUM(a, Q0_one, size); \
265 const VEC_DATA_TYPE(int, size) Q2_48_over_17 = 1515870810; \
266 const VEC_DATA_TYPE(int, size) Q2_neg_32_over_17 = -1010580540; \
267 VEC_DATA_TYPE(int, size) \
268 x = Q2_48_over_17 + ASYMM_MULT(half_denominator, Q2_neg_32_over_17, size); \
269 for(int i = 0; i < 3; i++) \
271 VEC_DATA_TYPE(int, size) \
272 half_denominator_times_x = ASYMM_MULT(half_denominator, x, size); \
273 VEC_DATA_TYPE(int, size) \
274 one_minus_half_denominator_times_x = Q2_one - half_denominator_times_x; \
275 VEC_DATA_TYPE(int, size) \
276 tmp = ASYMM_MULT(x, one_minus_half_denominator_times_x, size); \
277 x = x + ASYMM_SATURATING_ROUNDING_MULT_BY_POW2(tmp, 2, size); \
279 return ASYMM_SATURATING_ROUNDING_MULT_BY_POW2(x, 1, size); \
282 /** Considering the integer value as fixed-point, change the number of integer bits and update value accordingly.
284 * @param[in] size Size of vector.
286 * @return Rescaled value.
288 #define ASYMM_RESCALE_IMPL(size) \
289 inline VEC_DATA_TYPE(int, size) asymm_rescale##size(VEC_DATA_TYPE(int, size) value, int src_integer_bits, int dst_integer_bits) \
291 int exponent = src_integer_bits - dst_integer_bits; \
292 return ASYMM_SATURATING_ROUNDING_MULT_BY_POW2(value, exponent, size); \
295 #define ASYMM_ROUNDING_DIVIDE_BY_POW2(x, exponent, size) asymm_rounding_divide_by_POW2_##size(x, exponent)
296 #define ASYMM_MULT(a, b, size) asymm_mult##size(a, b)
297 #define ASYMM_MULT_BY_QUANT_MULTIPLIER_LESS_THAN_ONE(x, quantized_multiplier, right_shift, size) \
298 ASYMM_ROUNDING_DIVIDE_BY_POW2(ASYMM_MULT(x, quantized_multiplier, size), right_shift, size)
299 #define ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL(a, size) asymm_exp_on_interval_between_negative_one_quarter_and_0_excl##size(a)
300 #define ASYMM_SELECT_USING_MASK(if_mask, then_val, else_val, size) asymm_select_using_mask##size(if_mask, then_val, else_val)
301 #define ASYMM_MASK_IF_ZERO(a, size) asymm_mask_if_zero##size(a)
302 #define ASYMM_MASK_IF_NON_ZERO(a, size) asymm_mask_if_non_zero##size(a)
303 #define EXP_BARREL_SHIFTER(result, exponent, fp_multiplier, k_integer_bits, k_fractional_bits, remainder, size) exp_barrel_shifter##size(result, exponent, fp_multiplier, k_integer_bits, k_fractional_bits, remainder)
304 #define ASYMM_EXP_ON_NEGATIVE_VALUES(a, k_integer_bits, size) asymm_exp_on_negative_values##size(a, k_integer_bits)
305 #define ASYMM_ONE_OVER_ONE_PLUS_X_FOR_X_IN_0_1(a, size) asymm_one_over_one_plus_x_for_x_in_0_1##size(a)
306 #define ASYMM_SATURATING_ROUNDING_MULT_BY_POW2(x, exponent, size) asymm_saturating_rounding_mult_by_pow2##size(x, exponent)
307 #define ASYMM_ROUNDING_HALF_SUM(a, b, size) asymm_rounding_half_sum##size(a, b)
308 #define ASYMM_RESCALE(value, src_integer_bits, dst_integer_bits, size) asymm_rescale##size(value, src_integer_bits, dst_integer_bits)
310 ASYMM_ROUNDING_DIVIDE_BY_POW2_IMPL(2)
311 ASYMM_ROUNDING_DIVIDE_BY_POW2_IMPL(4)
312 ASYMM_ROUNDING_DIVIDE_BY_POW2_IMPL(8)
313 ASYMM_ROUNDING_DIVIDE_BY_POW2_IMPL(16)
320 ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL_IMPL(2)
321 ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL_IMPL(4)
322 ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL_IMPL(8)
323 ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL_IMPL(16)
325 ASYMM_SELECT_USING_MASK_IMPL(2)
326 ASYMM_SELECT_USING_MASK_IMPL(4)
327 ASYMM_SELECT_USING_MASK_IMPL(8)
328 ASYMM_SELECT_USING_MASK_IMPL(16)
330 ASYMM_MASK_IF_ZERO_IMPL(2)
331 ASYMM_MASK_IF_ZERO_IMPL(4)
332 ASYMM_MASK_IF_ZERO_IMPL(8)
333 ASYMM_MASK_IF_ZERO_IMPL(16)
335 ASYMM_MASK_IF_NON_ZERO_IMPL(2)
336 ASYMM_MASK_IF_NON_ZERO_IMPL(4)
337 ASYMM_MASK_IF_NON_ZERO_IMPL(8)
338 ASYMM_MASK_IF_NON_ZERO_IMPL(16)
340 EXP_BARREL_SHIFTER_IMPL(2)
341 EXP_BARREL_SHIFTER_IMPL(4)
342 EXP_BARREL_SHIFTER_IMPL(8)
343 EXP_BARREL_SHIFTER_IMPL(16)
345 ASYMM_EXP_ON_NEGATIVE_VALUES_IMPL(2)
346 ASYMM_EXP_ON_NEGATIVE_VALUES_IMPL(4)
347 ASYMM_EXP_ON_NEGATIVE_VALUES_IMPL(8)
348 ASYMM_EXP_ON_NEGATIVE_VALUES_IMPL(16)
350 ASYMM_SATURATING_ROUNDING_MULT_BY_POW2_IMPL(2)
351 ASYMM_SATURATING_ROUNDING_MULT_BY_POW2_IMPL(4)
352 ASYMM_SATURATING_ROUNDING_MULT_BY_POW2_IMPL(8)
353 ASYMM_SATURATING_ROUNDING_MULT_BY_POW2_IMPL(16)
355 ASYMM_ROUNDING_HALF_SUM_IMPL(2)
356 ASYMM_ROUNDING_HALF_SUM_IMPL(4)
357 ASYMM_ROUNDING_HALF_SUM_IMPL(8)
358 ASYMM_ROUNDING_HALF_SUM_IMPL(16)
360 ASYMM_ONE_OVER_ONE_PLUS_X_FOR_X_IN_0_1_IMPL(2)
361 ASYMM_ONE_OVER_ONE_PLUS_X_FOR_X_IN_0_1_IMPL(4)
362 ASYMM_ONE_OVER_ONE_PLUS_X_FOR_X_IN_0_1_IMPL(8)
363 ASYMM_ONE_OVER_ONE_PLUS_X_FOR_X_IN_0_1_IMPL(16)
365 ASYMM_RESCALE_IMPL(2)
366 ASYMM_RESCALE_IMPL(4)
367 ASYMM_RESCALE_IMPL(8)
368 ASYMM_RESCALE_IMPL(16)
370 #endif // ARM_COMPUTE_HELPERS_ASYMM_H