src/compiler/x64/code-generator-x64.cc

   1 // Copyright 2013 the V8 project authors. All rights reserved.
   2 // Use of this source code is governed by a BSD-style license that can be
   3 // found in the LICENSE file.
   4
   5 #include "src/compiler/code-generator.h"
   6
   7 #include "src/compiler/code-generator-impl.h"
   8 #include "src/compiler/gap-resolver.h"
   9 #include "src/compiler/node-matchers.h"
  10 #include "src/scopes.h"
  11 #include "src/x64/assembler-x64.h"
  12 #include "src/x64/macro-assembler-x64.h"
  13
  14 namespace v8 {
  15 namespace internal {
  16 namespace compiler {
  17
  18 #define __ masm()->
  19
  20
  21 #define kScratchDoubleReg xmm0
  22
  23
  24 // Adds X64 specific methods for decoding operands.
  25 class X64OperandConverter : public InstructionOperandConverter {
  26  public:
  27   X64OperandConverter(CodeGenerator* gen, Instruction* instr)
  28       : InstructionOperandConverter(gen, instr) {}
  29
  30   Immediate InputImmediate(size_t index) {
  31     return ToImmediate(instr_->InputAt(index));
  32   }
  33
  34   Operand InputOperand(size_t index, int extra = 0) {
  35     return ToOperand(instr_->InputAt(index), extra);
  36   }
  37
  38   Operand OutputOperand() { return ToOperand(instr_->Output()); }
  39
  40   Immediate ToImmediate(InstructionOperand* operand) {
  41     return Immediate(ToConstant(operand).ToInt32());
  42   }
  43
  44   Operand ToOperand(InstructionOperand* op, int extra = 0) {
  45     DCHECK(op->IsStackSlot() || op->IsDoubleStackSlot());
  46     // The linkage computes where all spill slots are located.
  47     FrameOffset offset = linkage()->GetFrameOffset(op->index(), frame(), extra);
  48     return Operand(offset.from_stack_pointer() ? rsp : rbp, offset.offset());
  49   }
  50
  51   static size_t NextOffset(size_t* offset) {
  52     size_t i = *offset;
  53     (*offset)++;
  54     return i;
  55   }
  56
  57   static ScaleFactor ScaleFor(AddressingMode one, AddressingMode mode) {
  58     STATIC_ASSERT(0 == static_cast<int>(times_1));
  59     STATIC_ASSERT(1 == static_cast<int>(times_2));
  60     STATIC_ASSERT(2 == static_cast<int>(times_4));
  61     STATIC_ASSERT(3 == static_cast<int>(times_8));
  62     int scale = static_cast<int>(mode - one);
  63     DCHECK(scale >= 0 && scale < 4);
  64     return static_cast<ScaleFactor>(scale);
  65   }
  66
  67   Operand MemoryOperand(size_t* offset) {
  68     AddressingMode mode = AddressingModeField::decode(instr_->opcode());
  69     switch (mode) {
  70       case kMode_MR: {
  71         Register base = InputRegister(NextOffset(offset));
  72         int32_t disp = 0;
  73         return Operand(base, disp);
  74       }
  75       case kMode_MRI: {
  76         Register base = InputRegister(NextOffset(offset));
  77         int32_t disp = InputInt32(NextOffset(offset));
  78         return Operand(base, disp);
  79       }
  80       case kMode_MR1:
  81       case kMode_MR2:
  82       case kMode_MR4:
  83       case kMode_MR8: {
  84         Register base = InputRegister(NextOffset(offset));
  85         Register index = InputRegister(NextOffset(offset));
  86         ScaleFactor scale = ScaleFor(kMode_MR1, mode);
  87         int32_t disp = 0;
  88         return Operand(base, index, scale, disp);
  89       }
  90       case kMode_MR1I:
  91       case kMode_MR2I:
  92       case kMode_MR4I:
  93       case kMode_MR8I: {
  94         Register base = InputRegister(NextOffset(offset));
  95         Register index = InputRegister(NextOffset(offset));
  96         ScaleFactor scale = ScaleFor(kMode_MR1I, mode);
  97         int32_t disp = InputInt32(NextOffset(offset));
  98         return Operand(base, index, scale, disp);
  99       }
 100       case kMode_M1: {
 101         Register base = InputRegister(NextOffset(offset));
 102         int32_t disp = 0;
 103         return Operand(base, disp);
 104       }
 105       case kMode_M2:
 106         UNREACHABLE();  // Should use kModeMR with more compact encoding instead
 107         return Operand(no_reg, 0);
 108       case kMode_M4:
 109       case kMode_M8: {
 110         Register index = InputRegister(NextOffset(offset));
 111         ScaleFactor scale = ScaleFor(kMode_M1, mode);
 112         int32_t disp = 0;
 113         return Operand(index, scale, disp);
 114       }
 115       case kMode_M1I:
 116       case kMode_M2I:
 117       case kMode_M4I:
 118       case kMode_M8I: {
 119         Register index = InputRegister(NextOffset(offset));
 120         ScaleFactor scale = ScaleFor(kMode_M1I, mode);
 121         int32_t disp = InputInt32(NextOffset(offset));
 122         return Operand(index, scale, disp);
 123       }
 124       case kMode_None:
 125         UNREACHABLE();
 126         return Operand(no_reg, 0);
 127     }
 128     UNREACHABLE();
 129     return Operand(no_reg, 0);
 130   }
 131
 132   Operand MemoryOperand(size_t first_input = 0) {
 133     return MemoryOperand(&first_input);
 134   }
 135 };
 136
 137
 138 namespace {
 139
 140 bool HasImmediateInput(Instruction* instr, size_t index) {
 141   return instr->InputAt(index)->IsImmediate();
 142 }
 143
 144
 145 class OutOfLineLoadZero FINAL : public OutOfLineCode {
 146  public:
 147   OutOfLineLoadZero(CodeGenerator* gen, Register result)
 148       : OutOfLineCode(gen), result_(result) {}
 149
 150   void Generate() FINAL { __ xorl(result_, result_); }
 151
 152  private:
 153   Register const result_;
 154 };
 155
 156
 157 class OutOfLineLoadNaN FINAL : public OutOfLineCode {
 158  public:
 159   OutOfLineLoadNaN(CodeGenerator* gen, XMMRegister result)
 160       : OutOfLineCode(gen), result_(result) {}
 161
 162   void Generate() FINAL { __ pcmpeqd(result_, result_); }
 163
 164  private:
 165   XMMRegister const result_;
 166 };
 167
 168
 169 class OutOfLineTruncateDoubleToI FINAL : public OutOfLineCode {
 170  public:
 171   OutOfLineTruncateDoubleToI(CodeGenerator* gen, Register result,
 172                              XMMRegister input)
 173       : OutOfLineCode(gen), result_(result), input_(input) {}
 174
 175   void Generate() FINAL {
 176     __ subp(rsp, Immediate(kDoubleSize));
 177     __ movsd(MemOperand(rsp, 0), input_);
 178     __ SlowTruncateToI(result_, rsp, 0);
 179     __ addp(rsp, Immediate(kDoubleSize));
 180   }
 181
 182  private:
 183   Register const result_;
 184   XMMRegister const input_;
 185 };
 186
 187 }  // namespace
 188
 189
 190 #define ASSEMBLE_UNOP(asm_instr)         \
 191   do {                                   \
 192     if (instr->Output()->IsRegister()) { \
 193       __ asm_instr(i.OutputRegister());  \
 194     } else {                             \
 195       __ asm_instr(i.OutputOperand());   \
 196     }                                    \
 197   } while (0)
 198
 199
 200 #define ASSEMBLE_BINOP(asm_instr)                              \
 201   do {                                                         \
 202     if (HasImmediateInput(instr, 1)) {                         \
 203       if (instr->InputAt(0)->IsRegister()) {                   \
 204         __ asm_instr(i.InputRegister(0), i.InputImmediate(1)); \
 205       } else {                                                 \
 206         __ asm_instr(i.InputOperand(0), i.InputImmediate(1));  \
 207       }                                                        \
 208     } else {                                                   \
 209       if (instr->InputAt(1)->IsRegister()) {                   \
 210         __ asm_instr(i.InputRegister(0), i.InputRegister(1));  \
 211       } else {                                                 \
 212         __ asm_instr(i.InputRegister(0), i.InputOperand(1));   \
 213       }                                                        \
 214     }                                                          \
 215   } while (0)
 216
 217
 218 #define ASSEMBLE_MULT(asm_instr)                              \
 219   do {                                                        \
 220     if (HasImmediateInput(instr, 1)) {                        \
 221       if (instr->InputAt(0)->IsRegister()) {                  \
 222         __ asm_instr(i.OutputRegister(), i.InputRegister(0),  \
 223                      i.InputImmediate(1));                    \
 224       } else {                                                \
 225         __ asm_instr(i.OutputRegister(), i.InputOperand(0),   \
 226                      i.InputImmediate(1));                    \
 227       }                                                       \
 228     } else {                                                  \
 229       if (instr->InputAt(1)->IsRegister()) {                  \
 230         __ asm_instr(i.OutputRegister(), i.InputRegister(1)); \
 231       } else {                                                \
 232         __ asm_instr(i.OutputRegister(), i.InputOperand(1));  \
 233       }                                                       \
 234     }                                                         \
 235   } while (0)
 236
 237
 238 #define ASSEMBLE_SHIFT(asm_instr, width)                                   \
 239   do {                                                                     \
 240     if (HasImmediateInput(instr, 1)) {                                     \
 241       if (instr->Output()->IsRegister()) {                                 \
 242         __ asm_instr(i.OutputRegister(), Immediate(i.InputInt##width(1))); \
 243       } else {                                                             \
 244         __ asm_instr(i.OutputOperand(), Immediate(i.InputInt##width(1)));  \
 245       }                                                                    \
 246     } else {                                                               \
 247       if (instr->Output()->IsRegister()) {                                 \
 248         __ asm_instr##_cl(i.OutputRegister());                             \
 249       } else {                                                             \
 250         __ asm_instr##_cl(i.OutputOperand());                              \
 251       }                                                                    \
 252     }                                                                      \
 253   } while (0)
 254
 255
 256 #define ASSEMBLE_MOVX(asm_instr)                            \
 257   do {                                                      \
 258     if (instr->addressing_mode() != kMode_None) {           \
 259       __ asm_instr(i.OutputRegister(), i.MemoryOperand());  \
 260     } else if (instr->InputAt(0)->IsRegister()) {           \
 261       __ asm_instr(i.OutputRegister(), i.InputRegister(0)); \
 262     } else {                                                \
 263       __ asm_instr(i.OutputRegister(), i.InputOperand(0));  \
 264     }                                                       \
 265   } while (0)
 266
 267
 268 #define ASSEMBLE_SSE_BINOP(asm_instr)                                   \
 269   do {                                                                  \
 270     if (instr->InputAt(1)->IsDoubleRegister()) {                        \
 271       __ asm_instr(i.InputDoubleRegister(0), i.InputDoubleRegister(1)); \
 272     } else {                                                            \
 273       __ asm_instr(i.InputDoubleRegister(0), i.InputOperand(1));        \
 274     }                                                                   \
 275   } while (0)
 276
 277
 278 #define ASSEMBLE_SSE_UNOP(asm_instr)                                    \
 279   do {                                                                  \
 280     if (instr->InputAt(0)->IsDoubleRegister()) {                        \
 281       __ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
 282     } else {                                                            \
 283       __ asm_instr(i.OutputDoubleRegister(), i.InputOperand(0));        \
 284     }                                                                   \
 285   } while (0)
 286
 287
 288 #define ASSEMBLE_AVX_BINOP(asm_instr)                                  \
 289   do {                                                                 \
 290     CpuFeatureScope avx_scope(masm(), AVX);                            \
 291     if (instr->InputAt(1)->IsDoubleRegister()) {                       \
 292       __ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0), \
 293                    i.InputDoubleRegister(1));                          \
 294     } else {                                                           \
 295       __ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0), \
 296                    i.InputOperand(1));                                 \
 297     }                                                                  \
 298   } while (0)
 299
 300
 301 #define ASSEMBLE_CHECKED_LOAD_FLOAT(asm_instr)                               \
 302   do {                                                                       \
 303     auto result = i.OutputDoubleRegister();                                  \
 304     auto buffer = i.InputRegister(0);                                        \
 305     auto index1 = i.InputRegister(1);                                        \
 306     auto index2 = i.InputInt32(2);                                           \
 307     OutOfLineCode* ool;                                                      \
 308     if (instr->InputAt(3)->IsRegister()) {                                   \
 309       auto length = i.InputRegister(3);                                      \
 310       DCHECK_EQ(0, index2);                                                  \
 311       __ cmpl(index1, length);                                               \
 312       ool = new (zone()) OutOfLineLoadNaN(this, result);                     \
 313     } else {                                                                 \
 314       auto length = i.InputInt32(3);                                         \
 315       DCHECK_LE(index2, length);                                             \
 316       __ cmpq(index1, Immediate(length - index2));                           \
 317       class OutOfLineLoadFloat FINAL : public OutOfLineCode {                \
 318        public:                                                               \
 319         OutOfLineLoadFloat(CodeGenerator* gen, XMMRegister result,           \
 320                            Register buffer, Register index1, int32_t index2, \
 321                            int32_t length)                                   \
 322             : OutOfLineCode(gen),                                            \
 323               result_(result),                                               \
 324               buffer_(buffer),                                               \
 325               index1_(index1),                                               \
 326               index2_(index2),                                               \
 327               length_(length) {}                                             \
 328                                                                              \
 329         void Generate() FINAL {                                              \
 330           __ leal(kScratchRegister, Operand(index1_, index2_));              \
 331           __ pcmpeqd(result_, result_);                                      \
 332           __ cmpl(kScratchRegister, Immediate(length_));                     \
 333           __ j(above_equal, exit());                                         \
 334           __ asm_instr(result_,                                              \
 335                        Operand(buffer_, kScratchRegister, times_1, 0));      \
 336         }                                                                    \
 337                                                                              \
 338        private:                                                              \
 339         XMMRegister const result_;                                           \
 340         Register const buffer_;                                              \
 341         Register const index1_;                                              \
 342         int32_t const index2_;                                               \
 343         int32_t const length_;                                               \
 344       };                                                                     \
 345       ool = new (zone())                                                     \
 346           OutOfLineLoadFloat(this, result, buffer, index1, index2, length);  \
 347     }                                                                        \
 348     __ j(above_equal, ool->entry());                                         \
 349     __ asm_instr(result, Operand(buffer, index1, times_1, index2));          \
 350     __ bind(ool->exit());                                                    \
 351   } while (false)
 352
 353
 354 #define ASSEMBLE_CHECKED_LOAD_INTEGER(asm_instr)                               \
 355   do {                                                                         \
 356     auto result = i.OutputRegister();                                          \
 357     auto buffer = i.InputRegister(0);                                          \
 358     auto index1 = i.InputRegister(1);                                          \
 359     auto index2 = i.InputInt32(2);                                             \
 360     OutOfLineCode* ool;                                                        \
 361     if (instr->InputAt(3)->IsRegister()) {                                     \
 362       auto length = i.InputRegister(3);                                        \
 363       DCHECK_EQ(0, index2);                                                    \
 364       __ cmpl(index1, length);                                                 \
 365       ool = new (zone()) OutOfLineLoadZero(this, result);                      \
 366     } else {                                                                   \
 367       auto length = i.InputInt32(3);                                           \
 368       DCHECK_LE(index2, length);                                               \
 369       __ cmpq(index1, Immediate(length - index2));                             \
 370       class OutOfLineLoadInteger FINAL : public OutOfLineCode {                \
 371        public:                                                                 \
 372         OutOfLineLoadInteger(CodeGenerator* gen, Register result,              \
 373                              Register buffer, Register index1, int32_t index2, \
 374                              int32_t length)                                   \
 375             : OutOfLineCode(gen),                                              \
 376               result_(result),                                                 \
 377               buffer_(buffer),                                                 \
 378               index1_(index1),                                                 \
 379               index2_(index2),                                                 \
 380               length_(length) {}                                               \
 381                                                                                \
 382         void Generate() FINAL {                                                \
 383           Label oob;                                                           \
 384           __ leal(kScratchRegister, Operand(index1_, index2_));                \
 385           __ cmpl(kScratchRegister, Immediate(length_));                       \
 386           __ j(above_equal, &oob, Label::kNear);                               \
 387           __ asm_instr(result_,                                                \
 388                        Operand(buffer_, kScratchRegister, times_1, 0));        \
 389           __ jmp(exit());                                                      \
 390           __ bind(&oob);                                                       \
 391           __ xorl(result_, result_);                                           \
 392         }                                                                      \
 393                                                                                \
 394        private:                                                                \
 395         Register const result_;                                                \
 396         Register const buffer_;                                                \
 397         Register const index1_;                                                \
 398         int32_t const index2_;                                                 \
 399         int32_t const length_;                                                 \
 400       };                                                                       \
 401       ool = new (zone())                                                       \
 402           OutOfLineLoadInteger(this, result, buffer, index1, index2, length);  \
 403     }                                                                          \
 404     __ j(above_equal, ool->entry());                                           \
 405     __ asm_instr(result, Operand(buffer, index1, times_1, index2));            \
 406     __ bind(ool->exit());                                                      \
 407   } while (false)
 408
 409
 410 #define ASSEMBLE_CHECKED_STORE_FLOAT(asm_instr)                              \
 411   do {                                                                       \
 412     auto buffer = i.InputRegister(0);                                        \
 413     auto index1 = i.InputRegister(1);                                        \
 414     auto index2 = i.InputInt32(2);                                           \
 415     auto value = i.InputDoubleRegister(4);                                   \
 416     if (instr->InputAt(3)->IsRegister()) {                                   \
 417       auto length = i.InputRegister(3);                                      \
 418       DCHECK_EQ(0, index2);                                                  \
 419       Label done;                                                            \
 420       __ cmpl(index1, length);                                               \
 421       __ j(above_equal, &done, Label::kNear);                                \
 422       __ asm_instr(Operand(buffer, index1, times_1, index2), value);         \
 423       __ bind(&done);                                                        \
 424     } else {                                                                 \
 425       auto length = i.InputInt32(3);                                         \
 426       DCHECK_LE(index2, length);                                             \
 427       __ cmpq(index1, Immediate(length - index2));                           \
 428       class OutOfLineStoreFloat FINAL : public OutOfLineCode {               \
 429        public:                                                               \
 430         OutOfLineStoreFloat(CodeGenerator* gen, Register buffer,             \
 431                             Register index1, int32_t index2, int32_t length, \
 432                             XMMRegister value)                               \
 433             : OutOfLineCode(gen),                                            \
 434               buffer_(buffer),                                               \
 435               index1_(index1),                                               \
 436               index2_(index2),                                               \
 437               length_(length),                                               \
 438               value_(value) {}                                               \
 439                                                                              \
 440         void Generate() FINAL {                                              \
 441           __ leal(kScratchRegister, Operand(index1_, index2_));              \
 442           __ cmpl(kScratchRegister, Immediate(length_));                     \
 443           __ j(above_equal, exit());                                         \
 444           __ asm_instr(Operand(buffer_, kScratchRegister, times_1, 0),       \
 445                        value_);                                              \
 446         }                                                                    \
 447                                                                              \
 448        private:                                                              \
 449         Register const buffer_;                                              \
 450         Register const index1_;                                              \
 451         int32_t const index2_;                                               \
 452         int32_t const length_;                                               \
 453         XMMRegister const value_;                                            \
 454       };                                                                     \
 455       auto ool = new (zone())                                                \
 456           OutOfLineStoreFloat(this, buffer, index1, index2, length, value);  \
 457       __ j(above_equal, ool->entry());                                       \
 458       __ asm_instr(Operand(buffer, index1, times_1, index2), value);         \
 459       __ bind(ool->exit());                                                  \
 460     }                                                                        \
 461   } while (false)
 462
 463
 464 #define ASSEMBLE_CHECKED_STORE_INTEGER_IMPL(asm_instr, Value)                  \
 465   do {                                                                         \
 466     auto buffer = i.InputRegister(0);                                          \
 467     auto index1 = i.InputRegister(1);                                          \
 468     auto index2 = i.InputInt32(2);                                             \
 469     if (instr->InputAt(3)->IsRegister()) {                                     \
 470       auto length = i.InputRegister(3);                                        \
 471       DCHECK_EQ(0, index2);                                                    \
 472       Label done;                                                              \
 473       __ cmpl(index1, length);                                                 \
 474       __ j(above_equal, &done, Label::kNear);                                  \
 475       __ asm_instr(Operand(buffer, index1, times_1, index2), value);           \
 476       __ bind(&done);                                                          \
 477     } else {                                                                   \
 478       auto length = i.InputInt32(3);                                           \
 479       DCHECK_LE(index2, length);                                               \
 480       __ cmpq(index1, Immediate(length - index2));                             \
 481       class OutOfLineStoreInteger FINAL : public OutOfLineCode {               \
 482        public:                                                                 \
 483         OutOfLineStoreInteger(CodeGenerator* gen, Register buffer,             \
 484                               Register index1, int32_t index2, int32_t length, \
 485                               Value value)                                     \
 486             : OutOfLineCode(gen),                                              \
 487               buffer_(buffer),                                                 \
 488               index1_(index1),                                                 \
 489               index2_(index2),                                                 \
 490               length_(length),                                                 \
 491               value_(value) {}                                                 \
 492                                                                                \
 493         void Generate() FINAL {                                                \
 494           __ leal(kScratchRegister, Operand(index1_, index2_));                \
 495           __ cmpl(kScratchRegister, Immediate(length_));                       \
 496           __ j(above_equal, exit());                                           \
 497           __ asm_instr(Operand(buffer_, kScratchRegister, times_1, 0),         \
 498                        value_);                                                \
 499         }                                                                      \
 500                                                                                \
 501        private:                                                                \
 502         Register const buffer_;                                                \
 503         Register const index1_;                                                \
 504         int32_t const index2_;                                                 \
 505         int32_t const length_;                                                 \
 506         Value const value_;                                                    \
 507       };                                                                       \
 508       auto ool = new (zone())                                                  \
 509           OutOfLineStoreInteger(this, buffer, index1, index2, length, value);  \
 510       __ j(above_equal, ool->entry());                                         \
 511       __ asm_instr(Operand(buffer, index1, times_1, index2), value);           \
 512       __ bind(ool->exit());                                                    \
 513     }                                                                          \
 514   } while (false)
 515
 516
 517 #define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr)                \
 518   do {                                                           \
 519     if (instr->InputAt(4)->IsRegister()) {                       \
 520       Register value = i.InputRegister(4);                       \
 521       ASSEMBLE_CHECKED_STORE_INTEGER_IMPL(asm_instr, Register);  \
 522     } else {                                                     \
 523       Immediate value = i.InputImmediate(4);                     \
 524       ASSEMBLE_CHECKED_STORE_INTEGER_IMPL(asm_instr, Immediate); \
 525     }                                                            \
 526   } while (false)
 527
 528
 529 // Assembles an instruction after register allocation, producing machine code.
 530 void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
 531   X64OperandConverter i(this, instr);
 532
 533   switch (ArchOpcodeField::decode(instr->opcode())) {
 534     case kArchCallCodeObject: {
 535       EnsureSpaceForLazyDeopt();
 536       if (HasImmediateInput(instr, 0)) {
 537         Handle<Code> code = Handle<Code>::cast(i.InputHeapObject(0));
 538         __ Call(code, RelocInfo::CODE_TARGET);
 539       } else {
 540         Register reg = i.InputRegister(0);
 541         int entry = Code::kHeaderSize - kHeapObjectTag;
 542         __ Call(Operand(reg, entry));
 543       }
 544       RecordCallPosition(instr);
 545       break;
 546     }
 547     case kArchCallJSFunction: {
 548       EnsureSpaceForLazyDeopt();
 549       Register func = i.InputRegister(0);
 550       if (FLAG_debug_code) {
 551         // Check the function's context matches the context argument.
 552         __ cmpp(rsi, FieldOperand(func, JSFunction::kContextOffset));
 553         __ Assert(equal, kWrongFunctionContext);
 554       }
 555       __ Call(FieldOperand(func, JSFunction::kCodeEntryOffset));
 556       RecordCallPosition(instr);
 557       break;
 558     }
 559     case kArchJmp:
 560       AssembleArchJump(i.InputRpo(0));
 561       break;
 562     case kArchLookupSwitch:
 563       AssembleArchLookupSwitch(instr);
 564       break;
 565     case kArchTableSwitch:
 566       AssembleArchTableSwitch(instr);
 567       break;
 568     case kArchNop:
 569       // don't emit code for nops.
 570       break;
 571     case kArchDeoptimize: {
 572       int deopt_state_id =
 573           BuildTranslation(instr, -1, 0, OutputFrameStateCombine::Ignore());
 574       AssembleDeoptimizerCall(deopt_state_id, Deoptimizer::EAGER);
 575       break;
 576     }
 577     case kArchRet:
 578       AssembleReturn();
 579       break;
 580     case kArchStackPointer:
 581       __ movq(i.OutputRegister(), rsp);
 582       break;
 583     case kArchTruncateDoubleToI: {
 584       auto result = i.OutputRegister();
 585       auto input = i.InputDoubleRegister(0);
 586       auto ool = new (zone()) OutOfLineTruncateDoubleToI(this, result, input);
 587       __ cvttsd2siq(result, input);
 588       __ cmpq(result, Immediate(1));
 589       __ j(overflow, ool->entry());
 590       __ bind(ool->exit());
 591       break;
 592     }
 593     case kX64Add32:
 594       ASSEMBLE_BINOP(addl);
 595       break;
 596     case kX64Add:
 597       ASSEMBLE_BINOP(addq);
 598       break;
 599     case kX64Sub32:
 600       ASSEMBLE_BINOP(subl);
 601       break;
 602     case kX64Sub:
 603       ASSEMBLE_BINOP(subq);
 604       break;
 605     case kX64And32:
 606       ASSEMBLE_BINOP(andl);
 607       break;
 608     case kX64And:
 609       ASSEMBLE_BINOP(andq);
 610       break;
 611     case kX64Cmp32:
 612       ASSEMBLE_BINOP(cmpl);
 613       break;
 614     case kX64Cmp:
 615       ASSEMBLE_BINOP(cmpq);
 616       break;
 617     case kX64Test32:
 618       ASSEMBLE_BINOP(testl);
 619       break;
 620     case kX64Test:
 621       ASSEMBLE_BINOP(testq);
 622       break;
 623     case kX64Imul32:
 624       ASSEMBLE_MULT(imull);
 625       break;
 626     case kX64Imul:
 627       ASSEMBLE_MULT(imulq);
 628       break;
 629     case kX64ImulHigh32:
 630       if (instr->InputAt(1)->IsRegister()) {
 631         __ imull(i.InputRegister(1));
 632       } else {
 633         __ imull(i.InputOperand(1));
 634       }
 635       break;
 636     case kX64UmulHigh32:
 637       if (instr->InputAt(1)->IsRegister()) {
 638         __ mull(i.InputRegister(1));
 639       } else {
 640         __ mull(i.InputOperand(1));
 641       }
 642       break;
 643     case kX64Idiv32:
 644       __ cdq();
 645       __ idivl(i.InputRegister(1));
 646       break;
 647     case kX64Idiv:
 648       __ cqo();
 649       __ idivq(i.InputRegister(1));
 650       break;
 651     case kX64Udiv32:
 652       __ xorl(rdx, rdx);
 653       __ divl(i.InputRegister(1));
 654       break;
 655     case kX64Udiv:
 656       __ xorq(rdx, rdx);
 657       __ divq(i.InputRegister(1));
 658       break;
 659     case kX64Not:
 660       ASSEMBLE_UNOP(notq);
 661       break;
 662     case kX64Not32:
 663       ASSEMBLE_UNOP(notl);
 664       break;
 665     case kX64Neg:
 666       ASSEMBLE_UNOP(negq);
 667       break;
 668     case kX64Neg32:
 669       ASSEMBLE_UNOP(negl);
 670       break;
 671     case kX64Or32:
 672       ASSEMBLE_BINOP(orl);
 673       break;
 674     case kX64Or:
 675       ASSEMBLE_BINOP(orq);
 676       break;
 677     case kX64Xor32:
 678       ASSEMBLE_BINOP(xorl);
 679       break;
 680     case kX64Xor:
 681       ASSEMBLE_BINOP(xorq);
 682       break;
 683     case kX64Shl32:
 684       ASSEMBLE_SHIFT(shll, 5);
 685       break;
 686     case kX64Shl:
 687       ASSEMBLE_SHIFT(shlq, 6);
 688       break;
 689     case kX64Shr32:
 690       ASSEMBLE_SHIFT(shrl, 5);
 691       break;
 692     case kX64Shr:
 693       ASSEMBLE_SHIFT(shrq, 6);
 694       break;
 695     case kX64Sar32:
 696       ASSEMBLE_SHIFT(sarl, 5);
 697       break;
 698     case kX64Sar:
 699       ASSEMBLE_SHIFT(sarq, 6);
 700       break;
 701     case kX64Ror32:
 702       ASSEMBLE_SHIFT(rorl, 5);
 703       break;
 704     case kX64Ror:
 705       ASSEMBLE_SHIFT(rorq, 6);
 706       break;
 707     case kX64Lzcnt32:
 708       if (instr->InputAt(0)->IsRegister()) {
 709         __ Lzcntl(i.OutputRegister(), i.InputRegister(0));
 710       } else {
 711         __ Lzcntl(i.OutputRegister(), i.InputOperand(0));
 712       }
 713       break;
 714     case kSSEFloat32Cmp:
 715       ASSEMBLE_SSE_BINOP(ucomiss);
 716       break;
 717     case kSSEFloat32Add:
 718       ASSEMBLE_SSE_BINOP(addss);
 719       break;
 720     case kSSEFloat32Sub:
 721       ASSEMBLE_SSE_BINOP(subss);
 722       break;
 723     case kSSEFloat32Mul:
 724       ASSEMBLE_SSE_BINOP(mulss);
 725       break;
 726     case kSSEFloat32Div:
 727       ASSEMBLE_SSE_BINOP(divss);
 728       break;
 729     case kSSEFloat32Neg: {
 730       // TODO(bmeurer): Use RIP relative 128-bit constants.
 731       // TODO(turbofan): Add AVX version with relaxed register constraints.
 732       __ pcmpeqd(kScratchDoubleReg, kScratchDoubleReg);
 733       __ psllq(kScratchDoubleReg, 31);
 734       __ xorps(i.OutputDoubleRegister(), kScratchDoubleReg);
 735       break;
 736     }
 737     case kSSEFloat32Sqrt:
 738       ASSEMBLE_SSE_UNOP(sqrtss);
 739       break;
 740     case kSSEFloat32Max:
 741       ASSEMBLE_SSE_BINOP(maxss);
 742       break;
 743     case kSSEFloat32Min:
 744       ASSEMBLE_SSE_BINOP(minss);
 745       break;
 746     case kSSEFloat32ToFloat64:
 747       ASSEMBLE_SSE_UNOP(cvtss2sd);
 748       break;
 749     case kSSEFloat64Cmp:
 750       ASSEMBLE_SSE_BINOP(ucomisd);
 751       break;
 752     case kSSEFloat64Add:
 753       ASSEMBLE_SSE_BINOP(addsd);
 754       break;
 755     case kSSEFloat64Sub:
 756       ASSEMBLE_SSE_BINOP(subsd);
 757       break;
 758     case kSSEFloat64Mul:
 759       ASSEMBLE_SSE_BINOP(mulsd);
 760       break;
 761     case kSSEFloat64Div:
 762       ASSEMBLE_SSE_BINOP(divsd);
 763       break;
 764     case kSSEFloat64Mod: {
 765       __ subq(rsp, Immediate(kDoubleSize));
 766       // Move values to st(0) and st(1).
 767       __ movsd(Operand(rsp, 0), i.InputDoubleRegister(1));
 768       __ fld_d(Operand(rsp, 0));
 769       __ movsd(Operand(rsp, 0), i.InputDoubleRegister(0));
 770       __ fld_d(Operand(rsp, 0));
 771       // Loop while fprem isn't done.
 772       Label mod_loop;
 773       __ bind(&mod_loop);
 774       // This instructions traps on all kinds inputs, but we are assuming the
 775       // floating point control word is set to ignore them all.
 776       __ fprem();
 777       // The following 2 instruction implicitly use rax.
 778       __ fnstsw_ax();
 779       if (CpuFeatures::IsSupported(SAHF)) {
 780         CpuFeatureScope sahf_scope(masm(), SAHF);
 781         __ sahf();
 782       } else {
 783         __ shrl(rax, Immediate(8));
 784         __ andl(rax, Immediate(0xFF));
 785         __ pushq(rax);
 786         __ popfq();
 787       }
 788       __ j(parity_even, &mod_loop);
 789       // Move output to stack and clean up.
 790       __ fstp(1);
 791       __ fstp_d(Operand(rsp, 0));
 792       __ movsd(i.OutputDoubleRegister(), Operand(rsp, 0));
 793       __ addq(rsp, Immediate(kDoubleSize));
 794       break;
 795     }
 796     case kSSEFloat64Max:
 797       ASSEMBLE_SSE_BINOP(maxsd);
 798       break;
 799     case kSSEFloat64Min:
 800       ASSEMBLE_SSE_BINOP(minsd);
 801       break;
 802     case kSSEFloat64Neg: {
 803       // TODO(bmeurer): Use RIP relative 128-bit constants.
 804       // TODO(turbofan): Add AVX version with relaxed register constraints.
 805       __ pcmpeqd(kScratchDoubleReg, kScratchDoubleReg);
 806       __ psllq(kScratchDoubleReg, 63);
 807       __ xorpd(i.OutputDoubleRegister(), kScratchDoubleReg);
 808       break;
 809     }
 810     case kSSEFloat64Sqrt:
 811       ASSEMBLE_SSE_UNOP(sqrtsd);
 812       break;
 813     case kSSEFloat64Round: {
 814       CpuFeatureScope sse_scope(masm(), SSE4_1);
 815       RoundingMode const mode =
 816           static_cast<RoundingMode>(MiscField::decode(instr->opcode()));
 817       __ roundsd(i.OutputDoubleRegister(), i.InputDoubleRegister(0), mode);
 818       break;
 819     }
 820     case kSSEFloat64ToFloat32:
 821       ASSEMBLE_SSE_UNOP(cvtsd2ss);
 822       break;
 823     case kSSEFloat64ToInt32:
 824       if (instr->InputAt(0)->IsDoubleRegister()) {
 825         __ cvttsd2si(i.OutputRegister(), i.InputDoubleRegister(0));
 826       } else {
 827         __ cvttsd2si(i.OutputRegister(), i.InputOperand(0));
 828       }
 829       break;
 830     case kSSEFloat64ToUint32: {
 831       if (instr->InputAt(0)->IsDoubleRegister()) {
 832         __ cvttsd2siq(i.OutputRegister(), i.InputDoubleRegister(0));
 833       } else {
 834         __ cvttsd2siq(i.OutputRegister(), i.InputOperand(0));
 835       }
 836       __ AssertZeroExtended(i.OutputRegister());
 837       break;
 838     }
 839     case kSSEInt32ToFloat64:
 840       if (instr->InputAt(0)->IsRegister()) {
 841         __ cvtlsi2sd(i.OutputDoubleRegister(), i.InputRegister(0));
 842       } else {
 843         __ cvtlsi2sd(i.OutputDoubleRegister(), i.InputOperand(0));
 844       }
 845       break;
 846     case kSSEUint32ToFloat64:
 847       if (instr->InputAt(0)->IsRegister()) {
 848         __ movl(kScratchRegister, i.InputRegister(0));
 849       } else {
 850         __ movl(kScratchRegister, i.InputOperand(0));
 851       }
 852       __ cvtqsi2sd(i.OutputDoubleRegister(), kScratchRegister);
 853       break;
 854     case kSSEFloat64ExtractLowWord32:
 855       if (instr->InputAt(0)->IsDoubleStackSlot()) {
 856         __ movl(i.OutputRegister(), i.InputOperand(0));
 857       } else {
 858         __ movd(i.OutputRegister(), i.InputDoubleRegister(0));
 859       }
 860       break;
 861     case kSSEFloat64ExtractHighWord32:
 862       if (instr->InputAt(0)->IsDoubleStackSlot()) {
 863         __ movl(i.OutputRegister(), i.InputOperand(0, kDoubleSize / 2));
 864       } else {
 865         __ Pextrd(i.OutputRegister(), i.InputDoubleRegister(0), 1);
 866       }
 867       break;
 868     case kSSEFloat64InsertLowWord32:
 869       if (instr->InputAt(1)->IsRegister()) {
 870         __ Pinsrd(i.OutputDoubleRegister(), i.InputRegister(1), 0);
 871       } else {
 872         __ Pinsrd(i.OutputDoubleRegister(), i.InputOperand(1), 0);
 873       }
 874       break;
 875     case kSSEFloat64InsertHighWord32:
 876       if (instr->InputAt(1)->IsRegister()) {
 877         __ Pinsrd(i.OutputDoubleRegister(), i.InputRegister(1), 1);
 878       } else {
 879         __ Pinsrd(i.OutputDoubleRegister(), i.InputOperand(1), 1);
 880       }
 881       break;
 882     case kSSEFloat64LoadLowWord32:
 883       if (instr->InputAt(0)->IsRegister()) {
 884         __ movd(i.OutputDoubleRegister(), i.InputRegister(0));
 885       } else {
 886         __ movd(i.OutputDoubleRegister(), i.InputOperand(0));
 887       }
 888       break;
 889     case kAVXFloat32Cmp: {
 890       CpuFeatureScope avx_scope(masm(), AVX);
 891       if (instr->InputAt(1)->IsDoubleRegister()) {
 892         __ vucomiss(i.InputDoubleRegister(0), i.InputDoubleRegister(1));
 893       } else {
 894         __ vucomiss(i.InputDoubleRegister(0), i.InputOperand(1));
 895       }
 896       break;
 897     }
 898     case kAVXFloat32Add:
 899       ASSEMBLE_AVX_BINOP(vaddss);
 900       break;
 901     case kAVXFloat32Sub:
 902       ASSEMBLE_AVX_BINOP(vsubss);
 903       break;
 904     case kAVXFloat32Mul:
 905       ASSEMBLE_AVX_BINOP(vmulss);
 906       break;
 907     case kAVXFloat32Div:
 908       ASSEMBLE_AVX_BINOP(vdivss);
 909       break;
 910     case kAVXFloat32Max:
 911       ASSEMBLE_AVX_BINOP(vmaxss);
 912       break;
 913     case kAVXFloat32Min:
 914       ASSEMBLE_AVX_BINOP(vminss);
 915       break;
 916     case kAVXFloat64Cmp: {
 917       CpuFeatureScope avx_scope(masm(), AVX);
 918       if (instr->InputAt(1)->IsDoubleRegister()) {
 919         __ vucomisd(i.InputDoubleRegister(0), i.InputDoubleRegister(1));
 920       } else {
 921         __ vucomisd(i.InputDoubleRegister(0), i.InputOperand(1));
 922       }
 923       break;
 924     }
 925     case kAVXFloat64Add:
 926       ASSEMBLE_AVX_BINOP(vaddsd);
 927       break;
 928     case kAVXFloat64Sub:
 929       ASSEMBLE_AVX_BINOP(vsubsd);
 930       break;
 931     case kAVXFloat64Mul:
 932       ASSEMBLE_AVX_BINOP(vmulsd);
 933       break;
 934     case kAVXFloat64Div:
 935       ASSEMBLE_AVX_BINOP(vdivsd);
 936       break;
 937     case kAVXFloat64Max:
 938       ASSEMBLE_AVX_BINOP(vmaxsd);
 939       break;
 940     case kAVXFloat64Min:
 941       ASSEMBLE_AVX_BINOP(vminsd);
 942       break;
 943     case kX64Movsxbl:
 944       ASSEMBLE_MOVX(movsxbl);
 945       __ AssertZeroExtended(i.OutputRegister());
 946       break;
 947     case kX64Movzxbl:
 948       ASSEMBLE_MOVX(movzxbl);
 949       __ AssertZeroExtended(i.OutputRegister());
 950       break;
 951     case kX64Movb: {
 952       size_t index = 0;
 953       Operand operand = i.MemoryOperand(&index);
 954       if (HasImmediateInput(instr, index)) {
 955         __ movb(operand, Immediate(i.InputInt8(index)));
 956       } else {
 957         __ movb(operand, i.InputRegister(index));
 958       }
 959       break;
 960     }
 961     case kX64Movsxwl:
 962       ASSEMBLE_MOVX(movsxwl);
 963       __ AssertZeroExtended(i.OutputRegister());
 964       break;
 965     case kX64Movzxwl:
 966       ASSEMBLE_MOVX(movzxwl);
 967       __ AssertZeroExtended(i.OutputRegister());
 968       break;
 969     case kX64Movw: {
 970       size_t index = 0;
 971       Operand operand = i.MemoryOperand(&index);
 972       if (HasImmediateInput(instr, index)) {
 973         __ movw(operand, Immediate(i.InputInt16(index)));
 974       } else {
 975         __ movw(operand, i.InputRegister(index));
 976       }
 977       break;
 978     }
 979     case kX64Movl:
 980       if (instr->HasOutput()) {
 981         if (instr->addressing_mode() == kMode_None) {
 982           if (instr->InputAt(0)->IsRegister()) {
 983             __ movl(i.OutputRegister(), i.InputRegister(0));
 984           } else {
 985             __ movl(i.OutputRegister(), i.InputOperand(0));
 986           }
 987         } else {
 988           __ movl(i.OutputRegister(), i.MemoryOperand());
 989         }
 990         __ AssertZeroExtended(i.OutputRegister());
 991       } else {
 992         size_t index = 0;
 993         Operand operand = i.MemoryOperand(&index);
 994         if (HasImmediateInput(instr, index)) {
 995           __ movl(operand, i.InputImmediate(index));
 996         } else {
 997           __ movl(operand, i.InputRegister(index));
 998         }
 999       }
1000       break;
1001     case kX64Movsxlq:
1002       ASSEMBLE_MOVX(movsxlq);
1003       break;
1004     case kX64Movq:
1005       if (instr->HasOutput()) {
1006         __ movq(i.OutputRegister(), i.MemoryOperand());
1007       } else {
1008         size_t index = 0;
1009         Operand operand = i.MemoryOperand(&index);
1010         if (HasImmediateInput(instr, index)) {
1011           __ movq(operand, i.InputImmediate(index));
1012         } else {
1013           __ movq(operand, i.InputRegister(index));
1014         }
1015       }
1016       break;
1017     case kX64Movss:
1018       if (instr->HasOutput()) {
1019         __ movss(i.OutputDoubleRegister(), i.MemoryOperand());
1020       } else {
1021         size_t index = 0;
1022         Operand operand = i.MemoryOperand(&index);
1023         __ movss(operand, i.InputDoubleRegister(index));
1024       }
1025       break;
1026     case kX64Movsd:
1027       if (instr->HasOutput()) {
1028         __ movsd(i.OutputDoubleRegister(), i.MemoryOperand());
1029       } else {
1030         size_t index = 0;
1031         Operand operand = i.MemoryOperand(&index);
1032         __ movsd(operand, i.InputDoubleRegister(index));
1033       }
1034       break;
1035     case kX64Lea32: {
1036       AddressingMode mode = AddressingModeField::decode(instr->opcode());
1037       // Shorten "leal" to "addl", "subl" or "shll" if the register allocation
1038       // and addressing mode just happens to work out. The "addl"/"subl" forms
1039       // in these cases are faster based on measurements.
1040       if (i.InputRegister(0).is(i.OutputRegister())) {
1041         if (mode == kMode_MRI) {
1042           int32_t constant_summand = i.InputInt32(1);
1043           if (constant_summand > 0) {
1044             __ addl(i.OutputRegister(), Immediate(constant_summand));
1045           } else if (constant_summand < 0) {
1046             __ subl(i.OutputRegister(), Immediate(-constant_summand));
1047           }
1048         } else if (mode == kMode_MR1) {
1049           if (i.InputRegister(1).is(i.OutputRegister())) {
1050             __ shll(i.OutputRegister(), Immediate(1));
1051           } else {
1052             __ leal(i.OutputRegister(), i.MemoryOperand());
1053           }
1054         } else if (mode == kMode_M2) {
1055           __ shll(i.OutputRegister(), Immediate(1));
1056         } else if (mode == kMode_M4) {
1057           __ shll(i.OutputRegister(), Immediate(2));
1058         } else if (mode == kMode_M8) {
1059           __ shll(i.OutputRegister(), Immediate(3));
1060         } else {
1061           __ leal(i.OutputRegister(), i.MemoryOperand());
1062         }
1063       } else {
1064         __ leal(i.OutputRegister(), i.MemoryOperand());
1065       }
1066       __ AssertZeroExtended(i.OutputRegister());
1067       break;
1068     }
1069     case kX64Lea:
1070       __ leaq(i.OutputRegister(), i.MemoryOperand());
1071       break;
1072     case kX64Dec32:
1073       __ decl(i.OutputRegister());
1074       break;
1075     case kX64Inc32:
1076       __ incl(i.OutputRegister());
1077       break;
1078     case kX64Push:
1079       if (HasImmediateInput(instr, 0)) {
1080         __ pushq(i.InputImmediate(0));
1081       } else {
1082         if (instr->InputAt(0)->IsRegister()) {
1083           __ pushq(i.InputRegister(0));
1084         } else {
1085           __ pushq(i.InputOperand(0));
1086         }
1087       }
1088       break;
1089     case kX64StoreWriteBarrier: {
1090       Register object = i.InputRegister(0);
1091       Register index = i.InputRegister(1);
1092       Register value = i.InputRegister(2);
1093       __ movq(Operand(object, index, times_1, 0), value);
1094       __ leaq(index, Operand(object, index, times_1, 0));
1095       SaveFPRegsMode mode =
1096           frame()->DidAllocateDoubleRegisters() ? kSaveFPRegs : kDontSaveFPRegs;
1097       __ RecordWrite(object, index, value, mode);
1098       break;
1099     }
1100     case kCheckedLoadInt8:
1101       ASSEMBLE_CHECKED_LOAD_INTEGER(movsxbl);
1102       break;
1103     case kCheckedLoadUint8:
1104       ASSEMBLE_CHECKED_LOAD_INTEGER(movzxbl);
1105       break;
1106     case kCheckedLoadInt16:
1107       ASSEMBLE_CHECKED_LOAD_INTEGER(movsxwl);
1108       break;
1109     case kCheckedLoadUint16:
1110       ASSEMBLE_CHECKED_LOAD_INTEGER(movzxwl);
1111       break;
1112     case kCheckedLoadWord32:
1113       ASSEMBLE_CHECKED_LOAD_INTEGER(movl);
1114       break;
1115     case kCheckedLoadFloat32:
1116       ASSEMBLE_CHECKED_LOAD_FLOAT(movss);
1117       break;
1118     case kCheckedLoadFloat64:
1119       ASSEMBLE_CHECKED_LOAD_FLOAT(movsd);
1120       break;
1121     case kCheckedStoreWord8:
1122       ASSEMBLE_CHECKED_STORE_INTEGER(movb);
1123       break;
1124     case kCheckedStoreWord16:
1125       ASSEMBLE_CHECKED_STORE_INTEGER(movw);
1126       break;
1127     case kCheckedStoreWord32:
1128       ASSEMBLE_CHECKED_STORE_INTEGER(movl);
1129       break;
1130     case kCheckedStoreFloat32:
1131       ASSEMBLE_CHECKED_STORE_FLOAT(movss);
1132       break;
1133     case kCheckedStoreFloat64:
1134       ASSEMBLE_CHECKED_STORE_FLOAT(movsd);
1135       break;
1136     case kX64StackCheck:
1137       __ CompareRoot(rsp, Heap::kStackLimitRootIndex);
1138       break;
1139   }
1140 }  // NOLINT(readability/fn_size)
1141
1142
1143 // Assembles branches after this instruction.
1144 void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
1145   X64OperandConverter i(this, instr);
1146   Label::Distance flabel_distance =
1147       branch->fallthru ? Label::kNear : Label::kFar;
1148   Label* tlabel = branch->true_label;
1149   Label* flabel = branch->false_label;
1150   switch (branch->condition) {
1151     case kUnorderedEqual:
1152       __ j(parity_even, flabel, flabel_distance);
1153     // Fall through.
1154     case kEqual:
1155       __ j(equal, tlabel);
1156       break;
1157     case kUnorderedNotEqual:
1158       __ j(parity_even, tlabel);
1159     // Fall through.
1160     case kNotEqual:
1161       __ j(not_equal, tlabel);
1162       break;
1163     case kSignedLessThan:
1164       __ j(less, tlabel);
1165       break;
1166     case kSignedGreaterThanOrEqual:
1167       __ j(greater_equal, tlabel);
1168       break;
1169     case kSignedLessThanOrEqual:
1170       __ j(less_equal, tlabel);
1171       break;
1172     case kSignedGreaterThan:
1173       __ j(greater, tlabel);
1174       break;
1175     case kUnsignedLessThan:
1176       __ j(below, tlabel);
1177       break;
1178     case kUnsignedGreaterThanOrEqual:
1179       __ j(above_equal, tlabel);
1180       break;
1181     case kUnsignedLessThanOrEqual:
1182       __ j(below_equal, tlabel);
1183       break;
1184     case kUnsignedGreaterThan:
1185       __ j(above, tlabel);
1186       break;
1187     case kOverflow:
1188       __ j(overflow, tlabel);
1189       break;
1190     case kNotOverflow:
1191       __ j(no_overflow, tlabel);
1192       break;
1193   }
1194   if (!branch->fallthru) __ jmp(flabel, flabel_distance);
1195 }
1196
1197
1198 void CodeGenerator::AssembleArchJump(RpoNumber target) {
1199   if (!IsNextInAssemblyOrder(target)) __ jmp(GetLabel(target));
1200 }
1201
1202
1203 // Assembles boolean materializations after this instruction.
1204 void CodeGenerator::AssembleArchBoolean(Instruction* instr,
1205                                         FlagsCondition condition) {
1206   X64OperandConverter i(this, instr);
1207   Label done;
1208
1209   // Materialize a full 64-bit 1 or 0 value. The result register is always the
1210   // last output of the instruction.
1211   Label check;
1212   DCHECK_NE(0u, instr->OutputCount());
1213   Register reg = i.OutputRegister(instr->OutputCount() - 1);
1214   Condition cc = no_condition;
1215   switch (condition) {
1216     case kUnorderedEqual:
1217       __ j(parity_odd, &check, Label::kNear);
1218       __ movl(reg, Immediate(0));
1219       __ jmp(&done, Label::kNear);
1220     // Fall through.
1221     case kEqual:
1222       cc = equal;
1223       break;
1224     case kUnorderedNotEqual:
1225       __ j(parity_odd, &check, Label::kNear);
1226       __ movl(reg, Immediate(1));
1227       __ jmp(&done, Label::kNear);
1228     // Fall through.
1229     case kNotEqual:
1230       cc = not_equal;
1231       break;
1232     case kSignedLessThan:
1233       cc = less;
1234       break;
1235     case kSignedGreaterThanOrEqual:
1236       cc = greater_equal;
1237       break;
1238     case kSignedLessThanOrEqual:
1239       cc = less_equal;
1240       break;
1241     case kSignedGreaterThan:
1242       cc = greater;
1243       break;
1244     case kUnsignedLessThan:
1245       cc = below;
1246       break;
1247     case kUnsignedGreaterThanOrEqual:
1248       cc = above_equal;
1249       break;
1250     case kUnsignedLessThanOrEqual:
1251       cc = below_equal;
1252       break;
1253     case kUnsignedGreaterThan:
1254       cc = above;
1255       break;
1256     case kOverflow:
1257       cc = overflow;
1258       break;
1259     case kNotOverflow:
1260       cc = no_overflow;
1261       break;
1262   }
1263   __ bind(&check);
1264   __ setcc(cc, reg);
1265   __ movzxbl(reg, reg);
1266   __ bind(&done);
1267 }
1268
1269
1270 void CodeGenerator::AssembleArchLookupSwitch(Instruction* instr) {
1271   X64OperandConverter i(this, instr);
1272   Register input = i.InputRegister(0);
1273   for (size_t index = 2; index < instr->InputCount(); index += 2) {
1274     __ cmpl(input, Immediate(i.InputInt32(index + 0)));
1275     __ j(equal, GetLabel(i.InputRpo(index + 1)));
1276   }
1277   AssembleArchJump(i.InputRpo(1));
1278 }
1279
1280
1281 void CodeGenerator::AssembleArchTableSwitch(Instruction* instr) {
1282   X64OperandConverter i(this, instr);
1283   Register input = i.InputRegister(0);
1284   int32_t const case_count = static_cast<int32_t>(instr->InputCount() - 2);
1285   Label** cases = zone()->NewArray<Label*>(case_count);
1286   for (int32_t index = 0; index < case_count; ++index) {
1287     cases[index] = GetLabel(i.InputRpo(index + 2));
1288   }
1289   Label* const table = AddJumpTable(cases, case_count);
1290   __ cmpl(input, Immediate(case_count));
1291   __ j(above_equal, GetLabel(i.InputRpo(1)));
1292   __ leaq(kScratchRegister, Operand(table));
1293   __ jmp(Operand(kScratchRegister, input, times_8, 0));
1294 }
1295
1296
1297 void CodeGenerator::AssembleDeoptimizerCall(
1298     int deoptimization_id, Deoptimizer::BailoutType bailout_type) {
1299   Address deopt_entry = Deoptimizer::GetDeoptimizationEntry(
1300       isolate(), deoptimization_id, bailout_type);
1301   __ call(deopt_entry, RelocInfo::RUNTIME_ENTRY);
1302 }
1303
1304
1305 void CodeGenerator::AssemblePrologue() {
1306   CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
1307   int stack_slots = frame()->GetSpillSlotCount();
1308   if (descriptor->kind() == CallDescriptor::kCallAddress) {
1309     __ pushq(rbp);
1310     __ movq(rbp, rsp);
1311     const RegList saves = descriptor->CalleeSavedRegisters();
1312     if (saves != 0) {  // Save callee-saved registers.
1313       int register_save_area_size = 0;
1314       for (int i = Register::kNumRegisters - 1; i >= 0; i--) {
1315         if (!((1 << i) & saves)) continue;
1316         __ pushq(Register::from_code(i));
1317         register_save_area_size += kPointerSize;
1318       }
1319       frame()->SetRegisterSaveAreaSize(register_save_area_size);
1320     }
1321   } else if (descriptor->IsJSFunctionCall()) {
1322     CompilationInfo* info = this->info();
1323     __ Prologue(info->IsCodePreAgingActive());
1324     frame()->SetRegisterSaveAreaSize(
1325         StandardFrameConstants::kFixedFrameSizeFromFp);
1326   } else if (stack_slots > 0) {
1327     __ StubPrologue();
1328     frame()->SetRegisterSaveAreaSize(
1329         StandardFrameConstants::kFixedFrameSizeFromFp);
1330   }
1331
1332   if (info()->is_osr()) {
1333     // TurboFan OSR-compiled functions cannot be entered directly.
1334     __ Abort(kShouldNotDirectlyEnterOsrFunction);
1335
1336     // Unoptimized code jumps directly to this entrypoint while the unoptimized
1337     // frame is still on the stack. Optimized code uses OSR values directly from
1338     // the unoptimized frame. Thus, all that needs to be done is to allocate the
1339     // remaining stack slots.
1340     if (FLAG_code_comments) __ RecordComment("-- OSR entrypoint --");
1341     osr_pc_offset_ = __ pc_offset();
1342     // TODO(titzer): cannot address target function == local #-1
1343     __ movq(rdi, Operand(rbp, JavaScriptFrameConstants::kFunctionOffset));
1344     DCHECK(stack_slots >= frame()->GetOsrStackSlotCount());
1345     stack_slots -= frame()->GetOsrStackSlotCount();
1346   }
1347
1348   if (stack_slots > 0) {
1349     __ subq(rsp, Immediate(stack_slots * kPointerSize));
1350   }
1351 }
1352
1353
1354 void CodeGenerator::AssembleReturn() {
1355   CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
1356   int stack_slots = frame()->GetSpillSlotCount();
1357   if (descriptor->kind() == CallDescriptor::kCallAddress) {
1358     if (frame()->GetRegisterSaveAreaSize() > 0) {
1359       // Remove this frame's spill slots first.
1360       if (stack_slots > 0) {
1361         __ addq(rsp, Immediate(stack_slots * kPointerSize));
1362       }
1363       const RegList saves = descriptor->CalleeSavedRegisters();
1364       // Restore registers.
1365       if (saves != 0) {
1366         for (int i = 0; i < Register::kNumRegisters; i++) {
1367           if (!((1 << i) & saves)) continue;
1368           __ popq(Register::from_code(i));
1369         }
1370       }
1371       __ popq(rbp);  // Pop caller's frame pointer.
1372       __ ret(0);
1373     } else {
1374       // No saved registers.
1375       __ movq(rsp, rbp);  // Move stack pointer back to frame pointer.
1376       __ popq(rbp);       // Pop caller's frame pointer.
1377       __ ret(0);
1378     }
1379   } else if (descriptor->IsJSFunctionCall() || stack_slots > 0) {
1380     __ movq(rsp, rbp);  // Move stack pointer back to frame pointer.
1381     __ popq(rbp);       // Pop caller's frame pointer.
1382     int pop_count = descriptor->IsJSFunctionCall()
1383                         ? static_cast<int>(descriptor->JSParameterCount())
1384                         : 0;
1385     __ ret(pop_count * kPointerSize);
1386   } else {
1387     __ ret(0);
1388   }
1389 }
1390
1391
1392 void CodeGenerator::AssembleMove(InstructionOperand* source,
1393                                  InstructionOperand* destination) {
1394   X64OperandConverter g(this, NULL);
1395   // Dispatch on the source and destination operand kinds.  Not all
1396   // combinations are possible.
1397   if (source->IsRegister()) {
1398     DCHECK(destination->IsRegister() || destination->IsStackSlot());
1399     Register src = g.ToRegister(source);
1400     if (destination->IsRegister()) {
1401       __ movq(g.ToRegister(destination), src);
1402     } else {
1403       __ movq(g.ToOperand(destination), src);
1404     }
1405   } else if (source->IsStackSlot()) {
1406     DCHECK(destination->IsRegister() || destination->IsStackSlot());
1407     Operand src = g.ToOperand(source);
1408     if (destination->IsRegister()) {
1409       Register dst = g.ToRegister(destination);
1410       __ movq(dst, src);
1411     } else {
1412       // Spill on demand to use a temporary register for memory-to-memory
1413       // moves.
1414       Register tmp = kScratchRegister;
1415       Operand dst = g.ToOperand(destination);
1416       __ movq(tmp, src);
1417       __ movq(dst, tmp);
1418     }
1419   } else if (source->IsConstant()) {
1420     ConstantOperand* constant_source = ConstantOperand::cast(source);
1421     Constant src = g.ToConstant(constant_source);
1422     if (destination->IsRegister() || destination->IsStackSlot()) {
1423       Register dst = destination->IsRegister() ? g.ToRegister(destination)
1424                                                : kScratchRegister;
1425       switch (src.type()) {
1426         case Constant::kInt32:
1427           // TODO(dcarney): don't need scratch in this case.
1428           __ Set(dst, src.ToInt32());
1429           break;
1430         case Constant::kInt64:
1431           __ Set(dst, src.ToInt64());
1432           break;
1433         case Constant::kFloat32:
1434           __ Move(dst,
1435                   isolate()->factory()->NewNumber(src.ToFloat32(), TENURED));
1436           break;
1437         case Constant::kFloat64:
1438           __ Move(dst,
1439                   isolate()->factory()->NewNumber(src.ToFloat64(), TENURED));
1440           break;
1441         case Constant::kExternalReference:
1442           __ Move(dst, src.ToExternalReference());
1443           break;
1444         case Constant::kHeapObject: {
1445           Handle<HeapObject> src_object = src.ToHeapObject();
1446           if (info()->IsOptimizing() &&
1447               src_object.is_identical_to(info()->context())) {
1448             // Loading the context from the frame is way cheaper than
1449             // materializing the actual context heap object address.
1450             __ movp(dst, Operand(rbp, StandardFrameConstants::kContextOffset));
1451           } else {
1452             __ Move(dst, src_object);
1453           }
1454           break;
1455         }
1456         case Constant::kRpoNumber:
1457           UNREACHABLE();  // TODO(dcarney): load of labels on x64.
1458           break;
1459       }
1460       if (destination->IsStackSlot()) {
1461         __ movq(g.ToOperand(destination), kScratchRegister);
1462       }
1463     } else if (src.type() == Constant::kFloat32) {
1464       // TODO(turbofan): Can we do better here?
1465       uint32_t src_const = bit_cast<uint32_t>(src.ToFloat32());
1466       if (destination->IsDoubleRegister()) {
1467         __ Move(g.ToDoubleRegister(destination), src_const);
1468       } else {
1469         DCHECK(destination->IsDoubleStackSlot());
1470         Operand dst = g.ToOperand(destination);
1471         __ movl(dst, Immediate(src_const));
1472       }
1473     } else {
1474       DCHECK_EQ(Constant::kFloat64, src.type());
1475       uint64_t src_const = bit_cast<uint64_t>(src.ToFloat64());
1476       if (destination->IsDoubleRegister()) {
1477         __ Move(g.ToDoubleRegister(destination), src_const);
1478       } else {
1479         DCHECK(destination->IsDoubleStackSlot());
1480         __ movq(kScratchRegister, src_const);
1481         __ movq(g.ToOperand(destination), kScratchRegister);
1482       }
1483     }
1484   } else if (source->IsDoubleRegister()) {
1485     XMMRegister src = g.ToDoubleRegister(source);
1486     if (destination->IsDoubleRegister()) {
1487       XMMRegister dst = g.ToDoubleRegister(destination);
1488       __ movaps(dst, src);
1489     } else {
1490       DCHECK(destination->IsDoubleStackSlot());
1491       Operand dst = g.ToOperand(destination);
1492       __ movsd(dst, src);
1493     }
1494   } else if (source->IsDoubleStackSlot()) {
1495     DCHECK(destination->IsDoubleRegister() || destination->IsDoubleStackSlot());
1496     Operand src = g.ToOperand(source);
1497     if (destination->IsDoubleRegister()) {
1498       XMMRegister dst = g.ToDoubleRegister(destination);
1499       __ movsd(dst, src);
1500     } else {
1501       // We rely on having xmm0 available as a fixed scratch register.
1502       Operand dst = g.ToOperand(destination);
1503       __ movsd(xmm0, src);
1504       __ movsd(dst, xmm0);
1505     }
1506   } else {
1507     UNREACHABLE();
1508   }
1509 }
1510
1511
1512 void CodeGenerator::AssembleSwap(InstructionOperand* source,
1513                                  InstructionOperand* destination) {
1514   X64OperandConverter g(this, NULL);
1515   // Dispatch on the source and destination operand kinds.  Not all
1516   // combinations are possible.
1517   if (source->IsRegister() && destination->IsRegister()) {
1518     // Register-register.
1519     __ xchgq(g.ToRegister(source), g.ToRegister(destination));
1520   } else if (source->IsRegister() && destination->IsStackSlot()) {
1521     Register src = g.ToRegister(source);
1522     Operand dst = g.ToOperand(destination);
1523     __ xchgq(src, dst);
1524   } else if ((source->IsStackSlot() && destination->IsStackSlot()) ||
1525              (source->IsDoubleStackSlot() &&
1526               destination->IsDoubleStackSlot())) {
1527     // Memory-memory.
1528     Register tmp = kScratchRegister;
1529     Operand src = g.ToOperand(source);
1530     Operand dst = g.ToOperand(destination);
1531     __ movq(tmp, dst);
1532     __ xchgq(tmp, src);
1533     __ movq(dst, tmp);
1534   } else if (source->IsDoubleRegister() && destination->IsDoubleRegister()) {
1535     // XMM register-register swap. We rely on having xmm0
1536     // available as a fixed scratch register.
1537     XMMRegister src = g.ToDoubleRegister(source);
1538     XMMRegister dst = g.ToDoubleRegister(destination);
1539     __ movaps(xmm0, src);
1540     __ movaps(src, dst);
1541     __ movaps(dst, xmm0);
1542   } else if (source->IsDoubleRegister() && destination->IsDoubleStackSlot()) {
1543     // XMM register-memory swap.  We rely on having xmm0
1544     // available as a fixed scratch register.
1545     XMMRegister src = g.ToDoubleRegister(source);
1546     Operand dst = g.ToOperand(destination);
1547     __ movsd(xmm0, src);
1548     __ movsd(src, dst);
1549     __ movsd(dst, xmm0);
1550   } else {
1551     // No other combinations are possible.
1552     UNREACHABLE();
1553   }
1554 }
1555
1556
1557 void CodeGenerator::AssembleJumpTable(Label** targets, size_t target_count) {
1558   for (size_t index = 0; index < target_count; ++index) {
1559     __ dq(targets[index]);
1560   }
1561 }
1562
1563
1564 void CodeGenerator::AddNopForSmiCodeInlining() { __ nop(); }
1565
1566
1567 void CodeGenerator::EnsureSpaceForLazyDeopt() {
1568   int space_needed = Deoptimizer::patch_size();
1569   if (!info()->IsStub()) {
1570     // Ensure that we have enough space after the previous lazy-bailout
1571     // instruction for patching the code here.
1572     int current_pc = masm()->pc_offset();
1573     if (current_pc < last_lazy_deopt_pc_ + space_needed) {
1574       int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc;
1575       __ Nop(padding_size);
1576     }
1577   }
1578   MarkLazyDeoptSite();
1579 }
1580
1581 #undef __
1582
1583 }  // namespace internal
1584 }  // namespace compiler
1585 }  // namespace v8