src/compiler/x64/code-generator-x64.cc

   1 // Copyright 2013 the V8 project authors. All rights reserved.
   2 // Use of this source code is governed by a BSD-style license that can be
   3 // found in the LICENSE file.
   4
   5 #include "src/compiler/code-generator.h"
   6
   7 #include "src/compiler/code-generator-impl.h"
   8 #include "src/compiler/gap-resolver.h"
   9 #include "src/compiler/node-matchers.h"
  10 #include "src/scopes.h"
  11 #include "src/x64/assembler-x64.h"
  12 #include "src/x64/macro-assembler-x64.h"
  13
  14 namespace v8 {
  15 namespace internal {
  16 namespace compiler {
  17
  18 #define __ masm()->
  19
  20
  21 #define kScratchDoubleReg xmm0
  22
  23
  24 // Adds X64 specific methods for decoding operands.
  25 class X64OperandConverter : public InstructionOperandConverter {
  26  public:
  27   X64OperandConverter(CodeGenerator* gen, Instruction* instr)
  28       : InstructionOperandConverter(gen, instr) {}
  29
  30   Immediate InputImmediate(size_t index) {
  31     return ToImmediate(instr_->InputAt(index));
  32   }
  33
  34   Operand InputOperand(size_t index, int extra = 0) {
  35     return ToOperand(instr_->InputAt(index), extra);
  36   }
  37
  38   Operand OutputOperand() { return ToOperand(instr_->Output()); }
  39
  40   Immediate ToImmediate(InstructionOperand* operand) {
  41     return Immediate(ToConstant(operand).ToInt32());
  42   }
  43
  44   Operand ToOperand(InstructionOperand* op, int extra = 0) {
  45     DCHECK(op->IsStackSlot() || op->IsDoubleStackSlot());
  46     // The linkage computes where all spill slots are located.
  47     FrameOffset offset = linkage()->GetFrameOffset(op->index(), frame(), extra);
  48     return Operand(offset.from_stack_pointer() ? rsp : rbp, offset.offset());
  49   }
  50
  51   static size_t NextOffset(size_t* offset) {
  52     size_t i = *offset;
  53     (*offset)++;
  54     return i;
  55   }
  56
  57   static ScaleFactor ScaleFor(AddressingMode one, AddressingMode mode) {
  58     STATIC_ASSERT(0 == static_cast<int>(times_1));
  59     STATIC_ASSERT(1 == static_cast<int>(times_2));
  60     STATIC_ASSERT(2 == static_cast<int>(times_4));
  61     STATIC_ASSERT(3 == static_cast<int>(times_8));
  62     int scale = static_cast<int>(mode - one);
  63     DCHECK(scale >= 0 && scale < 4);
  64     return static_cast<ScaleFactor>(scale);
  65   }
  66
  67   Operand MemoryOperand(size_t* offset) {
  68     AddressingMode mode = AddressingModeField::decode(instr_->opcode());
  69     switch (mode) {
  70       case kMode_MR: {
  71         Register base = InputRegister(NextOffset(offset));
  72         int32_t disp = 0;
  73         return Operand(base, disp);
  74       }
  75       case kMode_MRI: {
  76         Register base = InputRegister(NextOffset(offset));
  77         int32_t disp = InputInt32(NextOffset(offset));
  78         return Operand(base, disp);
  79       }
  80       case kMode_MR1:
  81       case kMode_MR2:
  82       case kMode_MR4:
  83       case kMode_MR8: {
  84         Register base = InputRegister(NextOffset(offset));
  85         Register index = InputRegister(NextOffset(offset));
  86         ScaleFactor scale = ScaleFor(kMode_MR1, mode);
  87         int32_t disp = 0;
  88         return Operand(base, index, scale, disp);
  89       }
  90       case kMode_MR1I:
  91       case kMode_MR2I:
  92       case kMode_MR4I:
  93       case kMode_MR8I: {
  94         Register base = InputRegister(NextOffset(offset));
  95         Register index = InputRegister(NextOffset(offset));
  96         ScaleFactor scale = ScaleFor(kMode_MR1I, mode);
  97         int32_t disp = InputInt32(NextOffset(offset));
  98         return Operand(base, index, scale, disp);
  99       }
 100       case kMode_M1: {
 101         Register base = InputRegister(NextOffset(offset));
 102         int32_t disp = 0;
 103         return Operand(base, disp);
 104       }
 105       case kMode_M2:
 106         UNREACHABLE();  // Should use kModeMR with more compact encoding instead
 107         return Operand(no_reg, 0);
 108       case kMode_M4:
 109       case kMode_M8: {
 110         Register index = InputRegister(NextOffset(offset));
 111         ScaleFactor scale = ScaleFor(kMode_M1, mode);
 112         int32_t disp = 0;
 113         return Operand(index, scale, disp);
 114       }
 115       case kMode_M1I:
 116       case kMode_M2I:
 117       case kMode_M4I:
 118       case kMode_M8I: {
 119         Register index = InputRegister(NextOffset(offset));
 120         ScaleFactor scale = ScaleFor(kMode_M1I, mode);
 121         int32_t disp = InputInt32(NextOffset(offset));
 122         return Operand(index, scale, disp);
 123       }
 124       case kMode_None:
 125         UNREACHABLE();
 126         return Operand(no_reg, 0);
 127     }
 128     UNREACHABLE();
 129     return Operand(no_reg, 0);
 130   }
 131
 132   Operand MemoryOperand(size_t first_input = 0) {
 133     return MemoryOperand(&first_input);
 134   }
 135 };
 136
 137
 138 namespace {
 139
 140 bool HasImmediateInput(Instruction* instr, size_t index) {
 141   return instr->InputAt(index)->IsImmediate();
 142 }
 143
 144
 145 class OutOfLineLoadZero FINAL : public OutOfLineCode {
 146  public:
 147   OutOfLineLoadZero(CodeGenerator* gen, Register result)
 148       : OutOfLineCode(gen), result_(result) {}
 149
 150   void Generate() FINAL { __ xorl(result_, result_); }
 151
 152  private:
 153   Register const result_;
 154 };
 155
 156
 157 class OutOfLineLoadNaN FINAL : public OutOfLineCode {
 158  public:
 159   OutOfLineLoadNaN(CodeGenerator* gen, XMMRegister result)
 160       : OutOfLineCode(gen), result_(result) {}
 161
 162   void Generate() FINAL { __ pcmpeqd(result_, result_); }
 163
 164  private:
 165   XMMRegister const result_;
 166 };
 167
 168
 169 class OutOfLineTruncateDoubleToI FINAL : public OutOfLineCode {
 170  public:
 171   OutOfLineTruncateDoubleToI(CodeGenerator* gen, Register result,
 172                              XMMRegister input)
 173       : OutOfLineCode(gen), result_(result), input_(input) {}
 174
 175   void Generate() FINAL {
 176     __ subp(rsp, Immediate(kDoubleSize));
 177     __ movsd(MemOperand(rsp, 0), input_);
 178     __ SlowTruncateToI(result_, rsp, 0);
 179     __ addp(rsp, Immediate(kDoubleSize));
 180   }
 181
 182  private:
 183   Register const result_;
 184   XMMRegister const input_;
 185 };
 186
 187 }  // namespace
 188
 189
 190 #define ASSEMBLE_UNOP(asm_instr)         \
 191   do {                                   \
 192     if (instr->Output()->IsRegister()) { \
 193       __ asm_instr(i.OutputRegister());  \
 194     } else {                             \
 195       __ asm_instr(i.OutputOperand());   \
 196     }                                    \
 197   } while (0)
 198
 199
 200 #define ASSEMBLE_BINOP(asm_instr)                              \
 201   do {                                                         \
 202     if (HasImmediateInput(instr, 1)) {                         \
 203       if (instr->InputAt(0)->IsRegister()) {                   \
 204         __ asm_instr(i.InputRegister(0), i.InputImmediate(1)); \
 205       } else {                                                 \
 206         __ asm_instr(i.InputOperand(0), i.InputImmediate(1));  \
 207       }                                                        \
 208     } else {                                                   \
 209       if (instr->InputAt(1)->IsRegister()) {                   \
 210         __ asm_instr(i.InputRegister(0), i.InputRegister(1));  \
 211       } else {                                                 \
 212         __ asm_instr(i.InputRegister(0), i.InputOperand(1));   \
 213       }                                                        \
 214     }                                                          \
 215   } while (0)
 216
 217
 218 #define ASSEMBLE_MULT(asm_instr)                              \
 219   do {                                                        \
 220     if (HasImmediateInput(instr, 1)) {                        \
 221       if (instr->InputAt(0)->IsRegister()) {                  \
 222         __ asm_instr(i.OutputRegister(), i.InputRegister(0),  \
 223                      i.InputImmediate(1));                    \
 224       } else {                                                \
 225         __ asm_instr(i.OutputRegister(), i.InputOperand(0),   \
 226                      i.InputImmediate(1));                    \
 227       }                                                       \
 228     } else {                                                  \
 229       if (instr->InputAt(1)->IsRegister()) {                  \
 230         __ asm_instr(i.OutputRegister(), i.InputRegister(1)); \
 231       } else {                                                \
 232         __ asm_instr(i.OutputRegister(), i.InputOperand(1));  \
 233       }                                                       \
 234     }                                                         \
 235   } while (0)
 236
 237
 238 #define ASSEMBLE_SHIFT(asm_instr, width)                                   \
 239   do {                                                                     \
 240     if (HasImmediateInput(instr, 1)) {                                     \
 241       if (instr->Output()->IsRegister()) {                                 \
 242         __ asm_instr(i.OutputRegister(), Immediate(i.InputInt##width(1))); \
 243       } else {                                                             \
 244         __ asm_instr(i.OutputOperand(), Immediate(i.InputInt##width(1)));  \
 245       }                                                                    \
 246     } else {                                                               \
 247       if (instr->Output()->IsRegister()) {                                 \
 248         __ asm_instr##_cl(i.OutputRegister());                             \
 249       } else {                                                             \
 250         __ asm_instr##_cl(i.OutputOperand());                              \
 251       }                                                                    \
 252     }                                                                      \
 253   } while (0)
 254
 255
 256 #define ASSEMBLE_MOVX(asm_instr)                            \
 257   do {                                                      \
 258     if (instr->addressing_mode() != kMode_None) {           \
 259       __ asm_instr(i.OutputRegister(), i.MemoryOperand());  \
 260     } else if (instr->InputAt(0)->IsRegister()) {           \
 261       __ asm_instr(i.OutputRegister(), i.InputRegister(0)); \
 262     } else {                                                \
 263       __ asm_instr(i.OutputRegister(), i.InputOperand(0));  \
 264     }                                                       \
 265   } while (0)
 266
 267
 268 #define ASSEMBLE_DOUBLE_BINOP(asm_instr)                                \
 269   do {                                                                  \
 270     if (instr->InputAt(1)->IsDoubleRegister()) {                        \
 271       __ asm_instr(i.InputDoubleRegister(0), i.InputDoubleRegister(1)); \
 272     } else {                                                            \
 273       __ asm_instr(i.InputDoubleRegister(0), i.InputOperand(1));        \
 274     }                                                                   \
 275   } while (0)
 276
 277
 278 #define ASSEMBLE_AVX_DOUBLE_BINOP(asm_instr)                           \
 279   do {                                                                 \
 280     CpuFeatureScope avx_scope(masm(), AVX);                            \
 281     if (instr->InputAt(1)->IsDoubleRegister()) {                       \
 282       __ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0), \
 283                    i.InputDoubleRegister(1));                          \
 284     } else {                                                           \
 285       __ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0), \
 286                    i.InputOperand(1));                                 \
 287     }                                                                  \
 288   } while (0)
 289
 290
 291 #define ASSEMBLE_CHECKED_LOAD_FLOAT(asm_instr)                               \
 292   do {                                                                       \
 293     auto result = i.OutputDoubleRegister();                                  \
 294     auto buffer = i.InputRegister(0);                                        \
 295     auto index1 = i.InputRegister(1);                                        \
 296     auto index2 = i.InputInt32(2);                                           \
 297     OutOfLineCode* ool;                                                      \
 298     if (instr->InputAt(3)->IsRegister()) {                                   \
 299       auto length = i.InputRegister(3);                                      \
 300       DCHECK_EQ(0, index2);                                                  \
 301       __ cmpl(index1, length);                                               \
 302       ool = new (zone()) OutOfLineLoadNaN(this, result);                     \
 303     } else {                                                                 \
 304       auto length = i.InputInt32(3);                                         \
 305       DCHECK_LE(index2, length);                                             \
 306       __ cmpq(index1, Immediate(length - index2));                           \
 307       class OutOfLineLoadFloat FINAL : public OutOfLineCode {                \
 308        public:                                                               \
 309         OutOfLineLoadFloat(CodeGenerator* gen, XMMRegister result,           \
 310                            Register buffer, Register index1, int32_t index2, \
 311                            int32_t length)                                   \
 312             : OutOfLineCode(gen),                                            \
 313               result_(result),                                               \
 314               buffer_(buffer),                                               \
 315               index1_(index1),                                               \
 316               index2_(index2),                                               \
 317               length_(length) {}                                             \
 318                                                                              \
 319         void Generate() FINAL {                                              \
 320           __ leal(kScratchRegister, Operand(index1_, index2_));              \
 321           __ pcmpeqd(result_, result_);                                      \
 322           __ cmpl(kScratchRegister, Immediate(length_));                     \
 323           __ j(above_equal, exit());                                         \
 324           __ asm_instr(result_,                                              \
 325                        Operand(buffer_, kScratchRegister, times_1, 0));      \
 326         }                                                                    \
 327                                                                              \
 328        private:                                                              \
 329         XMMRegister const result_;                                           \
 330         Register const buffer_;                                              \
 331         Register const index1_;                                              \
 332         int32_t const index2_;                                               \
 333         int32_t const length_;                                               \
 334       };                                                                     \
 335       ool = new (zone())                                                     \
 336           OutOfLineLoadFloat(this, result, buffer, index1, index2, length);  \
 337     }                                                                        \
 338     __ j(above_equal, ool->entry());                                         \
 339     __ asm_instr(result, Operand(buffer, index1, times_1, index2));          \
 340     __ bind(ool->exit());                                                    \
 341   } while (false)
 342
 343
 344 #define ASSEMBLE_CHECKED_LOAD_INTEGER(asm_instr)                               \
 345   do {                                                                         \
 346     auto result = i.OutputRegister();                                          \
 347     auto buffer = i.InputRegister(0);                                          \
 348     auto index1 = i.InputRegister(1);                                          \
 349     auto index2 = i.InputInt32(2);                                             \
 350     OutOfLineCode* ool;                                                        \
 351     if (instr->InputAt(3)->IsRegister()) {                                     \
 352       auto length = i.InputRegister(3);                                        \
 353       DCHECK_EQ(0, index2);                                                    \
 354       __ cmpl(index1, length);                                                 \
 355       ool = new (zone()) OutOfLineLoadZero(this, result);                      \
 356     } else {                                                                   \
 357       auto length = i.InputInt32(3);                                           \
 358       DCHECK_LE(index2, length);                                               \
 359       __ cmpq(index1, Immediate(length - index2));                             \
 360       class OutOfLineLoadInteger FINAL : public OutOfLineCode {                \
 361        public:                                                                 \
 362         OutOfLineLoadInteger(CodeGenerator* gen, Register result,              \
 363                              Register buffer, Register index1, int32_t index2, \
 364                              int32_t length)                                   \
 365             : OutOfLineCode(gen),                                              \
 366               result_(result),                                                 \
 367               buffer_(buffer),                                                 \
 368               index1_(index1),                                                 \
 369               index2_(index2),                                                 \
 370               length_(length) {}                                               \
 371                                                                                \
 372         void Generate() FINAL {                                                \
 373           Label oob;                                                           \
 374           __ leal(kScratchRegister, Operand(index1_, index2_));                \
 375           __ cmpl(kScratchRegister, Immediate(length_));                       \
 376           __ j(above_equal, &oob, Label::kNear);                               \
 377           __ asm_instr(result_,                                                \
 378                        Operand(buffer_, kScratchRegister, times_1, 0));        \
 379           __ jmp(exit());                                                      \
 380           __ bind(&oob);                                                       \
 381           __ xorl(result_, result_);                                           \
 382         }                                                                      \
 383                                                                                \
 384        private:                                                                \
 385         Register const result_;                                                \
 386         Register const buffer_;                                                \
 387         Register const index1_;                                                \
 388         int32_t const index2_;                                                 \
 389         int32_t const length_;                                                 \
 390       };                                                                       \
 391       ool = new (zone())                                                       \
 392           OutOfLineLoadInteger(this, result, buffer, index1, index2, length);  \
 393     }                                                                          \
 394     __ j(above_equal, ool->entry());                                           \
 395     __ asm_instr(result, Operand(buffer, index1, times_1, index2));            \
 396     __ bind(ool->exit());                                                      \
 397   } while (false)
 398
 399
 400 #define ASSEMBLE_CHECKED_STORE_FLOAT(asm_instr)                              \
 401   do {                                                                       \
 402     auto buffer = i.InputRegister(0);                                        \
 403     auto index1 = i.InputRegister(1);                                        \
 404     auto index2 = i.InputInt32(2);                                           \
 405     auto value = i.InputDoubleRegister(4);                                   \
 406     if (instr->InputAt(3)->IsRegister()) {                                   \
 407       auto length = i.InputRegister(3);                                      \
 408       DCHECK_EQ(0, index2);                                                  \
 409       Label done;                                                            \
 410       __ cmpl(index1, length);                                               \
 411       __ j(above_equal, &done, Label::kNear);                                \
 412       __ asm_instr(Operand(buffer, index1, times_1, index2), value);         \
 413       __ bind(&done);                                                        \
 414     } else {                                                                 \
 415       auto length = i.InputInt32(3);                                         \
 416       DCHECK_LE(index2, length);                                             \
 417       __ cmpq(index1, Immediate(length - index2));                           \
 418       class OutOfLineStoreFloat FINAL : public OutOfLineCode {               \
 419        public:                                                               \
 420         OutOfLineStoreFloat(CodeGenerator* gen, Register buffer,             \
 421                             Register index1, int32_t index2, int32_t length, \
 422                             XMMRegister value)                               \
 423             : OutOfLineCode(gen),                                            \
 424               buffer_(buffer),                                               \
 425               index1_(index1),                                               \
 426               index2_(index2),                                               \
 427               length_(length),                                               \
 428               value_(value) {}                                               \
 429                                                                              \
 430         void Generate() FINAL {                                              \
 431           __ leal(kScratchRegister, Operand(index1_, index2_));              \
 432           __ cmpl(kScratchRegister, Immediate(length_));                     \
 433           __ j(above_equal, exit());                                         \
 434           __ asm_instr(Operand(buffer_, kScratchRegister, times_1, 0),       \
 435                        value_);                                              \
 436         }                                                                    \
 437                                                                              \
 438        private:                                                              \
 439         Register const buffer_;                                              \
 440         Register const index1_;                                              \
 441         int32_t const index2_;                                               \
 442         int32_t const length_;                                               \
 443         XMMRegister const value_;                                            \
 444       };                                                                     \
 445       auto ool = new (zone())                                                \
 446           OutOfLineStoreFloat(this, buffer, index1, index2, length, value);  \
 447       __ j(above_equal, ool->entry());                                       \
 448       __ asm_instr(Operand(buffer, index1, times_1, index2), value);         \
 449       __ bind(ool->exit());                                                  \
 450     }                                                                        \
 451   } while (false)
 452
 453
 454 #define ASSEMBLE_CHECKED_STORE_INTEGER_IMPL(asm_instr, Value)                  \
 455   do {                                                                         \
 456     auto buffer = i.InputRegister(0);                                          \
 457     auto index1 = i.InputRegister(1);                                          \
 458     auto index2 = i.InputInt32(2);                                             \
 459     if (instr->InputAt(3)->IsRegister()) {                                     \
 460       auto length = i.InputRegister(3);                                        \
 461       DCHECK_EQ(0, index2);                                                    \
 462       Label done;                                                              \
 463       __ cmpl(index1, length);                                                 \
 464       __ j(above_equal, &done, Label::kNear);                                  \
 465       __ asm_instr(Operand(buffer, index1, times_1, index2), value);           \
 466       __ bind(&done);                                                          \
 467     } else {                                                                   \
 468       auto length = i.InputInt32(3);                                           \
 469       DCHECK_LE(index2, length);                                               \
 470       __ cmpq(index1, Immediate(length - index2));                             \
 471       class OutOfLineStoreInteger FINAL : public OutOfLineCode {               \
 472        public:                                                                 \
 473         OutOfLineStoreInteger(CodeGenerator* gen, Register buffer,             \
 474                               Register index1, int32_t index2, int32_t length, \
 475                               Value value)                                     \
 476             : OutOfLineCode(gen),                                              \
 477               buffer_(buffer),                                                 \
 478               index1_(index1),                                                 \
 479               index2_(index2),                                                 \
 480               length_(length),                                                 \
 481               value_(value) {}                                                 \
 482                                                                                \
 483         void Generate() FINAL {                                                \
 484           __ leal(kScratchRegister, Operand(index1_, index2_));                \
 485           __ cmpl(kScratchRegister, Immediate(length_));                       \
 486           __ j(above_equal, exit());                                           \
 487           __ asm_instr(Operand(buffer_, kScratchRegister, times_1, 0),         \
 488                        value_);                                                \
 489         }                                                                      \
 490                                                                                \
 491        private:                                                                \
 492         Register const buffer_;                                                \
 493         Register const index1_;                                                \
 494         int32_t const index2_;                                                 \
 495         int32_t const length_;                                                 \
 496         Value const value_;                                                    \
 497       };                                                                       \
 498       auto ool = new (zone())                                                  \
 499           OutOfLineStoreInteger(this, buffer, index1, index2, length, value);  \
 500       __ j(above_equal, ool->entry());                                         \
 501       __ asm_instr(Operand(buffer, index1, times_1, index2), value);           \
 502       __ bind(ool->exit());                                                    \
 503     }                                                                          \
 504   } while (false)
 505
 506
 507 #define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr)                \
 508   do {                                                           \
 509     if (instr->InputAt(4)->IsRegister()) {                       \
 510       Register value = i.InputRegister(4);                       \
 511       ASSEMBLE_CHECKED_STORE_INTEGER_IMPL(asm_instr, Register);  \
 512     } else {                                                     \
 513       Immediate value = i.InputImmediate(4);                     \
 514       ASSEMBLE_CHECKED_STORE_INTEGER_IMPL(asm_instr, Immediate); \
 515     }                                                            \
 516   } while (false)
 517
 518
 519 // Assembles an instruction after register allocation, producing machine code.
 520 void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
 521   X64OperandConverter i(this, instr);
 522
 523   switch (ArchOpcodeField::decode(instr->opcode())) {
 524     case kArchCallCodeObject: {
 525       EnsureSpaceForLazyDeopt();
 526       if (HasImmediateInput(instr, 0)) {
 527         Handle<Code> code = Handle<Code>::cast(i.InputHeapObject(0));
 528         __ Call(code, RelocInfo::CODE_TARGET);
 529       } else {
 530         Register reg = i.InputRegister(0);
 531         int entry = Code::kHeaderSize - kHeapObjectTag;
 532         __ Call(Operand(reg, entry));
 533       }
 534       RecordCallPosition(instr);
 535       break;
 536     }
 537     case kArchCallJSFunction: {
 538       EnsureSpaceForLazyDeopt();
 539       Register func = i.InputRegister(0);
 540       if (FLAG_debug_code) {
 541         // Check the function's context matches the context argument.
 542         __ cmpp(rsi, FieldOperand(func, JSFunction::kContextOffset));
 543         __ Assert(equal, kWrongFunctionContext);
 544       }
 545       __ Call(FieldOperand(func, JSFunction::kCodeEntryOffset));
 546       RecordCallPosition(instr);
 547       break;
 548     }
 549     case kArchJmp:
 550       AssembleArchJump(i.InputRpo(0));
 551       break;
 552     case kArchLookupSwitch:
 553       AssembleArchLookupSwitch(instr);
 554       break;
 555     case kArchTableSwitch:
 556       AssembleArchTableSwitch(instr);
 557       break;
 558     case kArchNop:
 559       // don't emit code for nops.
 560       break;
 561     case kArchDeoptimize: {
 562       int deopt_state_id =
 563           BuildTranslation(instr, -1, 0, OutputFrameStateCombine::Ignore());
 564       AssembleDeoptimizerCall(deopt_state_id, Deoptimizer::EAGER);
 565       break;
 566     }
 567     case kArchRet:
 568       AssembleReturn();
 569       break;
 570     case kArchStackPointer:
 571       __ movq(i.OutputRegister(), rsp);
 572       break;
 573     case kArchTruncateDoubleToI: {
 574       auto result = i.OutputRegister();
 575       auto input = i.InputDoubleRegister(0);
 576       auto ool = new (zone()) OutOfLineTruncateDoubleToI(this, result, input);
 577       __ cvttsd2siq(result, input);
 578       __ cmpq(result, Immediate(1));
 579       __ j(overflow, ool->entry());
 580       __ bind(ool->exit());
 581       break;
 582     }
 583     case kX64Add32:
 584       ASSEMBLE_BINOP(addl);
 585       break;
 586     case kX64Add:
 587       ASSEMBLE_BINOP(addq);
 588       break;
 589     case kX64Sub32:
 590       ASSEMBLE_BINOP(subl);
 591       break;
 592     case kX64Sub:
 593       ASSEMBLE_BINOP(subq);
 594       break;
 595     case kX64And32:
 596       ASSEMBLE_BINOP(andl);
 597       break;
 598     case kX64And:
 599       ASSEMBLE_BINOP(andq);
 600       break;
 601     case kX64Cmp32:
 602       ASSEMBLE_BINOP(cmpl);
 603       break;
 604     case kX64Cmp:
 605       ASSEMBLE_BINOP(cmpq);
 606       break;
 607     case kX64Test32:
 608       ASSEMBLE_BINOP(testl);
 609       break;
 610     case kX64Test:
 611       ASSEMBLE_BINOP(testq);
 612       break;
 613     case kX64Imul32:
 614       ASSEMBLE_MULT(imull);
 615       break;
 616     case kX64Imul:
 617       ASSEMBLE_MULT(imulq);
 618       break;
 619     case kX64ImulHigh32:
 620       if (instr->InputAt(1)->IsRegister()) {
 621         __ imull(i.InputRegister(1));
 622       } else {
 623         __ imull(i.InputOperand(1));
 624       }
 625       break;
 626     case kX64UmulHigh32:
 627       if (instr->InputAt(1)->IsRegister()) {
 628         __ mull(i.InputRegister(1));
 629       } else {
 630         __ mull(i.InputOperand(1));
 631       }
 632       break;
 633     case kX64Idiv32:
 634       __ cdq();
 635       __ idivl(i.InputRegister(1));
 636       break;
 637     case kX64Idiv:
 638       __ cqo();
 639       __ idivq(i.InputRegister(1));
 640       break;
 641     case kX64Udiv32:
 642       __ xorl(rdx, rdx);
 643       __ divl(i.InputRegister(1));
 644       break;
 645     case kX64Udiv:
 646       __ xorq(rdx, rdx);
 647       __ divq(i.InputRegister(1));
 648       break;
 649     case kX64Not:
 650       ASSEMBLE_UNOP(notq);
 651       break;
 652     case kX64Not32:
 653       ASSEMBLE_UNOP(notl);
 654       break;
 655     case kX64Neg:
 656       ASSEMBLE_UNOP(negq);
 657       break;
 658     case kX64Neg32:
 659       ASSEMBLE_UNOP(negl);
 660       break;
 661     case kX64Or32:
 662       ASSEMBLE_BINOP(orl);
 663       break;
 664     case kX64Or:
 665       ASSEMBLE_BINOP(orq);
 666       break;
 667     case kX64Xor32:
 668       ASSEMBLE_BINOP(xorl);
 669       break;
 670     case kX64Xor:
 671       ASSEMBLE_BINOP(xorq);
 672       break;
 673     case kX64Shl32:
 674       ASSEMBLE_SHIFT(shll, 5);
 675       break;
 676     case kX64Shl:
 677       ASSEMBLE_SHIFT(shlq, 6);
 678       break;
 679     case kX64Shr32:
 680       ASSEMBLE_SHIFT(shrl, 5);
 681       break;
 682     case kX64Shr:
 683       ASSEMBLE_SHIFT(shrq, 6);
 684       break;
 685     case kX64Sar32:
 686       ASSEMBLE_SHIFT(sarl, 5);
 687       break;
 688     case kX64Sar:
 689       ASSEMBLE_SHIFT(sarq, 6);
 690       break;
 691     case kX64Ror32:
 692       ASSEMBLE_SHIFT(rorl, 5);
 693       break;
 694     case kX64Ror:
 695       ASSEMBLE_SHIFT(rorq, 6);
 696       break;
 697     case kSSEFloat64Cmp:
 698       ASSEMBLE_DOUBLE_BINOP(ucomisd);
 699       break;
 700     case kSSEFloat64Add:
 701       ASSEMBLE_DOUBLE_BINOP(addsd);
 702       break;
 703     case kSSEFloat64Sub:
 704       ASSEMBLE_DOUBLE_BINOP(subsd);
 705       break;
 706     case kSSEFloat64Mul:
 707       ASSEMBLE_DOUBLE_BINOP(mulsd);
 708       break;
 709     case kSSEFloat64Div:
 710       ASSEMBLE_DOUBLE_BINOP(divsd);
 711       break;
 712     case kSSEFloat64Mod: {
 713       __ subq(rsp, Immediate(kDoubleSize));
 714       // Move values to st(0) and st(1).
 715       __ movsd(Operand(rsp, 0), i.InputDoubleRegister(1));
 716       __ fld_d(Operand(rsp, 0));
 717       __ movsd(Operand(rsp, 0), i.InputDoubleRegister(0));
 718       __ fld_d(Operand(rsp, 0));
 719       // Loop while fprem isn't done.
 720       Label mod_loop;
 721       __ bind(&mod_loop);
 722       // This instructions traps on all kinds inputs, but we are assuming the
 723       // floating point control word is set to ignore them all.
 724       __ fprem();
 725       // The following 2 instruction implicitly use rax.
 726       __ fnstsw_ax();
 727       if (CpuFeatures::IsSupported(SAHF)) {
 728         CpuFeatureScope sahf_scope(masm(), SAHF);
 729         __ sahf();
 730       } else {
 731         __ shrl(rax, Immediate(8));
 732         __ andl(rax, Immediate(0xFF));
 733         __ pushq(rax);
 734         __ popfq();
 735       }
 736       __ j(parity_even, &mod_loop);
 737       // Move output to stack and clean up.
 738       __ fstp(1);
 739       __ fstp_d(Operand(rsp, 0));
 740       __ movsd(i.OutputDoubleRegister(), Operand(rsp, 0));
 741       __ addq(rsp, Immediate(kDoubleSize));
 742       break;
 743     }
 744     case kSSEFloat64Max:
 745       ASSEMBLE_DOUBLE_BINOP(maxsd);
 746       break;
 747     case kSSEFloat64Min:
 748       ASSEMBLE_DOUBLE_BINOP(minsd);
 749       break;
 750     case kSSEFloat64Sqrt:
 751       if (instr->InputAt(0)->IsDoubleRegister()) {
 752         __ sqrtsd(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
 753       } else {
 754         __ sqrtsd(i.OutputDoubleRegister(), i.InputOperand(0));
 755       }
 756       break;
 757     case kSSEFloat64Round: {
 758       CpuFeatureScope sse_scope(masm(), SSE4_1);
 759       RoundingMode const mode =
 760           static_cast<RoundingMode>(MiscField::decode(instr->opcode()));
 761       __ roundsd(i.OutputDoubleRegister(), i.InputDoubleRegister(0), mode);
 762       break;
 763     }
 764     case kSSECvtss2sd:
 765       if (instr->InputAt(0)->IsDoubleRegister()) {
 766         __ cvtss2sd(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
 767       } else {
 768         __ cvtss2sd(i.OutputDoubleRegister(), i.InputOperand(0));
 769       }
 770       break;
 771     case kSSECvtsd2ss:
 772       if (instr->InputAt(0)->IsDoubleRegister()) {
 773         __ cvtsd2ss(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
 774       } else {
 775         __ cvtsd2ss(i.OutputDoubleRegister(), i.InputOperand(0));
 776       }
 777       break;
 778     case kSSEFloat64ToInt32:
 779       if (instr->InputAt(0)->IsDoubleRegister()) {
 780         __ cvttsd2si(i.OutputRegister(), i.InputDoubleRegister(0));
 781       } else {
 782         __ cvttsd2si(i.OutputRegister(), i.InputOperand(0));
 783       }
 784       break;
 785     case kSSEFloat64ToUint32: {
 786       if (instr->InputAt(0)->IsDoubleRegister()) {
 787         __ cvttsd2siq(i.OutputRegister(), i.InputDoubleRegister(0));
 788       } else {
 789         __ cvttsd2siq(i.OutputRegister(), i.InputOperand(0));
 790       }
 791       __ AssertZeroExtended(i.OutputRegister());
 792       break;
 793     }
 794     case kSSEInt32ToFloat64:
 795       if (instr->InputAt(0)->IsRegister()) {
 796         __ cvtlsi2sd(i.OutputDoubleRegister(), i.InputRegister(0));
 797       } else {
 798         __ cvtlsi2sd(i.OutputDoubleRegister(), i.InputOperand(0));
 799       }
 800       break;
 801     case kSSEUint32ToFloat64:
 802       if (instr->InputAt(0)->IsRegister()) {
 803         __ movl(kScratchRegister, i.InputRegister(0));
 804       } else {
 805         __ movl(kScratchRegister, i.InputOperand(0));
 806       }
 807       __ cvtqsi2sd(i.OutputDoubleRegister(), kScratchRegister);
 808       break;
 809     case kSSEFloat64ExtractLowWord32:
 810       if (instr->InputAt(0)->IsDoubleStackSlot()) {
 811         __ movl(i.OutputRegister(), i.InputOperand(0));
 812       } else {
 813         __ movd(i.OutputRegister(), i.InputDoubleRegister(0));
 814       }
 815       break;
 816     case kSSEFloat64ExtractHighWord32:
 817       if (instr->InputAt(0)->IsDoubleStackSlot()) {
 818         __ movl(i.OutputRegister(), i.InputOperand(0, kDoubleSize / 2));
 819       } else {
 820         __ Pextrd(i.OutputRegister(), i.InputDoubleRegister(0), 1);
 821       }
 822       break;
 823     case kSSEFloat64InsertLowWord32:
 824       if (instr->InputAt(1)->IsRegister()) {
 825         __ Pinsrd(i.OutputDoubleRegister(), i.InputRegister(1), 0);
 826       } else {
 827         __ Pinsrd(i.OutputDoubleRegister(), i.InputOperand(1), 0);
 828       }
 829       break;
 830     case kSSEFloat64InsertHighWord32:
 831       if (instr->InputAt(1)->IsRegister()) {
 832         __ Pinsrd(i.OutputDoubleRegister(), i.InputRegister(1), 1);
 833       } else {
 834         __ Pinsrd(i.OutputDoubleRegister(), i.InputOperand(1), 1);
 835       }
 836       break;
 837     case kSSEFloat64LoadLowWord32:
 838       if (instr->InputAt(0)->IsRegister()) {
 839         __ movd(i.OutputDoubleRegister(), i.InputRegister(0));
 840       } else {
 841         __ movd(i.OutputDoubleRegister(), i.InputOperand(0));
 842       }
 843       break;
 844     case kAVXFloat64Add:
 845       ASSEMBLE_AVX_DOUBLE_BINOP(vaddsd);
 846       break;
 847     case kAVXFloat64Sub:
 848       ASSEMBLE_AVX_DOUBLE_BINOP(vsubsd);
 849       break;
 850     case kAVXFloat64Mul:
 851       ASSEMBLE_AVX_DOUBLE_BINOP(vmulsd);
 852       break;
 853     case kAVXFloat64Div:
 854       ASSEMBLE_AVX_DOUBLE_BINOP(vdivsd);
 855       break;
 856     case kAVXFloat64Max:
 857       ASSEMBLE_AVX_DOUBLE_BINOP(vmaxsd);
 858       break;
 859     case kAVXFloat64Min:
 860       ASSEMBLE_AVX_DOUBLE_BINOP(vminsd);
 861       break;
 862     case kX64Movsxbl:
 863       ASSEMBLE_MOVX(movsxbl);
 864       __ AssertZeroExtended(i.OutputRegister());
 865       break;
 866     case kX64Movzxbl:
 867       ASSEMBLE_MOVX(movzxbl);
 868       __ AssertZeroExtended(i.OutputRegister());
 869       break;
 870     case kX64Movb: {
 871       size_t index = 0;
 872       Operand operand = i.MemoryOperand(&index);
 873       if (HasImmediateInput(instr, index)) {
 874         __ movb(operand, Immediate(i.InputInt8(index)));
 875       } else {
 876         __ movb(operand, i.InputRegister(index));
 877       }
 878       break;
 879     }
 880     case kX64Movsxwl:
 881       ASSEMBLE_MOVX(movsxwl);
 882       __ AssertZeroExtended(i.OutputRegister());
 883       break;
 884     case kX64Movzxwl:
 885       ASSEMBLE_MOVX(movzxwl);
 886       __ AssertZeroExtended(i.OutputRegister());
 887       break;
 888     case kX64Movw: {
 889       size_t index = 0;
 890       Operand operand = i.MemoryOperand(&index);
 891       if (HasImmediateInput(instr, index)) {
 892         __ movw(operand, Immediate(i.InputInt16(index)));
 893       } else {
 894         __ movw(operand, i.InputRegister(index));
 895       }
 896       break;
 897     }
 898     case kX64Movl:
 899       if (instr->HasOutput()) {
 900         if (instr->addressing_mode() == kMode_None) {
 901           if (instr->InputAt(0)->IsRegister()) {
 902             __ movl(i.OutputRegister(), i.InputRegister(0));
 903           } else {
 904             __ movl(i.OutputRegister(), i.InputOperand(0));
 905           }
 906         } else {
 907           __ movl(i.OutputRegister(), i.MemoryOperand());
 908         }
 909         __ AssertZeroExtended(i.OutputRegister());
 910       } else {
 911         size_t index = 0;
 912         Operand operand = i.MemoryOperand(&index);
 913         if (HasImmediateInput(instr, index)) {
 914           __ movl(operand, i.InputImmediate(index));
 915         } else {
 916           __ movl(operand, i.InputRegister(index));
 917         }
 918       }
 919       break;
 920     case kX64Movsxlq:
 921       ASSEMBLE_MOVX(movsxlq);
 922       break;
 923     case kX64Movq:
 924       if (instr->HasOutput()) {
 925         __ movq(i.OutputRegister(), i.MemoryOperand());
 926       } else {
 927         size_t index = 0;
 928         Operand operand = i.MemoryOperand(&index);
 929         if (HasImmediateInput(instr, index)) {
 930           __ movq(operand, i.InputImmediate(index));
 931         } else {
 932           __ movq(operand, i.InputRegister(index));
 933         }
 934       }
 935       break;
 936     case kX64Movss:
 937       if (instr->HasOutput()) {
 938         __ movss(i.OutputDoubleRegister(), i.MemoryOperand());
 939       } else {
 940         size_t index = 0;
 941         Operand operand = i.MemoryOperand(&index);
 942         __ movss(operand, i.InputDoubleRegister(index));
 943       }
 944       break;
 945     case kX64Movsd:
 946       if (instr->HasOutput()) {
 947         __ movsd(i.OutputDoubleRegister(), i.MemoryOperand());
 948       } else {
 949         size_t index = 0;
 950         Operand operand = i.MemoryOperand(&index);
 951         __ movsd(operand, i.InputDoubleRegister(index));
 952       }
 953       break;
 954     case kX64Lea32: {
 955       AddressingMode mode = AddressingModeField::decode(instr->opcode());
 956       // Shorten "leal" to "addl", "subl" or "shll" if the register allocation
 957       // and addressing mode just happens to work out. The "addl"/"subl" forms
 958       // in these cases are faster based on measurements.
 959       if (i.InputRegister(0).is(i.OutputRegister())) {
 960         if (mode == kMode_MRI) {
 961           int32_t constant_summand = i.InputInt32(1);
 962           if (constant_summand > 0) {
 963             __ addl(i.OutputRegister(), Immediate(constant_summand));
 964           } else if (constant_summand < 0) {
 965             __ subl(i.OutputRegister(), Immediate(-constant_summand));
 966           }
 967         } else if (mode == kMode_MR1) {
 968           if (i.InputRegister(1).is(i.OutputRegister())) {
 969             __ shll(i.OutputRegister(), Immediate(1));
 970           } else {
 971             __ leal(i.OutputRegister(), i.MemoryOperand());
 972           }
 973         } else if (mode == kMode_M2) {
 974           __ shll(i.OutputRegister(), Immediate(1));
 975         } else if (mode == kMode_M4) {
 976           __ shll(i.OutputRegister(), Immediate(2));
 977         } else if (mode == kMode_M8) {
 978           __ shll(i.OutputRegister(), Immediate(3));
 979         } else {
 980           __ leal(i.OutputRegister(), i.MemoryOperand());
 981         }
 982       } else {
 983         __ leal(i.OutputRegister(), i.MemoryOperand());
 984       }
 985       __ AssertZeroExtended(i.OutputRegister());
 986       break;
 987     }
 988     case kX64Lea:
 989       __ leaq(i.OutputRegister(), i.MemoryOperand());
 990       break;
 991     case kX64Dec32:
 992       __ decl(i.OutputRegister());
 993       break;
 994     case kX64Inc32:
 995       __ incl(i.OutputRegister());
 996       break;
 997     case kX64Push:
 998       if (HasImmediateInput(instr, 0)) {
 999         __ pushq(i.InputImmediate(0));
1000       } else {
1001         if (instr->InputAt(0)->IsRegister()) {
1002           __ pushq(i.InputRegister(0));
1003         } else {
1004           __ pushq(i.InputOperand(0));
1005         }
1006       }
1007       break;
1008     case kX64StoreWriteBarrier: {
1009       Register object = i.InputRegister(0);
1010       Register index = i.InputRegister(1);
1011       Register value = i.InputRegister(2);
1012       __ movq(Operand(object, index, times_1, 0), value);
1013       __ leaq(index, Operand(object, index, times_1, 0));
1014       SaveFPRegsMode mode =
1015           frame()->DidAllocateDoubleRegisters() ? kSaveFPRegs : kDontSaveFPRegs;
1016       __ RecordWrite(object, index, value, mode);
1017       break;
1018     }
1019     case kCheckedLoadInt8:
1020       ASSEMBLE_CHECKED_LOAD_INTEGER(movsxbl);
1021       break;
1022     case kCheckedLoadUint8:
1023       ASSEMBLE_CHECKED_LOAD_INTEGER(movzxbl);
1024       break;
1025     case kCheckedLoadInt16:
1026       ASSEMBLE_CHECKED_LOAD_INTEGER(movsxwl);
1027       break;
1028     case kCheckedLoadUint16:
1029       ASSEMBLE_CHECKED_LOAD_INTEGER(movzxwl);
1030       break;
1031     case kCheckedLoadWord32:
1032       ASSEMBLE_CHECKED_LOAD_INTEGER(movl);
1033       break;
1034     case kCheckedLoadFloat32:
1035       ASSEMBLE_CHECKED_LOAD_FLOAT(movss);
1036       break;
1037     case kCheckedLoadFloat64:
1038       ASSEMBLE_CHECKED_LOAD_FLOAT(movsd);
1039       break;
1040     case kCheckedStoreWord8:
1041       ASSEMBLE_CHECKED_STORE_INTEGER(movb);
1042       break;
1043     case kCheckedStoreWord16:
1044       ASSEMBLE_CHECKED_STORE_INTEGER(movw);
1045       break;
1046     case kCheckedStoreWord32:
1047       ASSEMBLE_CHECKED_STORE_INTEGER(movl);
1048       break;
1049     case kCheckedStoreFloat32:
1050       ASSEMBLE_CHECKED_STORE_FLOAT(movss);
1051       break;
1052     case kCheckedStoreFloat64:
1053       ASSEMBLE_CHECKED_STORE_FLOAT(movsd);
1054       break;
1055     case kX64StackCheck:
1056       __ CompareRoot(rsp, Heap::kStackLimitRootIndex);
1057       break;
1058   }
1059 }  // NOLINT(readability/fn_size)
1060
1061
1062 // Assembles branches after this instruction.
1063 void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
1064   X64OperandConverter i(this, instr);
1065   Label::Distance flabel_distance =
1066       branch->fallthru ? Label::kNear : Label::kFar;
1067   Label* tlabel = branch->true_label;
1068   Label* flabel = branch->false_label;
1069   switch (branch->condition) {
1070     case kUnorderedEqual:
1071       __ j(parity_even, flabel, flabel_distance);
1072     // Fall through.
1073     case kEqual:
1074       __ j(equal, tlabel);
1075       break;
1076     case kUnorderedNotEqual:
1077       __ j(parity_even, tlabel);
1078     // Fall through.
1079     case kNotEqual:
1080       __ j(not_equal, tlabel);
1081       break;
1082     case kSignedLessThan:
1083       __ j(less, tlabel);
1084       break;
1085     case kSignedGreaterThanOrEqual:
1086       __ j(greater_equal, tlabel);
1087       break;
1088     case kSignedLessThanOrEqual:
1089       __ j(less_equal, tlabel);
1090       break;
1091     case kSignedGreaterThan:
1092       __ j(greater, tlabel);
1093       break;
1094     case kUnsignedLessThan:
1095       __ j(below, tlabel);
1096       break;
1097     case kUnsignedGreaterThanOrEqual:
1098       __ j(above_equal, tlabel);
1099       break;
1100     case kUnsignedLessThanOrEqual:
1101       __ j(below_equal, tlabel);
1102       break;
1103     case kUnsignedGreaterThan:
1104       __ j(above, tlabel);
1105       break;
1106     case kOverflow:
1107       __ j(overflow, tlabel);
1108       break;
1109     case kNotOverflow:
1110       __ j(no_overflow, tlabel);
1111       break;
1112   }
1113   if (!branch->fallthru) __ jmp(flabel, flabel_distance);
1114 }
1115
1116
1117 void CodeGenerator::AssembleArchJump(RpoNumber target) {
1118   if (!IsNextInAssemblyOrder(target)) __ jmp(GetLabel(target));
1119 }
1120
1121
1122 // Assembles boolean materializations after this instruction.
1123 void CodeGenerator::AssembleArchBoolean(Instruction* instr,
1124                                         FlagsCondition condition) {
1125   X64OperandConverter i(this, instr);
1126   Label done;
1127
1128   // Materialize a full 64-bit 1 or 0 value. The result register is always the
1129   // last output of the instruction.
1130   Label check;
1131   DCHECK_NE(0u, instr->OutputCount());
1132   Register reg = i.OutputRegister(instr->OutputCount() - 1);
1133   Condition cc = no_condition;
1134   switch (condition) {
1135     case kUnorderedEqual:
1136       __ j(parity_odd, &check, Label::kNear);
1137       __ movl(reg, Immediate(0));
1138       __ jmp(&done, Label::kNear);
1139     // Fall through.
1140     case kEqual:
1141       cc = equal;
1142       break;
1143     case kUnorderedNotEqual:
1144       __ j(parity_odd, &check, Label::kNear);
1145       __ movl(reg, Immediate(1));
1146       __ jmp(&done, Label::kNear);
1147     // Fall through.
1148     case kNotEqual:
1149       cc = not_equal;
1150       break;
1151     case kSignedLessThan:
1152       cc = less;
1153       break;
1154     case kSignedGreaterThanOrEqual:
1155       cc = greater_equal;
1156       break;
1157     case kSignedLessThanOrEqual:
1158       cc = less_equal;
1159       break;
1160     case kSignedGreaterThan:
1161       cc = greater;
1162       break;
1163     case kUnsignedLessThan:
1164       cc = below;
1165       break;
1166     case kUnsignedGreaterThanOrEqual:
1167       cc = above_equal;
1168       break;
1169     case kUnsignedLessThanOrEqual:
1170       cc = below_equal;
1171       break;
1172     case kUnsignedGreaterThan:
1173       cc = above;
1174       break;
1175     case kOverflow:
1176       cc = overflow;
1177       break;
1178     case kNotOverflow:
1179       cc = no_overflow;
1180       break;
1181   }
1182   __ bind(&check);
1183   __ setcc(cc, reg);
1184   __ movzxbl(reg, reg);
1185   __ bind(&done);
1186 }
1187
1188
1189 void CodeGenerator::AssembleArchLookupSwitch(Instruction* instr) {
1190   X64OperandConverter i(this, instr);
1191   Register input = i.InputRegister(0);
1192   for (size_t index = 2; index < instr->InputCount(); index += 2) {
1193     __ cmpl(input, Immediate(i.InputInt32(index + 0)));
1194     __ j(equal, GetLabel(i.InputRpo(index + 1)));
1195   }
1196   AssembleArchJump(i.InputRpo(1));
1197 }
1198
1199
1200 void CodeGenerator::AssembleArchTableSwitch(Instruction* instr) {
1201   X64OperandConverter i(this, instr);
1202   Register input = i.InputRegister(0);
1203   int32_t const case_count = static_cast<int32_t>(instr->InputCount() - 2);
1204   Label** cases = zone()->NewArray<Label*>(case_count);
1205   for (int32_t index = 0; index < case_count; ++index) {
1206     cases[index] = GetLabel(i.InputRpo(index + 2));
1207   }
1208   Label* const table = AddJumpTable(cases, case_count);
1209   __ cmpl(input, Immediate(case_count));
1210   __ j(above_equal, GetLabel(i.InputRpo(1)));
1211   __ leaq(kScratchRegister, Operand(table));
1212   __ jmp(Operand(kScratchRegister, input, times_8, 0));
1213 }
1214
1215
1216 void CodeGenerator::AssembleDeoptimizerCall(
1217     int deoptimization_id, Deoptimizer::BailoutType bailout_type) {
1218   Address deopt_entry = Deoptimizer::GetDeoptimizationEntry(
1219       isolate(), deoptimization_id, bailout_type);
1220   __ call(deopt_entry, RelocInfo::RUNTIME_ENTRY);
1221 }
1222
1223
1224 void CodeGenerator::AssemblePrologue() {
1225   CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
1226   int stack_slots = frame()->GetSpillSlotCount();
1227   if (descriptor->kind() == CallDescriptor::kCallAddress) {
1228     __ pushq(rbp);
1229     __ movq(rbp, rsp);
1230     const RegList saves = descriptor->CalleeSavedRegisters();
1231     if (saves != 0) {  // Save callee-saved registers.
1232       int register_save_area_size = 0;
1233       for (int i = Register::kNumRegisters - 1; i >= 0; i--) {
1234         if (!((1 << i) & saves)) continue;
1235         __ pushq(Register::from_code(i));
1236         register_save_area_size += kPointerSize;
1237       }
1238       frame()->SetRegisterSaveAreaSize(register_save_area_size);
1239     }
1240   } else if (descriptor->IsJSFunctionCall()) {
1241     CompilationInfo* info = this->info();
1242     __ Prologue(info->IsCodePreAgingActive());
1243     frame()->SetRegisterSaveAreaSize(
1244         StandardFrameConstants::kFixedFrameSizeFromFp);
1245   } else if (stack_slots > 0) {
1246     __ StubPrologue();
1247     frame()->SetRegisterSaveAreaSize(
1248         StandardFrameConstants::kFixedFrameSizeFromFp);
1249   }
1250
1251   if (info()->is_osr()) {
1252     // TurboFan OSR-compiled functions cannot be entered directly.
1253     __ Abort(kShouldNotDirectlyEnterOsrFunction);
1254
1255     // Unoptimized code jumps directly to this entrypoint while the unoptimized
1256     // frame is still on the stack. Optimized code uses OSR values directly from
1257     // the unoptimized frame. Thus, all that needs to be done is to allocate the
1258     // remaining stack slots.
1259     if (FLAG_code_comments) __ RecordComment("-- OSR entrypoint --");
1260     osr_pc_offset_ = __ pc_offset();
1261     DCHECK(stack_slots >= frame()->GetOsrStackSlotCount());
1262     stack_slots -= frame()->GetOsrStackSlotCount();
1263   }
1264
1265   if (stack_slots > 0) {
1266     __ subq(rsp, Immediate(stack_slots * kPointerSize));
1267   }
1268 }
1269
1270
1271 void CodeGenerator::AssembleReturn() {
1272   CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
1273   int stack_slots = frame()->GetSpillSlotCount();
1274   if (descriptor->kind() == CallDescriptor::kCallAddress) {
1275     if (frame()->GetRegisterSaveAreaSize() > 0) {
1276       // Remove this frame's spill slots first.
1277       if (stack_slots > 0) {
1278         __ addq(rsp, Immediate(stack_slots * kPointerSize));
1279       }
1280       const RegList saves = descriptor->CalleeSavedRegisters();
1281       // Restore registers.
1282       if (saves != 0) {
1283         for (int i = 0; i < Register::kNumRegisters; i++) {
1284           if (!((1 << i) & saves)) continue;
1285           __ popq(Register::from_code(i));
1286         }
1287       }
1288       __ popq(rbp);  // Pop caller's frame pointer.
1289       __ ret(0);
1290     } else {
1291       // No saved registers.
1292       __ movq(rsp, rbp);  // Move stack pointer back to frame pointer.
1293       __ popq(rbp);       // Pop caller's frame pointer.
1294       __ ret(0);
1295     }
1296   } else if (descriptor->IsJSFunctionCall() || stack_slots > 0) {
1297     __ movq(rsp, rbp);  // Move stack pointer back to frame pointer.
1298     __ popq(rbp);       // Pop caller's frame pointer.
1299     int pop_count = descriptor->IsJSFunctionCall()
1300                         ? static_cast<int>(descriptor->JSParameterCount())
1301                         : 0;
1302     __ ret(pop_count * kPointerSize);
1303   } else {
1304     __ ret(0);
1305   }
1306 }
1307
1308
1309 void CodeGenerator::AssembleMove(InstructionOperand* source,
1310                                  InstructionOperand* destination) {
1311   X64OperandConverter g(this, NULL);
1312   // Dispatch on the source and destination operand kinds.  Not all
1313   // combinations are possible.
1314   if (source->IsRegister()) {
1315     DCHECK(destination->IsRegister() || destination->IsStackSlot());
1316     Register src = g.ToRegister(source);
1317     if (destination->IsRegister()) {
1318       __ movq(g.ToRegister(destination), src);
1319     } else {
1320       __ movq(g.ToOperand(destination), src);
1321     }
1322   } else if (source->IsStackSlot()) {
1323     DCHECK(destination->IsRegister() || destination->IsStackSlot());
1324     Operand src = g.ToOperand(source);
1325     if (destination->IsRegister()) {
1326       Register dst = g.ToRegister(destination);
1327       __ movq(dst, src);
1328     } else {
1329       // Spill on demand to use a temporary register for memory-to-memory
1330       // moves.
1331       Register tmp = kScratchRegister;
1332       Operand dst = g.ToOperand(destination);
1333       __ movq(tmp, src);
1334       __ movq(dst, tmp);
1335     }
1336   } else if (source->IsConstant()) {
1337     ConstantOperand* constant_source = ConstantOperand::cast(source);
1338     Constant src = g.ToConstant(constant_source);
1339     if (destination->IsRegister() || destination->IsStackSlot()) {
1340       Register dst = destination->IsRegister() ? g.ToRegister(destination)
1341                                                : kScratchRegister;
1342       switch (src.type()) {
1343         case Constant::kInt32:
1344           // TODO(dcarney): don't need scratch in this case.
1345           __ Set(dst, src.ToInt32());
1346           break;
1347         case Constant::kInt64:
1348           __ Set(dst, src.ToInt64());
1349           break;
1350         case Constant::kFloat32:
1351           __ Move(dst,
1352                   isolate()->factory()->NewNumber(src.ToFloat32(), TENURED));
1353           break;
1354         case Constant::kFloat64:
1355           __ Move(dst,
1356                   isolate()->factory()->NewNumber(src.ToFloat64(), TENURED));
1357           break;
1358         case Constant::kExternalReference:
1359           __ Move(dst, src.ToExternalReference());
1360           break;
1361         case Constant::kHeapObject: {
1362           Handle<HeapObject> src_object = src.ToHeapObject();
1363           if (info()->IsOptimizing() &&
1364               src_object.is_identical_to(info()->context())) {
1365             // Loading the context from the frame is way cheaper than
1366             // materializing the actual context heap object address.
1367             __ movp(dst, Operand(rbp, StandardFrameConstants::kContextOffset));
1368           } else {
1369             __ Move(dst, src_object);
1370           }
1371           break;
1372         }
1373         case Constant::kRpoNumber:
1374           UNREACHABLE();  // TODO(dcarney): load of labels on x64.
1375           break;
1376       }
1377       if (destination->IsStackSlot()) {
1378         __ movq(g.ToOperand(destination), kScratchRegister);
1379       }
1380     } else if (src.type() == Constant::kFloat32) {
1381       // TODO(turbofan): Can we do better here?
1382       uint32_t src_const = bit_cast<uint32_t>(src.ToFloat32());
1383       if (destination->IsDoubleRegister()) {
1384         __ Move(g.ToDoubleRegister(destination), src_const);
1385       } else {
1386         DCHECK(destination->IsDoubleStackSlot());
1387         Operand dst = g.ToOperand(destination);
1388         __ movl(dst, Immediate(src_const));
1389       }
1390     } else {
1391       DCHECK_EQ(Constant::kFloat64, src.type());
1392       uint64_t src_const = bit_cast<uint64_t>(src.ToFloat64());
1393       if (destination->IsDoubleRegister()) {
1394         __ Move(g.ToDoubleRegister(destination), src_const);
1395       } else {
1396         DCHECK(destination->IsDoubleStackSlot());
1397         __ movq(kScratchRegister, src_const);
1398         __ movq(g.ToOperand(destination), kScratchRegister);
1399       }
1400     }
1401   } else if (source->IsDoubleRegister()) {
1402     XMMRegister src = g.ToDoubleRegister(source);
1403     if (destination->IsDoubleRegister()) {
1404       XMMRegister dst = g.ToDoubleRegister(destination);
1405       __ movaps(dst, src);
1406     } else {
1407       DCHECK(destination->IsDoubleStackSlot());
1408       Operand dst = g.ToOperand(destination);
1409       __ movsd(dst, src);
1410     }
1411   } else if (source->IsDoubleStackSlot()) {
1412     DCHECK(destination->IsDoubleRegister() || destination->IsDoubleStackSlot());
1413     Operand src = g.ToOperand(source);
1414     if (destination->IsDoubleRegister()) {
1415       XMMRegister dst = g.ToDoubleRegister(destination);
1416       __ movsd(dst, src);
1417     } else {
1418       // We rely on having xmm0 available as a fixed scratch register.
1419       Operand dst = g.ToOperand(destination);
1420       __ movsd(xmm0, src);
1421       __ movsd(dst, xmm0);
1422     }
1423   } else {
1424     UNREACHABLE();
1425   }
1426 }
1427
1428
1429 void CodeGenerator::AssembleSwap(InstructionOperand* source,
1430                                  InstructionOperand* destination) {
1431   X64OperandConverter g(this, NULL);
1432   // Dispatch on the source and destination operand kinds.  Not all
1433   // combinations are possible.
1434   if (source->IsRegister() && destination->IsRegister()) {
1435     // Register-register.
1436     __ xchgq(g.ToRegister(source), g.ToRegister(destination));
1437   } else if (source->IsRegister() && destination->IsStackSlot()) {
1438     Register src = g.ToRegister(source);
1439     Operand dst = g.ToOperand(destination);
1440     __ xchgq(src, dst);
1441   } else if ((source->IsStackSlot() && destination->IsStackSlot()) ||
1442              (source->IsDoubleStackSlot() &&
1443               destination->IsDoubleStackSlot())) {
1444     // Memory-memory.
1445     Register tmp = kScratchRegister;
1446     Operand src = g.ToOperand(source);
1447     Operand dst = g.ToOperand(destination);
1448     __ movq(tmp, dst);
1449     __ xchgq(tmp, src);
1450     __ movq(dst, tmp);
1451   } else if (source->IsDoubleRegister() && destination->IsDoubleRegister()) {
1452     // XMM register-register swap. We rely on having xmm0
1453     // available as a fixed scratch register.
1454     XMMRegister src = g.ToDoubleRegister(source);
1455     XMMRegister dst = g.ToDoubleRegister(destination);
1456     __ movaps(xmm0, src);
1457     __ movaps(src, dst);
1458     __ movaps(dst, xmm0);
1459   } else if (source->IsDoubleRegister() && destination->IsDoubleStackSlot()) {
1460     // XMM register-memory swap.  We rely on having xmm0
1461     // available as a fixed scratch register.
1462     XMMRegister src = g.ToDoubleRegister(source);
1463     Operand dst = g.ToOperand(destination);
1464     __ movsd(xmm0, src);
1465     __ movsd(src, dst);
1466     __ movsd(dst, xmm0);
1467   } else {
1468     // No other combinations are possible.
1469     UNREACHABLE();
1470   }
1471 }
1472
1473
1474 void CodeGenerator::AssembleJumpTable(Label** targets, size_t target_count) {
1475   for (size_t index = 0; index < target_count; ++index) {
1476     __ dq(targets[index]);
1477   }
1478 }
1479
1480
1481 void CodeGenerator::AddNopForSmiCodeInlining() { __ nop(); }
1482
1483
1484 void CodeGenerator::EnsureSpaceForLazyDeopt() {
1485   int space_needed = Deoptimizer::patch_size();
1486   if (!info()->IsStub()) {
1487     // Ensure that we have enough space after the previous lazy-bailout
1488     // instruction for patching the code here.
1489     int current_pc = masm()->pc_offset();
1490     if (current_pc < last_lazy_deopt_pc_ + space_needed) {
1491       int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc;
1492       __ Nop(padding_size);
1493     }
1494   }
1495   MarkLazyDeoptSite();
1496 }
1497
1498 #undef __
1499
1500 }  // namespace internal
1501 }  // namespace compiler
1502 }  // namespace v8