src/compiler/x64/code-generator-x64.cc

   1 // Copyright 2013 the V8 project authors. All rights reserved.
   2 // Use of this source code is governed by a BSD-style license that can be
   3 // found in the LICENSE file.
   4
   5 #include "src/compiler/code-generator.h"
   6
   7 #include "src/compiler/code-generator-impl.h"
   8 #include "src/compiler/gap-resolver.h"
   9 #include "src/compiler/node-matchers.h"
  10 #include "src/scopes.h"
  11 #include "src/x64/assembler-x64.h"
  12 #include "src/x64/macro-assembler-x64.h"
  13
  14 namespace v8 {
  15 namespace internal {
  16 namespace compiler {
  17
  18 #define __ masm()->
  19
  20
  21 #define kScratchDoubleReg xmm0
  22
  23
  24 // Adds X64 specific methods for decoding operands.
  25 class X64OperandConverter : public InstructionOperandConverter {
  26  public:
  27   X64OperandConverter(CodeGenerator* gen, Instruction* instr)
  28       : InstructionOperandConverter(gen, instr) {}
  29
  30   Immediate InputImmediate(size_t index) {
  31     return ToImmediate(instr_->InputAt(index));
  32   }
  33
  34   Operand InputOperand(size_t index, int extra = 0) {
  35     return ToOperand(instr_->InputAt(index), extra);
  36   }
  37
  38   Operand OutputOperand() { return ToOperand(instr_->Output()); }
  39
  40   Immediate ToImmediate(InstructionOperand* operand) {
  41     return Immediate(ToConstant(operand).ToInt32());
  42   }
  43
  44   Operand ToOperand(InstructionOperand* op, int extra = 0) {
  45     DCHECK(op->IsStackSlot() || op->IsDoubleStackSlot());
  46     // The linkage computes where all spill slots are located.
  47     FrameOffset offset = linkage()->GetFrameOffset(op->index(), frame(), extra);
  48     return Operand(offset.from_stack_pointer() ? rsp : rbp, offset.offset());
  49   }
  50
  51   static size_t NextOffset(size_t* offset) {
  52     size_t i = *offset;
  53     (*offset)++;
  54     return i;
  55   }
  56
  57   static ScaleFactor ScaleFor(AddressingMode one, AddressingMode mode) {
  58     STATIC_ASSERT(0 == static_cast<int>(times_1));
  59     STATIC_ASSERT(1 == static_cast<int>(times_2));
  60     STATIC_ASSERT(2 == static_cast<int>(times_4));
  61     STATIC_ASSERT(3 == static_cast<int>(times_8));
  62     int scale = static_cast<int>(mode - one);
  63     DCHECK(scale >= 0 && scale < 4);
  64     return static_cast<ScaleFactor>(scale);
  65   }
  66
  67   Operand MemoryOperand(size_t* offset) {
  68     AddressingMode mode = AddressingModeField::decode(instr_->opcode());
  69     switch (mode) {
  70       case kMode_MR: {
  71         Register base = InputRegister(NextOffset(offset));
  72         int32_t disp = 0;
  73         return Operand(base, disp);
  74       }
  75       case kMode_MRI: {
  76         Register base = InputRegister(NextOffset(offset));
  77         int32_t disp = InputInt32(NextOffset(offset));
  78         return Operand(base, disp);
  79       }
  80       case kMode_MR1:
  81       case kMode_MR2:
  82       case kMode_MR4:
  83       case kMode_MR8: {
  84         Register base = InputRegister(NextOffset(offset));
  85         Register index = InputRegister(NextOffset(offset));
  86         ScaleFactor scale = ScaleFor(kMode_MR1, mode);
  87         int32_t disp = 0;
  88         return Operand(base, index, scale, disp);
  89       }
  90       case kMode_MR1I:
  91       case kMode_MR2I:
  92       case kMode_MR4I:
  93       case kMode_MR8I: {
  94         Register base = InputRegister(NextOffset(offset));
  95         Register index = InputRegister(NextOffset(offset));
  96         ScaleFactor scale = ScaleFor(kMode_MR1I, mode);
  97         int32_t disp = InputInt32(NextOffset(offset));
  98         return Operand(base, index, scale, disp);
  99       }
 100       case kMode_M1: {
 101         Register base = InputRegister(NextOffset(offset));
 102         int32_t disp = 0;
 103         return Operand(base, disp);
 104       }
 105       case kMode_M2:
 106         UNREACHABLE();  // Should use kModeMR with more compact encoding instead
 107         return Operand(no_reg, 0);
 108       case kMode_M4:
 109       case kMode_M8: {
 110         Register index = InputRegister(NextOffset(offset));
 111         ScaleFactor scale = ScaleFor(kMode_M1, mode);
 112         int32_t disp = 0;
 113         return Operand(index, scale, disp);
 114       }
 115       case kMode_M1I:
 116       case kMode_M2I:
 117       case kMode_M4I:
 118       case kMode_M8I: {
 119         Register index = InputRegister(NextOffset(offset));
 120         ScaleFactor scale = ScaleFor(kMode_M1I, mode);
 121         int32_t disp = InputInt32(NextOffset(offset));
 122         return Operand(index, scale, disp);
 123       }
 124       case kMode_None:
 125         UNREACHABLE();
 126         return Operand(no_reg, 0);
 127     }
 128     UNREACHABLE();
 129     return Operand(no_reg, 0);
 130   }
 131
 132   Operand MemoryOperand(size_t first_input = 0) {
 133     return MemoryOperand(&first_input);
 134   }
 135 };
 136
 137
 138 namespace {
 139
 140 bool HasImmediateInput(Instruction* instr, size_t index) {
 141   return instr->InputAt(index)->IsImmediate();
 142 }
 143
 144
 145 class OutOfLineLoadZero FINAL : public OutOfLineCode {
 146  public:
 147   OutOfLineLoadZero(CodeGenerator* gen, Register result)
 148       : OutOfLineCode(gen), result_(result) {}
 149
 150   void Generate() FINAL { __ xorl(result_, result_); }
 151
 152  private:
 153   Register const result_;
 154 };
 155
 156
 157 class OutOfLineLoadNaN FINAL : public OutOfLineCode {
 158  public:
 159   OutOfLineLoadNaN(CodeGenerator* gen, XMMRegister result)
 160       : OutOfLineCode(gen), result_(result) {}
 161
 162   void Generate() FINAL { __ pcmpeqd(result_, result_); }
 163
 164  private:
 165   XMMRegister const result_;
 166 };
 167
 168
 169 class OutOfLineTruncateDoubleToI FINAL : public OutOfLineCode {
 170  public:
 171   OutOfLineTruncateDoubleToI(CodeGenerator* gen, Register result,
 172                              XMMRegister input)
 173       : OutOfLineCode(gen), result_(result), input_(input) {}
 174
 175   void Generate() FINAL {
 176     __ subp(rsp, Immediate(kDoubleSize));
 177     __ movsd(MemOperand(rsp, 0), input_);
 178     __ SlowTruncateToI(result_, rsp, 0);
 179     __ addp(rsp, Immediate(kDoubleSize));
 180   }
 181
 182  private:
 183   Register const result_;
 184   XMMRegister const input_;
 185 };
 186
 187 }  // namespace
 188
 189
 190 #define ASSEMBLE_UNOP(asm_instr)         \
 191   do {                                   \
 192     if (instr->Output()->IsRegister()) { \
 193       __ asm_instr(i.OutputRegister());  \
 194     } else {                             \
 195       __ asm_instr(i.OutputOperand());   \
 196     }                                    \
 197   } while (0)
 198
 199
 200 #define ASSEMBLE_BINOP(asm_instr)                              \
 201   do {                                                         \
 202     if (HasImmediateInput(instr, 1)) {                         \
 203       if (instr->InputAt(0)->IsRegister()) {                   \
 204         __ asm_instr(i.InputRegister(0), i.InputImmediate(1)); \
 205       } else {                                                 \
 206         __ asm_instr(i.InputOperand(0), i.InputImmediate(1));  \
 207       }                                                        \
 208     } else {                                                   \
 209       if (instr->InputAt(1)->IsRegister()) {                   \
 210         __ asm_instr(i.InputRegister(0), i.InputRegister(1));  \
 211       } else {                                                 \
 212         __ asm_instr(i.InputRegister(0), i.InputOperand(1));   \
 213       }                                                        \
 214     }                                                          \
 215   } while (0)
 216
 217
 218 #define ASSEMBLE_MULT(asm_instr)                              \
 219   do {                                                        \
 220     if (HasImmediateInput(instr, 1)) {                        \
 221       if (instr->InputAt(0)->IsRegister()) {                  \
 222         __ asm_instr(i.OutputRegister(), i.InputRegister(0),  \
 223                      i.InputImmediate(1));                    \
 224       } else {                                                \
 225         __ asm_instr(i.OutputRegister(), i.InputOperand(0),   \
 226                      i.InputImmediate(1));                    \
 227       }                                                       \
 228     } else {                                                  \
 229       if (instr->InputAt(1)->IsRegister()) {                  \
 230         __ asm_instr(i.OutputRegister(), i.InputRegister(1)); \
 231       } else {                                                \
 232         __ asm_instr(i.OutputRegister(), i.InputOperand(1));  \
 233       }                                                       \
 234     }                                                         \
 235   } while (0)
 236
 237
 238 #define ASSEMBLE_SHIFT(asm_instr, width)                                   \
 239   do {                                                                     \
 240     if (HasImmediateInput(instr, 1)) {                                     \
 241       if (instr->Output()->IsRegister()) {                                 \
 242         __ asm_instr(i.OutputRegister(), Immediate(i.InputInt##width(1))); \
 243       } else {                                                             \
 244         __ asm_instr(i.OutputOperand(), Immediate(i.InputInt##width(1)));  \
 245       }                                                                    \
 246     } else {                                                               \
 247       if (instr->Output()->IsRegister()) {                                 \
 248         __ asm_instr##_cl(i.OutputRegister());                             \
 249       } else {                                                             \
 250         __ asm_instr##_cl(i.OutputOperand());                              \
 251       }                                                                    \
 252     }                                                                      \
 253   } while (0)
 254
 255
 256 #define ASSEMBLE_MOVX(asm_instr)                            \
 257   do {                                                      \
 258     if (instr->addressing_mode() != kMode_None) {           \
 259       __ asm_instr(i.OutputRegister(), i.MemoryOperand());  \
 260     } else if (instr->InputAt(0)->IsRegister()) {           \
 261       __ asm_instr(i.OutputRegister(), i.InputRegister(0)); \
 262     } else {                                                \
 263       __ asm_instr(i.OutputRegister(), i.InputOperand(0));  \
 264     }                                                       \
 265   } while (0)
 266
 267
 268 #define ASSEMBLE_DOUBLE_BINOP(asm_instr)                                \
 269   do {                                                                  \
 270     if (instr->InputAt(1)->IsDoubleRegister()) {                        \
 271       __ asm_instr(i.InputDoubleRegister(0), i.InputDoubleRegister(1)); \
 272     } else {                                                            \
 273       __ asm_instr(i.InputDoubleRegister(0), i.InputOperand(1));        \
 274     }                                                                   \
 275   } while (0)
 276
 277
 278 #define ASSEMBLE_AVX_DOUBLE_BINOP(asm_instr)                           \
 279   do {                                                                 \
 280     CpuFeatureScope avx_scope(masm(), AVX);                            \
 281     if (instr->InputAt(1)->IsDoubleRegister()) {                       \
 282       __ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0), \
 283                    i.InputDoubleRegister(1));                          \
 284     } else {                                                           \
 285       __ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0), \
 286                    i.InputOperand(1));                                 \
 287     }                                                                  \
 288   } while (0)
 289
 290
 291 #define ASSEMBLE_CHECKED_LOAD_FLOAT(asm_instr)                               \
 292   do {                                                                       \
 293     auto result = i.OutputDoubleRegister();                                  \
 294     auto buffer = i.InputRegister(0);                                        \
 295     auto index1 = i.InputRegister(1);                                        \
 296     auto index2 = i.InputInt32(2);                                           \
 297     OutOfLineCode* ool;                                                      \
 298     if (instr->InputAt(3)->IsRegister()) {                                   \
 299       auto length = i.InputRegister(3);                                      \
 300       DCHECK_EQ(0, index2);                                                  \
 301       __ cmpl(index1, length);                                               \
 302       ool = new (zone()) OutOfLineLoadNaN(this, result);                     \
 303     } else {                                                                 \
 304       auto length = i.InputInt32(3);                                         \
 305       DCHECK_LE(index2, length);                                             \
 306       __ cmpq(index1, Immediate(length - index2));                           \
 307       class OutOfLineLoadFloat FINAL : public OutOfLineCode {                \
 308        public:                                                               \
 309         OutOfLineLoadFloat(CodeGenerator* gen, XMMRegister result,           \
 310                            Register buffer, Register index1, int32_t index2, \
 311                            int32_t length)                                   \
 312             : OutOfLineCode(gen),                                            \
 313               result_(result),                                               \
 314               buffer_(buffer),                                               \
 315               index1_(index1),                                               \
 316               index2_(index2),                                               \
 317               length_(length) {}                                             \
 318                                                                              \
 319         void Generate() FINAL {                                              \
 320           __ leal(kScratchRegister, Operand(index1_, index2_));              \
 321           __ pcmpeqd(result_, result_);                                      \
 322           __ cmpl(kScratchRegister, Immediate(length_));                     \
 323           __ j(above_equal, exit());                                         \
 324           __ asm_instr(result_,                                              \
 325                        Operand(buffer_, kScratchRegister, times_1, 0));      \
 326         }                                                                    \
 327                                                                              \
 328        private:                                                              \
 329         XMMRegister const result_;                                           \
 330         Register const buffer_;                                              \
 331         Register const index1_;                                              \
 332         int32_t const index2_;                                               \
 333         int32_t const length_;                                               \
 334       };                                                                     \
 335       ool = new (zone())                                                     \
 336           OutOfLineLoadFloat(this, result, buffer, index1, index2, length);  \
 337     }                                                                        \
 338     __ j(above_equal, ool->entry());                                         \
 339     __ asm_instr(result, Operand(buffer, index1, times_1, index2));          \
 340     __ bind(ool->exit());                                                    \
 341   } while (false)
 342
 343
 344 #define ASSEMBLE_CHECKED_LOAD_INTEGER(asm_instr)                               \
 345   do {                                                                         \
 346     auto result = i.OutputRegister();                                          \
 347     auto buffer = i.InputRegister(0);                                          \
 348     auto index1 = i.InputRegister(1);                                          \
 349     auto index2 = i.InputInt32(2);                                             \
 350     OutOfLineCode* ool;                                                        \
 351     if (instr->InputAt(3)->IsRegister()) {                                     \
 352       auto length = i.InputRegister(3);                                        \
 353       DCHECK_EQ(0, index2);                                                    \
 354       __ cmpl(index1, length);                                                 \
 355       ool = new (zone()) OutOfLineLoadZero(this, result);                      \
 356     } else {                                                                   \
 357       auto length = i.InputInt32(3);                                           \
 358       DCHECK_LE(index2, length);                                               \
 359       __ cmpq(index1, Immediate(length - index2));                             \
 360       class OutOfLineLoadInteger FINAL : public OutOfLineCode {                \
 361        public:                                                                 \
 362         OutOfLineLoadInteger(CodeGenerator* gen, Register result,              \
 363                              Register buffer, Register index1, int32_t index2, \
 364                              int32_t length)                                   \
 365             : OutOfLineCode(gen),                                              \
 366               result_(result),                                                 \
 367               buffer_(buffer),                                                 \
 368               index1_(index1),                                                 \
 369               index2_(index2),                                                 \
 370               length_(length) {}                                               \
 371                                                                                \
 372         void Generate() FINAL {                                                \
 373           Label oob;                                                           \
 374           __ leal(kScratchRegister, Operand(index1_, index2_));                \
 375           __ cmpl(kScratchRegister, Immediate(length_));                       \
 376           __ j(above_equal, &oob, Label::kNear);                               \
 377           __ asm_instr(result_,                                                \
 378                        Operand(buffer_, kScratchRegister, times_1, 0));        \
 379           __ jmp(exit());                                                      \
 380           __ bind(&oob);                                                       \
 381           __ xorl(result_, result_);                                           \
 382         }                                                                      \
 383                                                                                \
 384        private:                                                                \
 385         Register const result_;                                                \
 386         Register const buffer_;                                                \
 387         Register const index1_;                                                \
 388         int32_t const index2_;                                                 \
 389         int32_t const length_;                                                 \
 390       };                                                                       \
 391       ool = new (zone())                                                       \
 392           OutOfLineLoadInteger(this, result, buffer, index1, index2, length);  \
 393     }                                                                          \
 394     __ j(above_equal, ool->entry());                                           \
 395     __ asm_instr(result, Operand(buffer, index1, times_1, index2));            \
 396     __ bind(ool->exit());                                                      \
 397   } while (false)
 398
 399
 400 #define ASSEMBLE_CHECKED_STORE_FLOAT(asm_instr)                              \
 401   do {                                                                       \
 402     auto buffer = i.InputRegister(0);                                        \
 403     auto index1 = i.InputRegister(1);                                        \
 404     auto index2 = i.InputInt32(2);                                           \
 405     auto value = i.InputDoubleRegister(4);                                   \
 406     if (instr->InputAt(3)->IsRegister()) {                                   \
 407       auto length = i.InputRegister(3);                                      \
 408       DCHECK_EQ(0, index2);                                                  \
 409       Label done;                                                            \
 410       __ cmpl(index1, length);                                               \
 411       __ j(above_equal, &done, Label::kNear);                                \
 412       __ asm_instr(Operand(buffer, index1, times_1, index2), value);         \
 413       __ bind(&done);                                                        \
 414     } else {                                                                 \
 415       auto length = i.InputInt32(3);                                         \
 416       DCHECK_LE(index2, length);                                             \
 417       __ cmpq(index1, Immediate(length - index2));                           \
 418       class OutOfLineStoreFloat FINAL : public OutOfLineCode {               \
 419        public:                                                               \
 420         OutOfLineStoreFloat(CodeGenerator* gen, Register buffer,             \
 421                             Register index1, int32_t index2, int32_t length, \
 422                             XMMRegister value)                               \
 423             : OutOfLineCode(gen),                                            \
 424               buffer_(buffer),                                               \
 425               index1_(index1),                                               \
 426               index2_(index2),                                               \
 427               length_(length),                                               \
 428               value_(value) {}                                               \
 429                                                                              \
 430         void Generate() FINAL {                                              \
 431           __ leal(kScratchRegister, Operand(index1_, index2_));              \
 432           __ cmpl(kScratchRegister, Immediate(length_));                     \
 433           __ j(above_equal, exit());                                         \
 434           __ asm_instr(Operand(buffer_, kScratchRegister, times_1, 0),       \
 435                        value_);                                              \
 436         }                                                                    \
 437                                                                              \
 438        private:                                                              \
 439         Register const buffer_;                                              \
 440         Register const index1_;                                              \
 441         int32_t const index2_;                                               \
 442         int32_t const length_;                                               \
 443         XMMRegister const value_;                                            \
 444       };                                                                     \
 445       auto ool = new (zone())                                                \
 446           OutOfLineStoreFloat(this, buffer, index1, index2, length, value);  \
 447       __ j(above_equal, ool->entry());                                       \
 448       __ asm_instr(Operand(buffer, index1, times_1, index2), value);         \
 449       __ bind(ool->exit());                                                  \
 450     }                                                                        \
 451   } while (false)
 452
 453
 454 #define ASSEMBLE_CHECKED_STORE_INTEGER_IMPL(asm_instr, Value)                  \
 455   do {                                                                         \
 456     auto buffer = i.InputRegister(0);                                          \
 457     auto index1 = i.InputRegister(1);                                          \
 458     auto index2 = i.InputInt32(2);                                             \
 459     if (instr->InputAt(3)->IsRegister()) {                                     \
 460       auto length = i.InputRegister(3);                                        \
 461       DCHECK_EQ(0, index2);                                                    \
 462       Label done;                                                              \
 463       __ cmpl(index1, length);                                                 \
 464       __ j(above_equal, &done, Label::kNear);                                  \
 465       __ asm_instr(Operand(buffer, index1, times_1, index2), value);           \
 466       __ bind(&done);                                                          \
 467     } else {                                                                   \
 468       auto length = i.InputInt32(3);                                           \
 469       DCHECK_LE(index2, length);                                               \
 470       __ cmpq(index1, Immediate(length - index2));                             \
 471       class OutOfLineStoreInteger FINAL : public OutOfLineCode {               \
 472        public:                                                                 \
 473         OutOfLineStoreInteger(CodeGenerator* gen, Register buffer,             \
 474                               Register index1, int32_t index2, int32_t length, \
 475                               Value value)                                     \
 476             : OutOfLineCode(gen),                                              \
 477               buffer_(buffer),                                                 \
 478               index1_(index1),                                                 \
 479               index2_(index2),                                                 \
 480               length_(length),                                                 \
 481               value_(value) {}                                                 \
 482                                                                                \
 483         void Generate() FINAL {                                                \
 484           __ leal(kScratchRegister, Operand(index1_, index2_));                \
 485           __ cmpl(kScratchRegister, Immediate(length_));                       \
 486           __ j(above_equal, exit());                                           \
 487           __ asm_instr(Operand(buffer_, kScratchRegister, times_1, 0),         \
 488                        value_);                                                \
 489         }                                                                      \
 490                                                                                \
 491        private:                                                                \
 492         Register const buffer_;                                                \
 493         Register const index1_;                                                \
 494         int32_t const index2_;                                                 \
 495         int32_t const length_;                                                 \
 496         Value const value_;                                                    \
 497       };                                                                       \
 498       auto ool = new (zone())                                                  \
 499           OutOfLineStoreInteger(this, buffer, index1, index2, length, value);  \
 500       __ j(above_equal, ool->entry());                                         \
 501       __ asm_instr(Operand(buffer, index1, times_1, index2), value);           \
 502       __ bind(ool->exit());                                                    \
 503     }                                                                          \
 504   } while (false)
 505
 506
 507 #define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr)                \
 508   do {                                                           \
 509     if (instr->InputAt(4)->IsRegister()) {                       \
 510       Register value = i.InputRegister(4);                       \
 511       ASSEMBLE_CHECKED_STORE_INTEGER_IMPL(asm_instr, Register);  \
 512     } else {                                                     \
 513       Immediate value = i.InputImmediate(4);                     \
 514       ASSEMBLE_CHECKED_STORE_INTEGER_IMPL(asm_instr, Immediate); \
 515     }                                                            \
 516   } while (false)
 517
 518
 519 // Assembles an instruction after register allocation, producing machine code.
 520 void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
 521   X64OperandConverter i(this, instr);
 522
 523   switch (ArchOpcodeField::decode(instr->opcode())) {
 524     case kArchCallCodeObject: {
 525       EnsureSpaceForLazyDeopt();
 526       if (HasImmediateInput(instr, 0)) {
 527         Handle<Code> code = Handle<Code>::cast(i.InputHeapObject(0));
 528         __ Call(code, RelocInfo::CODE_TARGET);
 529       } else {
 530         Register reg = i.InputRegister(0);
 531         int entry = Code::kHeaderSize - kHeapObjectTag;
 532         __ Call(Operand(reg, entry));
 533       }
 534       RecordCallPosition(instr);
 535       break;
 536     }
 537     case kArchCallJSFunction: {
 538       EnsureSpaceForLazyDeopt();
 539       Register func = i.InputRegister(0);
 540       if (FLAG_debug_code) {
 541         // Check the function's context matches the context argument.
 542         __ cmpp(rsi, FieldOperand(func, JSFunction::kContextOffset));
 543         __ Assert(equal, kWrongFunctionContext);
 544       }
 545       __ Call(FieldOperand(func, JSFunction::kCodeEntryOffset));
 546       RecordCallPosition(instr);
 547       break;
 548     }
 549     case kArchJmp:
 550       AssembleArchJump(i.InputRpo(0));
 551       break;
 552     case kArchLookupSwitch:
 553       AssembleArchLookupSwitch(instr);
 554       break;
 555     case kArchTableSwitch:
 556       AssembleArchTableSwitch(instr);
 557       break;
 558     case kArchNop:
 559       // don't emit code for nops.
 560       break;
 561     case kArchDeoptimize: {
 562       int deopt_state_id =
 563           BuildTranslation(instr, -1, 0, OutputFrameStateCombine::Ignore());
 564       AssembleDeoptimizerCall(deopt_state_id, Deoptimizer::EAGER);
 565       break;
 566     }
 567     case kArchRet:
 568       AssembleReturn();
 569       break;
 570     case kArchStackPointer:
 571       __ movq(i.OutputRegister(), rsp);
 572       break;
 573     case kArchTruncateDoubleToI: {
 574       auto result = i.OutputRegister();
 575       auto input = i.InputDoubleRegister(0);
 576       auto ool = new (zone()) OutOfLineTruncateDoubleToI(this, result, input);
 577       __ cvttsd2siq(result, input);
 578       __ cmpq(result, Immediate(1));
 579       __ j(overflow, ool->entry());
 580       __ bind(ool->exit());
 581       break;
 582     }
 583     case kX64Add32:
 584       ASSEMBLE_BINOP(addl);
 585       break;
 586     case kX64Add:
 587       ASSEMBLE_BINOP(addq);
 588       break;
 589     case kX64Sub32:
 590       ASSEMBLE_BINOP(subl);
 591       break;
 592     case kX64Sub:
 593       ASSEMBLE_BINOP(subq);
 594       break;
 595     case kX64And32:
 596       ASSEMBLE_BINOP(andl);
 597       break;
 598     case kX64And:
 599       ASSEMBLE_BINOP(andq);
 600       break;
 601     case kX64Cmp32:
 602       ASSEMBLE_BINOP(cmpl);
 603       break;
 604     case kX64Cmp:
 605       ASSEMBLE_BINOP(cmpq);
 606       break;
 607     case kX64Test32:
 608       ASSEMBLE_BINOP(testl);
 609       break;
 610     case kX64Test:
 611       ASSEMBLE_BINOP(testq);
 612       break;
 613     case kX64Imul32:
 614       ASSEMBLE_MULT(imull);
 615       break;
 616     case kX64Imul:
 617       ASSEMBLE_MULT(imulq);
 618       break;
 619     case kX64ImulHigh32:
 620       if (instr->InputAt(1)->IsRegister()) {
 621         __ imull(i.InputRegister(1));
 622       } else {
 623         __ imull(i.InputOperand(1));
 624       }
 625       break;
 626     case kX64UmulHigh32:
 627       if (instr->InputAt(1)->IsRegister()) {
 628         __ mull(i.InputRegister(1));
 629       } else {
 630         __ mull(i.InputOperand(1));
 631       }
 632       break;
 633     case kX64Idiv32:
 634       __ cdq();
 635       __ idivl(i.InputRegister(1));
 636       break;
 637     case kX64Idiv:
 638       __ cqo();
 639       __ idivq(i.InputRegister(1));
 640       break;
 641     case kX64Udiv32:
 642       __ xorl(rdx, rdx);
 643       __ divl(i.InputRegister(1));
 644       break;
 645     case kX64Udiv:
 646       __ xorq(rdx, rdx);
 647       __ divq(i.InputRegister(1));
 648       break;
 649     case kX64Not:
 650       ASSEMBLE_UNOP(notq);
 651       break;
 652     case kX64Not32:
 653       ASSEMBLE_UNOP(notl);
 654       break;
 655     case kX64Neg:
 656       ASSEMBLE_UNOP(negq);
 657       break;
 658     case kX64Neg32:
 659       ASSEMBLE_UNOP(negl);
 660       break;
 661     case kX64Or32:
 662       ASSEMBLE_BINOP(orl);
 663       break;
 664     case kX64Or:
 665       ASSEMBLE_BINOP(orq);
 666       break;
 667     case kX64Xor32:
 668       ASSEMBLE_BINOP(xorl);
 669       break;
 670     case kX64Xor:
 671       ASSEMBLE_BINOP(xorq);
 672       break;
 673     case kX64Shl32:
 674       ASSEMBLE_SHIFT(shll, 5);
 675       break;
 676     case kX64Shl:
 677       ASSEMBLE_SHIFT(shlq, 6);
 678       break;
 679     case kX64Shr32:
 680       ASSEMBLE_SHIFT(shrl, 5);
 681       break;
 682     case kX64Shr:
 683       ASSEMBLE_SHIFT(shrq, 6);
 684       break;
 685     case kX64Sar32:
 686       ASSEMBLE_SHIFT(sarl, 5);
 687       break;
 688     case kX64Sar:
 689       ASSEMBLE_SHIFT(sarq, 6);
 690       break;
 691     case kX64Ror32:
 692       ASSEMBLE_SHIFT(rorl, 5);
 693       break;
 694     case kX64Ror:
 695       ASSEMBLE_SHIFT(rorq, 6);
 696       break;
 697     case kSSEFloat64Cmp:
 698       ASSEMBLE_DOUBLE_BINOP(ucomisd);
 699       break;
 700     case kSSEFloat64Add:
 701       ASSEMBLE_DOUBLE_BINOP(addsd);
 702       break;
 703     case kSSEFloat64Sub:
 704       ASSEMBLE_DOUBLE_BINOP(subsd);
 705       break;
 706     case kSSEFloat64Mul:
 707       ASSEMBLE_DOUBLE_BINOP(mulsd);
 708       break;
 709     case kSSEFloat64Div:
 710       ASSEMBLE_DOUBLE_BINOP(divsd);
 711       break;
 712     case kSSEFloat64Mod: {
 713       __ subq(rsp, Immediate(kDoubleSize));
 714       // Move values to st(0) and st(1).
 715       __ movsd(Operand(rsp, 0), i.InputDoubleRegister(1));
 716       __ fld_d(Operand(rsp, 0));
 717       __ movsd(Operand(rsp, 0), i.InputDoubleRegister(0));
 718       __ fld_d(Operand(rsp, 0));
 719       // Loop while fprem isn't done.
 720       Label mod_loop;
 721       __ bind(&mod_loop);
 722       // This instructions traps on all kinds inputs, but we are assuming the
 723       // floating point control word is set to ignore them all.
 724       __ fprem();
 725       // The following 2 instruction implicitly use rax.
 726       __ fnstsw_ax();
 727       if (CpuFeatures::IsSupported(SAHF)) {
 728         CpuFeatureScope sahf_scope(masm(), SAHF);
 729         __ sahf();
 730       } else {
 731         __ shrl(rax, Immediate(8));
 732         __ andl(rax, Immediate(0xFF));
 733         __ pushq(rax);
 734         __ popfq();
 735       }
 736       __ j(parity_even, &mod_loop);
 737       // Move output to stack and clean up.
 738       __ fstp(1);
 739       __ fstp_d(Operand(rsp, 0));
 740       __ movsd(i.OutputDoubleRegister(), Operand(rsp, 0));
 741       __ addq(rsp, Immediate(kDoubleSize));
 742       break;
 743     }
 744     case kSSEFloat64Sqrt:
 745       if (instr->InputAt(0)->IsDoubleRegister()) {
 746         __ sqrtsd(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
 747       } else {
 748         __ sqrtsd(i.OutputDoubleRegister(), i.InputOperand(0));
 749       }
 750       break;
 751     case kSSEFloat64Floor: {
 752       CpuFeatureScope sse_scope(masm(), SSE4_1);
 753       __ roundsd(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
 754                  v8::internal::Assembler::kRoundDown);
 755       break;
 756     }
 757     case kSSEFloat64Ceil: {
 758       CpuFeatureScope sse_scope(masm(), SSE4_1);
 759       __ roundsd(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
 760                  v8::internal::Assembler::kRoundUp);
 761       break;
 762     }
 763     case kSSEFloat64RoundTruncate: {
 764       CpuFeatureScope sse_scope(masm(), SSE4_1);
 765       __ roundsd(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
 766                  v8::internal::Assembler::kRoundToZero);
 767       break;
 768     }
 769     case kSSECvtss2sd:
 770       if (instr->InputAt(0)->IsDoubleRegister()) {
 771         __ cvtss2sd(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
 772       } else {
 773         __ cvtss2sd(i.OutputDoubleRegister(), i.InputOperand(0));
 774       }
 775       break;
 776     case kSSECvtsd2ss:
 777       if (instr->InputAt(0)->IsDoubleRegister()) {
 778         __ cvtsd2ss(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
 779       } else {
 780         __ cvtsd2ss(i.OutputDoubleRegister(), i.InputOperand(0));
 781       }
 782       break;
 783     case kSSEFloat64ToInt32:
 784       if (instr->InputAt(0)->IsDoubleRegister()) {
 785         __ cvttsd2si(i.OutputRegister(), i.InputDoubleRegister(0));
 786       } else {
 787         __ cvttsd2si(i.OutputRegister(), i.InputOperand(0));
 788       }
 789       break;
 790     case kSSEFloat64ToUint32: {
 791       if (instr->InputAt(0)->IsDoubleRegister()) {
 792         __ cvttsd2siq(i.OutputRegister(), i.InputDoubleRegister(0));
 793       } else {
 794         __ cvttsd2siq(i.OutputRegister(), i.InputOperand(0));
 795       }
 796       __ AssertZeroExtended(i.OutputRegister());
 797       break;
 798     }
 799     case kSSEInt32ToFloat64:
 800       if (instr->InputAt(0)->IsRegister()) {
 801         __ cvtlsi2sd(i.OutputDoubleRegister(), i.InputRegister(0));
 802       } else {
 803         __ cvtlsi2sd(i.OutputDoubleRegister(), i.InputOperand(0));
 804       }
 805       break;
 806     case kSSEUint32ToFloat64:
 807       if (instr->InputAt(0)->IsRegister()) {
 808         __ movl(kScratchRegister, i.InputRegister(0));
 809       } else {
 810         __ movl(kScratchRegister, i.InputOperand(0));
 811       }
 812       __ cvtqsi2sd(i.OutputDoubleRegister(), kScratchRegister);
 813       break;
 814     case kSSEFloat64ExtractLowWord32:
 815       if (instr->InputAt(0)->IsDoubleStackSlot()) {
 816         __ movl(i.OutputRegister(), i.InputOperand(0));
 817       } else {
 818         __ movd(i.OutputRegister(), i.InputDoubleRegister(0));
 819       }
 820       break;
 821     case kSSEFloat64ExtractHighWord32:
 822       if (instr->InputAt(0)->IsDoubleStackSlot()) {
 823         __ movl(i.OutputRegister(), i.InputOperand(0, kDoubleSize / 2));
 824       } else {
 825         __ Pextrd(i.OutputRegister(), i.InputDoubleRegister(0), 1);
 826       }
 827       break;
 828     case kSSEFloat64InsertLowWord32:
 829       if (instr->InputAt(1)->IsRegister()) {
 830         __ Pinsrd(i.OutputDoubleRegister(), i.InputRegister(1), 0);
 831       } else {
 832         __ Pinsrd(i.OutputDoubleRegister(), i.InputOperand(1), 0);
 833       }
 834       break;
 835     case kSSEFloat64InsertHighWord32:
 836       if (instr->InputAt(1)->IsRegister()) {
 837         __ Pinsrd(i.OutputDoubleRegister(), i.InputRegister(1), 1);
 838       } else {
 839         __ Pinsrd(i.OutputDoubleRegister(), i.InputOperand(1), 1);
 840       }
 841       break;
 842     case kSSEFloat64LoadLowWord32:
 843       if (instr->InputAt(0)->IsRegister()) {
 844         __ movd(i.OutputDoubleRegister(), i.InputRegister(0));
 845       } else {
 846         __ movd(i.OutputDoubleRegister(), i.InputOperand(0));
 847       }
 848       break;
 849     case kAVXFloat64Add:
 850       ASSEMBLE_AVX_DOUBLE_BINOP(vaddsd);
 851       break;
 852     case kAVXFloat64Sub:
 853       ASSEMBLE_AVX_DOUBLE_BINOP(vsubsd);
 854       break;
 855     case kAVXFloat64Mul:
 856       ASSEMBLE_AVX_DOUBLE_BINOP(vmulsd);
 857       break;
 858     case kAVXFloat64Div:
 859       ASSEMBLE_AVX_DOUBLE_BINOP(vdivsd);
 860       break;
 861     case kX64Movsxbl:
 862       ASSEMBLE_MOVX(movsxbl);
 863       __ AssertZeroExtended(i.OutputRegister());
 864       break;
 865     case kX64Movzxbl:
 866       ASSEMBLE_MOVX(movzxbl);
 867       __ AssertZeroExtended(i.OutputRegister());
 868       break;
 869     case kX64Movb: {
 870       size_t index = 0;
 871       Operand operand = i.MemoryOperand(&index);
 872       if (HasImmediateInput(instr, index)) {
 873         __ movb(operand, Immediate(i.InputInt8(index)));
 874       } else {
 875         __ movb(operand, i.InputRegister(index));
 876       }
 877       break;
 878     }
 879     case kX64Movsxwl:
 880       ASSEMBLE_MOVX(movsxwl);
 881       __ AssertZeroExtended(i.OutputRegister());
 882       break;
 883     case kX64Movzxwl:
 884       ASSEMBLE_MOVX(movzxwl);
 885       __ AssertZeroExtended(i.OutputRegister());
 886       break;
 887     case kX64Movw: {
 888       size_t index = 0;
 889       Operand operand = i.MemoryOperand(&index);
 890       if (HasImmediateInput(instr, index)) {
 891         __ movw(operand, Immediate(i.InputInt16(index)));
 892       } else {
 893         __ movw(operand, i.InputRegister(index));
 894       }
 895       break;
 896     }
 897     case kX64Movl:
 898       if (instr->HasOutput()) {
 899         if (instr->addressing_mode() == kMode_None) {
 900           if (instr->InputAt(0)->IsRegister()) {
 901             __ movl(i.OutputRegister(), i.InputRegister(0));
 902           } else {
 903             __ movl(i.OutputRegister(), i.InputOperand(0));
 904           }
 905         } else {
 906           __ movl(i.OutputRegister(), i.MemoryOperand());
 907         }
 908         __ AssertZeroExtended(i.OutputRegister());
 909       } else {
 910         size_t index = 0;
 911         Operand operand = i.MemoryOperand(&index);
 912         if (HasImmediateInput(instr, index)) {
 913           __ movl(operand, i.InputImmediate(index));
 914         } else {
 915           __ movl(operand, i.InputRegister(index));
 916         }
 917       }
 918       break;
 919     case kX64Movsxlq:
 920       ASSEMBLE_MOVX(movsxlq);
 921       break;
 922     case kX64Movq:
 923       if (instr->HasOutput()) {
 924         __ movq(i.OutputRegister(), i.MemoryOperand());
 925       } else {
 926         size_t index = 0;
 927         Operand operand = i.MemoryOperand(&index);
 928         if (HasImmediateInput(instr, index)) {
 929           __ movq(operand, i.InputImmediate(index));
 930         } else {
 931           __ movq(operand, i.InputRegister(index));
 932         }
 933       }
 934       break;
 935     case kX64Movss:
 936       if (instr->HasOutput()) {
 937         __ movss(i.OutputDoubleRegister(), i.MemoryOperand());
 938       } else {
 939         size_t index = 0;
 940         Operand operand = i.MemoryOperand(&index);
 941         __ movss(operand, i.InputDoubleRegister(index));
 942       }
 943       break;
 944     case kX64Movsd:
 945       if (instr->HasOutput()) {
 946         __ movsd(i.OutputDoubleRegister(), i.MemoryOperand());
 947       } else {
 948         size_t index = 0;
 949         Operand operand = i.MemoryOperand(&index);
 950         __ movsd(operand, i.InputDoubleRegister(index));
 951       }
 952       break;
 953     case kX64Lea32: {
 954       AddressingMode mode = AddressingModeField::decode(instr->opcode());
 955       // Shorten "leal" to "addl", "subl" or "shll" if the register allocation
 956       // and addressing mode just happens to work out. The "addl"/"subl" forms
 957       // in these cases are faster based on measurements.
 958       if (i.InputRegister(0).is(i.OutputRegister())) {
 959         if (mode == kMode_MRI) {
 960           int32_t constant_summand = i.InputInt32(1);
 961           if (constant_summand > 0) {
 962             __ addl(i.OutputRegister(), Immediate(constant_summand));
 963           } else if (constant_summand < 0) {
 964             __ subl(i.OutputRegister(), Immediate(-constant_summand));
 965           }
 966         } else if (mode == kMode_MR1) {
 967           if (i.InputRegister(1).is(i.OutputRegister())) {
 968             __ shll(i.OutputRegister(), Immediate(1));
 969           } else {
 970             __ leal(i.OutputRegister(), i.MemoryOperand());
 971           }
 972         } else if (mode == kMode_M2) {
 973           __ shll(i.OutputRegister(), Immediate(1));
 974         } else if (mode == kMode_M4) {
 975           __ shll(i.OutputRegister(), Immediate(2));
 976         } else if (mode == kMode_M8) {
 977           __ shll(i.OutputRegister(), Immediate(3));
 978         } else {
 979           __ leal(i.OutputRegister(), i.MemoryOperand());
 980         }
 981       } else {
 982         __ leal(i.OutputRegister(), i.MemoryOperand());
 983       }
 984       __ AssertZeroExtended(i.OutputRegister());
 985       break;
 986     }
 987     case kX64Lea:
 988       __ leaq(i.OutputRegister(), i.MemoryOperand());
 989       break;
 990     case kX64Dec32:
 991       __ decl(i.OutputRegister());
 992       break;
 993     case kX64Inc32:
 994       __ incl(i.OutputRegister());
 995       break;
 996     case kX64Push:
 997       if (HasImmediateInput(instr, 0)) {
 998         __ pushq(i.InputImmediate(0));
 999       } else {
1000         if (instr->InputAt(0)->IsRegister()) {
1001           __ pushq(i.InputRegister(0));
1002         } else {
1003           __ pushq(i.InputOperand(0));
1004         }
1005       }
1006       break;
1007     case kX64StoreWriteBarrier: {
1008       Register object = i.InputRegister(0);
1009       Register index = i.InputRegister(1);
1010       Register value = i.InputRegister(2);
1011       __ movq(Operand(object, index, times_1, 0), value);
1012       __ leaq(index, Operand(object, index, times_1, 0));
1013       SaveFPRegsMode mode =
1014           frame()->DidAllocateDoubleRegisters() ? kSaveFPRegs : kDontSaveFPRegs;
1015       __ RecordWrite(object, index, value, mode);
1016       break;
1017     }
1018     case kCheckedLoadInt8:
1019       ASSEMBLE_CHECKED_LOAD_INTEGER(movsxbl);
1020       break;
1021     case kCheckedLoadUint8:
1022       ASSEMBLE_CHECKED_LOAD_INTEGER(movzxbl);
1023       break;
1024     case kCheckedLoadInt16:
1025       ASSEMBLE_CHECKED_LOAD_INTEGER(movsxwl);
1026       break;
1027     case kCheckedLoadUint16:
1028       ASSEMBLE_CHECKED_LOAD_INTEGER(movzxwl);
1029       break;
1030     case kCheckedLoadWord32:
1031       ASSEMBLE_CHECKED_LOAD_INTEGER(movl);
1032       break;
1033     case kCheckedLoadFloat32:
1034       ASSEMBLE_CHECKED_LOAD_FLOAT(movss);
1035       break;
1036     case kCheckedLoadFloat64:
1037       ASSEMBLE_CHECKED_LOAD_FLOAT(movsd);
1038       break;
1039     case kCheckedStoreWord8:
1040       ASSEMBLE_CHECKED_STORE_INTEGER(movb);
1041       break;
1042     case kCheckedStoreWord16:
1043       ASSEMBLE_CHECKED_STORE_INTEGER(movw);
1044       break;
1045     case kCheckedStoreWord32:
1046       ASSEMBLE_CHECKED_STORE_INTEGER(movl);
1047       break;
1048     case kCheckedStoreFloat32:
1049       ASSEMBLE_CHECKED_STORE_FLOAT(movss);
1050       break;
1051     case kCheckedStoreFloat64:
1052       ASSEMBLE_CHECKED_STORE_FLOAT(movsd);
1053       break;
1054   }
1055 }  // NOLINT(readability/fn_size)
1056
1057
1058 // Assembles branches after this instruction.
1059 void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
1060   X64OperandConverter i(this, instr);
1061   Label::Distance flabel_distance =
1062       branch->fallthru ? Label::kNear : Label::kFar;
1063   Label* tlabel = branch->true_label;
1064   Label* flabel = branch->false_label;
1065   switch (branch->condition) {
1066     case kUnorderedEqual:
1067       __ j(parity_even, flabel, flabel_distance);
1068     // Fall through.
1069     case kEqual:
1070       __ j(equal, tlabel);
1071       break;
1072     case kUnorderedNotEqual:
1073       __ j(parity_even, tlabel);
1074     // Fall through.
1075     case kNotEqual:
1076       __ j(not_equal, tlabel);
1077       break;
1078     case kSignedLessThan:
1079       __ j(less, tlabel);
1080       break;
1081     case kSignedGreaterThanOrEqual:
1082       __ j(greater_equal, tlabel);
1083       break;
1084     case kSignedLessThanOrEqual:
1085       __ j(less_equal, tlabel);
1086       break;
1087     case kSignedGreaterThan:
1088       __ j(greater, tlabel);
1089       break;
1090     case kUnsignedLessThan:
1091       __ j(below, tlabel);
1092       break;
1093     case kUnsignedGreaterThanOrEqual:
1094       __ j(above_equal, tlabel);
1095       break;
1096     case kUnsignedLessThanOrEqual:
1097       __ j(below_equal, tlabel);
1098       break;
1099     case kUnsignedGreaterThan:
1100       __ j(above, tlabel);
1101       break;
1102     case kOverflow:
1103       __ j(overflow, tlabel);
1104       break;
1105     case kNotOverflow:
1106       __ j(no_overflow, tlabel);
1107       break;
1108   }
1109   if (!branch->fallthru) __ jmp(flabel, flabel_distance);
1110 }
1111
1112
1113 void CodeGenerator::AssembleArchJump(RpoNumber target) {
1114   if (!IsNextInAssemblyOrder(target)) __ jmp(GetLabel(target));
1115 }
1116
1117
1118 // Assembles boolean materializations after this instruction.
1119 void CodeGenerator::AssembleArchBoolean(Instruction* instr,
1120                                         FlagsCondition condition) {
1121   X64OperandConverter i(this, instr);
1122   Label done;
1123
1124   // Materialize a full 64-bit 1 or 0 value. The result register is always the
1125   // last output of the instruction.
1126   Label check;
1127   DCHECK_NE(0u, instr->OutputCount());
1128   Register reg = i.OutputRegister(instr->OutputCount() - 1);
1129   Condition cc = no_condition;
1130   switch (condition) {
1131     case kUnorderedEqual:
1132       __ j(parity_odd, &check, Label::kNear);
1133       __ movl(reg, Immediate(0));
1134       __ jmp(&done, Label::kNear);
1135     // Fall through.
1136     case kEqual:
1137       cc = equal;
1138       break;
1139     case kUnorderedNotEqual:
1140       __ j(parity_odd, &check, Label::kNear);
1141       __ movl(reg, Immediate(1));
1142       __ jmp(&done, Label::kNear);
1143     // Fall through.
1144     case kNotEqual:
1145       cc = not_equal;
1146       break;
1147     case kSignedLessThan:
1148       cc = less;
1149       break;
1150     case kSignedGreaterThanOrEqual:
1151       cc = greater_equal;
1152       break;
1153     case kSignedLessThanOrEqual:
1154       cc = less_equal;
1155       break;
1156     case kSignedGreaterThan:
1157       cc = greater;
1158       break;
1159     case kUnsignedLessThan:
1160       cc = below;
1161       break;
1162     case kUnsignedGreaterThanOrEqual:
1163       cc = above_equal;
1164       break;
1165     case kUnsignedLessThanOrEqual:
1166       cc = below_equal;
1167       break;
1168     case kUnsignedGreaterThan:
1169       cc = above;
1170       break;
1171     case kOverflow:
1172       cc = overflow;
1173       break;
1174     case kNotOverflow:
1175       cc = no_overflow;
1176       break;
1177   }
1178   __ bind(&check);
1179   __ setcc(cc, reg);
1180   __ movzxbl(reg, reg);
1181   __ bind(&done);
1182 }
1183
1184
1185 void CodeGenerator::AssembleArchLookupSwitch(Instruction* instr) {
1186   X64OperandConverter i(this, instr);
1187   Register input = i.InputRegister(0);
1188   for (size_t index = 2; index < instr->InputCount(); index += 2) {
1189     __ cmpl(input, Immediate(i.InputInt32(index + 0)));
1190     __ j(equal, GetLabel(i.InputRpo(index + 1)));
1191   }
1192   AssembleArchJump(i.InputRpo(1));
1193 }
1194
1195
1196 void CodeGenerator::AssembleArchTableSwitch(Instruction* instr) {
1197   X64OperandConverter i(this, instr);
1198   Register input = i.InputRegister(0);
1199   int32_t const case_count = static_cast<int32_t>(instr->InputCount() - 2);
1200   Label** cases = zone()->NewArray<Label*>(case_count);
1201   for (int32_t index = 0; index < case_count; ++index) {
1202     cases[index] = GetLabel(i.InputRpo(index + 2));
1203   }
1204   Label* const table = AddJumpTable(cases, case_count);
1205   __ cmpl(input, Immediate(case_count));
1206   __ j(above_equal, GetLabel(i.InputRpo(1)));
1207   __ leaq(kScratchRegister, Operand(table));
1208   __ jmp(Operand(kScratchRegister, input, times_8, 0));
1209 }
1210
1211
1212 void CodeGenerator::AssembleDeoptimizerCall(
1213     int deoptimization_id, Deoptimizer::BailoutType bailout_type) {
1214   Address deopt_entry = Deoptimizer::GetDeoptimizationEntry(
1215       isolate(), deoptimization_id, bailout_type);
1216   __ call(deopt_entry, RelocInfo::RUNTIME_ENTRY);
1217 }
1218
1219
1220 void CodeGenerator::AssemblePrologue() {
1221   CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
1222   int stack_slots = frame()->GetSpillSlotCount();
1223   if (descriptor->kind() == CallDescriptor::kCallAddress) {
1224     __ pushq(rbp);
1225     __ movq(rbp, rsp);
1226     const RegList saves = descriptor->CalleeSavedRegisters();
1227     if (saves != 0) {  // Save callee-saved registers.
1228       int register_save_area_size = 0;
1229       for (int i = Register::kNumRegisters - 1; i >= 0; i--) {
1230         if (!((1 << i) & saves)) continue;
1231         __ pushq(Register::from_code(i));
1232         register_save_area_size += kPointerSize;
1233       }
1234       frame()->SetRegisterSaveAreaSize(register_save_area_size);
1235     }
1236   } else if (descriptor->IsJSFunctionCall()) {
1237     CompilationInfo* info = this->info();
1238     __ Prologue(info->IsCodePreAgingActive());
1239     frame()->SetRegisterSaveAreaSize(
1240         StandardFrameConstants::kFixedFrameSizeFromFp);
1241   } else if (stack_slots > 0) {
1242     __ StubPrologue();
1243     frame()->SetRegisterSaveAreaSize(
1244         StandardFrameConstants::kFixedFrameSizeFromFp);
1245   }
1246
1247   if (info()->is_osr()) {
1248     // TurboFan OSR-compiled functions cannot be entered directly.
1249     __ Abort(kShouldNotDirectlyEnterOsrFunction);
1250
1251     // Unoptimized code jumps directly to this entrypoint while the unoptimized
1252     // frame is still on the stack. Optimized code uses OSR values directly from
1253     // the unoptimized frame. Thus, all that needs to be done is to allocate the
1254     // remaining stack slots.
1255     if (FLAG_code_comments) __ RecordComment("-- OSR entrypoint --");
1256     osr_pc_offset_ = __ pc_offset();
1257     DCHECK(stack_slots >= frame()->GetOsrStackSlotCount());
1258     stack_slots -= frame()->GetOsrStackSlotCount();
1259   }
1260
1261   if (stack_slots > 0) {
1262     __ subq(rsp, Immediate(stack_slots * kPointerSize));
1263   }
1264 }
1265
1266
1267 void CodeGenerator::AssembleReturn() {
1268   CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
1269   int stack_slots = frame()->GetSpillSlotCount();
1270   if (descriptor->kind() == CallDescriptor::kCallAddress) {
1271     if (frame()->GetRegisterSaveAreaSize() > 0) {
1272       // Remove this frame's spill slots first.
1273       if (stack_slots > 0) {
1274         __ addq(rsp, Immediate(stack_slots * kPointerSize));
1275       }
1276       const RegList saves = descriptor->CalleeSavedRegisters();
1277       // Restore registers.
1278       if (saves != 0) {
1279         for (int i = 0; i < Register::kNumRegisters; i++) {
1280           if (!((1 << i) & saves)) continue;
1281           __ popq(Register::from_code(i));
1282         }
1283       }
1284       __ popq(rbp);  // Pop caller's frame pointer.
1285       __ ret(0);
1286     } else {
1287       // No saved registers.
1288       __ movq(rsp, rbp);  // Move stack pointer back to frame pointer.
1289       __ popq(rbp);       // Pop caller's frame pointer.
1290       __ ret(0);
1291     }
1292   } else if (descriptor->IsJSFunctionCall() || stack_slots > 0) {
1293     __ movq(rsp, rbp);  // Move stack pointer back to frame pointer.
1294     __ popq(rbp);       // Pop caller's frame pointer.
1295     int pop_count = descriptor->IsJSFunctionCall()
1296                         ? static_cast<int>(descriptor->JSParameterCount())
1297                         : 0;
1298     __ ret(pop_count * kPointerSize);
1299   } else {
1300     __ ret(0);
1301   }
1302 }
1303
1304
1305 void CodeGenerator::AssembleMove(InstructionOperand* source,
1306                                  InstructionOperand* destination) {
1307   X64OperandConverter g(this, NULL);
1308   // Dispatch on the source and destination operand kinds.  Not all
1309   // combinations are possible.
1310   if (source->IsRegister()) {
1311     DCHECK(destination->IsRegister() || destination->IsStackSlot());
1312     Register src = g.ToRegister(source);
1313     if (destination->IsRegister()) {
1314       __ movq(g.ToRegister(destination), src);
1315     } else {
1316       __ movq(g.ToOperand(destination), src);
1317     }
1318   } else if (source->IsStackSlot()) {
1319     DCHECK(destination->IsRegister() || destination->IsStackSlot());
1320     Operand src = g.ToOperand(source);
1321     if (destination->IsRegister()) {
1322       Register dst = g.ToRegister(destination);
1323       __ movq(dst, src);
1324     } else {
1325       // Spill on demand to use a temporary register for memory-to-memory
1326       // moves.
1327       Register tmp = kScratchRegister;
1328       Operand dst = g.ToOperand(destination);
1329       __ movq(tmp, src);
1330       __ movq(dst, tmp);
1331     }
1332   } else if (source->IsConstant()) {
1333     ConstantOperand* constant_source = ConstantOperand::cast(source);
1334     Constant src = g.ToConstant(constant_source);
1335     if (destination->IsRegister() || destination->IsStackSlot()) {
1336       Register dst = destination->IsRegister() ? g.ToRegister(destination)
1337                                                : kScratchRegister;
1338       switch (src.type()) {
1339         case Constant::kInt32:
1340           // TODO(dcarney): don't need scratch in this case.
1341           __ Set(dst, src.ToInt32());
1342           break;
1343         case Constant::kInt64:
1344           __ Set(dst, src.ToInt64());
1345           break;
1346         case Constant::kFloat32:
1347           __ Move(dst,
1348                   isolate()->factory()->NewNumber(src.ToFloat32(), TENURED));
1349           break;
1350         case Constant::kFloat64:
1351           __ Move(dst,
1352                   isolate()->factory()->NewNumber(src.ToFloat64(), TENURED));
1353           break;
1354         case Constant::kExternalReference:
1355           __ Move(dst, src.ToExternalReference());
1356           break;
1357         case Constant::kHeapObject: {
1358           Handle<HeapObject> src_object = src.ToHeapObject();
1359           if (info()->IsOptimizing() &&
1360               src_object.is_identical_to(info()->context())) {
1361             // Loading the context from the frame is way cheaper than
1362             // materializing the actual context heap object address.
1363             __ movp(dst, Operand(rbp, StandardFrameConstants::kContextOffset));
1364           } else {
1365             __ Move(dst, src_object);
1366           }
1367           break;
1368         }
1369         case Constant::kRpoNumber:
1370           UNREACHABLE();  // TODO(dcarney): load of labels on x64.
1371           break;
1372       }
1373       if (destination->IsStackSlot()) {
1374         __ movq(g.ToOperand(destination), kScratchRegister);
1375       }
1376     } else if (src.type() == Constant::kFloat32) {
1377       // TODO(turbofan): Can we do better here?
1378       uint32_t src_const = bit_cast<uint32_t>(src.ToFloat32());
1379       if (destination->IsDoubleRegister()) {
1380         __ Move(g.ToDoubleRegister(destination), src_const);
1381       } else {
1382         DCHECK(destination->IsDoubleStackSlot());
1383         Operand dst = g.ToOperand(destination);
1384         __ movl(dst, Immediate(src_const));
1385       }
1386     } else {
1387       DCHECK_EQ(Constant::kFloat64, src.type());
1388       uint64_t src_const = bit_cast<uint64_t>(src.ToFloat64());
1389       if (destination->IsDoubleRegister()) {
1390         __ Move(g.ToDoubleRegister(destination), src_const);
1391       } else {
1392         DCHECK(destination->IsDoubleStackSlot());
1393         __ movq(kScratchRegister, src_const);
1394         __ movq(g.ToOperand(destination), kScratchRegister);
1395       }
1396     }
1397   } else if (source->IsDoubleRegister()) {
1398     XMMRegister src = g.ToDoubleRegister(source);
1399     if (destination->IsDoubleRegister()) {
1400       XMMRegister dst = g.ToDoubleRegister(destination);
1401       __ movaps(dst, src);
1402     } else {
1403       DCHECK(destination->IsDoubleStackSlot());
1404       Operand dst = g.ToOperand(destination);
1405       __ movsd(dst, src);
1406     }
1407   } else if (source->IsDoubleStackSlot()) {
1408     DCHECK(destination->IsDoubleRegister() || destination->IsDoubleStackSlot());
1409     Operand src = g.ToOperand(source);
1410     if (destination->IsDoubleRegister()) {
1411       XMMRegister dst = g.ToDoubleRegister(destination);
1412       __ movsd(dst, src);
1413     } else {
1414       // We rely on having xmm0 available as a fixed scratch register.
1415       Operand dst = g.ToOperand(destination);
1416       __ movsd(xmm0, src);
1417       __ movsd(dst, xmm0);
1418     }
1419   } else {
1420     UNREACHABLE();
1421   }
1422 }
1423
1424
1425 void CodeGenerator::AssembleSwap(InstructionOperand* source,
1426                                  InstructionOperand* destination) {
1427   X64OperandConverter g(this, NULL);
1428   // Dispatch on the source and destination operand kinds.  Not all
1429   // combinations are possible.
1430   if (source->IsRegister() && destination->IsRegister()) {
1431     // Register-register.
1432     __ xchgq(g.ToRegister(source), g.ToRegister(destination));
1433   } else if (source->IsRegister() && destination->IsStackSlot()) {
1434     Register src = g.ToRegister(source);
1435     Operand dst = g.ToOperand(destination);
1436     __ xchgq(src, dst);
1437   } else if ((source->IsStackSlot() && destination->IsStackSlot()) ||
1438              (source->IsDoubleStackSlot() &&
1439               destination->IsDoubleStackSlot())) {
1440     // Memory-memory.
1441     Register tmp = kScratchRegister;
1442     Operand src = g.ToOperand(source);
1443     Operand dst = g.ToOperand(destination);
1444     __ movq(tmp, dst);
1445     __ xchgq(tmp, src);
1446     __ movq(dst, tmp);
1447   } else if (source->IsDoubleRegister() && destination->IsDoubleRegister()) {
1448     // XMM register-register swap. We rely on having xmm0
1449     // available as a fixed scratch register.
1450     XMMRegister src = g.ToDoubleRegister(source);
1451     XMMRegister dst = g.ToDoubleRegister(destination);
1452     __ movaps(xmm0, src);
1453     __ movaps(src, dst);
1454     __ movaps(dst, xmm0);
1455   } else if (source->IsDoubleRegister() && destination->IsDoubleStackSlot()) {
1456     // XMM register-memory swap.  We rely on having xmm0
1457     // available as a fixed scratch register.
1458     XMMRegister src = g.ToDoubleRegister(source);
1459     Operand dst = g.ToOperand(destination);
1460     __ movsd(xmm0, src);
1461     __ movsd(src, dst);
1462     __ movsd(dst, xmm0);
1463   } else {
1464     // No other combinations are possible.
1465     UNREACHABLE();
1466   }
1467 }
1468
1469
1470 void CodeGenerator::AssembleJumpTable(Label** targets, size_t target_count) {
1471   for (size_t index = 0; index < target_count; ++index) {
1472     __ dq(targets[index]);
1473   }
1474 }
1475
1476
1477 void CodeGenerator::AddNopForSmiCodeInlining() { __ nop(); }
1478
1479
1480 void CodeGenerator::EnsureSpaceForLazyDeopt() {
1481   int space_needed = Deoptimizer::patch_size();
1482   if (!info()->IsStub()) {
1483     // Ensure that we have enough space after the previous lazy-bailout
1484     // instruction for patching the code here.
1485     int current_pc = masm()->pc_offset();
1486     if (current_pc < last_lazy_deopt_pc_ + space_needed) {
1487       int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc;
1488       __ Nop(padding_size);
1489     }
1490   }
1491   MarkLazyDeoptSite();
1492 }
1493
1494 #undef __
1495
1496 }  // namespace internal
1497 }  // namespace compiler
1498 }  // namespace v8