src/compiler/x64/code-generator-x64.cc

   1 // Copyright 2013 the V8 project authors. All rights reserved.
   2 // Use of this source code is governed by a BSD-style license that can be
   3 // found in the LICENSE file.
   4
   5 #include "src/compiler/code-generator.h"
   6
   7 #include "src/compiler/code-generator-impl.h"
   8 #include "src/compiler/gap-resolver.h"
   9 #include "src/compiler/node-matchers.h"
  10 #include "src/scopes.h"
  11 #include "src/x64/assembler-x64.h"
  12 #include "src/x64/macro-assembler-x64.h"
  13
  14 namespace v8 {
  15 namespace internal {
  16 namespace compiler {
  17
  18 #define __ masm()->
  19
  20
  21 #define kScratchDoubleReg xmm0
  22
  23
  24 // Adds X64 specific methods for decoding operands.
  25 class X64OperandConverter : public InstructionOperandConverter {
  26  public:
  27   X64OperandConverter(CodeGenerator* gen, Instruction* instr)
  28       : InstructionOperandConverter(gen, instr) {}
  29
  30   Immediate InputImmediate(size_t index) {
  31     return ToImmediate(instr_->InputAt(index));
  32   }
  33
  34   Operand InputOperand(size_t index, int extra = 0) {
  35     return ToOperand(instr_->InputAt(index), extra);
  36   }
  37
  38   Operand OutputOperand() { return ToOperand(instr_->Output()); }
  39
  40   Immediate ToImmediate(InstructionOperand* operand) {
  41     return Immediate(ToConstant(operand).ToInt32());
  42   }
  43
  44   Operand ToOperand(InstructionOperand* op, int extra = 0) {
  45     DCHECK(op->IsStackSlot() || op->IsDoubleStackSlot());
  46     // The linkage computes where all spill slots are located.
  47     FrameOffset offset = linkage()->GetFrameOffset(
  48         AllocatedOperand::cast(op)->index(), frame(), extra);
  49     return Operand(offset.from_stack_pointer() ? rsp : rbp, offset.offset());
  50   }
  51
  52   static size_t NextOffset(size_t* offset) {
  53     size_t i = *offset;
  54     (*offset)++;
  55     return i;
  56   }
  57
  58   static ScaleFactor ScaleFor(AddressingMode one, AddressingMode mode) {
  59     STATIC_ASSERT(0 == static_cast<int>(times_1));
  60     STATIC_ASSERT(1 == static_cast<int>(times_2));
  61     STATIC_ASSERT(2 == static_cast<int>(times_4));
  62     STATIC_ASSERT(3 == static_cast<int>(times_8));
  63     int scale = static_cast<int>(mode - one);
  64     DCHECK(scale >= 0 && scale < 4);
  65     return static_cast<ScaleFactor>(scale);
  66   }
  67
  68   Operand MemoryOperand(size_t* offset) {
  69     AddressingMode mode = AddressingModeField::decode(instr_->opcode());
  70     switch (mode) {
  71       case kMode_MR: {
  72         Register base = InputRegister(NextOffset(offset));
  73         int32_t disp = 0;
  74         return Operand(base, disp);
  75       }
  76       case kMode_MRI: {
  77         Register base = InputRegister(NextOffset(offset));
  78         int32_t disp = InputInt32(NextOffset(offset));
  79         return Operand(base, disp);
  80       }
  81       case kMode_MR1:
  82       case kMode_MR2:
  83       case kMode_MR4:
  84       case kMode_MR8: {
  85         Register base = InputRegister(NextOffset(offset));
  86         Register index = InputRegister(NextOffset(offset));
  87         ScaleFactor scale = ScaleFor(kMode_MR1, mode);
  88         int32_t disp = 0;
  89         return Operand(base, index, scale, disp);
  90       }
  91       case kMode_MR1I:
  92       case kMode_MR2I:
  93       case kMode_MR4I:
  94       case kMode_MR8I: {
  95         Register base = InputRegister(NextOffset(offset));
  96         Register index = InputRegister(NextOffset(offset));
  97         ScaleFactor scale = ScaleFor(kMode_MR1I, mode);
  98         int32_t disp = InputInt32(NextOffset(offset));
  99         return Operand(base, index, scale, disp);
 100       }
 101       case kMode_M1: {
 102         Register base = InputRegister(NextOffset(offset));
 103         int32_t disp = 0;
 104         return Operand(base, disp);
 105       }
 106       case kMode_M2:
 107         UNREACHABLE();  // Should use kModeMR with more compact encoding instead
 108         return Operand(no_reg, 0);
 109       case kMode_M4:
 110       case kMode_M8: {
 111         Register index = InputRegister(NextOffset(offset));
 112         ScaleFactor scale = ScaleFor(kMode_M1, mode);
 113         int32_t disp = 0;
 114         return Operand(index, scale, disp);
 115       }
 116       case kMode_M1I:
 117       case kMode_M2I:
 118       case kMode_M4I:
 119       case kMode_M8I: {
 120         Register index = InputRegister(NextOffset(offset));
 121         ScaleFactor scale = ScaleFor(kMode_M1I, mode);
 122         int32_t disp = InputInt32(NextOffset(offset));
 123         return Operand(index, scale, disp);
 124       }
 125       case kMode_None:
 126         UNREACHABLE();
 127         return Operand(no_reg, 0);
 128     }
 129     UNREACHABLE();
 130     return Operand(no_reg, 0);
 131   }
 132
 133   Operand MemoryOperand(size_t first_input = 0) {
 134     return MemoryOperand(&first_input);
 135   }
 136 };
 137
 138
 139 namespace {
 140
 141 bool HasImmediateInput(Instruction* instr, size_t index) {
 142   return instr->InputAt(index)->IsImmediate();
 143 }
 144
 145
 146 class OutOfLineLoadZero FINAL : public OutOfLineCode {
 147  public:
 148   OutOfLineLoadZero(CodeGenerator* gen, Register result)
 149       : OutOfLineCode(gen), result_(result) {}
 150
 151   void Generate() FINAL { __ xorl(result_, result_); }
 152
 153  private:
 154   Register const result_;
 155 };
 156
 157
 158 class OutOfLineLoadNaN FINAL : public OutOfLineCode {
 159  public:
 160   OutOfLineLoadNaN(CodeGenerator* gen, XMMRegister result)
 161       : OutOfLineCode(gen), result_(result) {}
 162
 163   void Generate() FINAL { __ pcmpeqd(result_, result_); }
 164
 165  private:
 166   XMMRegister const result_;
 167 };
 168
 169
 170 class OutOfLineTruncateDoubleToI FINAL : public OutOfLineCode {
 171  public:
 172   OutOfLineTruncateDoubleToI(CodeGenerator* gen, Register result,
 173                              XMMRegister input)
 174       : OutOfLineCode(gen), result_(result), input_(input) {}
 175
 176   void Generate() FINAL {
 177     __ subp(rsp, Immediate(kDoubleSize));
 178     __ movsd(MemOperand(rsp, 0), input_);
 179     __ SlowTruncateToI(result_, rsp, 0);
 180     __ addp(rsp, Immediate(kDoubleSize));
 181   }
 182
 183  private:
 184   Register const result_;
 185   XMMRegister const input_;
 186 };
 187
 188 }  // namespace
 189
 190
 191 #define ASSEMBLE_UNOP(asm_instr)         \
 192   do {                                   \
 193     if (instr->Output()->IsRegister()) { \
 194       __ asm_instr(i.OutputRegister());  \
 195     } else {                             \
 196       __ asm_instr(i.OutputOperand());   \
 197     }                                    \
 198   } while (0)
 199
 200
 201 #define ASSEMBLE_BINOP(asm_instr)                              \
 202   do {                                                         \
 203     if (HasImmediateInput(instr, 1)) {                         \
 204       if (instr->InputAt(0)->IsRegister()) {                   \
 205         __ asm_instr(i.InputRegister(0), i.InputImmediate(1)); \
 206       } else {                                                 \
 207         __ asm_instr(i.InputOperand(0), i.InputImmediate(1));  \
 208       }                                                        \
 209     } else {                                                   \
 210       if (instr->InputAt(1)->IsRegister()) {                   \
 211         __ asm_instr(i.InputRegister(0), i.InputRegister(1));  \
 212       } else {                                                 \
 213         __ asm_instr(i.InputRegister(0), i.InputOperand(1));   \
 214       }                                                        \
 215     }                                                          \
 216   } while (0)
 217
 218
 219 #define ASSEMBLE_MULT(asm_instr)                              \
 220   do {                                                        \
 221     if (HasImmediateInput(instr, 1)) {                        \
 222       if (instr->InputAt(0)->IsRegister()) {                  \
 223         __ asm_instr(i.OutputRegister(), i.InputRegister(0),  \
 224                      i.InputImmediate(1));                    \
 225       } else {                                                \
 226         __ asm_instr(i.OutputRegister(), i.InputOperand(0),   \
 227                      i.InputImmediate(1));                    \
 228       }                                                       \
 229     } else {                                                  \
 230       if (instr->InputAt(1)->IsRegister()) {                  \
 231         __ asm_instr(i.OutputRegister(), i.InputRegister(1)); \
 232       } else {                                                \
 233         __ asm_instr(i.OutputRegister(), i.InputOperand(1));  \
 234       }                                                       \
 235     }                                                         \
 236   } while (0)
 237
 238
 239 #define ASSEMBLE_SHIFT(asm_instr, width)                                   \
 240   do {                                                                     \
 241     if (HasImmediateInput(instr, 1)) {                                     \
 242       if (instr->Output()->IsRegister()) {                                 \
 243         __ asm_instr(i.OutputRegister(), Immediate(i.InputInt##width(1))); \
 244       } else {                                                             \
 245         __ asm_instr(i.OutputOperand(), Immediate(i.InputInt##width(1)));  \
 246       }                                                                    \
 247     } else {                                                               \
 248       if (instr->Output()->IsRegister()) {                                 \
 249         __ asm_instr##_cl(i.OutputRegister());                             \
 250       } else {                                                             \
 251         __ asm_instr##_cl(i.OutputOperand());                              \
 252       }                                                                    \
 253     }                                                                      \
 254   } while (0)
 255
 256
 257 #define ASSEMBLE_MOVX(asm_instr)                            \
 258   do {                                                      \
 259     if (instr->addressing_mode() != kMode_None) {           \
 260       __ asm_instr(i.OutputRegister(), i.MemoryOperand());  \
 261     } else if (instr->InputAt(0)->IsRegister()) {           \
 262       __ asm_instr(i.OutputRegister(), i.InputRegister(0)); \
 263     } else {                                                \
 264       __ asm_instr(i.OutputRegister(), i.InputOperand(0));  \
 265     }                                                       \
 266   } while (0)
 267
 268
 269 #define ASSEMBLE_SSE_BINOP(asm_instr)                                   \
 270   do {                                                                  \
 271     if (instr->InputAt(1)->IsDoubleRegister()) {                        \
 272       __ asm_instr(i.InputDoubleRegister(0), i.InputDoubleRegister(1)); \
 273     } else {                                                            \
 274       __ asm_instr(i.InputDoubleRegister(0), i.InputOperand(1));        \
 275     }                                                                   \
 276   } while (0)
 277
 278
 279 #define ASSEMBLE_SSE_UNOP(asm_instr)                                    \
 280   do {                                                                  \
 281     if (instr->InputAt(0)->IsDoubleRegister()) {                        \
 282       __ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
 283     } else {                                                            \
 284       __ asm_instr(i.OutputDoubleRegister(), i.InputOperand(0));        \
 285     }                                                                   \
 286   } while (0)
 287
 288
 289 #define ASSEMBLE_AVX_BINOP(asm_instr)                                  \
 290   do {                                                                 \
 291     CpuFeatureScope avx_scope(masm(), AVX);                            \
 292     if (instr->InputAt(1)->IsDoubleRegister()) {                       \
 293       __ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0), \
 294                    i.InputDoubleRegister(1));                          \
 295     } else {                                                           \
 296       __ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0), \
 297                    i.InputOperand(1));                                 \
 298     }                                                                  \
 299   } while (0)
 300
 301
 302 #define ASSEMBLE_CHECKED_LOAD_FLOAT(asm_instr)                               \
 303   do {                                                                       \
 304     auto result = i.OutputDoubleRegister();                                  \
 305     auto buffer = i.InputRegister(0);                                        \
 306     auto index1 = i.InputRegister(1);                                        \
 307     auto index2 = i.InputInt32(2);                                           \
 308     OutOfLineCode* ool;                                                      \
 309     if (instr->InputAt(3)->IsRegister()) {                                   \
 310       auto length = i.InputRegister(3);                                      \
 311       DCHECK_EQ(0, index2);                                                  \
 312       __ cmpl(index1, length);                                               \
 313       ool = new (zone()) OutOfLineLoadNaN(this, result);                     \
 314     } else {                                                                 \
 315       auto length = i.InputInt32(3);                                         \
 316       DCHECK_LE(index2, length);                                             \
 317       __ cmpq(index1, Immediate(length - index2));                           \
 318       class OutOfLineLoadFloat FINAL : public OutOfLineCode {                \
 319        public:                                                               \
 320         OutOfLineLoadFloat(CodeGenerator* gen, XMMRegister result,           \
 321                            Register buffer, Register index1, int32_t index2, \
 322                            int32_t length)                                   \
 323             : OutOfLineCode(gen),                                            \
 324               result_(result),                                               \
 325               buffer_(buffer),                                               \
 326               index1_(index1),                                               \
 327               index2_(index2),                                               \
 328               length_(length) {}                                             \
 329                                                                              \
 330         void Generate() FINAL {                                              \
 331           __ leal(kScratchRegister, Operand(index1_, index2_));              \
 332           __ pcmpeqd(result_, result_);                                      \
 333           __ cmpl(kScratchRegister, Immediate(length_));                     \
 334           __ j(above_equal, exit());                                         \
 335           __ asm_instr(result_,                                              \
 336                        Operand(buffer_, kScratchRegister, times_1, 0));      \
 337         }                                                                    \
 338                                                                              \
 339        private:                                                              \
 340         XMMRegister const result_;                                           \
 341         Register const buffer_;                                              \
 342         Register const index1_;                                              \
 343         int32_t const index2_;                                               \
 344         int32_t const length_;                                               \
 345       };                                                                     \
 346       ool = new (zone())                                                     \
 347           OutOfLineLoadFloat(this, result, buffer, index1, index2, length);  \
 348     }                                                                        \
 349     __ j(above_equal, ool->entry());                                         \
 350     __ asm_instr(result, Operand(buffer, index1, times_1, index2));          \
 351     __ bind(ool->exit());                                                    \
 352   } while (false)
 353
 354
 355 #define ASSEMBLE_CHECKED_LOAD_INTEGER(asm_instr)                               \
 356   do {                                                                         \
 357     auto result = i.OutputRegister();                                          \
 358     auto buffer = i.InputRegister(0);                                          \
 359     auto index1 = i.InputRegister(1);                                          \
 360     auto index2 = i.InputInt32(2);                                             \
 361     OutOfLineCode* ool;                                                        \
 362     if (instr->InputAt(3)->IsRegister()) {                                     \
 363       auto length = i.InputRegister(3);                                        \
 364       DCHECK_EQ(0, index2);                                                    \
 365       __ cmpl(index1, length);                                                 \
 366       ool = new (zone()) OutOfLineLoadZero(this, result);                      \
 367     } else {                                                                   \
 368       auto length = i.InputInt32(3);                                           \
 369       DCHECK_LE(index2, length);                                               \
 370       __ cmpq(index1, Immediate(length - index2));                             \
 371       class OutOfLineLoadInteger FINAL : public OutOfLineCode {                \
 372        public:                                                                 \
 373         OutOfLineLoadInteger(CodeGenerator* gen, Register result,              \
 374                              Register buffer, Register index1, int32_t index2, \
 375                              int32_t length)                                   \
 376             : OutOfLineCode(gen),                                              \
 377               result_(result),                                                 \
 378               buffer_(buffer),                                                 \
 379               index1_(index1),                                                 \
 380               index2_(index2),                                                 \
 381               length_(length) {}                                               \
 382                                                                                \
 383         void Generate() FINAL {                                                \
 384           Label oob;                                                           \
 385           __ leal(kScratchRegister, Operand(index1_, index2_));                \
 386           __ cmpl(kScratchRegister, Immediate(length_));                       \
 387           __ j(above_equal, &oob, Label::kNear);                               \
 388           __ asm_instr(result_,                                                \
 389                        Operand(buffer_, kScratchRegister, times_1, 0));        \
 390           __ jmp(exit());                                                      \
 391           __ bind(&oob);                                                       \
 392           __ xorl(result_, result_);                                           \
 393         }                                                                      \
 394                                                                                \
 395        private:                                                                \
 396         Register const result_;                                                \
 397         Register const buffer_;                                                \
 398         Register const index1_;                                                \
 399         int32_t const index2_;                                                 \
 400         int32_t const length_;                                                 \
 401       };                                                                       \
 402       ool = new (zone())                                                       \
 403           OutOfLineLoadInteger(this, result, buffer, index1, index2, length);  \
 404     }                                                                          \
 405     __ j(above_equal, ool->entry());                                           \
 406     __ asm_instr(result, Operand(buffer, index1, times_1, index2));            \
 407     __ bind(ool->exit());                                                      \
 408   } while (false)
 409
 410
 411 #define ASSEMBLE_CHECKED_STORE_FLOAT(asm_instr)                              \
 412   do {                                                                       \
 413     auto buffer = i.InputRegister(0);                                        \
 414     auto index1 = i.InputRegister(1);                                        \
 415     auto index2 = i.InputInt32(2);                                           \
 416     auto value = i.InputDoubleRegister(4);                                   \
 417     if (instr->InputAt(3)->IsRegister()) {                                   \
 418       auto length = i.InputRegister(3);                                      \
 419       DCHECK_EQ(0, index2);                                                  \
 420       Label done;                                                            \
 421       __ cmpl(index1, length);                                               \
 422       __ j(above_equal, &done, Label::kNear);                                \
 423       __ asm_instr(Operand(buffer, index1, times_1, index2), value);         \
 424       __ bind(&done);                                                        \
 425     } else {                                                                 \
 426       auto length = i.InputInt32(3);                                         \
 427       DCHECK_LE(index2, length);                                             \
 428       __ cmpq(index1, Immediate(length - index2));                           \
 429       class OutOfLineStoreFloat FINAL : public OutOfLineCode {               \
 430        public:                                                               \
 431         OutOfLineStoreFloat(CodeGenerator* gen, Register buffer,             \
 432                             Register index1, int32_t index2, int32_t length, \
 433                             XMMRegister value)                               \
 434             : OutOfLineCode(gen),                                            \
 435               buffer_(buffer),                                               \
 436               index1_(index1),                                               \
 437               index2_(index2),                                               \
 438               length_(length),                                               \
 439               value_(value) {}                                               \
 440                                                                              \
 441         void Generate() FINAL {                                              \
 442           __ leal(kScratchRegister, Operand(index1_, index2_));              \
 443           __ cmpl(kScratchRegister, Immediate(length_));                     \
 444           __ j(above_equal, exit());                                         \
 445           __ asm_instr(Operand(buffer_, kScratchRegister, times_1, 0),       \
 446                        value_);                                              \
 447         }                                                                    \
 448                                                                              \
 449        private:                                                              \
 450         Register const buffer_;                                              \
 451         Register const index1_;                                              \
 452         int32_t const index2_;                                               \
 453         int32_t const length_;                                               \
 454         XMMRegister const value_;                                            \
 455       };                                                                     \
 456       auto ool = new (zone())                                                \
 457           OutOfLineStoreFloat(this, buffer, index1, index2, length, value);  \
 458       __ j(above_equal, ool->entry());                                       \
 459       __ asm_instr(Operand(buffer, index1, times_1, index2), value);         \
 460       __ bind(ool->exit());                                                  \
 461     }                                                                        \
 462   } while (false)
 463
 464
 465 #define ASSEMBLE_CHECKED_STORE_INTEGER_IMPL(asm_instr, Value)                  \
 466   do {                                                                         \
 467     auto buffer = i.InputRegister(0);                                          \
 468     auto index1 = i.InputRegister(1);                                          \
 469     auto index2 = i.InputInt32(2);                                             \
 470     if (instr->InputAt(3)->IsRegister()) {                                     \
 471       auto length = i.InputRegister(3);                                        \
 472       DCHECK_EQ(0, index2);                                                    \
 473       Label done;                                                              \
 474       __ cmpl(index1, length);                                                 \
 475       __ j(above_equal, &done, Label::kNear);                                  \
 476       __ asm_instr(Operand(buffer, index1, times_1, index2), value);           \
 477       __ bind(&done);                                                          \
 478     } else {                                                                   \
 479       auto length = i.InputInt32(3);                                           \
 480       DCHECK_LE(index2, length);                                               \
 481       __ cmpq(index1, Immediate(length - index2));                             \
 482       class OutOfLineStoreInteger FINAL : public OutOfLineCode {               \
 483        public:                                                                 \
 484         OutOfLineStoreInteger(CodeGenerator* gen, Register buffer,             \
 485                               Register index1, int32_t index2, int32_t length, \
 486                               Value value)                                     \
 487             : OutOfLineCode(gen),                                              \
 488               buffer_(buffer),                                                 \
 489               index1_(index1),                                                 \
 490               index2_(index2),                                                 \
 491               length_(length),                                                 \
 492               value_(value) {}                                                 \
 493                                                                                \
 494         void Generate() FINAL {                                                \
 495           __ leal(kScratchRegister, Operand(index1_, index2_));                \
 496           __ cmpl(kScratchRegister, Immediate(length_));                       \
 497           __ j(above_equal, exit());                                           \
 498           __ asm_instr(Operand(buffer_, kScratchRegister, times_1, 0),         \
 499                        value_);                                                \
 500         }                                                                      \
 501                                                                                \
 502        private:                                                                \
 503         Register const buffer_;                                                \
 504         Register const index1_;                                                \
 505         int32_t const index2_;                                                 \
 506         int32_t const length_;                                                 \
 507         Value const value_;                                                    \
 508       };                                                                       \
 509       auto ool = new (zone())                                                  \
 510           OutOfLineStoreInteger(this, buffer, index1, index2, length, value);  \
 511       __ j(above_equal, ool->entry());                                         \
 512       __ asm_instr(Operand(buffer, index1, times_1, index2), value);           \
 513       __ bind(ool->exit());                                                    \
 514     }                                                                          \
 515   } while (false)
 516
 517
 518 #define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr)                \
 519   do {                                                           \
 520     if (instr->InputAt(4)->IsRegister()) {                       \
 521       Register value = i.InputRegister(4);                       \
 522       ASSEMBLE_CHECKED_STORE_INTEGER_IMPL(asm_instr, Register);  \
 523     } else {                                                     \
 524       Immediate value = i.InputImmediate(4);                     \
 525       ASSEMBLE_CHECKED_STORE_INTEGER_IMPL(asm_instr, Immediate); \
 526     }                                                            \
 527   } while (false)
 528
 529
 530 // Assembles an instruction after register allocation, producing machine code.
 531 void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
 532   X64OperandConverter i(this, instr);
 533
 534   switch (ArchOpcodeField::decode(instr->opcode())) {
 535     case kArchCallCodeObject: {
 536       EnsureSpaceForLazyDeopt();
 537       if (HasImmediateInput(instr, 0)) {
 538         Handle<Code> code = Handle<Code>::cast(i.InputHeapObject(0));
 539         __ Call(code, RelocInfo::CODE_TARGET);
 540       } else {
 541         Register reg = i.InputRegister(0);
 542         int entry = Code::kHeaderSize - kHeapObjectTag;
 543         __ Call(Operand(reg, entry));
 544       }
 545       RecordCallPosition(instr);
 546       break;
 547     }
 548     case kArchCallJSFunction: {
 549       EnsureSpaceForLazyDeopt();
 550       Register func = i.InputRegister(0);
 551       if (FLAG_debug_code) {
 552         // Check the function's context matches the context argument.
 553         __ cmpp(rsi, FieldOperand(func, JSFunction::kContextOffset));
 554         __ Assert(equal, kWrongFunctionContext);
 555       }
 556       __ Call(FieldOperand(func, JSFunction::kCodeEntryOffset));
 557       RecordCallPosition(instr);
 558       break;
 559     }
 560     case kArchJmp:
 561       AssembleArchJump(i.InputRpo(0));
 562       break;
 563     case kArchLookupSwitch:
 564       AssembleArchLookupSwitch(instr);
 565       break;
 566     case kArchTableSwitch:
 567       AssembleArchTableSwitch(instr);
 568       break;
 569     case kArchNop:
 570       // don't emit code for nops.
 571       break;
 572     case kArchDeoptimize: {
 573       int deopt_state_id =
 574           BuildTranslation(instr, -1, 0, OutputFrameStateCombine::Ignore());
 575       AssembleDeoptimizerCall(deopt_state_id, Deoptimizer::EAGER);
 576       break;
 577     }
 578     case kArchRet:
 579       AssembleReturn();
 580       break;
 581     case kArchStackPointer:
 582       __ movq(i.OutputRegister(), rsp);
 583       break;
 584     case kArchTruncateDoubleToI: {
 585       auto result = i.OutputRegister();
 586       auto input = i.InputDoubleRegister(0);
 587       auto ool = new (zone()) OutOfLineTruncateDoubleToI(this, result, input);
 588       __ cvttsd2siq(result, input);
 589       __ cmpq(result, Immediate(1));
 590       __ j(overflow, ool->entry());
 591       __ bind(ool->exit());
 592       break;
 593     }
 594     case kX64Add32:
 595       ASSEMBLE_BINOP(addl);
 596       break;
 597     case kX64Add:
 598       ASSEMBLE_BINOP(addq);
 599       break;
 600     case kX64Sub32:
 601       ASSEMBLE_BINOP(subl);
 602       break;
 603     case kX64Sub:
 604       ASSEMBLE_BINOP(subq);
 605       break;
 606     case kX64And32:
 607       ASSEMBLE_BINOP(andl);
 608       break;
 609     case kX64And:
 610       ASSEMBLE_BINOP(andq);
 611       break;
 612     case kX64Cmp32:
 613       ASSEMBLE_BINOP(cmpl);
 614       break;
 615     case kX64Cmp:
 616       ASSEMBLE_BINOP(cmpq);
 617       break;
 618     case kX64Test32:
 619       ASSEMBLE_BINOP(testl);
 620       break;
 621     case kX64Test:
 622       ASSEMBLE_BINOP(testq);
 623       break;
 624     case kX64Imul32:
 625       ASSEMBLE_MULT(imull);
 626       break;
 627     case kX64Imul:
 628       ASSEMBLE_MULT(imulq);
 629       break;
 630     case kX64ImulHigh32:
 631       if (instr->InputAt(1)->IsRegister()) {
 632         __ imull(i.InputRegister(1));
 633       } else {
 634         __ imull(i.InputOperand(1));
 635       }
 636       break;
 637     case kX64UmulHigh32:
 638       if (instr->InputAt(1)->IsRegister()) {
 639         __ mull(i.InputRegister(1));
 640       } else {
 641         __ mull(i.InputOperand(1));
 642       }
 643       break;
 644     case kX64Idiv32:
 645       __ cdq();
 646       __ idivl(i.InputRegister(1));
 647       break;
 648     case kX64Idiv:
 649       __ cqo();
 650       __ idivq(i.InputRegister(1));
 651       break;
 652     case kX64Udiv32:
 653       __ xorl(rdx, rdx);
 654       __ divl(i.InputRegister(1));
 655       break;
 656     case kX64Udiv:
 657       __ xorq(rdx, rdx);
 658       __ divq(i.InputRegister(1));
 659       break;
 660     case kX64Not:
 661       ASSEMBLE_UNOP(notq);
 662       break;
 663     case kX64Not32:
 664       ASSEMBLE_UNOP(notl);
 665       break;
 666     case kX64Neg:
 667       ASSEMBLE_UNOP(negq);
 668       break;
 669     case kX64Neg32:
 670       ASSEMBLE_UNOP(negl);
 671       break;
 672     case kX64Or32:
 673       ASSEMBLE_BINOP(orl);
 674       break;
 675     case kX64Or:
 676       ASSEMBLE_BINOP(orq);
 677       break;
 678     case kX64Xor32:
 679       ASSEMBLE_BINOP(xorl);
 680       break;
 681     case kX64Xor:
 682       ASSEMBLE_BINOP(xorq);
 683       break;
 684     case kX64Shl32:
 685       ASSEMBLE_SHIFT(shll, 5);
 686       break;
 687     case kX64Shl:
 688       ASSEMBLE_SHIFT(shlq, 6);
 689       break;
 690     case kX64Shr32:
 691       ASSEMBLE_SHIFT(shrl, 5);
 692       break;
 693     case kX64Shr:
 694       ASSEMBLE_SHIFT(shrq, 6);
 695       break;
 696     case kX64Sar32:
 697       ASSEMBLE_SHIFT(sarl, 5);
 698       break;
 699     case kX64Sar:
 700       ASSEMBLE_SHIFT(sarq, 6);
 701       break;
 702     case kX64Ror32:
 703       ASSEMBLE_SHIFT(rorl, 5);
 704       break;
 705     case kX64Ror:
 706       ASSEMBLE_SHIFT(rorq, 6);
 707       break;
 708     case kX64Lzcnt32:
 709       if (instr->InputAt(0)->IsRegister()) {
 710         __ Lzcntl(i.OutputRegister(), i.InputRegister(0));
 711       } else {
 712         __ Lzcntl(i.OutputRegister(), i.InputOperand(0));
 713       }
 714       break;
 715     case kSSEFloat32Cmp:
 716       ASSEMBLE_SSE_BINOP(ucomiss);
 717       break;
 718     case kSSEFloat32Add:
 719       ASSEMBLE_SSE_BINOP(addss);
 720       break;
 721     case kSSEFloat32Sub:
 722       ASSEMBLE_SSE_BINOP(subss);
 723       break;
 724     case kSSEFloat32Mul:
 725       ASSEMBLE_SSE_BINOP(mulss);
 726       break;
 727     case kSSEFloat32Div:
 728       ASSEMBLE_SSE_BINOP(divss);
 729       break;
 730     case kSSEFloat32Abs: {
 731       // TODO(bmeurer): Use RIP relative 128-bit constants.
 732       __ pcmpeqd(kScratchDoubleReg, kScratchDoubleReg);
 733       __ psrlq(kScratchDoubleReg, 33);
 734       __ andps(i.OutputDoubleRegister(), kScratchDoubleReg);
 735       break;
 736     }
 737     case kSSEFloat32Neg: {
 738       // TODO(bmeurer): Use RIP relative 128-bit constants.
 739       __ pcmpeqd(kScratchDoubleReg, kScratchDoubleReg);
 740       __ psllq(kScratchDoubleReg, 31);
 741       __ xorps(i.OutputDoubleRegister(), kScratchDoubleReg);
 742       break;
 743     }
 744     case kSSEFloat32Sqrt:
 745       ASSEMBLE_SSE_UNOP(sqrtss);
 746       break;
 747     case kSSEFloat32Max:
 748       ASSEMBLE_SSE_BINOP(maxss);
 749       break;
 750     case kSSEFloat32Min:
 751       ASSEMBLE_SSE_BINOP(minss);
 752       break;
 753     case kSSEFloat32ToFloat64:
 754       ASSEMBLE_SSE_UNOP(cvtss2sd);
 755       break;
 756     case kSSEFloat64Cmp:
 757       ASSEMBLE_SSE_BINOP(ucomisd);
 758       break;
 759     case kSSEFloat64Add:
 760       ASSEMBLE_SSE_BINOP(addsd);
 761       break;
 762     case kSSEFloat64Sub:
 763       ASSEMBLE_SSE_BINOP(subsd);
 764       break;
 765     case kSSEFloat64Mul:
 766       ASSEMBLE_SSE_BINOP(mulsd);
 767       break;
 768     case kSSEFloat64Div:
 769       ASSEMBLE_SSE_BINOP(divsd);
 770       break;
 771     case kSSEFloat64Mod: {
 772       __ subq(rsp, Immediate(kDoubleSize));
 773       // Move values to st(0) and st(1).
 774       __ movsd(Operand(rsp, 0), i.InputDoubleRegister(1));
 775       __ fld_d(Operand(rsp, 0));
 776       __ movsd(Operand(rsp, 0), i.InputDoubleRegister(0));
 777       __ fld_d(Operand(rsp, 0));
 778       // Loop while fprem isn't done.
 779       Label mod_loop;
 780       __ bind(&mod_loop);
 781       // This instructions traps on all kinds inputs, but we are assuming the
 782       // floating point control word is set to ignore them all.
 783       __ fprem();
 784       // The following 2 instruction implicitly use rax.
 785       __ fnstsw_ax();
 786       if (CpuFeatures::IsSupported(SAHF)) {
 787         CpuFeatureScope sahf_scope(masm(), SAHF);
 788         __ sahf();
 789       } else {
 790         __ shrl(rax, Immediate(8));
 791         __ andl(rax, Immediate(0xFF));
 792         __ pushq(rax);
 793         __ popfq();
 794       }
 795       __ j(parity_even, &mod_loop);
 796       // Move output to stack and clean up.
 797       __ fstp(1);
 798       __ fstp_d(Operand(rsp, 0));
 799       __ movsd(i.OutputDoubleRegister(), Operand(rsp, 0));
 800       __ addq(rsp, Immediate(kDoubleSize));
 801       break;
 802     }
 803     case kSSEFloat64Max:
 804       ASSEMBLE_SSE_BINOP(maxsd);
 805       break;
 806     case kSSEFloat64Min:
 807       ASSEMBLE_SSE_BINOP(minsd);
 808       break;
 809     case kSSEFloat64Abs: {
 810       // TODO(bmeurer): Use RIP relative 128-bit constants.
 811       __ pcmpeqd(kScratchDoubleReg, kScratchDoubleReg);
 812       __ psrlq(kScratchDoubleReg, 1);
 813       __ andpd(i.OutputDoubleRegister(), kScratchDoubleReg);
 814       break;
 815     }
 816     case kSSEFloat64Neg: {
 817       // TODO(bmeurer): Use RIP relative 128-bit constants.
 818       __ pcmpeqd(kScratchDoubleReg, kScratchDoubleReg);
 819       __ psllq(kScratchDoubleReg, 63);
 820       __ xorpd(i.OutputDoubleRegister(), kScratchDoubleReg);
 821       break;
 822     }
 823     case kSSEFloat64Sqrt:
 824       ASSEMBLE_SSE_UNOP(sqrtsd);
 825       break;
 826     case kSSEFloat64Round: {
 827       CpuFeatureScope sse_scope(masm(), SSE4_1);
 828       RoundingMode const mode =
 829           static_cast<RoundingMode>(MiscField::decode(instr->opcode()));
 830       __ roundsd(i.OutputDoubleRegister(), i.InputDoubleRegister(0), mode);
 831       break;
 832     }
 833     case kSSEFloat64ToFloat32:
 834       ASSEMBLE_SSE_UNOP(cvtsd2ss);
 835       break;
 836     case kSSEFloat64ToInt32:
 837       if (instr->InputAt(0)->IsDoubleRegister()) {
 838         __ cvttsd2si(i.OutputRegister(), i.InputDoubleRegister(0));
 839       } else {
 840         __ cvttsd2si(i.OutputRegister(), i.InputOperand(0));
 841       }
 842       break;
 843     case kSSEFloat64ToUint32: {
 844       if (instr->InputAt(0)->IsDoubleRegister()) {
 845         __ cvttsd2siq(i.OutputRegister(), i.InputDoubleRegister(0));
 846       } else {
 847         __ cvttsd2siq(i.OutputRegister(), i.InputOperand(0));
 848       }
 849       __ AssertZeroExtended(i.OutputRegister());
 850       break;
 851     }
 852     case kSSEInt32ToFloat64:
 853       if (instr->InputAt(0)->IsRegister()) {
 854         __ cvtlsi2sd(i.OutputDoubleRegister(), i.InputRegister(0));
 855       } else {
 856         __ cvtlsi2sd(i.OutputDoubleRegister(), i.InputOperand(0));
 857       }
 858       break;
 859     case kSSEUint32ToFloat64:
 860       if (instr->InputAt(0)->IsRegister()) {
 861         __ movl(kScratchRegister, i.InputRegister(0));
 862       } else {
 863         __ movl(kScratchRegister, i.InputOperand(0));
 864       }
 865       __ cvtqsi2sd(i.OutputDoubleRegister(), kScratchRegister);
 866       break;
 867     case kSSEFloat64ExtractLowWord32:
 868       if (instr->InputAt(0)->IsDoubleStackSlot()) {
 869         __ movl(i.OutputRegister(), i.InputOperand(0));
 870       } else {
 871         __ movd(i.OutputRegister(), i.InputDoubleRegister(0));
 872       }
 873       break;
 874     case kSSEFloat64ExtractHighWord32:
 875       if (instr->InputAt(0)->IsDoubleStackSlot()) {
 876         __ movl(i.OutputRegister(), i.InputOperand(0, kDoubleSize / 2));
 877       } else {
 878         __ Pextrd(i.OutputRegister(), i.InputDoubleRegister(0), 1);
 879       }
 880       break;
 881     case kSSEFloat64InsertLowWord32:
 882       if (instr->InputAt(1)->IsRegister()) {
 883         __ Pinsrd(i.OutputDoubleRegister(), i.InputRegister(1), 0);
 884       } else {
 885         __ Pinsrd(i.OutputDoubleRegister(), i.InputOperand(1), 0);
 886       }
 887       break;
 888     case kSSEFloat64InsertHighWord32:
 889       if (instr->InputAt(1)->IsRegister()) {
 890         __ Pinsrd(i.OutputDoubleRegister(), i.InputRegister(1), 1);
 891       } else {
 892         __ Pinsrd(i.OutputDoubleRegister(), i.InputOperand(1), 1);
 893       }
 894       break;
 895     case kSSEFloat64LoadLowWord32:
 896       if (instr->InputAt(0)->IsRegister()) {
 897         __ movd(i.OutputDoubleRegister(), i.InputRegister(0));
 898       } else {
 899         __ movd(i.OutputDoubleRegister(), i.InputOperand(0));
 900       }
 901       break;
 902     case kAVXFloat32Cmp: {
 903       CpuFeatureScope avx_scope(masm(), AVX);
 904       if (instr->InputAt(1)->IsDoubleRegister()) {
 905         __ vucomiss(i.InputDoubleRegister(0), i.InputDoubleRegister(1));
 906       } else {
 907         __ vucomiss(i.InputDoubleRegister(0), i.InputOperand(1));
 908       }
 909       break;
 910     }
 911     case kAVXFloat32Add:
 912       ASSEMBLE_AVX_BINOP(vaddss);
 913       break;
 914     case kAVXFloat32Sub:
 915       ASSEMBLE_AVX_BINOP(vsubss);
 916       break;
 917     case kAVXFloat32Mul:
 918       ASSEMBLE_AVX_BINOP(vmulss);
 919       break;
 920     case kAVXFloat32Div:
 921       ASSEMBLE_AVX_BINOP(vdivss);
 922       break;
 923     case kAVXFloat32Max:
 924       ASSEMBLE_AVX_BINOP(vmaxss);
 925       break;
 926     case kAVXFloat32Min:
 927       ASSEMBLE_AVX_BINOP(vminss);
 928       break;
 929     case kAVXFloat64Cmp: {
 930       CpuFeatureScope avx_scope(masm(), AVX);
 931       if (instr->InputAt(1)->IsDoubleRegister()) {
 932         __ vucomisd(i.InputDoubleRegister(0), i.InputDoubleRegister(1));
 933       } else {
 934         __ vucomisd(i.InputDoubleRegister(0), i.InputOperand(1));
 935       }
 936       break;
 937     }
 938     case kAVXFloat64Add:
 939       ASSEMBLE_AVX_BINOP(vaddsd);
 940       break;
 941     case kAVXFloat64Sub:
 942       ASSEMBLE_AVX_BINOP(vsubsd);
 943       break;
 944     case kAVXFloat64Mul:
 945       ASSEMBLE_AVX_BINOP(vmulsd);
 946       break;
 947     case kAVXFloat64Div:
 948       ASSEMBLE_AVX_BINOP(vdivsd);
 949       break;
 950     case kAVXFloat64Max:
 951       ASSEMBLE_AVX_BINOP(vmaxsd);
 952       break;
 953     case kAVXFloat64Min:
 954       ASSEMBLE_AVX_BINOP(vminsd);
 955       break;
 956     case kAVXFloat32Abs: {
 957       // TODO(bmeurer): Use RIP relative 128-bit constants.
 958       __ pcmpeqd(kScratchDoubleReg, kScratchDoubleReg);
 959       __ psrlq(kScratchDoubleReg, 33);
 960       CpuFeatureScope avx_scope(masm(), AVX);
 961       if (instr->InputAt(0)->IsDoubleRegister()) {
 962         __ vandps(i.OutputDoubleRegister(), kScratchDoubleReg,
 963                   i.InputDoubleRegister(0));
 964       } else {
 965         __ vandps(i.OutputDoubleRegister(), kScratchDoubleReg,
 966                   i.InputOperand(0));
 967       }
 968       break;
 969     }
 970     case kAVXFloat32Neg: {
 971       // TODO(bmeurer): Use RIP relative 128-bit constants.
 972       __ pcmpeqd(kScratchDoubleReg, kScratchDoubleReg);
 973       __ psllq(kScratchDoubleReg, 31);
 974       CpuFeatureScope avx_scope(masm(), AVX);
 975       if (instr->InputAt(0)->IsDoubleRegister()) {
 976         __ vxorps(i.OutputDoubleRegister(), kScratchDoubleReg,
 977                   i.InputDoubleRegister(0));
 978       } else {
 979         __ vxorps(i.OutputDoubleRegister(), kScratchDoubleReg,
 980                   i.InputOperand(0));
 981       }
 982       break;
 983     }
 984     case kAVXFloat64Abs: {
 985       // TODO(bmeurer): Use RIP relative 128-bit constants.
 986       __ pcmpeqd(kScratchDoubleReg, kScratchDoubleReg);
 987       __ psrlq(kScratchDoubleReg, 1);
 988       CpuFeatureScope avx_scope(masm(), AVX);
 989       if (instr->InputAt(0)->IsDoubleRegister()) {
 990         __ vandpd(i.OutputDoubleRegister(), kScratchDoubleReg,
 991                   i.InputDoubleRegister(0));
 992       } else {
 993         __ vandpd(i.OutputDoubleRegister(), kScratchDoubleReg,
 994                   i.InputOperand(0));
 995       }
 996       break;
 997     }
 998     case kAVXFloat64Neg: {
 999       // TODO(bmeurer): Use RIP relative 128-bit constants.
1000       __ pcmpeqd(kScratchDoubleReg, kScratchDoubleReg);
1001       __ psllq(kScratchDoubleReg, 63);
1002       CpuFeatureScope avx_scope(masm(), AVX);
1003       if (instr->InputAt(0)->IsDoubleRegister()) {
1004         __ vxorpd(i.OutputDoubleRegister(), kScratchDoubleReg,
1005                   i.InputDoubleRegister(0));
1006       } else {
1007         __ vxorpd(i.OutputDoubleRegister(), kScratchDoubleReg,
1008                   i.InputOperand(0));
1009       }
1010       break;
1011     }
1012     case kX64Movsxbl:
1013       ASSEMBLE_MOVX(movsxbl);
1014       __ AssertZeroExtended(i.OutputRegister());
1015       break;
1016     case kX64Movzxbl:
1017       ASSEMBLE_MOVX(movzxbl);
1018       __ AssertZeroExtended(i.OutputRegister());
1019       break;
1020     case kX64Movb: {
1021       size_t index = 0;
1022       Operand operand = i.MemoryOperand(&index);
1023       if (HasImmediateInput(instr, index)) {
1024         __ movb(operand, Immediate(i.InputInt8(index)));
1025       } else {
1026         __ movb(operand, i.InputRegister(index));
1027       }
1028       break;
1029     }
1030     case kX64Movsxwl:
1031       ASSEMBLE_MOVX(movsxwl);
1032       __ AssertZeroExtended(i.OutputRegister());
1033       break;
1034     case kX64Movzxwl:
1035       ASSEMBLE_MOVX(movzxwl);
1036       __ AssertZeroExtended(i.OutputRegister());
1037       break;
1038     case kX64Movw: {
1039       size_t index = 0;
1040       Operand operand = i.MemoryOperand(&index);
1041       if (HasImmediateInput(instr, index)) {
1042         __ movw(operand, Immediate(i.InputInt16(index)));
1043       } else {
1044         __ movw(operand, i.InputRegister(index));
1045       }
1046       break;
1047     }
1048     case kX64Movl:
1049       if (instr->HasOutput()) {
1050         if (instr->addressing_mode() == kMode_None) {
1051           if (instr->InputAt(0)->IsRegister()) {
1052             __ movl(i.OutputRegister(), i.InputRegister(0));
1053           } else {
1054             __ movl(i.OutputRegister(), i.InputOperand(0));
1055           }
1056         } else {
1057           __ movl(i.OutputRegister(), i.MemoryOperand());
1058         }
1059         __ AssertZeroExtended(i.OutputRegister());
1060       } else {
1061         size_t index = 0;
1062         Operand operand = i.MemoryOperand(&index);
1063         if (HasImmediateInput(instr, index)) {
1064           __ movl(operand, i.InputImmediate(index));
1065         } else {
1066           __ movl(operand, i.InputRegister(index));
1067         }
1068       }
1069       break;
1070     case kX64Movsxlq:
1071       ASSEMBLE_MOVX(movsxlq);
1072       break;
1073     case kX64Movq:
1074       if (instr->HasOutput()) {
1075         __ movq(i.OutputRegister(), i.MemoryOperand());
1076       } else {
1077         size_t index = 0;
1078         Operand operand = i.MemoryOperand(&index);
1079         if (HasImmediateInput(instr, index)) {
1080           __ movq(operand, i.InputImmediate(index));
1081         } else {
1082           __ movq(operand, i.InputRegister(index));
1083         }
1084       }
1085       break;
1086     case kX64Movss:
1087       if (instr->HasOutput()) {
1088         __ movss(i.OutputDoubleRegister(), i.MemoryOperand());
1089       } else {
1090         size_t index = 0;
1091         Operand operand = i.MemoryOperand(&index);
1092         __ movss(operand, i.InputDoubleRegister(index));
1093       }
1094       break;
1095     case kX64Movsd:
1096       if (instr->HasOutput()) {
1097         __ movsd(i.OutputDoubleRegister(), i.MemoryOperand());
1098       } else {
1099         size_t index = 0;
1100         Operand operand = i.MemoryOperand(&index);
1101         __ movsd(operand, i.InputDoubleRegister(index));
1102       }
1103       break;
1104     case kX64Lea32: {
1105       AddressingMode mode = AddressingModeField::decode(instr->opcode());
1106       // Shorten "leal" to "addl", "subl" or "shll" if the register allocation
1107       // and addressing mode just happens to work out. The "addl"/"subl" forms
1108       // in these cases are faster based on measurements.
1109       if (i.InputRegister(0).is(i.OutputRegister())) {
1110         if (mode == kMode_MRI) {
1111           int32_t constant_summand = i.InputInt32(1);
1112           if (constant_summand > 0) {
1113             __ addl(i.OutputRegister(), Immediate(constant_summand));
1114           } else if (constant_summand < 0) {
1115             __ subl(i.OutputRegister(), Immediate(-constant_summand));
1116           }
1117         } else if (mode == kMode_MR1) {
1118           if (i.InputRegister(1).is(i.OutputRegister())) {
1119             __ shll(i.OutputRegister(), Immediate(1));
1120           } else {
1121             __ leal(i.OutputRegister(), i.MemoryOperand());
1122           }
1123         } else if (mode == kMode_M2) {
1124           __ shll(i.OutputRegister(), Immediate(1));
1125         } else if (mode == kMode_M4) {
1126           __ shll(i.OutputRegister(), Immediate(2));
1127         } else if (mode == kMode_M8) {
1128           __ shll(i.OutputRegister(), Immediate(3));
1129         } else {
1130           __ leal(i.OutputRegister(), i.MemoryOperand());
1131         }
1132       } else {
1133         __ leal(i.OutputRegister(), i.MemoryOperand());
1134       }
1135       __ AssertZeroExtended(i.OutputRegister());
1136       break;
1137     }
1138     case kX64Lea:
1139       __ leaq(i.OutputRegister(), i.MemoryOperand());
1140       break;
1141     case kX64Dec32:
1142       __ decl(i.OutputRegister());
1143       break;
1144     case kX64Inc32:
1145       __ incl(i.OutputRegister());
1146       break;
1147     case kX64Push:
1148       if (HasImmediateInput(instr, 0)) {
1149         __ pushq(i.InputImmediate(0));
1150       } else {
1151         if (instr->InputAt(0)->IsRegister()) {
1152           __ pushq(i.InputRegister(0));
1153         } else {
1154           __ pushq(i.InputOperand(0));
1155         }
1156       }
1157       break;
1158     case kX64StoreWriteBarrier: {
1159       Register object = i.InputRegister(0);
1160       Register value = i.InputRegister(2);
1161       SaveFPRegsMode mode =
1162           frame()->DidAllocateDoubleRegisters() ? kSaveFPRegs : kDontSaveFPRegs;
1163       if (HasImmediateInput(instr, 1)) {
1164         int index = i.InputInt32(1);
1165         Register scratch = i.TempRegister(1);
1166         __ movq(Operand(object, index), value);
1167         __ RecordWriteContextSlot(object, index, value, scratch, mode);
1168       } else {
1169         Register index = i.InputRegister(1);
1170         __ movq(Operand(object, index, times_1, 0), value);
1171         __ leaq(index, Operand(object, index, times_1, 0));
1172         __ RecordWrite(object, index, value, mode);
1173       }
1174       break;
1175     }
1176     case kCheckedLoadInt8:
1177       ASSEMBLE_CHECKED_LOAD_INTEGER(movsxbl);
1178       break;
1179     case kCheckedLoadUint8:
1180       ASSEMBLE_CHECKED_LOAD_INTEGER(movzxbl);
1181       break;
1182     case kCheckedLoadInt16:
1183       ASSEMBLE_CHECKED_LOAD_INTEGER(movsxwl);
1184       break;
1185     case kCheckedLoadUint16:
1186       ASSEMBLE_CHECKED_LOAD_INTEGER(movzxwl);
1187       break;
1188     case kCheckedLoadWord32:
1189       ASSEMBLE_CHECKED_LOAD_INTEGER(movl);
1190       break;
1191     case kCheckedLoadFloat32:
1192       ASSEMBLE_CHECKED_LOAD_FLOAT(movss);
1193       break;
1194     case kCheckedLoadFloat64:
1195       ASSEMBLE_CHECKED_LOAD_FLOAT(movsd);
1196       break;
1197     case kCheckedStoreWord8:
1198       ASSEMBLE_CHECKED_STORE_INTEGER(movb);
1199       break;
1200     case kCheckedStoreWord16:
1201       ASSEMBLE_CHECKED_STORE_INTEGER(movw);
1202       break;
1203     case kCheckedStoreWord32:
1204       ASSEMBLE_CHECKED_STORE_INTEGER(movl);
1205       break;
1206     case kCheckedStoreFloat32:
1207       ASSEMBLE_CHECKED_STORE_FLOAT(movss);
1208       break;
1209     case kCheckedStoreFloat64:
1210       ASSEMBLE_CHECKED_STORE_FLOAT(movsd);
1211       break;
1212     case kX64StackCheck:
1213       __ CompareRoot(rsp, Heap::kStackLimitRootIndex);
1214       break;
1215   }
1216 }  // NOLINT(readability/fn_size)
1217
1218
1219 // Assembles branches after this instruction.
1220 void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
1221   X64OperandConverter i(this, instr);
1222   Label::Distance flabel_distance =
1223       branch->fallthru ? Label::kNear : Label::kFar;
1224   Label* tlabel = branch->true_label;
1225   Label* flabel = branch->false_label;
1226   switch (branch->condition) {
1227     case kUnorderedEqual:
1228       __ j(parity_even, flabel, flabel_distance);
1229     // Fall through.
1230     case kEqual:
1231       __ j(equal, tlabel);
1232       break;
1233     case kUnorderedNotEqual:
1234       __ j(parity_even, tlabel);
1235     // Fall through.
1236     case kNotEqual:
1237       __ j(not_equal, tlabel);
1238       break;
1239     case kSignedLessThan:
1240       __ j(less, tlabel);
1241       break;
1242     case kSignedGreaterThanOrEqual:
1243       __ j(greater_equal, tlabel);
1244       break;
1245     case kSignedLessThanOrEqual:
1246       __ j(less_equal, tlabel);
1247       break;
1248     case kSignedGreaterThan:
1249       __ j(greater, tlabel);
1250       break;
1251     case kUnsignedLessThan:
1252       __ j(below, tlabel);
1253       break;
1254     case kUnsignedGreaterThanOrEqual:
1255       __ j(above_equal, tlabel);
1256       break;
1257     case kUnsignedLessThanOrEqual:
1258       __ j(below_equal, tlabel);
1259       break;
1260     case kUnsignedGreaterThan:
1261       __ j(above, tlabel);
1262       break;
1263     case kOverflow:
1264       __ j(overflow, tlabel);
1265       break;
1266     case kNotOverflow:
1267       __ j(no_overflow, tlabel);
1268       break;
1269   }
1270   if (!branch->fallthru) __ jmp(flabel, flabel_distance);
1271 }
1272
1273
1274 void CodeGenerator::AssembleArchJump(RpoNumber target) {
1275   if (!IsNextInAssemblyOrder(target)) __ jmp(GetLabel(target));
1276 }
1277
1278
1279 // Assembles boolean materializations after this instruction.
1280 void CodeGenerator::AssembleArchBoolean(Instruction* instr,
1281                                         FlagsCondition condition) {
1282   X64OperandConverter i(this, instr);
1283   Label done;
1284
1285   // Materialize a full 64-bit 1 or 0 value. The result register is always the
1286   // last output of the instruction.
1287   Label check;
1288   DCHECK_NE(0u, instr->OutputCount());
1289   Register reg = i.OutputRegister(instr->OutputCount() - 1);
1290   Condition cc = no_condition;
1291   switch (condition) {
1292     case kUnorderedEqual:
1293       __ j(parity_odd, &check, Label::kNear);
1294       __ movl(reg, Immediate(0));
1295       __ jmp(&done, Label::kNear);
1296     // Fall through.
1297     case kEqual:
1298       cc = equal;
1299       break;
1300     case kUnorderedNotEqual:
1301       __ j(parity_odd, &check, Label::kNear);
1302       __ movl(reg, Immediate(1));
1303       __ jmp(&done, Label::kNear);
1304     // Fall through.
1305     case kNotEqual:
1306       cc = not_equal;
1307       break;
1308     case kSignedLessThan:
1309       cc = less;
1310       break;
1311     case kSignedGreaterThanOrEqual:
1312       cc = greater_equal;
1313       break;
1314     case kSignedLessThanOrEqual:
1315       cc = less_equal;
1316       break;
1317     case kSignedGreaterThan:
1318       cc = greater;
1319       break;
1320     case kUnsignedLessThan:
1321       cc = below;
1322       break;
1323     case kUnsignedGreaterThanOrEqual:
1324       cc = above_equal;
1325       break;
1326     case kUnsignedLessThanOrEqual:
1327       cc = below_equal;
1328       break;
1329     case kUnsignedGreaterThan:
1330       cc = above;
1331       break;
1332     case kOverflow:
1333       cc = overflow;
1334       break;
1335     case kNotOverflow:
1336       cc = no_overflow;
1337       break;
1338   }
1339   __ bind(&check);
1340   __ setcc(cc, reg);
1341   __ movzxbl(reg, reg);
1342   __ bind(&done);
1343 }
1344
1345
1346 void CodeGenerator::AssembleArchLookupSwitch(Instruction* instr) {
1347   X64OperandConverter i(this, instr);
1348   Register input = i.InputRegister(0);
1349   for (size_t index = 2; index < instr->InputCount(); index += 2) {
1350     __ cmpl(input, Immediate(i.InputInt32(index + 0)));
1351     __ j(equal, GetLabel(i.InputRpo(index + 1)));
1352   }
1353   AssembleArchJump(i.InputRpo(1));
1354 }
1355
1356
1357 void CodeGenerator::AssembleArchTableSwitch(Instruction* instr) {
1358   X64OperandConverter i(this, instr);
1359   Register input = i.InputRegister(0);
1360   int32_t const case_count = static_cast<int32_t>(instr->InputCount() - 2);
1361   Label** cases = zone()->NewArray<Label*>(case_count);
1362   for (int32_t index = 0; index < case_count; ++index) {
1363     cases[index] = GetLabel(i.InputRpo(index + 2));
1364   }
1365   Label* const table = AddJumpTable(cases, case_count);
1366   __ cmpl(input, Immediate(case_count));
1367   __ j(above_equal, GetLabel(i.InputRpo(1)));
1368   __ leaq(kScratchRegister, Operand(table));
1369   __ jmp(Operand(kScratchRegister, input, times_8, 0));
1370 }
1371
1372
1373 void CodeGenerator::AssembleDeoptimizerCall(
1374     int deoptimization_id, Deoptimizer::BailoutType bailout_type) {
1375   Address deopt_entry = Deoptimizer::GetDeoptimizationEntry(
1376       isolate(), deoptimization_id, bailout_type);
1377   __ call(deopt_entry, RelocInfo::RUNTIME_ENTRY);
1378 }
1379
1380
1381 void CodeGenerator::AssemblePrologue() {
1382   CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
1383   int stack_slots = frame()->GetSpillSlotCount();
1384   if (descriptor->kind() == CallDescriptor::kCallAddress) {
1385     __ pushq(rbp);
1386     __ movq(rbp, rsp);
1387     const RegList saves = descriptor->CalleeSavedRegisters();
1388     if (saves != 0) {  // Save callee-saved registers.
1389       int register_save_area_size = 0;
1390       for (int i = Register::kNumRegisters - 1; i >= 0; i--) {
1391         if (!((1 << i) & saves)) continue;
1392         __ pushq(Register::from_code(i));
1393         register_save_area_size += kPointerSize;
1394       }
1395       frame()->SetRegisterSaveAreaSize(register_save_area_size);
1396     }
1397   } else if (descriptor->IsJSFunctionCall()) {
1398     CompilationInfo* info = this->info();
1399     __ Prologue(info->IsCodePreAgingActive());
1400     frame()->SetRegisterSaveAreaSize(
1401         StandardFrameConstants::kFixedFrameSizeFromFp);
1402   } else if (stack_slots > 0) {
1403     __ StubPrologue();
1404     frame()->SetRegisterSaveAreaSize(
1405         StandardFrameConstants::kFixedFrameSizeFromFp);
1406   }
1407
1408   if (info()->is_osr()) {
1409     // TurboFan OSR-compiled functions cannot be entered directly.
1410     __ Abort(kShouldNotDirectlyEnterOsrFunction);
1411
1412     // Unoptimized code jumps directly to this entrypoint while the unoptimized
1413     // frame is still on the stack. Optimized code uses OSR values directly from
1414     // the unoptimized frame. Thus, all that needs to be done is to allocate the
1415     // remaining stack slots.
1416     if (FLAG_code_comments) __ RecordComment("-- OSR entrypoint --");
1417     osr_pc_offset_ = __ pc_offset();
1418     // TODO(titzer): cannot address target function == local #-1
1419     __ movq(rdi, Operand(rbp, JavaScriptFrameConstants::kFunctionOffset));
1420     DCHECK(stack_slots >= frame()->GetOsrStackSlotCount());
1421     stack_slots -= frame()->GetOsrStackSlotCount();
1422   }
1423
1424   if (stack_slots > 0) {
1425     __ subq(rsp, Immediate(stack_slots * kPointerSize));
1426   }
1427 }
1428
1429
1430 void CodeGenerator::AssembleReturn() {
1431   CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
1432   int stack_slots = frame()->GetSpillSlotCount();
1433   if (descriptor->kind() == CallDescriptor::kCallAddress) {
1434     if (frame()->GetRegisterSaveAreaSize() > 0) {
1435       // Remove this frame's spill slots first.
1436       if (stack_slots > 0) {
1437         __ addq(rsp, Immediate(stack_slots * kPointerSize));
1438       }
1439       const RegList saves = descriptor->CalleeSavedRegisters();
1440       // Restore registers.
1441       if (saves != 0) {
1442         for (int i = 0; i < Register::kNumRegisters; i++) {
1443           if (!((1 << i) & saves)) continue;
1444           __ popq(Register::from_code(i));
1445         }
1446       }
1447       __ popq(rbp);  // Pop caller's frame pointer.
1448       __ ret(0);
1449     } else {
1450       // No saved registers.
1451       __ movq(rsp, rbp);  // Move stack pointer back to frame pointer.
1452       __ popq(rbp);       // Pop caller's frame pointer.
1453       __ ret(0);
1454     }
1455   } else if (descriptor->IsJSFunctionCall() || stack_slots > 0) {
1456     __ movq(rsp, rbp);  // Move stack pointer back to frame pointer.
1457     __ popq(rbp);       // Pop caller's frame pointer.
1458     int pop_count = descriptor->IsJSFunctionCall()
1459                         ? static_cast<int>(descriptor->JSParameterCount())
1460                         : 0;
1461     __ ret(pop_count * kPointerSize);
1462   } else {
1463     __ ret(0);
1464   }
1465 }
1466
1467
1468 void CodeGenerator::AssembleMove(InstructionOperand* source,
1469                                  InstructionOperand* destination) {
1470   X64OperandConverter g(this, NULL);
1471   // Dispatch on the source and destination operand kinds.  Not all
1472   // combinations are possible.
1473   if (source->IsRegister()) {
1474     DCHECK(destination->IsRegister() || destination->IsStackSlot());
1475     Register src = g.ToRegister(source);
1476     if (destination->IsRegister()) {
1477       __ movq(g.ToRegister(destination), src);
1478     } else {
1479       __ movq(g.ToOperand(destination), src);
1480     }
1481   } else if (source->IsStackSlot()) {
1482     DCHECK(destination->IsRegister() || destination->IsStackSlot());
1483     Operand src = g.ToOperand(source);
1484     if (destination->IsRegister()) {
1485       Register dst = g.ToRegister(destination);
1486       __ movq(dst, src);
1487     } else {
1488       // Spill on demand to use a temporary register for memory-to-memory
1489       // moves.
1490       Register tmp = kScratchRegister;
1491       Operand dst = g.ToOperand(destination);
1492       __ movq(tmp, src);
1493       __ movq(dst, tmp);
1494     }
1495   } else if (source->IsConstant()) {
1496     ConstantOperand* constant_source = ConstantOperand::cast(source);
1497     Constant src = g.ToConstant(constant_source);
1498     if (destination->IsRegister() || destination->IsStackSlot()) {
1499       Register dst = destination->IsRegister() ? g.ToRegister(destination)
1500                                                : kScratchRegister;
1501       switch (src.type()) {
1502         case Constant::kInt32:
1503           // TODO(dcarney): don't need scratch in this case.
1504           __ Set(dst, src.ToInt32());
1505           break;
1506         case Constant::kInt64:
1507           __ Set(dst, src.ToInt64());
1508           break;
1509         case Constant::kFloat32:
1510           __ Move(dst,
1511                   isolate()->factory()->NewNumber(src.ToFloat32(), TENURED));
1512           break;
1513         case Constant::kFloat64:
1514           __ Move(dst,
1515                   isolate()->factory()->NewNumber(src.ToFloat64(), TENURED));
1516           break;
1517         case Constant::kExternalReference:
1518           __ Move(dst, src.ToExternalReference());
1519           break;
1520         case Constant::kHeapObject: {
1521           Handle<HeapObject> src_object = src.ToHeapObject();
1522           if (info()->IsOptimizing() &&
1523               src_object.is_identical_to(info()->context())) {
1524             // Loading the context from the frame is way cheaper than
1525             // materializing the actual context heap object address.
1526             __ movp(dst, Operand(rbp, StandardFrameConstants::kContextOffset));
1527           } else if (info()->IsOptimizing() &&
1528                      src_object.is_identical_to(info()->closure())) {
1529             // Loading the JSFunction from the frame is way cheaper than
1530             // materializing the actual JSFunction heap object address.
1531             __ movp(dst,
1532                     Operand(rbp, JavaScriptFrameConstants::kFunctionOffset));
1533           } else {
1534             __ Move(dst, src_object);
1535           }
1536           break;
1537         }
1538         case Constant::kRpoNumber:
1539           UNREACHABLE();  // TODO(dcarney): load of labels on x64.
1540           break;
1541       }
1542       if (destination->IsStackSlot()) {
1543         __ movq(g.ToOperand(destination), kScratchRegister);
1544       }
1545     } else if (src.type() == Constant::kFloat32) {
1546       // TODO(turbofan): Can we do better here?
1547       uint32_t src_const = bit_cast<uint32_t>(src.ToFloat32());
1548       if (destination->IsDoubleRegister()) {
1549         __ Move(g.ToDoubleRegister(destination), src_const);
1550       } else {
1551         DCHECK(destination->IsDoubleStackSlot());
1552         Operand dst = g.ToOperand(destination);
1553         __ movl(dst, Immediate(src_const));
1554       }
1555     } else {
1556       DCHECK_EQ(Constant::kFloat64, src.type());
1557       uint64_t src_const = bit_cast<uint64_t>(src.ToFloat64());
1558       if (destination->IsDoubleRegister()) {
1559         __ Move(g.ToDoubleRegister(destination), src_const);
1560       } else {
1561         DCHECK(destination->IsDoubleStackSlot());
1562         __ movq(kScratchRegister, src_const);
1563         __ movq(g.ToOperand(destination), kScratchRegister);
1564       }
1565     }
1566   } else if (source->IsDoubleRegister()) {
1567     XMMRegister src = g.ToDoubleRegister(source);
1568     if (destination->IsDoubleRegister()) {
1569       XMMRegister dst = g.ToDoubleRegister(destination);
1570       __ movaps(dst, src);
1571     } else {
1572       DCHECK(destination->IsDoubleStackSlot());
1573       Operand dst = g.ToOperand(destination);
1574       __ movsd(dst, src);
1575     }
1576   } else if (source->IsDoubleStackSlot()) {
1577     DCHECK(destination->IsDoubleRegister() || destination->IsDoubleStackSlot());
1578     Operand src = g.ToOperand(source);
1579     if (destination->IsDoubleRegister()) {
1580       XMMRegister dst = g.ToDoubleRegister(destination);
1581       __ movsd(dst, src);
1582     } else {
1583       // We rely on having xmm0 available as a fixed scratch register.
1584       Operand dst = g.ToOperand(destination);
1585       __ movsd(xmm0, src);
1586       __ movsd(dst, xmm0);
1587     }
1588   } else {
1589     UNREACHABLE();
1590   }
1591 }
1592
1593
1594 void CodeGenerator::AssembleSwap(InstructionOperand* source,
1595                                  InstructionOperand* destination) {
1596   X64OperandConverter g(this, NULL);
1597   // Dispatch on the source and destination operand kinds.  Not all
1598   // combinations are possible.
1599   if (source->IsRegister() && destination->IsRegister()) {
1600     // Register-register.
1601     __ xchgq(g.ToRegister(source), g.ToRegister(destination));
1602   } else if (source->IsRegister() && destination->IsStackSlot()) {
1603     Register src = g.ToRegister(source);
1604     Operand dst = g.ToOperand(destination);
1605     __ xchgq(src, dst);
1606   } else if ((source->IsStackSlot() && destination->IsStackSlot()) ||
1607              (source->IsDoubleStackSlot() &&
1608               destination->IsDoubleStackSlot())) {
1609     // Memory-memory.
1610     Register tmp = kScratchRegister;
1611     Operand src = g.ToOperand(source);
1612     Operand dst = g.ToOperand(destination);
1613     __ movq(tmp, dst);
1614     __ xchgq(tmp, src);
1615     __ movq(dst, tmp);
1616   } else if (source->IsDoubleRegister() && destination->IsDoubleRegister()) {
1617     // XMM register-register swap. We rely on having xmm0
1618     // available as a fixed scratch register.
1619     XMMRegister src = g.ToDoubleRegister(source);
1620     XMMRegister dst = g.ToDoubleRegister(destination);
1621     __ movaps(xmm0, src);
1622     __ movaps(src, dst);
1623     __ movaps(dst, xmm0);
1624   } else if (source->IsDoubleRegister() && destination->IsDoubleStackSlot()) {
1625     // XMM register-memory swap.  We rely on having xmm0
1626     // available as a fixed scratch register.
1627     XMMRegister src = g.ToDoubleRegister(source);
1628     Operand dst = g.ToOperand(destination);
1629     __ movsd(xmm0, src);
1630     __ movsd(src, dst);
1631     __ movsd(dst, xmm0);
1632   } else {
1633     // No other combinations are possible.
1634     UNREACHABLE();
1635   }
1636 }
1637
1638
1639 void CodeGenerator::AssembleJumpTable(Label** targets, size_t target_count) {
1640   for (size_t index = 0; index < target_count; ++index) {
1641     __ dq(targets[index]);
1642   }
1643 }
1644
1645
1646 void CodeGenerator::AddNopForSmiCodeInlining() { __ nop(); }
1647
1648
1649 void CodeGenerator::EnsureSpaceForLazyDeopt() {
1650   int space_needed = Deoptimizer::patch_size();
1651   if (!info()->IsStub()) {
1652     // Ensure that we have enough space after the previous lazy-bailout
1653     // instruction for patching the code here.
1654     int current_pc = masm()->pc_offset();
1655     if (current_pc < last_lazy_deopt_pc_ + space_needed) {
1656       int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc;
1657       __ Nop(padding_size);
1658     }
1659   }
1660   MarkLazyDeoptSite();
1661 }
1662
1663 #undef __
1664
1665 }  // namespace internal
1666 }  // namespace compiler
1667 }  // namespace v8