1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
5 #ifndef V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_
6 #define V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_
12 // ARM64-specific opcodes that specify which assembly sequence to emit.
13 // Most opcodes specify a single instruction.
14 #define TARGET_ARCH_OPCODE_LIST(V) \
49 V(Arm64CallCodeObject) \
50 V(Arm64CallJSFunction) \
54 V(Arm64PokePairZero) \
63 V(Arm64Int32ToInt64) \
64 V(Arm64Int64ToInt32) \
65 V(Arm64Float64ToInt32) \
66 V(Arm64Float64ToUint32) \
67 V(Arm64Int32ToFloat64) \
68 V(Arm64Uint32ToFloat64) \
70 V(Arm64Float64Store) \
79 V(Arm64StoreWriteBarrier)
82 // Addressing modes represent the "shape" of inputs to an instruction.
83 // Many instructions support multiple addressing modes. Addressing modes
84 // are encoded into the InstructionCode of the instruction and tell the
85 // code generator after register allocation which assembler method to call.
87 // We use the following local notation for addressing modes:
90 // O = register or stack slot
91 // D = double register
92 // I = immediate (handle, external, int32)
93 // MRI = [register + immediate]
94 // MRR = [register + register]
95 #define TARGET_ADDRESSING_MODE_LIST(V) \
96 V(MRI) /* [%r0 + K] */ \
97 V(MRR) /* [%r0 + %r1] */
99 } // namespace internal
100 } // namespace compiler
103 #endif // V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_