2 // Copyright © 2017 Arm Ltd. All rights reserved.
3 // SPDX-License-Identifier: MIT
7 #include <armnn/Tensor.hpp>
9 #include <backendsCommon/WorkloadInfo.hpp>
16 template <typename QueueDescriptor>
17 void AddInputToWorkload(QueueDescriptor& descriptor,
18 armnn::WorkloadInfo& info,
19 const armnn::TensorInfo& tensorInfo,
20 armnn::ITensorHandle* tensorHandle)
22 descriptor.m_Inputs.push_back(tensorHandle);
23 info.m_InputTensorInfos.push_back(tensorInfo);
26 template <typename QueueDescriptor>
27 void AddOutputToWorkload(QueueDescriptor& descriptor,
28 armnn::WorkloadInfo& info,
29 const armnn::TensorInfo& tensorInfo,
30 armnn::ITensorHandle* tensorHandle)
32 descriptor.m_Outputs.push_back(tensorHandle);
33 info.m_OutputTensorInfos.push_back(tensorInfo);
36 template <typename QueueDescriptor>
37 void SetWorkloadInput(QueueDescriptor& descriptor,
38 armnn::WorkloadInfo& info,
40 const armnn::TensorInfo& tensorInfo,
41 armnn::ITensorHandle* tensorHandle)
43 descriptor.m_Inputs[index] = tensorHandle;
44 info.m_InputTensorInfos[index] = tensorInfo;
47 template <typename QueueDescriptor>
48 void SetWorkloadOutput(QueueDescriptor& descriptor,
49 armnn::WorkloadInfo& info,
51 const armnn::TensorInfo& tensorInfo,
52 armnn::ITensorHandle* tensorHandle)
54 descriptor.m_Outputs[index] = tensorHandle;
55 info.m_OutputTensorInfos[index] = tensorInfo;