2 * Copyright (c) 2003 Hewlett-Packard Development Company, L.P.
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 /* The following really assume we have a 486 or better. */
24 /* If ASSUME_WINDOWS98 is defined, we assume Windows 98 or newer. */
26 #include "../all_aligned_atomic_load_store.h"
28 /* Real X86 implementations, except for some old WinChips, appear */
29 /* to enforce ordering between memory operations, EXCEPT that a later */
30 /* read can pass earlier writes, presumably due to the visible */
31 /* presence of store buffers. */
32 /* We ignore both the WinChips, and the fact that the official specs */
33 /* seem to be much weaker (and arguably too weak to be usable). */
35 #include "../ordered_except_wr.h"
37 #include "../test_and_set_t_is_char.h"
43 #define _InterlockedIncrement InterlockedIncrement
44 #define _InterlockedDecrement InterlockedDecrement
45 #define _InterlockedExchange InterlockedExchange
46 #define _InterlockedCompareExchange InterlockedCompareExchange
53 #pragma intrinsic (_ReadWriteBarrier)
60 LONG __cdecl _InterlockedIncrement(LONG volatile *Addend);
61 LONG __cdecl _InterlockedDecrement(LONG volatile *Addend);
62 LONG __cdecl _InterlockedExchangeAdd(LONG volatile* Target, LONG Addend);
63 LONG __cdecl _InterlockedExchange(LONG volatile* Target, LONG Value);
64 LONG __cdecl _InterlockedCompareExchange(LONG volatile* Dest,
65 LONG Exchange, LONG Comp);
70 #endif /* _MSC_VER >= 1400 */
72 #pragma intrinsic (_InterlockedIncrement)
73 #pragma intrinsic (_InterlockedDecrement)
74 #pragma intrinsic (_InterlockedExchange)
75 #pragma intrinsic (_InterlockedExchangeAdd)
76 #pragma intrinsic (_InterlockedCompareExchange)
78 #endif /* _MSC_VER < 1310 */
80 /* As far as we can tell, the lfence and sfence instructions are not */
81 /* currently needed or useful for cached memory accesses. */
89 #define AO_HAVE_nop_full
92 AO_fetch_and_add_full (volatile AO_t *p, AO_t incr)
94 return _InterlockedExchangeAdd((LONG volatile*)p, (LONG)incr);
97 #define AO_HAVE_fetch_and_add_full
100 AO_fetch_and_add1_full (volatile AO_t *p)
102 return _InterlockedIncrement((LONG volatile *)p) - 1;
105 #define AO_HAVE_fetch_and_add1_full
108 AO_fetch_and_sub1_full (volatile AO_t *p)
110 return _InterlockedDecrement((LONG volatile *)p) + 1;
113 #define AO_HAVE_fetch_and_sub1_full
115 AO_INLINE AO_TS_VAL_t
116 AO_test_and_set_full(volatile AO_TS_t *addr)
122 xchg byte ptr [ebx],al ;
126 #define AO_HAVE_test_and_set_full
128 #ifdef AO_ASSUME_WINDOWS98
129 /* Returns nonzero if the comparison succeeded. */
131 AO_compare_and_swap_full(volatile AO_t *addr,
132 AO_t old, AO_t new_val)
134 return _InterlockedCompareExchange((LONG volatile *)addr,
135 (LONG)new_val, (LONG)old)
139 #define AO_HAVE_compare_and_swap_full
140 #endif /* ASSUME_WINDOWS98 */
143 #include "../ao_t_is_int.h"