1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
5 #ifndef V8_ARM64_DECODER_ARM64_INL_H_
6 #define V8_ARM64_DECODER_ARM64_INL_H_
8 #include "src/arm64/decoder-arm64.h"
9 #include "src/globals.h"
10 #include "src/utils.h"
17 // Top-level instruction decode function.
19 void Decoder<V>::Decode(Instruction *instr) {
20 if (instr->Bits(28, 27) == 0) {
21 V::VisitUnallocated(instr);
23 switch (instr->Bits(27, 24)) {
24 // 0: PC relative addressing.
25 case 0x0: DecodePCRelAddressing(instr); break;
27 // 1: Add/sub immediate.
28 case 0x1: DecodeAddSubImmediate(instr); break;
30 // A: Logical shifted register.
31 // Add/sub with carry.
32 // Conditional compare register.
33 // Conditional compare immediate.
34 // Conditional select.
35 // Data processing 1 source.
36 // Data processing 2 source.
37 // B: Add/sub shifted register.
38 // Add/sub extended register.
39 // Data processing 3 source.
41 case 0xB: DecodeDataProcessing(instr); break;
43 // 2: Logical immediate.
44 // Move wide immediate.
45 case 0x2: DecodeLogical(instr); break;
49 case 0x3: DecodeBitfieldExtract(instr); break;
51 // 4: Unconditional branch immediate.
52 // Exception generation.
53 // Compare and branch immediate.
54 // 5: Compare and branch immediate.
55 // Conditional branch.
57 // 6,7: Unconditional branch.
58 // Test and branch immediate.
62 case 0x7: DecodeBranchSystemException(instr); break;
64 // 8,9: Load/store register pair post-index.
65 // Load register literal.
66 // Load/store register unscaled immediate.
67 // Load/store register immediate post-index.
68 // Load/store register immediate pre-index.
69 // Load/store register offset.
70 // C,D: Load/store register pair offset.
71 // Load/store register pair pre-index.
72 // Load/store register unsigned immediate.
77 case 0xD: DecodeLoadStore(instr); break;
79 // E: FP fixed point conversion.
80 // FP integer conversion.
81 // FP data processing 1 source.
84 // FP data processing 2 source.
85 // FP conditional compare.
86 // FP conditional select.
88 // F: FP data processing 3 source.
91 case 0xF: DecodeFP(instr); break;
98 void Decoder<V>::DecodePCRelAddressing(Instruction* instr) {
99 DCHECK(instr->Bits(27, 24) == 0x0);
100 // We know bit 28 is set, as <b28:b27> = 0 is filtered out at the top level
102 DCHECK(instr->Bit(28) == 0x1);
103 V::VisitPCRelAddressing(instr);
108 void Decoder<V>::DecodeBranchSystemException(Instruction* instr) {
109 DCHECK((instr->Bits(27, 24) == 0x4) ||
110 (instr->Bits(27, 24) == 0x5) ||
111 (instr->Bits(27, 24) == 0x6) ||
112 (instr->Bits(27, 24) == 0x7) );
114 switch (instr->Bits(31, 29)) {
117 V::VisitUnconditionalBranch(instr);
122 if (instr->Bit(25) == 0) {
123 V::VisitCompareBranch(instr);
125 V::VisitTestBranch(instr);
130 if (instr->Bit(25) == 0) {
131 if ((instr->Bit(24) == 0x1) ||
132 (instr->Mask(0x01000010) == 0x00000010)) {
133 V::VisitUnallocated(instr);
135 V::VisitConditionalBranch(instr);
138 V::VisitUnallocated(instr);
143 if (instr->Bit(25) == 0) {
144 if (instr->Bit(24) == 0) {
145 if ((instr->Bits(4, 2) != 0) ||
146 (instr->Mask(0x00E0001D) == 0x00200001) ||
147 (instr->Mask(0x00E0001D) == 0x00400001) ||
148 (instr->Mask(0x00E0001E) == 0x00200002) ||
149 (instr->Mask(0x00E0001E) == 0x00400002) ||
150 (instr->Mask(0x00E0001C) == 0x00600000) ||
151 (instr->Mask(0x00E0001C) == 0x00800000) ||
152 (instr->Mask(0x00E0001F) == 0x00A00000) ||
153 (instr->Mask(0x00C0001C) == 0x00C00000)) {
154 V::VisitUnallocated(instr);
156 V::VisitException(instr);
159 if (instr->Bits(23, 22) == 0) {
160 const Instr masked_003FF0E0 = instr->Mask(0x003FF0E0);
161 if ((instr->Bits(21, 19) == 0x4) ||
162 (masked_003FF0E0 == 0x00033000) ||
163 (masked_003FF0E0 == 0x003FF020) ||
164 (masked_003FF0E0 == 0x003FF060) ||
165 (masked_003FF0E0 == 0x003FF0E0) ||
166 (instr->Mask(0x00388000) == 0x00008000) ||
167 (instr->Mask(0x0038E000) == 0x00000000) ||
168 (instr->Mask(0x0039E000) == 0x00002000) ||
169 (instr->Mask(0x003AE000) == 0x00002000) ||
170 (instr->Mask(0x003CE000) == 0x00042000) ||
171 (instr->Mask(0x003FFFC0) == 0x000320C0) ||
172 (instr->Mask(0x003FF100) == 0x00032100) ||
173 (instr->Mask(0x003FF200) == 0x00032200) ||
174 (instr->Mask(0x003FF400) == 0x00032400) ||
175 (instr->Mask(0x003FF800) == 0x00032800) ||
176 (instr->Mask(0x0038F000) == 0x00005000) ||
177 (instr->Mask(0x0038E000) == 0x00006000)) {
178 V::VisitUnallocated(instr);
180 V::VisitSystem(instr);
183 V::VisitUnallocated(instr);
187 if ((instr->Bit(24) == 0x1) ||
188 (instr->Bits(20, 16) != 0x1F) ||
189 (instr->Bits(15, 10) != 0) ||
190 (instr->Bits(4, 0) != 0) ||
191 (instr->Bits(24, 21) == 0x3) ||
192 (instr->Bits(24, 22) == 0x3)) {
193 V::VisitUnallocated(instr);
195 V::VisitUnconditionalBranchToRegister(instr);
202 V::VisitUnallocated(instr);
210 void Decoder<V>::DecodeLoadStore(Instruction* instr) {
211 DCHECK((instr->Bits(27, 24) == 0x8) ||
212 (instr->Bits(27, 24) == 0x9) ||
213 (instr->Bits(27, 24) == 0xC) ||
214 (instr->Bits(27, 24) == 0xD) );
216 if (instr->Bit(24) == 0) {
217 if (instr->Bit(28) == 0) {
218 if (instr->Bit(29) == 0) {
219 if (instr->Bit(26) == 0) {
220 // TODO(all): VisitLoadStoreExclusive.
221 V::VisitUnimplemented(instr);
223 DecodeAdvSIMDLoadStore(instr);
226 if ((instr->Bits(31, 30) == 0x3) ||
227 (instr->Mask(0xC4400000) == 0x40000000)) {
228 V::VisitUnallocated(instr);
230 if (instr->Bit(23) == 0) {
231 if (instr->Mask(0xC4400000) == 0xC0400000) {
232 V::VisitUnallocated(instr);
234 // Nontemporals are unimplemented.
235 V::VisitUnimplemented(instr);
238 V::VisitLoadStorePairPostIndex(instr);
243 if (instr->Bit(29) == 0) {
244 if (instr->Mask(0xC4000000) == 0xC4000000) {
245 V::VisitUnallocated(instr);
247 V::VisitLoadLiteral(instr);
250 if ((instr->Mask(0x84C00000) == 0x80C00000) ||
251 (instr->Mask(0x44800000) == 0x44800000) ||
252 (instr->Mask(0x84800000) == 0x84800000)) {
253 V::VisitUnallocated(instr);
255 if (instr->Bit(21) == 0) {
256 switch (instr->Bits(11, 10)) {
258 V::VisitLoadStoreUnscaledOffset(instr);
262 if (instr->Mask(0xC4C00000) == 0xC0800000) {
263 V::VisitUnallocated(instr);
265 V::VisitLoadStorePostIndex(instr);
270 // TODO(all): VisitLoadStoreRegisterOffsetUnpriv.
271 V::VisitUnimplemented(instr);
275 if (instr->Mask(0xC4C00000) == 0xC0800000) {
276 V::VisitUnallocated(instr);
278 V::VisitLoadStorePreIndex(instr);
284 if (instr->Bits(11, 10) == 0x2) {
285 if (instr->Bit(14) == 0) {
286 V::VisitUnallocated(instr);
288 V::VisitLoadStoreRegisterOffset(instr);
291 V::VisitUnallocated(instr);
298 if (instr->Bit(28) == 0) {
299 if (instr->Bit(29) == 0) {
300 V::VisitUnallocated(instr);
302 if ((instr->Bits(31, 30) == 0x3) ||
303 (instr->Mask(0xC4400000) == 0x40000000)) {
304 V::VisitUnallocated(instr);
306 if (instr->Bit(23) == 0) {
307 V::VisitLoadStorePairOffset(instr);
309 V::VisitLoadStorePairPreIndex(instr);
314 if (instr->Bit(29) == 0) {
315 V::VisitUnallocated(instr);
317 if ((instr->Mask(0x84C00000) == 0x80C00000) ||
318 (instr->Mask(0x44800000) == 0x44800000) ||
319 (instr->Mask(0x84800000) == 0x84800000)) {
320 V::VisitUnallocated(instr);
322 V::VisitLoadStoreUnsignedOffset(instr);
331 void Decoder<V>::DecodeLogical(Instruction* instr) {
332 DCHECK(instr->Bits(27, 24) == 0x2);
334 if (instr->Mask(0x80400000) == 0x00400000) {
335 V::VisitUnallocated(instr);
337 if (instr->Bit(23) == 0) {
338 V::VisitLogicalImmediate(instr);
340 if (instr->Bits(30, 29) == 0x1) {
341 V::VisitUnallocated(instr);
343 V::VisitMoveWideImmediate(instr);
351 void Decoder<V>::DecodeBitfieldExtract(Instruction* instr) {
352 DCHECK(instr->Bits(27, 24) == 0x3);
354 if ((instr->Mask(0x80400000) == 0x80000000) ||
355 (instr->Mask(0x80400000) == 0x00400000) ||
356 (instr->Mask(0x80008000) == 0x00008000)) {
357 V::VisitUnallocated(instr);
358 } else if (instr->Bit(23) == 0) {
359 if ((instr->Mask(0x80200000) == 0x00200000) ||
360 (instr->Mask(0x60000000) == 0x60000000)) {
361 V::VisitUnallocated(instr);
363 V::VisitBitfield(instr);
366 if ((instr->Mask(0x60200000) == 0x00200000) ||
367 (instr->Mask(0x60000000) != 0x00000000)) {
368 V::VisitUnallocated(instr);
370 V::VisitExtract(instr);
377 void Decoder<V>::DecodeAddSubImmediate(Instruction* instr) {
378 DCHECK(instr->Bits(27, 24) == 0x1);
379 if (instr->Bit(23) == 1) {
380 V::VisitUnallocated(instr);
382 V::VisitAddSubImmediate(instr);
388 void Decoder<V>::DecodeDataProcessing(Instruction* instr) {
389 DCHECK((instr->Bits(27, 24) == 0xA) ||
390 (instr->Bits(27, 24) == 0xB) );
392 if (instr->Bit(24) == 0) {
393 if (instr->Bit(28) == 0) {
394 if (instr->Mask(0x80008000) == 0x00008000) {
395 V::VisitUnallocated(instr);
397 V::VisitLogicalShifted(instr);
400 switch (instr->Bits(23, 21)) {
402 if (instr->Mask(0x0000FC00) != 0) {
403 V::VisitUnallocated(instr);
405 V::VisitAddSubWithCarry(instr);
410 if ((instr->Bit(29) == 0) ||
411 (instr->Mask(0x00000410) != 0)) {
412 V::VisitUnallocated(instr);
414 if (instr->Bit(11) == 0) {
415 V::VisitConditionalCompareRegister(instr);
417 V::VisitConditionalCompareImmediate(instr);
423 if (instr->Mask(0x20000800) != 0x00000000) {
424 V::VisitUnallocated(instr);
426 V::VisitConditionalSelect(instr);
431 if (instr->Bit(29) == 0x1) {
432 V::VisitUnallocated(instr);
434 if (instr->Bit(30) == 0) {
435 if ((instr->Bit(15) == 0x1) ||
436 (instr->Bits(15, 11) == 0) ||
437 (instr->Bits(15, 12) == 0x1) ||
438 (instr->Bits(15, 12) == 0x3) ||
439 (instr->Bits(15, 13) == 0x3) ||
440 (instr->Mask(0x8000EC00) == 0x00004C00) ||
441 (instr->Mask(0x8000E800) == 0x80004000) ||
442 (instr->Mask(0x8000E400) == 0x80004000)) {
443 V::VisitUnallocated(instr);
445 V::VisitDataProcessing2Source(instr);
448 if ((instr->Bit(13) == 1) ||
449 (instr->Bits(20, 16) != 0) ||
450 (instr->Bits(15, 14) != 0) ||
451 (instr->Mask(0xA01FFC00) == 0x00000C00) ||
452 (instr->Mask(0x201FF800) == 0x00001800)) {
453 V::VisitUnallocated(instr);
455 V::VisitDataProcessing1Source(instr);
464 case 7: V::VisitUnallocated(instr); break;
468 if (instr->Bit(28) == 0) {
469 if (instr->Bit(21) == 0) {
470 if ((instr->Bits(23, 22) == 0x3) ||
471 (instr->Mask(0x80008000) == 0x00008000)) {
472 V::VisitUnallocated(instr);
474 V::VisitAddSubShifted(instr);
477 if ((instr->Mask(0x00C00000) != 0x00000000) ||
478 (instr->Mask(0x00001400) == 0x00001400) ||
479 (instr->Mask(0x00001800) == 0x00001800)) {
480 V::VisitUnallocated(instr);
482 V::VisitAddSubExtended(instr);
486 if ((instr->Bit(30) == 0x1) ||
487 (instr->Bits(30, 29) == 0x1) ||
488 (instr->Mask(0xE0600000) == 0x00200000) ||
489 (instr->Mask(0xE0608000) == 0x00400000) ||
490 (instr->Mask(0x60608000) == 0x00408000) ||
491 (instr->Mask(0x60E00000) == 0x00E00000) ||
492 (instr->Mask(0x60E00000) == 0x00800000) ||
493 (instr->Mask(0x60E00000) == 0x00600000)) {
494 V::VisitUnallocated(instr);
496 V::VisitDataProcessing3Source(instr);
504 void Decoder<V>::DecodeFP(Instruction* instr) {
505 DCHECK((instr->Bits(27, 24) == 0xE) ||
506 (instr->Bits(27, 24) == 0xF) );
508 if (instr->Bit(28) == 0) {
509 DecodeAdvSIMDDataProcessing(instr);
511 if (instr->Bit(29) == 1) {
512 V::VisitUnallocated(instr);
514 if (instr->Bits(31, 30) == 0x3) {
515 V::VisitUnallocated(instr);
516 } else if (instr->Bits(31, 30) == 0x1) {
517 DecodeAdvSIMDDataProcessing(instr);
519 if (instr->Bit(24) == 0) {
520 if (instr->Bit(21) == 0) {
521 if ((instr->Bit(23) == 1) ||
522 (instr->Bit(18) == 1) ||
523 (instr->Mask(0x80008000) == 0x00000000) ||
524 (instr->Mask(0x000E0000) == 0x00000000) ||
525 (instr->Mask(0x000E0000) == 0x000A0000) ||
526 (instr->Mask(0x00160000) == 0x00000000) ||
527 (instr->Mask(0x00160000) == 0x00120000)) {
528 V::VisitUnallocated(instr);
530 V::VisitFPFixedPointConvert(instr);
533 if (instr->Bits(15, 10) == 32) {
534 V::VisitUnallocated(instr);
535 } else if (instr->Bits(15, 10) == 0) {
536 if ((instr->Bits(23, 22) == 0x3) ||
537 (instr->Mask(0x000E0000) == 0x000A0000) ||
538 (instr->Mask(0x000E0000) == 0x000C0000) ||
539 (instr->Mask(0x00160000) == 0x00120000) ||
540 (instr->Mask(0x00160000) == 0x00140000) ||
541 (instr->Mask(0x20C40000) == 0x00800000) ||
542 (instr->Mask(0x20C60000) == 0x00840000) ||
543 (instr->Mask(0xA0C60000) == 0x80060000) ||
544 (instr->Mask(0xA0C60000) == 0x00860000) ||
545 (instr->Mask(0xA0C60000) == 0x00460000) ||
546 (instr->Mask(0xA0CE0000) == 0x80860000) ||
547 (instr->Mask(0xA0CE0000) == 0x804E0000) ||
548 (instr->Mask(0xA0CE0000) == 0x000E0000) ||
549 (instr->Mask(0xA0D60000) == 0x00160000) ||
550 (instr->Mask(0xA0D60000) == 0x80560000) ||
551 (instr->Mask(0xA0D60000) == 0x80960000)) {
552 V::VisitUnallocated(instr);
554 V::VisitFPIntegerConvert(instr);
556 } else if (instr->Bits(14, 10) == 16) {
557 const Instr masked_A0DF8000 = instr->Mask(0xA0DF8000);
558 if ((instr->Mask(0x80180000) != 0) ||
559 (masked_A0DF8000 == 0x00020000) ||
560 (masked_A0DF8000 == 0x00030000) ||
561 (masked_A0DF8000 == 0x00068000) ||
562 (masked_A0DF8000 == 0x00428000) ||
563 (masked_A0DF8000 == 0x00430000) ||
564 (masked_A0DF8000 == 0x00468000) ||
565 (instr->Mask(0xA0D80000) == 0x00800000) ||
566 (instr->Mask(0xA0DE0000) == 0x00C00000) ||
567 (instr->Mask(0xA0DF0000) == 0x00C30000) ||
568 (instr->Mask(0xA0DC0000) == 0x00C40000)) {
569 V::VisitUnallocated(instr);
571 V::VisitFPDataProcessing1Source(instr);
573 } else if (instr->Bits(13, 10) == 8) {
574 if ((instr->Bits(15, 14) != 0) ||
575 (instr->Bits(2, 0) != 0) ||
576 (instr->Mask(0x80800000) != 0x00000000)) {
577 V::VisitUnallocated(instr);
579 V::VisitFPCompare(instr);
581 } else if (instr->Bits(12, 10) == 4) {
582 if ((instr->Bits(9, 5) != 0) ||
583 (instr->Mask(0x80800000) != 0x00000000)) {
584 V::VisitUnallocated(instr);
586 V::VisitFPImmediate(instr);
589 if (instr->Mask(0x80800000) != 0x00000000) {
590 V::VisitUnallocated(instr);
592 switch (instr->Bits(11, 10)) {
594 V::VisitFPConditionalCompare(instr);
598 if ((instr->Bits(15, 14) == 0x3) ||
599 (instr->Mask(0x00009000) == 0x00009000) ||
600 (instr->Mask(0x0000A000) == 0x0000A000)) {
601 V::VisitUnallocated(instr);
603 V::VisitFPDataProcessing2Source(instr);
608 V::VisitFPConditionalSelect(instr);
611 default: UNREACHABLE();
617 // Bit 30 == 1 has been handled earlier.
618 DCHECK(instr->Bit(30) == 0);
619 if (instr->Mask(0xA0800000) != 0) {
620 V::VisitUnallocated(instr);
622 V::VisitFPDataProcessing3Source(instr);
632 void Decoder<V>::DecodeAdvSIMDLoadStore(Instruction* instr) {
633 // TODO(all): Implement Advanced SIMD load/store instruction decode.
634 DCHECK(instr->Bits(29, 25) == 0x6);
635 V::VisitUnimplemented(instr);
640 void Decoder<V>::DecodeAdvSIMDDataProcessing(Instruction* instr) {
641 // TODO(all): Implement Advanced SIMD data processing instruction decode.
642 DCHECK(instr->Bits(27, 25) == 0x7);
643 V::VisitUnimplemented(instr);
647 } // namespace internal
650 #endif // V8_ARM64_DECODER_ARM64_INL_H_