1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are
6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided
11 // with the distribution.
12 // * Neither the name of Google Inc. nor the names of its
13 // contributors may be used to endorse or promote products derived
14 // from this software without specific prior written permission.
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 // Declares a Simulator for ARM instructions if we are not generating a native
30 // ARM binary. This Simulator allows us to run and debug ARM code generation on
31 // regular desktop machines.
32 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro,
33 // which will start execution in the Simulator or forwards to the real entry
34 // on a ARM HW platform.
36 #ifndef V8_ARM_SIMULATOR_ARM_H_
37 #define V8_ARM_SIMULATOR_ARM_H_
39 #include "allocation.h"
41 #if !defined(USE_SIMULATOR)
42 // Running without a simulator on a native arm platform.
47 // When running without a simulator we call the entry directly.
48 #define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \
49 (entry(p0, p1, p2, p3, p4))
51 typedef int (*arm_regexp_matcher)(String*, int, const byte*, const byte*,
52 void*, int*, int, Address, int, Isolate*);
55 // Call the generated regexp code directly. The code at the entry address
56 // should act as a function matching the type arm_regexp_matcher.
57 // The fifth argument is a dummy that reserves the space used for
58 // the return address added by the ExitFrame in native calls.
59 #define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6, p7, p8) \
60 (FUNCTION_CAST<arm_regexp_matcher>(entry)( \
61 p0, p1, p2, p3, NULL, p4, p5, p6, p7, p8))
63 #define TRY_CATCH_FROM_ADDRESS(try_catch_address) \
64 reinterpret_cast<TryCatch*>(try_catch_address)
66 // The stack limit beyond which we will throw stack overflow errors in
67 // generated code. Because generated code on arm uses the C stack, we
68 // just use the C stack limit.
69 class SimulatorStack : public v8::internal::AllStatic {
71 static inline uintptr_t JsLimitFromCLimit(v8::internal::Isolate* isolate,
77 static inline uintptr_t RegisterCTryCatch(uintptr_t try_catch_address) {
78 return try_catch_address;
81 static inline void UnregisterCTryCatch() { }
84 } } // namespace v8::internal
86 #else // !defined(USE_SIMULATOR)
87 // Running with a simulator.
89 #include "constants-arm.h"
91 #include "assembler.h"
98 static const int LINE_VALID = 0;
99 static const int LINE_INVALID = 1;
101 static const int kPageShift = 12;
102 static const int kPageSize = 1 << kPageShift;
103 static const int kPageMask = kPageSize - 1;
104 static const int kLineShift = 2; // The cache line is only 4 bytes right now.
105 static const int kLineLength = 1 << kLineShift;
106 static const int kLineMask = kLineLength - 1;
109 memset(&validity_map_, LINE_INVALID, sizeof(validity_map_));
112 char* ValidityByte(int offset) {
113 return &validity_map_[offset >> kLineShift];
116 char* CachedData(int offset) {
117 return &data_[offset];
121 char data_[kPageSize]; // The cached data.
122 static const int kValidityMapSize = kPageSize >> kLineShift;
123 char validity_map_[kValidityMapSize]; // One byte per line.
129 friend class ArmDebugger;
132 r0 = 0, r1, r2, r3, r4, r5, r6, r7,
133 r8, r9, r10, r11, r12, r13, r14, r15,
138 s0 = 0, s1, s2, s3, s4, s5, s6, s7,
139 s8, s9, s10, s11, s12, s13, s14, s15,
140 s16, s17, s18, s19, s20, s21, s22, s23,
141 s24, s25, s26, s27, s28, s29, s30, s31,
142 num_s_registers = 32,
143 d0 = 0, d1, d2, d3, d4, d5, d6, d7,
144 d8, d9, d10, d11, d12, d13, d14, d15,
145 d16, d17, d18, d19, d20, d21, d22, d23,
146 d24, d25, d26, d27, d28, d29, d30, d31,
147 num_d_registers = 32,
148 q0 = 0, q1, q2, q3, q4, q5, q6, q7,
149 q8, q9, q10, q11, q12, q13, q14, q15,
153 explicit Simulator(Isolate* isolate);
156 // The currently executing Simulator instance. Potentially there can be one
157 // for each native thread.
158 static Simulator* current(v8::internal::Isolate* isolate);
160 // Accessors for register state. Reading the pc value adheres to the ARM
161 // architecture specification and is off by a 8 from the currently executing
163 void set_register(int reg, int32_t value);
164 int32_t get_register(int reg) const;
165 double get_double_from_register_pair(int reg);
166 void set_register_pair_from_double(int reg, double* value);
167 void set_dw_register(int dreg, const int* dbl);
170 void get_d_register(int dreg, uint64_t* value);
171 void set_d_register(int dreg, const uint64_t* value);
172 void get_d_register(int dreg, uint32_t* value);
173 void set_d_register(int dreg, const uint32_t* value);
174 void get_q_register(int qreg, uint64_t* value);
175 void set_q_register(int qreg, const uint64_t* value);
176 void get_q_register(int qreg, uint32_t* value);
177 void set_q_register(int qreg, const uint32_t* value);
179 void set_s_register(int reg, unsigned int value);
180 unsigned int get_s_register(int reg) const;
182 void set_d_register_from_double(int dreg, const double& dbl) {
183 SetVFPRegister<double, 2>(dreg, dbl);
186 double get_double_from_d_register(int dreg) {
187 return GetFromVFPRegister<double, 2>(dreg);
190 void set_s_register_from_float(int sreg, const float flt) {
191 SetVFPRegister<float, 1>(sreg, flt);
194 float get_float_from_s_register(int sreg) {
195 return GetFromVFPRegister<float, 1>(sreg);
198 void set_s_register_from_sinteger(int sreg, const int sint) {
199 SetVFPRegister<int, 1>(sreg, sint);
202 int get_sinteger_from_s_register(int sreg) {
203 return GetFromVFPRegister<int, 1>(sreg);
206 // Special case of set_register and get_register to access the raw PC value.
207 void set_pc(int32_t value);
208 int32_t get_pc() const;
211 return reinterpret_cast<Address>(static_cast<intptr_t>(get_register(sp)));
214 // Accessor to the internal simulator stack area.
215 uintptr_t StackLimit() const;
217 // Executes ARM instructions until the PC reaches end_sim_pc.
220 // Call on program start.
221 static void Initialize(Isolate* isolate);
223 // V8 generally calls into generated JS code with 5 parameters and into
224 // generated RegExp code with 7 parameters. This is a convenience function,
225 // which sets up the simulator state and grabs the result on return.
226 int32_t Call(byte* entry, int argument_count, ...);
227 // Alternative: call a 2-argument double function.
228 void CallFP(byte* entry, double d0, double d1);
229 int32_t CallFPReturnsInt(byte* entry, double d0, double d1);
230 double CallFPReturnsDouble(byte* entry, double d0, double d1);
232 // Push an address onto the JS stack.
233 uintptr_t PushAddress(uintptr_t address);
235 // Pop an address from the JS stack.
236 uintptr_t PopAddress();
239 void set_last_debugger_input(char* input);
240 char* last_debugger_input() { return last_debugger_input_; }
243 static void FlushICache(v8::internal::HashMap* i_cache, void* start,
246 // Returns true if pc register contains one of the 'special_values' defined
247 // below (bad_lr, end_sim_pc).
248 bool has_bad_pc() const;
250 // EABI variant for double arguments in use.
251 bool use_eabi_hardfloat() {
252 #if USE_EABI_HARDFLOAT
260 enum special_values {
261 // Known bad pc value to ensure that the simulator does not execute
262 // without being properly setup.
264 // A pc value used to signal the simulator to stop execution. Generally
265 // the lr is set to this value on transition from native C code to
266 // simulated execution, so that the simulator can "return" to the native
271 // Unsupported instructions use Format to print an error and stop execution.
272 void Format(Instruction* instr, const char* format);
274 // Checks if the current instruction should be executed based on its
276 inline bool ConditionallyExecute(Instruction* instr);
278 // Helper functions to set the conditional flags in the architecture state.
279 void SetNZFlags(int32_t val);
280 void SetCFlag(bool val);
281 void SetVFlag(bool val);
282 bool CarryFrom(int32_t left, int32_t right, int32_t carry = 0);
283 bool BorrowFrom(int32_t left, int32_t right);
284 bool OverflowFrom(int32_t alu_out,
289 inline int GetCarry() {
290 return c_flag_ ? 1 : 0;
294 void Compute_FPSCR_Flags(double val1, double val2);
295 void Copy_FPSCR_to_APSR();
296 inline double canonicalizeNaN(double value);
298 // Helper functions to decode common "addressing" modes
299 int32_t GetShiftRm(Instruction* instr, bool* carry_out);
300 int32_t GetImm(Instruction* instr, bool* carry_out);
301 int32_t ProcessPU(Instruction* instr,
304 intptr_t* start_address,
305 intptr_t* end_address);
306 void HandleRList(Instruction* instr, bool load);
307 void HandleVList(Instruction* inst);
308 void SoftwareInterrupt(Instruction* instr);
310 // Stop helper functions.
311 inline bool isStopInstruction(Instruction* instr);
312 inline bool isWatchedStop(uint32_t bkpt_code);
313 inline bool isEnabledStop(uint32_t bkpt_code);
314 inline void EnableStop(uint32_t bkpt_code);
315 inline void DisableStop(uint32_t bkpt_code);
316 inline void IncreaseStopCounter(uint32_t bkpt_code);
317 void PrintStopInfo(uint32_t code);
319 // Read and write memory.
320 inline uint8_t ReadBU(int32_t addr);
321 inline int8_t ReadB(int32_t addr);
322 inline void WriteB(int32_t addr, uint8_t value);
323 inline void WriteB(int32_t addr, int8_t value);
325 inline uint16_t ReadHU(int32_t addr, Instruction* instr);
326 inline int16_t ReadH(int32_t addr, Instruction* instr);
327 // Note: Overloaded on the sign of the value.
328 inline void WriteH(int32_t addr, uint16_t value, Instruction* instr);
329 inline void WriteH(int32_t addr, int16_t value, Instruction* instr);
331 inline int ReadW(int32_t addr, Instruction* instr);
332 inline void WriteW(int32_t addr, int value, Instruction* instr);
334 int32_t* ReadDW(int32_t addr);
335 void WriteDW(int32_t addr, int32_t value1, int32_t value2);
337 // Executing is handled based on the instruction type.
338 // Both type 0 and type 1 rolled into one.
339 void DecodeType01(Instruction* instr);
340 void DecodeType2(Instruction* instr);
341 void DecodeType3(Instruction* instr);
342 void DecodeType4(Instruction* instr);
343 void DecodeType5(Instruction* instr);
344 void DecodeType6(Instruction* instr);
345 void DecodeType7(Instruction* instr);
348 void DecodeTypeVFP(Instruction* instr);
349 void DecodeType6CoprocessorIns(Instruction* instr);
350 void DecodeSpecialCondition(Instruction* instr);
352 void DecodeVMOVBetweenCoreAndSinglePrecisionRegisters(Instruction* instr);
353 void DecodeVCMP(Instruction* instr);
354 void DecodeVCVTBetweenDoubleAndSingle(Instruction* instr);
355 void DecodeVCVTBetweenFloatingPointAndInteger(Instruction* instr);
357 // Executes one instruction.
358 void InstructionDecode(Instruction* instr);
361 static void CheckICache(v8::internal::HashMap* i_cache, Instruction* instr);
362 static void FlushOnePage(v8::internal::HashMap* i_cache, intptr_t start,
364 static CachePage* GetCachePage(v8::internal::HashMap* i_cache, void* page);
366 // Runtime call support.
367 static void* RedirectExternalReference(
368 void* external_function,
369 v8::internal::ExternalReference::Type type);
371 // Handle arguments and return value for runtime FP functions.
372 void GetFpArgs(double* x, double* y, int32_t* z);
373 void SetFpResult(const double& result);
374 void TrashCallerSaveRegisters();
376 template<class ReturnType, int register_size>
377 ReturnType GetFromVFPRegister(int reg_index);
379 template<class InputType, int register_size>
380 void SetVFPRegister(int reg_index, const InputType& value);
382 void CallInternal(byte* entry);
384 // Architecture state.
385 // Saturating instructions require a Q flag to indicate saturation.
386 // There is currently no way to read the CPSR directly, and thus read the Q
387 // flag, so this is left unimplemented.
388 int32_t registers_[16];
394 // VFP architecture state.
395 unsigned int vfp_registers_[num_d_registers * 2];
401 // VFP rounding mode. See ARM DDI 0406B Page A2-29.
402 VFPRoundingMode FPSCR_rounding_mode_;
403 bool FPSCR_default_NaN_mode_;
405 // VFP FP exception flags architecture state.
406 bool inv_op_vfp_flag_;
407 bool div_zero_vfp_flag_;
408 bool overflow_vfp_flag_;
409 bool underflow_vfp_flag_;
410 bool inexact_vfp_flag_;
412 // Simulator support.
418 char* last_debugger_input_;
421 v8::internal::HashMap* i_cache_;
423 // Registered breakpoints.
424 Instruction* break_pc_;
427 v8::internal::Isolate* isolate_;
429 // A stop is watched if its code is less than kNumOfWatchedStops.
430 // Only watched stops support enabling/disabling and the counter feature.
431 static const uint32_t kNumOfWatchedStops = 256;
433 // Breakpoint is disabled if bit 31 is set.
434 static const uint32_t kStopDisabledBit = 1 << 31;
436 // A stop is enabled, meaning the simulator will stop when meeting the
437 // instruction, if bit 31 of watched_stops_[code].count is unset.
438 // The value watched_stops_[code].count & ~(1 << 31) indicates how many times
439 // the breakpoint was hit or gone through.
440 struct StopCountAndDesc {
444 StopCountAndDesc watched_stops_[kNumOfWatchedStops];
448 // When running with the simulator transition into simulated execution at this
450 #define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \
451 reinterpret_cast<Object*>(Simulator::current(Isolate::Current())->Call( \
452 FUNCTION_ADDR(entry), 5, p0, p1, p2, p3, p4))
454 #define CALL_GENERATED_FP_INT(entry, p0, p1) \
455 Simulator::current(Isolate::Current())->CallFPReturnsInt( \
456 FUNCTION_ADDR(entry), p0, p1)
458 #define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6, p7, p8) \
459 Simulator::current(Isolate::Current())->Call( \
460 entry, 10, p0, p1, p2, p3, NULL, p4, p5, p6, p7, p8)
462 #define TRY_CATCH_FROM_ADDRESS(try_catch_address) \
463 try_catch_address == NULL ? \
464 NULL : *(reinterpret_cast<TryCatch**>(try_catch_address))
467 // The simulator has its own stack. Thus it has a different stack limit from
468 // the C-based native code. Setting the c_limit to indicate a very small
469 // stack cause stack overflow errors, since the simulator ignores the input.
470 // This is unlikely to be an issue in practice, though it might cause testing
471 // trouble down the line.
472 class SimulatorStack : public v8::internal::AllStatic {
474 static inline uintptr_t JsLimitFromCLimit(v8::internal::Isolate* isolate,
476 return Simulator::current(isolate)->StackLimit();
479 static inline uintptr_t RegisterCTryCatch(uintptr_t try_catch_address) {
480 Simulator* sim = Simulator::current(Isolate::Current());
481 return sim->PushAddress(try_catch_address);
484 static inline void UnregisterCTryCatch() {
485 Simulator::current(Isolate::Current())->PopAddress();
489 } } // namespace v8::internal
491 #endif // !defined(USE_SIMULATOR)
492 #endif // V8_ARM_SIMULATOR_ARM_H_