1 /* Copyright (c) 2009, 2010, 2011, 2012 ARM Ltd.
3 Permission is hereby granted, free of charge, to any person obtaining
4 a copy of this software and associated documentation files (the
5 ``Software''), to deal in the Software without restriction, including
6 without limitation the rights to use, copy, modify, merge, publish,
7 distribute, sublicense, and/or sell copies of the Software, and to
8 permit persons to whom the Software is furnished to do so, subject to
9 the following conditions:
11 The above copyright notice and this permission notice shall be
12 included in all copies or substantial portions of the Software.
14 THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
15 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
16 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
17 IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
18 CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
19 TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
20 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
23 #include <fficonfig.h>
26 #define cfi_adjust_cfa_offset(off) .cfi_adjust_cfa_offset off
27 #define cfi_rel_offset(reg, off) .cfi_rel_offset reg, off
28 #define cfi_restore(reg) .cfi_restore reg
29 #define cfi_def_cfa_register(reg) .cfi_def_cfa_register reg
33 .type ffi_call_SYSV, #function
37 Create a stack frame, setup an argument context, call the callee
38 and extract the result.
40 The maximum required argument stack size is provided,
41 ffi_call_SYSV() allocates that stack space then calls the
42 prepare_fn to populate register context and stack. The
43 argument passing registers are loaded from the register
44 context and the callee called, on return the register passing
45 register are saved back to the context. Our caller will
46 extract the return value from the final state of the saved
52 ffi_call_SYSV (void (*)(struct call_context *context, unsigned char *,
54 struct call_context *context,
56 unsigned required_stack_size,
59 Therefore on entry we have:
67 This function uses the following stack frame layout:
71 x29(fp)-> saved x29(fp)
77 sp -> (constructed callee stack arguments)
82 #define ffi_call_SYSV_FS (8 * 4)
86 stp x29, x30, [sp, #-16]!
87 cfi_adjust_cfa_offset (16)
88 cfi_rel_offset (x29, 0)
89 cfi_rel_offset (x30, 8)
92 cfi_def_cfa_register (x29)
93 sub sp, sp, #ffi_call_SYSV_FS
96 cfi_rel_offset (x21, 0 - ffi_call_SYSV_FS)
97 cfi_rel_offset (x22, 8 - ffi_call_SYSV_FS)
99 stp x23, x24, [sp, 16]
100 cfi_rel_offset (x23, 16 - ffi_call_SYSV_FS)
101 cfi_rel_offset (x24, 24 - ffi_call_SYSV_FS)
107 /* Allocate the stack space for the actual arguments, many
108 arguments will be passed in registers, but we assume
109 worst case and allocate sufficient stack for ALL of
113 /* unsigned (*prepare_fn) (struct call_context *context,
114 unsigned char *stack, extended_cif *ecif);
119 /* x2 already in place */
122 /* Preserve the flags returned. */
125 /* Figure out if we should touch the vector registers. */
126 tbz x23, #AARCH64_FFI_WITH_V_BIT, 1f
128 /* Load the vector argument passing registers. */
129 ldp q0, q1, [x21, #8*32 + 0]
130 ldp q2, q3, [x21, #8*32 + 32]
131 ldp q4, q5, [x21, #8*32 + 64]
132 ldp q6, q7, [x21, #8*32 + 96]
134 /* Load the core argument passing registers. */
135 ldp x0, x1, [x21, #0]
136 ldp x2, x3, [x21, #16]
137 ldp x4, x5, [x21, #32]
138 ldp x6, x7, [x21, #48]
140 /* Don't forget x8 which may be holding the address of a return buffer.
146 /* Save the core argument passing registers. */
147 stp x0, x1, [x21, #0]
148 stp x2, x3, [x21, #16]
149 stp x4, x5, [x21, #32]
150 stp x6, x7, [x21, #48]
152 /* Note nothing useful ever comes back in x8! */
154 /* Figure out if we should touch the vector registers. */
155 tbz x23, #AARCH64_FFI_WITH_V_BIT, 1f
157 /* Save the vector argument passing registers. */
158 stp q0, q1, [x21, #8*32 + 0]
159 stp q2, q3, [x21, #8*32 + 32]
160 stp q4, q5, [x21, #8*32 + 64]
161 stp q6, q7, [x21, #8*32 + 96]
163 /* All done, unwind our stack frame. */
164 ldp x21, x22, [x29, # - ffi_call_SYSV_FS]
168 ldp x23, x24, [x29, # - ffi_call_SYSV_FS + 16]
173 cfi_def_cfa_register (sp)
175 ldp x29, x30, [sp], #16
176 cfi_adjust_cfa_offset (-16)
183 .size ffi_call_SYSV, .-ffi_call_SYSV
185 #define ffi_closure_SYSV_FS (8 * 2 + AARCH64_CALL_CONTEXT_SIZE)
189 Closure invocation glue. This is the low level code invoked directly by
190 the closure trampoline to setup and call a closure.
192 On entry x17 points to a struct trampoline_data, x16 has been clobbered
193 all other registers are preserved.
195 We allocate a call context and save the argument passing registers,
196 then invoked the generic C ffi_closure_SYSV_inner() function to do all
197 the real work, on return we load the result passing registers back from
203 ffi_closure_SYSV (struct trampoline_data *);
205 struct trampoline_data
211 This function uses the following stack frame layout:
215 x29(fp)-> saved x29(fp)
225 .globl ffi_closure_SYSV
228 stp x29, x30, [sp, #-16]!
229 cfi_adjust_cfa_offset (16)
230 cfi_rel_offset (x29, 0)
231 cfi_rel_offset (x30, 8)
235 sub sp, sp, #ffi_closure_SYSV_FS
236 cfi_adjust_cfa_offset (ffi_closure_SYSV_FS)
238 stp x21, x22, [x29, #-16]
239 cfi_rel_offset (x21, 0)
240 cfi_rel_offset (x22, 8)
242 /* Load x21 with &call_context. */
244 /* Preserve our struct trampoline_data * */
247 /* Save the rest of the argument passing registers. */
248 stp x0, x1, [x21, #0]
249 stp x2, x3, [x21, #16]
250 stp x4, x5, [x21, #32]
251 stp x6, x7, [x21, #48]
252 /* Don't forget we may have been given a result scratch pad address.
256 /* Figure out if we should touch the vector registers. */
258 tbz x0, #AARCH64_FFI_WITH_V_BIT, 1f
260 /* Save the argument passing vector registers. */
261 stp q0, q1, [x21, #8*32 + 0]
262 stp q2, q3, [x21, #8*32 + 32]
263 stp q4, q5, [x21, #8*32 + 64]
264 stp q6, q7, [x21, #8*32 + 96]
266 /* Load &ffi_closure.. */
269 /* Compute the location of the stack at the point that the
270 trampoline was called. */
273 bl ffi_closure_SYSV_inner
275 /* Figure out if we should touch the vector registers. */
277 tbz x0, #AARCH64_FFI_WITH_V_BIT, 1f
279 /* Load the result passing vector registers. */
280 ldp q0, q1, [x21, #8*32 + 0]
281 ldp q2, q3, [x21, #8*32 + 32]
282 ldp q4, q5, [x21, #8*32 + 64]
283 ldp q6, q7, [x21, #8*32 + 96]
285 /* Load the result passing core registers. */
286 ldp x0, x1, [x21, #0]
287 ldp x2, x3, [x21, #16]
288 ldp x4, x5, [x21, #32]
289 ldp x6, x7, [x21, #48]
290 /* Note nothing usefull is returned in x8. */
292 /* We are done, unwind our frame. */
293 ldp x21, x22, [x29, #-16]
298 cfi_adjust_cfa_offset (-ffi_closure_SYSV_FS)
300 ldp x29, x30, [sp], #16
301 cfi_adjust_cfa_offset (-16)
307 .size ffi_closure_SYSV, .-ffi_closure_SYSV