2 * Driver for CS4231 sound chips found on Sparcs.
3 * Copyright (C) 2002, 2008 David S. Miller <davem@davemloft.net>
5 * Based entirely upon drivers/sbus/audio/cs4231.c which is:
6 * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
7 * and also sound/isa/cs423x/cs4231_lib.c which is:
8 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/delay.h>
14 #include <linux/init.h>
15 #include <linux/interrupt.h>
16 #include <linux/moduleparam.h>
17 #include <linux/irq.h>
20 #include <linux/of_device.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/info.h>
25 #include <sound/control.h>
26 #include <sound/timer.h>
27 #include <sound/initval.h>
28 #include <sound/pcm_params.h>
34 #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
36 #include <linux/pci.h>
37 #include <asm/ebus_dma.h>
40 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
41 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
42 /* Enable this card */
43 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
45 module_param_array(index, int, NULL, 0444);
46 MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
47 module_param_array(id, charp, NULL, 0444);
48 MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
49 module_param_array(enable, bool, NULL, 0444);
50 MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
51 MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
52 MODULE_DESCRIPTION("Sun CS4231");
53 MODULE_LICENSE("GPL");
54 MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
57 struct sbus_dma_info {
58 spinlock_t lock; /* DMA access lock */
65 struct cs4231_dma_control {
66 void (*prepare)(struct cs4231_dma_control *dma_cont,
68 void (*enable)(struct cs4231_dma_control *dma_cont, int on);
69 int (*request)(struct cs4231_dma_control *dma_cont,
70 dma_addr_t bus_addr, size_t len);
71 unsigned int (*address)(struct cs4231_dma_control *dma_cont);
73 struct ebus_dma_info ebus_info;
76 struct sbus_dma_info sbus_info;
81 spinlock_t lock; /* registers access lock */
84 struct cs4231_dma_control p_dma;
85 struct cs4231_dma_control c_dma;
88 #define CS4231_FLAG_EBUS 0x00000001
89 #define CS4231_FLAG_PLAYBACK 0x00000002
90 #define CS4231_FLAG_CAPTURE 0x00000004
92 struct snd_card *card;
94 struct snd_pcm_substream *playback_substream;
95 unsigned int p_periods_sent;
96 struct snd_pcm_substream *capture_substream;
97 unsigned int c_periods_sent;
98 struct snd_timer *timer;
101 #define CS4231_MODE_NONE 0x0000
102 #define CS4231_MODE_PLAY 0x0001
103 #define CS4231_MODE_RECORD 0x0002
104 #define CS4231_MODE_TIMER 0x0004
105 #define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \
108 unsigned char image[32]; /* registers image */
111 struct mutex mce_mutex; /* mutex for mce register */
112 struct mutex open_mutex; /* mutex for ALSA open/close */
114 struct platform_device *op;
116 unsigned int regs_size;
117 struct snd_cs4231 *next;
120 /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
125 #include <sound/cs4231-regs.h>
127 /* XXX offsets are different than PC ISA chips... */
128 #define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2))
130 /* SBUS DMA register defines. */
132 #define APCCSR 0x10UL /* APC DMA CSR */
133 #define APCCVA 0x20UL /* APC Capture DMA Address */
134 #define APCCC 0x24UL /* APC Capture Count */
135 #define APCCNVA 0x28UL /* APC Capture DMA Next Address */
136 #define APCCNC 0x2cUL /* APC Capture Next Count */
137 #define APCPVA 0x30UL /* APC Play DMA Address */
138 #define APCPC 0x34UL /* APC Play Count */
139 #define APCPNVA 0x38UL /* APC Play DMA Next Address */
140 #define APCPNC 0x3cUL /* APC Play Next Count */
142 /* Defines for SBUS DMA-routines */
144 #define APCVA 0x0UL /* APC DMA Address */
145 #define APCC 0x4UL /* APC Count */
146 #define APCNVA 0x8UL /* APC DMA Next Address */
147 #define APCNC 0xcUL /* APC Next Count */
148 #define APC_PLAY 0x30UL /* Play registers start at 0x30 */
149 #define APC_RECORD 0x20UL /* Record registers start at 0x20 */
153 #define APC_INT_PENDING 0x800000 /* Interrupt Pending */
154 #define APC_PLAY_INT 0x400000 /* Playback interrupt */
155 #define APC_CAPT_INT 0x200000 /* Capture interrupt */
156 #define APC_GENL_INT 0x100000 /* General interrupt */
157 #define APC_XINT_ENA 0x80000 /* General ext int. enable */
158 #define APC_XINT_PLAY 0x40000 /* Playback ext intr */
159 #define APC_XINT_CAPT 0x20000 /* Capture ext intr */
160 #define APC_XINT_GENL 0x10000 /* Error ext intr */
161 #define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */
162 #define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */
163 #define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */
164 #define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */
165 #define APC_XINT_COVF 0x800 /* Cap data dropped on floor */
166 #define APC_XINT_CNVA 0x400 /* Capture NVA dirty */
167 #define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */
168 #define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */
169 #define APC_PPAUSE 0x80 /* Pause the play DMA */
170 #define APC_CPAUSE 0x40 /* Pause the capture DMA */
171 #define APC_CDC_RESET 0x20 /* CODEC RESET */
172 #define APC_PDMA_READY 0x08 /* Play DMA Go */
173 #define APC_CDMA_READY 0x04 /* Capture DMA Go */
174 #define APC_CHIP_RESET 0x01 /* Reset the chip */
176 /* EBUS DMA register offsets */
178 #define EBDMA_CSR 0x00UL /* Control/Status */
179 #define EBDMA_ADDR 0x04UL /* DMA Address */
180 #define EBDMA_COUNT 0x08UL /* DMA Count */
186 static unsigned char freq_bits[14] = {
187 /* 5510 */ 0x00 | CS4231_XTAL2,
188 /* 6620 */ 0x0E | CS4231_XTAL2,
189 /* 8000 */ 0x00 | CS4231_XTAL1,
190 /* 9600 */ 0x0E | CS4231_XTAL1,
191 /* 11025 */ 0x02 | CS4231_XTAL2,
192 /* 16000 */ 0x02 | CS4231_XTAL1,
193 /* 18900 */ 0x04 | CS4231_XTAL2,
194 /* 22050 */ 0x06 | CS4231_XTAL2,
195 /* 27042 */ 0x04 | CS4231_XTAL1,
196 /* 32000 */ 0x06 | CS4231_XTAL1,
197 /* 33075 */ 0x0C | CS4231_XTAL2,
198 /* 37800 */ 0x08 | CS4231_XTAL2,
199 /* 44100 */ 0x0A | CS4231_XTAL2,
200 /* 48000 */ 0x0C | CS4231_XTAL1
203 static unsigned int rates[14] = {
204 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
205 27042, 32000, 33075, 37800, 44100, 48000
208 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
209 .count = ARRAY_SIZE(rates),
213 static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
215 return snd_pcm_hw_constraint_list(runtime, 0,
216 SNDRV_PCM_HW_PARAM_RATE,
217 &hw_constraints_rates);
220 static unsigned char snd_cs4231_original_image[32] =
222 0x00, /* 00/00 - lic */
223 0x00, /* 01/01 - ric */
224 0x9f, /* 02/02 - la1ic */
225 0x9f, /* 03/03 - ra1ic */
226 0x9f, /* 04/04 - la2ic */
227 0x9f, /* 05/05 - ra2ic */
228 0xbf, /* 06/06 - loc */
229 0xbf, /* 07/07 - roc */
230 0x20, /* 08/08 - pdfr */
231 CS4231_AUTOCALIB, /* 09/09 - ic */
232 0x00, /* 0a/10 - pc */
233 0x00, /* 0b/11 - ti */
234 CS4231_MODE2, /* 0c/12 - mi */
235 0x00, /* 0d/13 - lbc */
236 0x00, /* 0e/14 - pbru */
237 0x00, /* 0f/15 - pbrl */
238 0x80, /* 10/16 - afei */
239 0x01, /* 11/17 - afeii */
240 0x9f, /* 12/18 - llic */
241 0x9f, /* 13/19 - rlic */
242 0x00, /* 14/20 - tlb */
243 0x00, /* 15/21 - thb */
244 0x00, /* 16/22 - la3mic/reserved */
245 0x00, /* 17/23 - ra3mic/reserved */
246 0x00, /* 18/24 - afs */
247 0x00, /* 19/25 - lamoc/version */
248 0x00, /* 1a/26 - mioc */
249 0x00, /* 1b/27 - ramoc/reserved */
250 0x20, /* 1c/28 - cdfr */
251 0x00, /* 1d/29 - res4 */
252 0x00, /* 1e/30 - cbru */
253 0x00, /* 1f/31 - cbrl */
256 static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
258 if (cp->flags & CS4231_FLAG_EBUS)
259 return readb(reg_addr);
261 return sbus_readb(reg_addr);
264 static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val,
265 void __iomem *reg_addr)
267 if (cp->flags & CS4231_FLAG_EBUS)
268 return writeb(val, reg_addr);
270 return sbus_writeb(val, reg_addr);
274 * Basic I/O functions
277 static void snd_cs4231_ready(struct snd_cs4231 *chip)
281 for (timeout = 250; timeout > 0; timeout--) {
282 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
283 if ((val & CS4231_INIT) == 0)
289 static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg,
292 snd_cs4231_ready(chip);
293 #ifdef CONFIG_SND_DEBUG
294 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
295 snd_printdd("out: auto calibration time out - reg = 0x%x, "
299 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
301 __cs4231_writeb(chip, value, CS4231U(chip, REG));
305 static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
306 unsigned char mask, unsigned char value)
308 unsigned char tmp = (chip->image[reg] & mask) | value;
310 chip->image[reg] = tmp;
311 if (!chip->calibrate_mute)
312 snd_cs4231_dout(chip, reg, tmp);
315 static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg,
318 snd_cs4231_dout(chip, reg, value);
319 chip->image[reg] = value;
323 static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
325 snd_cs4231_ready(chip);
326 #ifdef CONFIG_SND_DEBUG
327 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
328 snd_printdd("in: auto calibration time out - reg = 0x%x\n",
331 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
333 return __cs4231_readb(chip, CS4231U(chip, REG));
337 * CS4231 detection / MCE routines
340 static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
344 /* looks like this sequence is proper for CS4231A chip (GUS MAX) */
345 for (timeout = 5; timeout > 0; timeout--)
346 __cs4231_readb(chip, CS4231U(chip, REGSEL));
348 /* end of cleanup sequence */
349 for (timeout = 500; timeout > 0; timeout--) {
350 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
351 if ((val & CS4231_INIT) == 0)
357 static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
362 spin_lock_irqsave(&chip->lock, flags);
363 snd_cs4231_ready(chip);
364 #ifdef CONFIG_SND_DEBUG
365 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
366 snd_printdd("mce_up - auto calibration time out (0)\n");
368 chip->mce_bit |= CS4231_MCE;
369 timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL));
371 snd_printdd("mce_up [%p]: serious init problem - "
372 "codec still busy\n",
374 if (!(timeout & CS4231_MCE))
375 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f),
376 CS4231U(chip, REGSEL));
377 spin_unlock_irqrestore(&chip->lock, flags);
380 static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
382 unsigned long flags, timeout;
385 snd_cs4231_busy_wait(chip);
386 spin_lock_irqsave(&chip->lock, flags);
387 #ifdef CONFIG_SND_DEBUG
388 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
389 snd_printdd("mce_down [%p] - auto calibration time out (0)\n",
390 CS4231U(chip, REGSEL));
392 chip->mce_bit &= ~CS4231_MCE;
393 reg = __cs4231_readb(chip, CS4231U(chip, REGSEL));
394 __cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f),
395 CS4231U(chip, REGSEL));
397 snd_printdd("mce_down [%p]: serious init problem "
398 "- codec still busy\n", chip->port);
399 if ((reg & CS4231_MCE) == 0) {
400 spin_unlock_irqrestore(&chip->lock, flags);
405 * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low.
407 timeout = jiffies + msecs_to_jiffies(250);
409 spin_unlock_irqrestore(&chip->lock, flags);
411 spin_lock_irqsave(&chip->lock, flags);
412 reg = snd_cs4231_in(chip, CS4231_TEST_INIT);
413 reg &= CS4231_CALIB_IN_PROGRESS;
414 } while (reg && time_before(jiffies, timeout));
415 spin_unlock_irqrestore(&chip->lock, flags);
419 "mce_down - auto calibration time out (2)\n");
422 static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
423 struct snd_pcm_substream *substream,
424 unsigned int *periods_sent)
426 struct snd_pcm_runtime *runtime = substream->runtime;
429 unsigned int period_size = snd_pcm_lib_period_bytes(substream);
430 unsigned int offset = period_size * (*periods_sent);
432 if (WARN_ON(period_size >= (1 << 24)))
435 if (dma_cont->request(dma_cont,
436 runtime->dma_addr + offset, period_size))
438 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
442 static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
443 unsigned int what, int on)
445 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
446 struct cs4231_dma_control *dma_cont;
448 if (what & CS4231_PLAYBACK_ENABLE) {
449 dma_cont = &chip->p_dma;
451 dma_cont->prepare(dma_cont, 0);
452 dma_cont->enable(dma_cont, 1);
453 snd_cs4231_advance_dma(dma_cont,
454 chip->playback_substream,
455 &chip->p_periods_sent);
457 dma_cont->enable(dma_cont, 0);
460 if (what & CS4231_RECORD_ENABLE) {
461 dma_cont = &chip->c_dma;
463 dma_cont->prepare(dma_cont, 1);
464 dma_cont->enable(dma_cont, 1);
465 snd_cs4231_advance_dma(dma_cont,
466 chip->capture_substream,
467 &chip->c_periods_sent);
469 dma_cont->enable(dma_cont, 0);
474 static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
476 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
480 case SNDRV_PCM_TRIGGER_START:
481 case SNDRV_PCM_TRIGGER_STOP:
483 unsigned int what = 0;
484 struct snd_pcm_substream *s;
487 snd_pcm_group_for_each_entry(s, substream) {
488 if (s == chip->playback_substream) {
489 what |= CS4231_PLAYBACK_ENABLE;
490 snd_pcm_trigger_done(s, substream);
491 } else if (s == chip->capture_substream) {
492 what |= CS4231_RECORD_ENABLE;
493 snd_pcm_trigger_done(s, substream);
497 spin_lock_irqsave(&chip->lock, flags);
498 if (cmd == SNDRV_PCM_TRIGGER_START) {
499 cs4231_dma_trigger(substream, what, 1);
500 chip->image[CS4231_IFACE_CTRL] |= what;
502 cs4231_dma_trigger(substream, what, 0);
503 chip->image[CS4231_IFACE_CTRL] &= ~what;
505 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
506 chip->image[CS4231_IFACE_CTRL]);
507 spin_unlock_irqrestore(&chip->lock, flags);
522 static unsigned char snd_cs4231_get_rate(unsigned int rate)
526 for (i = 0; i < 14; i++)
527 if (rate == rates[i])
530 return freq_bits[13];
533 static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format,
536 unsigned char rformat;
538 rformat = CS4231_LINEAR_8;
540 case SNDRV_PCM_FORMAT_MU_LAW:
541 rformat = CS4231_ULAW_8;
543 case SNDRV_PCM_FORMAT_A_LAW:
544 rformat = CS4231_ALAW_8;
546 case SNDRV_PCM_FORMAT_S16_LE:
547 rformat = CS4231_LINEAR_16;
549 case SNDRV_PCM_FORMAT_S16_BE:
550 rformat = CS4231_LINEAR_16_BIG;
552 case SNDRV_PCM_FORMAT_IMA_ADPCM:
553 rformat = CS4231_ADPCM_16;
557 rformat |= CS4231_STEREO;
561 static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
566 spin_lock_irqsave(&chip->lock, flags);
567 if (chip->calibrate_mute == mute) {
568 spin_unlock_irqrestore(&chip->lock, flags);
572 snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
573 chip->image[CS4231_LEFT_INPUT]);
574 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
575 chip->image[CS4231_RIGHT_INPUT]);
576 snd_cs4231_dout(chip, CS4231_LOOPBACK,
577 chip->image[CS4231_LOOPBACK]);
579 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
580 mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
581 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
582 mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
583 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
584 mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
585 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
586 mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
587 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
588 mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
589 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
590 mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
591 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
592 mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
593 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
594 mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
595 snd_cs4231_dout(chip, CS4231_MONO_CTRL,
596 mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
597 chip->calibrate_mute = mute;
598 spin_unlock_irqrestore(&chip->lock, flags);
601 static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
602 struct snd_pcm_hw_params *params,
607 mutex_lock(&chip->mce_mutex);
608 snd_cs4231_calibrate_mute(chip, 1);
610 snd_cs4231_mce_up(chip);
612 spin_lock_irqsave(&chip->lock, flags);
613 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
614 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
615 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
617 spin_unlock_irqrestore(&chip->lock, flags);
619 snd_cs4231_mce_down(chip);
621 snd_cs4231_calibrate_mute(chip, 0);
622 mutex_unlock(&chip->mce_mutex);
625 static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
626 struct snd_pcm_hw_params *params,
631 mutex_lock(&chip->mce_mutex);
632 snd_cs4231_calibrate_mute(chip, 1);
634 snd_cs4231_mce_up(chip);
636 spin_lock_irqsave(&chip->lock, flags);
637 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
638 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
639 ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
641 spin_unlock_irqrestore(&chip->lock, flags);
642 snd_cs4231_mce_down(chip);
643 snd_cs4231_mce_up(chip);
644 spin_lock_irqsave(&chip->lock, flags);
646 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
647 spin_unlock_irqrestore(&chip->lock, flags);
649 snd_cs4231_mce_down(chip);
651 snd_cs4231_calibrate_mute(chip, 0);
652 mutex_unlock(&chip->mce_mutex);
659 static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
661 struct snd_cs4231 *chip = snd_timer_chip(timer);
663 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
666 static int snd_cs4231_timer_start(struct snd_timer *timer)
670 struct snd_cs4231 *chip = snd_timer_chip(timer);
672 spin_lock_irqsave(&chip->lock, flags);
673 ticks = timer->sticks;
674 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
675 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
676 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
677 snd_cs4231_out(chip, CS4231_TIMER_HIGH,
678 chip->image[CS4231_TIMER_HIGH] =
679 (unsigned char) (ticks >> 8));
680 snd_cs4231_out(chip, CS4231_TIMER_LOW,
681 chip->image[CS4231_TIMER_LOW] =
682 (unsigned char) ticks);
683 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
684 chip->image[CS4231_ALT_FEATURE_1] |
685 CS4231_TIMER_ENABLE);
687 spin_unlock_irqrestore(&chip->lock, flags);
692 static int snd_cs4231_timer_stop(struct snd_timer *timer)
695 struct snd_cs4231 *chip = snd_timer_chip(timer);
697 spin_lock_irqsave(&chip->lock, flags);
698 chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE;
699 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
700 chip->image[CS4231_ALT_FEATURE_1]);
701 spin_unlock_irqrestore(&chip->lock, flags);
706 static void snd_cs4231_init(struct snd_cs4231 *chip)
710 snd_cs4231_mce_down(chip);
712 #ifdef SNDRV_DEBUG_MCE
713 snd_printdd("init: (1)\n");
715 snd_cs4231_mce_up(chip);
716 spin_lock_irqsave(&chip->lock, flags);
717 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
718 CS4231_PLAYBACK_PIO |
719 CS4231_RECORD_ENABLE |
722 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
723 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
724 spin_unlock_irqrestore(&chip->lock, flags);
725 snd_cs4231_mce_down(chip);
727 #ifdef SNDRV_DEBUG_MCE
728 snd_printdd("init: (2)\n");
731 snd_cs4231_mce_up(chip);
732 spin_lock_irqsave(&chip->lock, flags);
733 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
734 chip->image[CS4231_ALT_FEATURE_1]);
735 spin_unlock_irqrestore(&chip->lock, flags);
736 snd_cs4231_mce_down(chip);
738 #ifdef SNDRV_DEBUG_MCE
739 snd_printdd("init: (3) - afei = 0x%x\n",
740 chip->image[CS4231_ALT_FEATURE_1]);
743 spin_lock_irqsave(&chip->lock, flags);
744 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2,
745 chip->image[CS4231_ALT_FEATURE_2]);
746 spin_unlock_irqrestore(&chip->lock, flags);
748 snd_cs4231_mce_up(chip);
749 spin_lock_irqsave(&chip->lock, flags);
750 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
751 chip->image[CS4231_PLAYBK_FORMAT]);
752 spin_unlock_irqrestore(&chip->lock, flags);
753 snd_cs4231_mce_down(chip);
755 #ifdef SNDRV_DEBUG_MCE
756 snd_printdd("init: (4)\n");
759 snd_cs4231_mce_up(chip);
760 spin_lock_irqsave(&chip->lock, flags);
761 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
762 spin_unlock_irqrestore(&chip->lock, flags);
763 snd_cs4231_mce_down(chip);
765 #ifdef SNDRV_DEBUG_MCE
766 snd_printdd("init: (5)\n");
770 static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
774 mutex_lock(&chip->open_mutex);
775 if ((chip->mode & mode)) {
776 mutex_unlock(&chip->open_mutex);
779 if (chip->mode & CS4231_MODE_OPEN) {
781 mutex_unlock(&chip->open_mutex);
784 /* ok. now enable and ack CODEC IRQ */
785 spin_lock_irqsave(&chip->lock, flags);
786 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
789 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
790 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
791 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
793 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
796 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
798 spin_unlock_irqrestore(&chip->lock, flags);
801 mutex_unlock(&chip->open_mutex);
805 static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
809 mutex_lock(&chip->open_mutex);
811 if (chip->mode & CS4231_MODE_OPEN) {
812 mutex_unlock(&chip->open_mutex);
815 snd_cs4231_calibrate_mute(chip, 1);
818 spin_lock_irqsave(&chip->lock, flags);
819 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
820 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
821 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
823 /* now disable record & playback */
825 if (chip->image[CS4231_IFACE_CTRL] &
826 (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
827 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
828 spin_unlock_irqrestore(&chip->lock, flags);
829 snd_cs4231_mce_up(chip);
830 spin_lock_irqsave(&chip->lock, flags);
831 chip->image[CS4231_IFACE_CTRL] &=
832 ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
833 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
834 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
835 chip->image[CS4231_IFACE_CTRL]);
836 spin_unlock_irqrestore(&chip->lock, flags);
837 snd_cs4231_mce_down(chip);
838 spin_lock_irqsave(&chip->lock, flags);
841 /* clear IRQ again */
842 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
843 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
844 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
845 spin_unlock_irqrestore(&chip->lock, flags);
847 snd_cs4231_calibrate_mute(chip, 0);
850 mutex_unlock(&chip->open_mutex);
857 static int snd_cs4231_timer_open(struct snd_timer *timer)
859 struct snd_cs4231 *chip = snd_timer_chip(timer);
860 snd_cs4231_open(chip, CS4231_MODE_TIMER);
864 static int snd_cs4231_timer_close(struct snd_timer *timer)
866 struct snd_cs4231 *chip = snd_timer_chip(timer);
867 snd_cs4231_close(chip, CS4231_MODE_TIMER);
871 static struct snd_timer_hardware snd_cs4231_timer_table = {
872 .flags = SNDRV_TIMER_HW_AUTO,
875 .open = snd_cs4231_timer_open,
876 .close = snd_cs4231_timer_close,
877 .c_resolution = snd_cs4231_timer_resolution,
878 .start = snd_cs4231_timer_start,
879 .stop = snd_cs4231_timer_stop,
883 * ok.. exported functions..
886 static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
887 struct snd_pcm_hw_params *hw_params)
889 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
890 unsigned char new_pdfr;
893 err = snd_pcm_lib_malloc_pages(substream,
894 params_buffer_bytes(hw_params));
897 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
898 params_channels(hw_params)) |
899 snd_cs4231_get_rate(params_rate(hw_params));
900 snd_cs4231_playback_format(chip, hw_params, new_pdfr);
905 static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
907 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
908 struct snd_pcm_runtime *runtime = substream->runtime;
911 spin_lock_irqsave(&chip->lock, flags);
913 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
914 CS4231_PLAYBACK_PIO);
916 if (WARN_ON(runtime->period_size > 0xffff + 1))
919 chip->p_periods_sent = 0;
920 spin_unlock_irqrestore(&chip->lock, flags);
925 static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
926 struct snd_pcm_hw_params *hw_params)
928 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
929 unsigned char new_cdfr;
932 err = snd_pcm_lib_malloc_pages(substream,
933 params_buffer_bytes(hw_params));
936 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
937 params_channels(hw_params)) |
938 snd_cs4231_get_rate(params_rate(hw_params));
939 snd_cs4231_capture_format(chip, hw_params, new_cdfr);
944 static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
946 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
949 spin_lock_irqsave(&chip->lock, flags);
950 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
954 chip->c_periods_sent = 0;
955 spin_unlock_irqrestore(&chip->lock, flags);
960 static void snd_cs4231_overrange(struct snd_cs4231 *chip)
965 spin_lock_irqsave(&chip->lock, flags);
966 res = snd_cs4231_in(chip, CS4231_TEST_INIT);
967 spin_unlock_irqrestore(&chip->lock, flags);
969 /* detect overrange only above 0dB; may be user selectable? */
970 if (res & (0x08 | 0x02))
971 chip->capture_substream->runtime->overrange++;
974 static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
976 if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
977 snd_pcm_period_elapsed(chip->playback_substream);
978 snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
979 &chip->p_periods_sent);
983 static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
985 if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
986 snd_pcm_period_elapsed(chip->capture_substream);
987 snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
988 &chip->c_periods_sent);
992 static snd_pcm_uframes_t snd_cs4231_playback_pointer(
993 struct snd_pcm_substream *substream)
995 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
996 struct cs4231_dma_control *dma_cont = &chip->p_dma;
999 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
1001 ptr = dma_cont->address(dma_cont);
1003 ptr -= substream->runtime->dma_addr;
1005 return bytes_to_frames(substream->runtime, ptr);
1008 static snd_pcm_uframes_t snd_cs4231_capture_pointer(
1009 struct snd_pcm_substream *substream)
1011 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1012 struct cs4231_dma_control *dma_cont = &chip->c_dma;
1015 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1017 ptr = dma_cont->address(dma_cont);
1019 ptr -= substream->runtime->dma_addr;
1021 return bytes_to_frames(substream->runtime, ptr);
1024 static int snd_cs4231_probe(struct snd_cs4231 *chip)
1026 unsigned long flags;
1032 for (i = 0; i < 50; i++) {
1034 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
1037 spin_lock_irqsave(&chip->lock, flags);
1038 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1039 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1040 vers = snd_cs4231_in(chip, CS4231_VERSION);
1041 spin_unlock_irqrestore(&chip->lock, flags);
1043 break; /* this is valid value */
1046 snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
1048 return -ENODEV; /* no valid device found */
1050 spin_lock_irqsave(&chip->lock, flags);
1052 /* clear any pendings IRQ */
1053 __cs4231_readb(chip, CS4231U(chip, STATUS));
1054 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS));
1057 spin_unlock_irqrestore(&chip->lock, flags);
1059 chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1060 chip->image[CS4231_IFACE_CTRL] =
1061 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1062 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1063 chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1065 chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1067 ptr = (unsigned char *) &chip->image;
1069 snd_cs4231_mce_down(chip);
1071 spin_lock_irqsave(&chip->lock, flags);
1073 for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
1074 snd_cs4231_out(chip, i, *ptr++);
1076 spin_unlock_irqrestore(&chip->lock, flags);
1078 snd_cs4231_mce_up(chip);
1080 snd_cs4231_mce_down(chip);
1084 return 0; /* all things are ok.. */
1087 static struct snd_pcm_hardware snd_cs4231_playback = {
1088 .info = SNDRV_PCM_INFO_MMAP |
1089 SNDRV_PCM_INFO_INTERLEAVED |
1090 SNDRV_PCM_INFO_MMAP_VALID |
1091 SNDRV_PCM_INFO_SYNC_START,
1092 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1093 SNDRV_PCM_FMTBIT_A_LAW |
1094 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1095 SNDRV_PCM_FMTBIT_U8 |
1096 SNDRV_PCM_FMTBIT_S16_LE |
1097 SNDRV_PCM_FMTBIT_S16_BE,
1098 .rates = SNDRV_PCM_RATE_KNOT |
1099 SNDRV_PCM_RATE_8000_48000,
1104 .buffer_bytes_max = 32 * 1024,
1105 .period_bytes_min = 64,
1106 .period_bytes_max = 32 * 1024,
1108 .periods_max = 1024,
1111 static struct snd_pcm_hardware snd_cs4231_capture = {
1112 .info = SNDRV_PCM_INFO_MMAP |
1113 SNDRV_PCM_INFO_INTERLEAVED |
1114 SNDRV_PCM_INFO_MMAP_VALID |
1115 SNDRV_PCM_INFO_SYNC_START,
1116 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1117 SNDRV_PCM_FMTBIT_A_LAW |
1118 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1119 SNDRV_PCM_FMTBIT_U8 |
1120 SNDRV_PCM_FMTBIT_S16_LE |
1121 SNDRV_PCM_FMTBIT_S16_BE,
1122 .rates = SNDRV_PCM_RATE_KNOT |
1123 SNDRV_PCM_RATE_8000_48000,
1128 .buffer_bytes_max = 32 * 1024,
1129 .period_bytes_min = 64,
1130 .period_bytes_max = 32 * 1024,
1132 .periods_max = 1024,
1135 static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1137 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1138 struct snd_pcm_runtime *runtime = substream->runtime;
1141 runtime->hw = snd_cs4231_playback;
1143 err = snd_cs4231_open(chip, CS4231_MODE_PLAY);
1145 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1148 chip->playback_substream = substream;
1149 chip->p_periods_sent = 0;
1150 snd_pcm_set_sync(substream);
1151 snd_cs4231_xrate(runtime);
1156 static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1158 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1159 struct snd_pcm_runtime *runtime = substream->runtime;
1162 runtime->hw = snd_cs4231_capture;
1164 err = snd_cs4231_open(chip, CS4231_MODE_RECORD);
1166 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1169 chip->capture_substream = substream;
1170 chip->c_periods_sent = 0;
1171 snd_pcm_set_sync(substream);
1172 snd_cs4231_xrate(runtime);
1177 static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1179 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1181 snd_cs4231_close(chip, CS4231_MODE_PLAY);
1182 chip->playback_substream = NULL;
1187 static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1189 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1191 snd_cs4231_close(chip, CS4231_MODE_RECORD);
1192 chip->capture_substream = NULL;
1197 /* XXX We can do some power-management, in particular on EBUS using
1198 * XXX the audio AUXIO register...
1201 static struct snd_pcm_ops snd_cs4231_playback_ops = {
1202 .open = snd_cs4231_playback_open,
1203 .close = snd_cs4231_playback_close,
1204 .ioctl = snd_pcm_lib_ioctl,
1205 .hw_params = snd_cs4231_playback_hw_params,
1206 .hw_free = snd_pcm_lib_free_pages,
1207 .prepare = snd_cs4231_playback_prepare,
1208 .trigger = snd_cs4231_trigger,
1209 .pointer = snd_cs4231_playback_pointer,
1212 static struct snd_pcm_ops snd_cs4231_capture_ops = {
1213 .open = snd_cs4231_capture_open,
1214 .close = snd_cs4231_capture_close,
1215 .ioctl = snd_pcm_lib_ioctl,
1216 .hw_params = snd_cs4231_capture_hw_params,
1217 .hw_free = snd_pcm_lib_free_pages,
1218 .prepare = snd_cs4231_capture_prepare,
1219 .trigger = snd_cs4231_trigger,
1220 .pointer = snd_cs4231_capture_pointer,
1223 static int snd_cs4231_pcm(struct snd_card *card)
1225 struct snd_cs4231 *chip = card->private_data;
1226 struct snd_pcm *pcm;
1229 err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm);
1233 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1234 &snd_cs4231_playback_ops);
1235 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1236 &snd_cs4231_capture_ops);
1239 pcm->private_data = chip;
1240 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1241 strcpy(pcm->name, "CS4231");
1243 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1245 64 * 1024, 128 * 1024);
1252 static int snd_cs4231_timer(struct snd_card *card)
1254 struct snd_cs4231 *chip = card->private_data;
1255 struct snd_timer *timer;
1256 struct snd_timer_id tid;
1259 /* Timer initialization */
1260 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1261 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1262 tid.card = card->number;
1265 err = snd_timer_new(card, "CS4231", &tid, &timer);
1268 strcpy(timer->name, "CS4231");
1269 timer->private_data = chip;
1270 timer->hw = snd_cs4231_timer_table;
1271 chip->timer = timer;
1280 static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
1281 struct snd_ctl_elem_info *uinfo)
1283 static char *texts[4] = {
1284 "Line", "CD", "Mic", "Mix"
1287 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1289 uinfo->value.enumerated.items = 4;
1290 if (uinfo->value.enumerated.item > 3)
1291 uinfo->value.enumerated.item = 3;
1292 strcpy(uinfo->value.enumerated.name,
1293 texts[uinfo->value.enumerated.item]);
1298 static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
1299 struct snd_ctl_elem_value *ucontrol)
1301 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1302 unsigned long flags;
1304 spin_lock_irqsave(&chip->lock, flags);
1305 ucontrol->value.enumerated.item[0] =
1306 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1307 ucontrol->value.enumerated.item[1] =
1308 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1309 spin_unlock_irqrestore(&chip->lock, flags);
1314 static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
1315 struct snd_ctl_elem_value *ucontrol)
1317 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1318 unsigned long flags;
1319 unsigned short left, right;
1322 if (ucontrol->value.enumerated.item[0] > 3 ||
1323 ucontrol->value.enumerated.item[1] > 3)
1325 left = ucontrol->value.enumerated.item[0] << 6;
1326 right = ucontrol->value.enumerated.item[1] << 6;
1328 spin_lock_irqsave(&chip->lock, flags);
1330 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1331 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1332 change = left != chip->image[CS4231_LEFT_INPUT] ||
1333 right != chip->image[CS4231_RIGHT_INPUT];
1334 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1335 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1337 spin_unlock_irqrestore(&chip->lock, flags);
1342 static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
1343 struct snd_ctl_elem_info *uinfo)
1345 int mask = (kcontrol->private_value >> 16) & 0xff;
1347 uinfo->type = (mask == 1) ?
1348 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1350 uinfo->value.integer.min = 0;
1351 uinfo->value.integer.max = mask;
1356 static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
1357 struct snd_ctl_elem_value *ucontrol)
1359 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1360 unsigned long flags;
1361 int reg = kcontrol->private_value & 0xff;
1362 int shift = (kcontrol->private_value >> 8) & 0xff;
1363 int mask = (kcontrol->private_value >> 16) & 0xff;
1364 int invert = (kcontrol->private_value >> 24) & 0xff;
1366 spin_lock_irqsave(&chip->lock, flags);
1368 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1370 spin_unlock_irqrestore(&chip->lock, flags);
1373 ucontrol->value.integer.value[0] =
1374 (mask - ucontrol->value.integer.value[0]);
1379 static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
1380 struct snd_ctl_elem_value *ucontrol)
1382 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1383 unsigned long flags;
1384 int reg = kcontrol->private_value & 0xff;
1385 int shift = (kcontrol->private_value >> 8) & 0xff;
1386 int mask = (kcontrol->private_value >> 16) & 0xff;
1387 int invert = (kcontrol->private_value >> 24) & 0xff;
1391 val = (ucontrol->value.integer.value[0] & mask);
1396 spin_lock_irqsave(&chip->lock, flags);
1398 val = (chip->image[reg] & ~(mask << shift)) | val;
1399 change = val != chip->image[reg];
1400 snd_cs4231_out(chip, reg, val);
1402 spin_unlock_irqrestore(&chip->lock, flags);
1407 static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
1408 struct snd_ctl_elem_info *uinfo)
1410 int mask = (kcontrol->private_value >> 24) & 0xff;
1412 uinfo->type = mask == 1 ?
1413 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1415 uinfo->value.integer.min = 0;
1416 uinfo->value.integer.max = mask;
1421 static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
1422 struct snd_ctl_elem_value *ucontrol)
1424 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1425 unsigned long flags;
1426 int left_reg = kcontrol->private_value & 0xff;
1427 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1428 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1429 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1430 int mask = (kcontrol->private_value >> 24) & 0xff;
1431 int invert = (kcontrol->private_value >> 22) & 1;
1433 spin_lock_irqsave(&chip->lock, flags);
1435 ucontrol->value.integer.value[0] =
1436 (chip->image[left_reg] >> shift_left) & mask;
1437 ucontrol->value.integer.value[1] =
1438 (chip->image[right_reg] >> shift_right) & mask;
1440 spin_unlock_irqrestore(&chip->lock, flags);
1443 ucontrol->value.integer.value[0] =
1444 (mask - ucontrol->value.integer.value[0]);
1445 ucontrol->value.integer.value[1] =
1446 (mask - ucontrol->value.integer.value[1]);
1452 static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
1453 struct snd_ctl_elem_value *ucontrol)
1455 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1456 unsigned long flags;
1457 int left_reg = kcontrol->private_value & 0xff;
1458 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1459 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1460 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1461 int mask = (kcontrol->private_value >> 24) & 0xff;
1462 int invert = (kcontrol->private_value >> 22) & 1;
1464 unsigned short val1, val2;
1466 val1 = ucontrol->value.integer.value[0] & mask;
1467 val2 = ucontrol->value.integer.value[1] & mask;
1472 val1 <<= shift_left;
1473 val2 <<= shift_right;
1475 spin_lock_irqsave(&chip->lock, flags);
1477 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1478 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1479 change = val1 != chip->image[left_reg];
1480 change |= val2 != chip->image[right_reg];
1481 snd_cs4231_out(chip, left_reg, val1);
1482 snd_cs4231_out(chip, right_reg, val2);
1484 spin_unlock_irqrestore(&chip->lock, flags);
1489 #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
1490 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1491 .info = snd_cs4231_info_single, \
1492 .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1493 .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) }
1495 #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \
1496 shift_right, mask, invert) \
1497 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1498 .info = snd_cs4231_info_double, \
1499 .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1500 .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \
1501 ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) }
1503 static struct snd_kcontrol_new snd_cs4231_controls[] = {
1504 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT,
1505 CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1506 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT,
1507 CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1508 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN,
1509 CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1510 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN,
1511 CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1512 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT,
1513 CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1514 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT,
1515 CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1516 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT,
1517 CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1518 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT,
1519 CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1520 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1521 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1522 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1523 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1524 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0,
1527 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1528 .name = "Capture Source",
1529 .info = snd_cs4231_info_mux,
1530 .get = snd_cs4231_get_mux,
1531 .put = snd_cs4231_put_mux,
1533 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5,
1535 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1536 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1537 /* SPARC specific uses of XCTL{0,1} general purpose outputs. */
1538 CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1539 CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1542 static int snd_cs4231_mixer(struct snd_card *card)
1544 struct snd_cs4231 *chip = card->private_data;
1547 if (snd_BUG_ON(!chip || !chip->pcm))
1550 strcpy(card->mixername, chip->pcm->name);
1552 for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1553 err = snd_ctl_add(card,
1554 snd_ctl_new1(&snd_cs4231_controls[idx], chip));
1563 static int cs4231_attach_begin(struct snd_card **rcard)
1565 struct snd_card *card;
1566 struct snd_cs4231 *chip;
1571 if (dev >= SNDRV_CARDS)
1579 err = snd_card_create(index[dev], id[dev], THIS_MODULE,
1580 sizeof(struct snd_cs4231), &card);
1584 strcpy(card->driver, "CS4231");
1585 strcpy(card->shortname, "Sun CS4231");
1587 chip = card->private_data;
1594 static int cs4231_attach_finish(struct snd_card *card)
1596 struct snd_cs4231 *chip = card->private_data;
1599 err = snd_cs4231_pcm(card);
1603 err = snd_cs4231_mixer(card);
1607 err = snd_cs4231_timer(card);
1611 err = snd_card_register(card);
1615 dev_set_drvdata(&chip->op->dev, chip);
1621 snd_card_free(card);
1627 static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id)
1629 unsigned long flags;
1630 unsigned char status;
1632 struct snd_cs4231 *chip = dev_id;
1634 /*This is IRQ is not raised by the cs4231*/
1635 if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ))
1638 /* ACK the APC interrupt. */
1639 csr = sbus_readl(chip->port + APCCSR);
1641 sbus_writel(csr, chip->port + APCCSR);
1643 if ((csr & APC_PDMA_READY) &&
1644 (csr & APC_PLAY_INT) &&
1645 (csr & APC_XINT_PNVA) &&
1646 !(csr & APC_XINT_EMPT))
1647 snd_cs4231_play_callback(chip);
1649 if ((csr & APC_CDMA_READY) &&
1650 (csr & APC_CAPT_INT) &&
1651 (csr & APC_XINT_CNVA) &&
1652 !(csr & APC_XINT_EMPT))
1653 snd_cs4231_capture_callback(chip);
1655 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1657 if (status & CS4231_TIMER_IRQ) {
1659 snd_timer_interrupt(chip->timer, chip->timer->sticks);
1662 if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
1663 snd_cs4231_overrange(chip);
1665 /* ACK the CS4231 interrupt. */
1666 spin_lock_irqsave(&chip->lock, flags);
1667 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1668 spin_unlock_irqrestore(&chip->lock, flags);
1677 static int sbus_dma_request(struct cs4231_dma_control *dma_cont,
1678 dma_addr_t bus_addr, size_t len)
1680 unsigned long flags;
1683 struct sbus_dma_info *base = &dma_cont->sbus_info;
1685 if (len >= (1 << 24))
1687 spin_lock_irqsave(&base->lock, flags);
1688 csr = sbus_readl(base->regs + APCCSR);
1690 test = APC_CDMA_READY;
1691 if (base->dir == APC_PLAY)
1692 test = APC_PDMA_READY;
1696 test = APC_XINT_CNVA;
1697 if (base->dir == APC_PLAY)
1698 test = APC_XINT_PNVA;
1702 sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
1703 sbus_writel(len, base->regs + base->dir + APCNC);
1705 spin_unlock_irqrestore(&base->lock, flags);
1709 static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
1711 unsigned long flags;
1713 struct sbus_dma_info *base = &dma_cont->sbus_info;
1715 spin_lock_irqsave(&base->lock, flags);
1716 csr = sbus_readl(base->regs + APCCSR);
1717 test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
1718 APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
1720 if (base->dir == APC_RECORD)
1721 test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
1722 APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
1724 sbus_writel(csr, base->regs + APCCSR);
1725 spin_unlock_irqrestore(&base->lock, flags);
1728 static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1730 unsigned long flags;
1732 struct sbus_dma_info *base = &dma_cont->sbus_info;
1734 spin_lock_irqsave(&base->lock, flags);
1736 sbus_writel(0, base->regs + base->dir + APCNC);
1737 sbus_writel(0, base->regs + base->dir + APCNVA);
1738 if (base->dir == APC_PLAY) {
1739 sbus_writel(0, base->regs + base->dir + APCC);
1740 sbus_writel(0, base->regs + base->dir + APCVA);
1745 csr = sbus_readl(base->regs + APCCSR);
1747 if (base->dir == APC_PLAY)
1750 csr &= ~(APC_CPAUSE << shift);
1752 csr |= (APC_CPAUSE << shift);
1753 sbus_writel(csr, base->regs + APCCSR);
1755 csr |= (APC_CDMA_READY << shift);
1757 csr &= ~(APC_CDMA_READY << shift);
1758 sbus_writel(csr, base->regs + APCCSR);
1760 spin_unlock_irqrestore(&base->lock, flags);
1763 static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
1765 struct sbus_dma_info *base = &dma_cont->sbus_info;
1767 return sbus_readl(base->regs + base->dir + APCVA);
1771 * Init and exit routines
1774 static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
1776 struct platform_device *op = chip->op;
1779 free_irq(chip->irq[0], chip);
1782 of_iounmap(&op->resource[0], chip->port, chip->regs_size);
1787 static int snd_cs4231_sbus_dev_free(struct snd_device *device)
1789 struct snd_cs4231 *cp = device->device_data;
1791 return snd_cs4231_sbus_free(cp);
1794 static struct snd_device_ops snd_cs4231_sbus_dev_ops = {
1795 .dev_free = snd_cs4231_sbus_dev_free,
1798 static int snd_cs4231_sbus_create(struct snd_card *card,
1799 struct platform_device *op,
1802 struct snd_cs4231 *chip = card->private_data;
1805 spin_lock_init(&chip->lock);
1806 spin_lock_init(&chip->c_dma.sbus_info.lock);
1807 spin_lock_init(&chip->p_dma.sbus_info.lock);
1808 mutex_init(&chip->mce_mutex);
1809 mutex_init(&chip->open_mutex);
1811 chip->regs_size = resource_size(&op->resource[0]);
1812 memcpy(&chip->image, &snd_cs4231_original_image,
1813 sizeof(snd_cs4231_original_image));
1815 chip->port = of_ioremap(&op->resource[0], 0,
1816 chip->regs_size, "cs4231");
1818 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1822 chip->c_dma.sbus_info.regs = chip->port;
1823 chip->p_dma.sbus_info.regs = chip->port;
1824 chip->c_dma.sbus_info.dir = APC_RECORD;
1825 chip->p_dma.sbus_info.dir = APC_PLAY;
1827 chip->p_dma.prepare = sbus_dma_prepare;
1828 chip->p_dma.enable = sbus_dma_enable;
1829 chip->p_dma.request = sbus_dma_request;
1830 chip->p_dma.address = sbus_dma_addr;
1832 chip->c_dma.prepare = sbus_dma_prepare;
1833 chip->c_dma.enable = sbus_dma_enable;
1834 chip->c_dma.request = sbus_dma_request;
1835 chip->c_dma.address = sbus_dma_addr;
1837 if (request_irq(op->archdata.irqs[0], snd_cs4231_sbus_interrupt,
1838 IRQF_SHARED, "cs4231", chip)) {
1839 snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n",
1840 dev, op->archdata.irqs[0]);
1841 snd_cs4231_sbus_free(chip);
1844 chip->irq[0] = op->archdata.irqs[0];
1846 if (snd_cs4231_probe(chip) < 0) {
1847 snd_cs4231_sbus_free(chip);
1850 snd_cs4231_init(chip);
1852 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
1853 chip, &snd_cs4231_sbus_dev_ops)) < 0) {
1854 snd_cs4231_sbus_free(chip);
1861 static int cs4231_sbus_probe(struct platform_device *op)
1863 struct resource *rp = &op->resource[0];
1864 struct snd_card *card;
1867 err = cs4231_attach_begin(&card);
1871 sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d",
1874 (unsigned long long)rp->start,
1875 op->archdata.irqs[0]);
1877 err = snd_cs4231_sbus_create(card, op, dev);
1879 snd_card_free(card);
1883 return cs4231_attach_finish(card);
1889 static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event,
1892 struct snd_cs4231 *chip = cookie;
1894 snd_cs4231_play_callback(chip);
1897 static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p,
1898 int event, void *cookie)
1900 struct snd_cs4231 *chip = cookie;
1902 snd_cs4231_capture_callback(chip);
1909 static int _ebus_dma_request(struct cs4231_dma_control *dma_cont,
1910 dma_addr_t bus_addr, size_t len)
1912 return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
1915 static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1917 ebus_dma_enable(&dma_cont->ebus_info, on);
1920 static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
1922 ebus_dma_prepare(&dma_cont->ebus_info, dir);
1925 static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
1927 return ebus_dma_addr(&dma_cont->ebus_info);
1931 * Init and exit routines
1934 static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
1936 struct platform_device *op = chip->op;
1938 if (chip->c_dma.ebus_info.regs) {
1939 ebus_dma_unregister(&chip->c_dma.ebus_info);
1940 of_iounmap(&op->resource[2], chip->c_dma.ebus_info.regs, 0x10);
1942 if (chip->p_dma.ebus_info.regs) {
1943 ebus_dma_unregister(&chip->p_dma.ebus_info);
1944 of_iounmap(&op->resource[1], chip->p_dma.ebus_info.regs, 0x10);
1948 of_iounmap(&op->resource[0], chip->port, 0x10);
1953 static int snd_cs4231_ebus_dev_free(struct snd_device *device)
1955 struct snd_cs4231 *cp = device->device_data;
1957 return snd_cs4231_ebus_free(cp);
1960 static struct snd_device_ops snd_cs4231_ebus_dev_ops = {
1961 .dev_free = snd_cs4231_ebus_dev_free,
1964 static int snd_cs4231_ebus_create(struct snd_card *card,
1965 struct platform_device *op,
1968 struct snd_cs4231 *chip = card->private_data;
1971 spin_lock_init(&chip->lock);
1972 spin_lock_init(&chip->c_dma.ebus_info.lock);
1973 spin_lock_init(&chip->p_dma.ebus_info.lock);
1974 mutex_init(&chip->mce_mutex);
1975 mutex_init(&chip->open_mutex);
1976 chip->flags |= CS4231_FLAG_EBUS;
1978 memcpy(&chip->image, &snd_cs4231_original_image,
1979 sizeof(snd_cs4231_original_image));
1980 strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
1981 chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1982 chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
1983 chip->c_dma.ebus_info.client_cookie = chip;
1984 chip->c_dma.ebus_info.irq = op->archdata.irqs[0];
1985 strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
1986 chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1987 chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
1988 chip->p_dma.ebus_info.client_cookie = chip;
1989 chip->p_dma.ebus_info.irq = op->archdata.irqs[1];
1991 chip->p_dma.prepare = _ebus_dma_prepare;
1992 chip->p_dma.enable = _ebus_dma_enable;
1993 chip->p_dma.request = _ebus_dma_request;
1994 chip->p_dma.address = _ebus_dma_addr;
1996 chip->c_dma.prepare = _ebus_dma_prepare;
1997 chip->c_dma.enable = _ebus_dma_enable;
1998 chip->c_dma.request = _ebus_dma_request;
1999 chip->c_dma.address = _ebus_dma_addr;
2001 chip->port = of_ioremap(&op->resource[0], 0, 0x10, "cs4231");
2002 chip->p_dma.ebus_info.regs =
2003 of_ioremap(&op->resource[1], 0, 0x10, "cs4231_pdma");
2004 chip->c_dma.ebus_info.regs =
2005 of_ioremap(&op->resource[2], 0, 0x10, "cs4231_cdma");
2006 if (!chip->port || !chip->p_dma.ebus_info.regs ||
2007 !chip->c_dma.ebus_info.regs) {
2008 snd_cs4231_ebus_free(chip);
2009 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
2013 if (ebus_dma_register(&chip->c_dma.ebus_info)) {
2014 snd_cs4231_ebus_free(chip);
2015 snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n",
2019 if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
2020 snd_cs4231_ebus_free(chip);
2021 snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n",
2026 if (ebus_dma_register(&chip->p_dma.ebus_info)) {
2027 snd_cs4231_ebus_free(chip);
2028 snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n",
2032 if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
2033 snd_cs4231_ebus_free(chip);
2034 snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
2038 if (snd_cs4231_probe(chip) < 0) {
2039 snd_cs4231_ebus_free(chip);
2042 snd_cs4231_init(chip);
2044 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2045 chip, &snd_cs4231_ebus_dev_ops)) < 0) {
2046 snd_cs4231_ebus_free(chip);
2053 static int cs4231_ebus_probe(struct platform_device *op)
2055 struct snd_card *card;
2058 err = cs4231_attach_begin(&card);
2062 sprintf(card->longname, "%s at 0x%llx, irq %d",
2064 op->resource[0].start,
2065 op->archdata.irqs[0]);
2067 err = snd_cs4231_ebus_create(card, op, dev);
2069 snd_card_free(card);
2073 return cs4231_attach_finish(card);
2077 static int cs4231_probe(struct platform_device *op)
2080 if (!strcmp(op->dev.of_node->parent->name, "ebus"))
2081 return cs4231_ebus_probe(op);
2084 if (!strcmp(op->dev.of_node->parent->name, "sbus") ||
2085 !strcmp(op->dev.of_node->parent->name, "sbi"))
2086 return cs4231_sbus_probe(op);
2091 static int cs4231_remove(struct platform_device *op)
2093 struct snd_cs4231 *chip = dev_get_drvdata(&op->dev);
2095 snd_card_free(chip->card);
2100 static const struct of_device_id cs4231_match[] = {
2102 .name = "SUNW,CS4231",
2106 .compatible = "SUNW,CS4231",
2111 MODULE_DEVICE_TABLE(of, cs4231_match);
2113 static struct platform_driver cs4231_driver = {
2116 .owner = THIS_MODULE,
2117 .of_match_table = cs4231_match,
2119 .probe = cs4231_probe,
2120 .remove = cs4231_remove,
2123 module_platform_driver(cs4231_driver);