sound/soc/starfive/starfive_tdm.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * TDM driver for the StarFive JH7110 SoC
   4  *
   5  * Copyright (C) 2022 StarFive Technology Co., Ltd.
   6  */
   7 #include <linux/clk.h>
   8 #include <linux/device.h>
   9 #include <linux/reset.h>
  10 #include <linux/module.h>
  11 #include <linux/of_irq.h>
  12 #include <linux/of_platform.h>
  13 #include <linux/regmap.h>
  14 #include <linux/pm_runtime.h>
  15 #include <linux/dma/starfive-dma.h>
  16 #include <sound/soc.h>
  17 #include <sound/soc-dai.h>
  18 #include <sound/pcm_params.h>
  19 #include <sound/initval.h>
  20 #include <sound/tlv.h>
  21 #include "starfive_tdm.h"
  22
  23 static inline u32 sf_tdm_readl(struct sf_tdm_dev *dev, u16 reg)
  24 {
  25         return readl_relaxed(dev->tdm_base + reg);
  26 }
  27
  28 static inline void sf_tdm_writel(struct sf_tdm_dev *dev, u16 reg, u32 val)
  29 {
  30         writel_relaxed(val, dev->tdm_base + reg);
  31 }
  32
  33 static void sf_tdm_start(struct sf_tdm_dev *dev, struct snd_pcm_substream *substream)
  34 {
  35         u32 data;
  36         unsigned int val;
  37
  38         data = sf_tdm_readl(dev, TDM_PCMGBCR);
  39         sf_tdm_writel(dev, TDM_PCMGBCR, data | PCMGBCR_ENABLE);
  40
  41         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  42                 val = sf_tdm_readl(dev, TDM_PCMTXCR);
  43                 sf_tdm_writel(dev, TDM_PCMTXCR, val | PCMTXCR_TXEN);
  44         } else {
  45                 val = sf_tdm_readl(dev, TDM_PCMRXCR);
  46                 sf_tdm_writel(dev, TDM_PCMRXCR, val | PCMRXCR_RXEN);
  47         }
  48 }
  49
  50 static void sf_tdm_stop(struct sf_tdm_dev *dev, struct snd_pcm_substream *substream)
  51 {
  52         unsigned int val;
  53
  54         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  55                 val = sf_tdm_readl(dev, TDM_PCMTXCR);
  56                 val &= ~PCMTXCR_TXEN;
  57                 sf_tdm_writel(dev, TDM_PCMTXCR, val);
  58         } else {
  59                 val = sf_tdm_readl(dev, TDM_PCMRXCR);
  60                 val &= ~PCMRXCR_RXEN;
  61                 sf_tdm_writel(dev, TDM_PCMRXCR, val);
  62         }
  63 }
  64
  65 static int sf_tdm_syncdiv(struct sf_tdm_dev *dev)
  66 {
  67         u32 sl, sscale, syncdiv;
  68
  69         sl = (dev->rx.sl >= dev->tx.sl) ? dev->rx.sl:dev->tx.sl;
  70         sscale = (dev->rx.sscale >= dev->tx.sscale) ? dev->rx.sscale:dev->tx.sscale;
  71         syncdiv = dev->pcmclk / dev->samplerate - 1;
  72
  73         if ((syncdiv + 1) < (sl * sscale)) {
  74                 pr_info("set syncdiv failed !\n");
  75                 return -1;
  76         }
  77
  78         if ((dev->syncm == TDM_SYNCM_LONG) &&
  79                         ((dev->rx.sscale <= 1) || (dev->tx.sscale <= 1))) {
  80                 if ((syncdiv + 1) <= sl) {
  81                         pr_info("set syncdiv failed! it must be (syncdiv+1) > max[tx.sl, rx.sl]\n");
  82                         return -1;
  83                 }
  84         }
  85
  86         sf_tdm_writel(dev, TDM_PCMDIV, syncdiv);
  87         return 0;
  88 }
  89
  90 static void sf_tdm_contrl(struct sf_tdm_dev *dev)
  91 {
  92         u32 data;
  93
  94         data = (dev->clkpolity << CLKPOL_BIT) |
  95                 (dev->elm << ELM_BIT) |
  96                 (dev->syncm << SYNCM_BIT) |
  97                 (dev->ms_mode << MS_BIT);
  98         sf_tdm_writel(dev, TDM_PCMGBCR, data);
  99 }
 100
 101 static void sf_tdm_config(struct sf_tdm_dev *dev, struct snd_pcm_substream *substream)
 102 {
 103         u32 datarx, datatx;
 104
 105         sf_tdm_contrl(dev);
 106         sf_tdm_syncdiv(dev);
 107
 108         datarx = (dev->rx.ifl << IFL_BIT) |
 109                 (dev->rx.wl << WL_BIT) |
 110                 (dev->rx.sscale << SSCALE_BIT) |
 111                 (dev->rx.sl << SL_BIT) |
 112                 (dev->rx.lrj << LRJ_BIT);
 113
 114         datatx = (dev->tx.ifl << IFL_BIT) |
 115                 (dev->tx.wl << WL_BIT) |
 116                 (dev->tx.sscale << SSCALE_BIT) |
 117                 (dev->tx.sl << SL_BIT) |
 118                 (dev->tx.lrj << LRJ_BIT);
 119
 120         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 121                 sf_tdm_writel(dev, TDM_PCMTXCR, datatx);
 122         else
 123                 sf_tdm_writel(dev, TDM_PCMRXCR, datarx);
 124 }
 125
 126 static void sf_tdm_clk_disable(struct sf_tdm_dev *priv)
 127 {
 128         clk_disable_unprepare(priv->clk_tdm);
 129         clk_disable_unprepare(priv->clk_tdm_ext);
 130         clk_disable_unprepare(priv->clk_tdm_internal);
 131         clk_disable_unprepare(priv->clk_tdm_apb);
 132         clk_disable_unprepare(priv->clk_tdm_ahb);
 133         clk_disable_unprepare(priv->clk_mclk_inner);
 134 }
 135
 136 #ifdef CONFIG_PM
 137 static int sf_tdm_runtime_suspend(struct device *dev)
 138 {
 139         struct sf_tdm_dev *priv = dev_get_drvdata(dev);
 140
 141         sf_tdm_clk_disable(priv);
 142         return 0;
 143 }
 144
 145 static int sf_tdm_runtime_resume(struct device *dev)
 146 {
 147         struct sf_tdm_dev *priv = dev_get_drvdata(dev);
 148         int ret;
 149
 150         ret = clk_prepare_enable(priv->clk_mclk_inner);
 151         if (ret) {
 152                 dev_err(dev, "failed to prepare enable clk_mclk_inner\n");
 153                 return ret;
 154         }
 155
 156         ret = clk_prepare_enable(priv->clk_tdm_ahb);
 157         if (ret) {
 158                 dev_err(dev, "Failed to prepare enable clk_tdm_ahb\n");
 159                 goto dis_mclk_inner;
 160         }
 161
 162         ret = clk_prepare_enable(priv->clk_tdm_apb);
 163         if (ret) {
 164                 dev_err(dev, "Failed to prepare enable clk_tdm_apb\n");
 165                 goto dis_tdm_ahb;
 166         }
 167
 168         ret = clk_prepare_enable(priv->clk_tdm_internal);
 169         if (ret) {
 170                 dev_err(dev, "Failed to prepare enable clk_tdm_intl\n");
 171                 goto dis_tdm_apb;
 172         }
 173
 174         ret = clk_prepare_enable(priv->clk_tdm_ext);
 175         if (ret) {
 176                 dev_err(dev, "Failed to prepare enable clk_tdm_ext\n");
 177                 goto dis_tdm_internal;
 178         }
 179
 180         ret = clk_prepare_enable(priv->clk_tdm);
 181         if (ret) {
 182                 dev_err(dev, "Failed to prepare enable clk_tdm\n");
 183                 goto dis_tdm_ext;
 184         }
 185
 186         return 0;
 187
 188 dis_tdm_ext:
 189         clk_disable_unprepare(priv->clk_tdm_ext);
 190 dis_tdm_internal:
 191         clk_disable_unprepare(priv->clk_tdm_internal);
 192 dis_tdm_apb:
 193         clk_disable_unprepare(priv->clk_tdm_apb);
 194 dis_tdm_ahb:
 195         clk_disable_unprepare(priv->clk_tdm_ahb);
 196 dis_mclk_inner:
 197         clk_disable_unprepare(priv->clk_mclk_inner);
 198
 199         return ret;
 200 }
 201 #endif
 202
 203 #ifdef CONFIG_PM_SLEEP
 204 static int sf_tdm_suspend(struct snd_soc_component *component)
 205 {
 206         return pm_runtime_force_suspend(component->dev);
 207 }
 208
 209 static int sf_tdm_resume(struct snd_soc_component *component)
 210 {
 211         return pm_runtime_force_resume(component->dev);
 212 }
 213
 214 #else
 215 #define sf_tdm_suspend  NULL
 216 #define sf_tdm_resume   NULL
 217 #endif
 218
 219 /*
 220  * To stop dma first, we must implement this function, because it is
 221  * called before stopping the stream.
 222  */
 223 static int sf_pcm_trigger(struct snd_soc_component *component,
 224                               struct snd_pcm_substream *substream, int cmd)
 225 {
 226         int ret = 0;
 227         struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream);
 228
 229         switch (cmd) {
 230         case SNDRV_PCM_TRIGGER_START:
 231         case SNDRV_PCM_TRIGGER_RESUME:
 232         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 233                 break;
 234
 235         case SNDRV_PCM_TRIGGER_STOP:
 236         case SNDRV_PCM_TRIGGER_SUSPEND:
 237         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 238                 axi_dma_cyclic_stop(chan);
 239                 break;
 240
 241         default:
 242                 ret = -EINVAL;
 243                 break;
 244         }
 245         return ret;
 246 }
 247
 248 static const struct snd_soc_component_driver sf_tdm_component = {
 249         .name           = "jh7110-tdm",
 250         .suspend        = sf_tdm_suspend,
 251         .resume         = sf_tdm_resume,
 252         .trigger        = sf_pcm_trigger,
 253 };
 254
 255 static int sf_tdm_hw_params(struct snd_pcm_substream *substream,
 256                 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 257 {
 258         struct sf_tdm_dev *dev = snd_soc_dai_get_drvdata(dai);
 259         int chan_wl, chan_sl, chan_nr;
 260         unsigned int data_width;
 261         unsigned int mclk_rate;
 262         unsigned int dma_bus_width;
 263         int channels;
 264         int ret;
 265         struct snd_dmaengine_dai_dma_data *dma_data = NULL;
 266         struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
 267         struct snd_soc_dai_link *dai_link = rtd->dai_link;
 268
 269         dai_link->stop_dma_first = 1;
 270
 271         channels = params_channels(params);
 272         data_width = params_width(params);
 273
 274         dev->samplerate = params_rate(params);
 275         switch (dev->samplerate) {
 276         /*  There are some limitation when using 8k sample rate  */
 277         case 8000:
 278                 mclk_rate = 12288000;
 279                 if ((data_width == 16) || (channels == 1)) {
 280                         pr_err("TDM: not support 16bit or 1-channel when using 8k sample rate\n");
 281                         return -EINVAL;
 282                 }
 283                 break;
 284         case 11025:
 285                 /* sysclk */
 286                 mclk_rate = 11289600;
 287                 break;
 288         case 16000:
 289                 mclk_rate = 12288000;
 290                 break;
 291         case 22050:
 292                 mclk_rate = 11289600;
 293                 break;
 294         case 32000:
 295                 mclk_rate = 12288000;
 296                 break;
 297         case 44100:
 298                 mclk_rate = 11289600;
 299                 break;
 300         case 48000:
 301                 mclk_rate = 12288000;
 302                 break;
 303         default:
 304                 pr_err("TDM: not support sample rate:%d\n", dev->samplerate);
 305                 return -EINVAL;
 306         }
 307
 308         dev->pcmclk = channels * dev->samplerate * data_width;
 309
 310         switch (params_format(params)) {
 311         case SNDRV_PCM_FORMAT_S16_LE:
 312                 chan_wl = TDM_16BIT_WORD_LEN;
 313                 chan_sl = TDM_16BIT_SLOT_LEN;
 314                 dma_bus_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
 315                 break;
 316
 317         case SNDRV_PCM_FORMAT_S32_LE:
 318                 chan_wl = TDM_32BIT_WORD_LEN;
 319                 chan_sl = TDM_32BIT_SLOT_LEN;
 320                 dma_bus_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
 321                 break;
 322
 323         default:
 324                 dev_err(dev->dev, "tdm: unsupported PCM fmt");
 325                 return -EINVAL;
 326         }
 327
 328         chan_nr = params_channels(params);
 329         switch (chan_nr) {
 330         case ONE_CHANNEL_SUPPORT:
 331         case TWO_CHANNEL_SUPPORT:
 332         case FOUR_CHANNEL_SUPPORT:
 333         case SIX_CHANNEL_SUPPORT:
 334         case EIGHT_CHANNEL_SUPPORT:
 335                 break;
 336         default:
 337                 dev_err(dev->dev, "channel not supported\n");
 338                 return -EINVAL;
 339         }
 340
 341         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 342                 dev->tx.wl = chan_wl;
 343                 dev->tx.sl = chan_sl;
 344                 dev->tx.sscale = chan_nr;
 345                 dev->play_dma_data.addr_width = dma_bus_width;
 346                 dma_data = &dev->play_dma_data;
 347         } else {
 348                 dev->rx.wl = chan_wl;
 349                 dev->rx.sl = chan_sl;
 350                 dev->rx.sscale = chan_nr;
 351                 dev->capture_dma_data.addr_width = dma_bus_width;
 352                 dma_data = &dev->capture_dma_data;
 353         }
 354
 355         snd_soc_dai_set_dma_data(dai, substream, dma_data);
 356
 357         ret = clk_set_rate(dev->clk_mclk_inner, mclk_rate);
 358         if (ret) {
 359                 dev_info(dev->dev, "Can't set clk_mclk: %d\n", ret);
 360                 return ret;
 361         }
 362
 363         ret = clk_set_rate(dev->clk_tdm_internal, dev->pcmclk);
 364         if (ret) {
 365                 dev_info(dev->dev, "Can't set clk_tdm_internal: %d\n", ret);
 366                 return ret;
 367         }
 368
 369         ret = clk_set_parent(dev->clk_tdm, dev->clk_tdm_ext);
 370         if (ret) {
 371                 dev_info(dev->dev, "Can't set clock source for clk_tdm: %d\n", ret);
 372                 return ret;
 373         }
 374
 375         ret = clk_prepare_enable(dev->clk_tdm_ahb);
 376         if (ret) {
 377                 dev_err(dev->dev, "Failed to prepare enable clk_tdm_ahb\n");
 378                 return ret;
 379         }
 380
 381         ret = clk_prepare_enable(dev->clk_tdm_apb);
 382         if (ret) {
 383                 dev_err(dev->dev, "Failed to prepare enable clk_tdm_apb\n");
 384                 return ret;
 385         }
 386
 387         sf_tdm_config(dev, substream);
 388
 389         return 0;
 390 }
 391
 392 static int sf_tdm_trigger(struct snd_pcm_substream *substream,
 393                 int cmd, struct snd_soc_dai *dai)
 394 {
 395         struct sf_tdm_dev *dev = snd_soc_dai_get_drvdata(dai);
 396         int ret = 0;
 397
 398         switch (cmd) {
 399         case SNDRV_PCM_TRIGGER_START:
 400         case SNDRV_PCM_TRIGGER_RESUME:
 401         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 402                 dev->active++;
 403                 sf_tdm_start(dev, substream);
 404                 break;
 405
 406         case SNDRV_PCM_TRIGGER_STOP:
 407         case SNDRV_PCM_TRIGGER_SUSPEND:
 408         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 409                 dev->active--;
 410                 sf_tdm_stop(dev, substream);
 411                 break;
 412         default:
 413                 ret = -EINVAL;
 414                 break;
 415         }
 416         return ret;
 417 }
 418
 419 static int sf_tdm_set_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
 420 {
 421         struct sf_tdm_dev *dev = snd_soc_dai_get_drvdata(cpu_dai);
 422         int ret = 0;
 423
 424         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 425         case SND_SOC_DAIFMT_CBM_CFM:
 426                 dev->ms_mode = TDM_AS_SLAVE;
 427                 break;
 428         case SND_SOC_DAIFMT_CBS_CFS:
 429                 dev->ms_mode = TDM_AS_MASTER;
 430                 break;
 431         case SND_SOC_DAIFMT_CBM_CFS:
 432         case SND_SOC_DAIFMT_CBS_CFM:
 433                 ret = -EINVAL;
 434                 break;
 435         default:
 436                 dev_dbg(dev->dev, "tdm : Invalid master/slave format\n");
 437                 ret = -EINVAL;
 438                 break;
 439         }
 440         return ret;
 441 }
 442
 443 static const struct snd_soc_dai_ops sf_tdm_dai_ops = {
 444         .hw_params      = sf_tdm_hw_params,
 445         .trigger        = sf_tdm_trigger,
 446         .set_fmt        = sf_tdm_set_fmt,
 447 };
 448
 449 static int sf_tdm_dai_probe(struct snd_soc_dai *dai)
 450 {
 451         struct sf_tdm_dev *dev = snd_soc_dai_get_drvdata(dai);
 452
 453         snd_soc_dai_init_dma_data(dai, &dev->play_dma_data, &dev->capture_dma_data);
 454         snd_soc_dai_set_drvdata(dai, dev);
 455         return 0;
 456 }
 457
 458 #define SF_TDM_RATES SNDRV_PCM_RATE_8000_48000
 459
 460 #define SF_TDM_FORMATS  (SNDRV_PCM_FMTBIT_S16_LE | \
 461                         SNDRV_PCM_FMTBIT_S32_LE)
 462
 463 static struct snd_soc_dai_driver sf_tdm_dai = {
 464         .name = "sf_tdm",
 465         .id = 0,
 466         .playback = {
 467                 .stream_name    = "Playback",
 468                 .channels_min   = 1,
 469                 .channels_max   = 8,
 470                 .rates          = SF_TDM_RATES,
 471                 .formats        = SF_TDM_FORMATS,
 472         },
 473         .capture = {
 474                 .stream_name    = "Capture",
 475                 .channels_min   = 1,
 476                 .channels_max   = 8,
 477                 .rates          = SF_TDM_RATES,
 478                 .formats        = SF_TDM_FORMATS,
 479         },
 480         .ops = &sf_tdm_dai_ops,
 481         .probe = sf_tdm_dai_probe,
 482         .symmetric_rate = 1,
 483 };
 484
 485 static const struct snd_pcm_hardware jh71xx_pcm_hardware = {
 486         .info                   = (SNDRV_PCM_INFO_MMAP          |
 487                                    SNDRV_PCM_INFO_MMAP_VALID    |
 488                                    SNDRV_PCM_INFO_INTERLEAVED   |
 489                                    SNDRV_PCM_INFO_BLOCK_TRANSFER),
 490         .buffer_bytes_max       = 192512,
 491         .period_bytes_min       = 4096,
 492         .period_bytes_max       = 32768,
 493         .periods_min            = 1,
 494         .periods_max            = 48,
 495         .fifo_size              = 16,
 496 };
 497
 498 static const struct snd_dmaengine_pcm_config jh71xx_dmaengine_pcm_config = {
 499         .pcm_hardware = &jh71xx_pcm_hardware,
 500         .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
 501         .prealloc_buffer_size = 192512,
 502 };
 503
 504 static void tdm_init_params(struct sf_tdm_dev *dev)
 505 {
 506         dev->clkpolity = TDM_TX_RASING_RX_FALLING;
 507         if (dev->frame_mode == SHORT_LATER) {
 508                 dev->elm = TDM_ELM_LATE;
 509                 dev->syncm = TDM_SYNCM_SHORT;
 510         } else if (dev->frame_mode == SHORT_EARLY) {
 511                 dev->elm = TDM_ELM_EARLY;
 512                 dev->syncm = TDM_SYNCM_SHORT;
 513         } else {
 514                 dev->elm = TDM_ELM_EARLY;
 515                 dev->syncm = TDM_SYNCM_LONG;
 516         }
 517
 518         dev->ms_mode = TDM_AS_SLAVE;
 519         dev->rx.ifl = dev->tx.ifl = TDM_FIFO_HALF;
 520         dev->rx.wl = dev->tx.wl = TDM_16BIT_WORD_LEN;
 521         dev->rx.sscale = dev->tx.sscale = 2;
 522         dev->rx.lrj = dev->tx.lrj = TDM_LEFT_JUSTIFT;
 523
 524         dev->play_dma_data.addr = TDM_FIFO;
 525         dev->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
 526         dev->play_dma_data.fifo_size = TDM_FIFO_DEPTH/2;
 527         dev->play_dma_data.maxburst = 16;
 528
 529         dev->capture_dma_data.addr = TDM_FIFO;
 530         dev->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
 531         dev->capture_dma_data.fifo_size = TDM_FIFO_DEPTH/2;
 532         dev->capture_dma_data.maxburst = 8;
 533 }
 534
 535 static int sf_tdm_clk_reset_init(struct platform_device *pdev, struct sf_tdm_dev *dev)
 536 {
 537         int ret;
 538
 539         static struct clk_bulk_data clks[] = {
 540                 { .id = "clk_ahb0" },
 541                 { .id = "clk_tdm_ahb" },
 542                 { .id = "clk_apb0" },
 543                 { .id = "clk_tdm_apb" },
 544                 { .id = "clk_tdm_internal" },
 545                 { .id = "clk_tdm_ext" },
 546                 { .id = "clk_tdm" },
 547                 { .id = "mclk_inner" },
 548         };
 549
 550         ret = devm_clk_bulk_get(&pdev->dev, ARRAY_SIZE(clks), clks);
 551         if (ret) {
 552                 dev_err(&pdev->dev, "failed to get tdm clocks\n");
 553                 goto exit;
 554         }
 555
 556         dev->clk_ahb0 = clks[0].clk;
 557         dev->clk_tdm_ahb = clks[1].clk;
 558         dev->clk_apb0 = clks[2].clk;
 559         dev->clk_tdm_apb = clks[3].clk;
 560         dev->clk_tdm_internal = clks[4].clk;
 561         dev->clk_tdm_ext = clks[5].clk;
 562         dev->clk_tdm = clks[6].clk;
 563         dev->clk_mclk_inner = clks[7].clk;
 564
 565         dev->resets = devm_reset_control_array_get_exclusive(&pdev->dev);
 566         if (IS_ERR(dev->resets)) {
 567                 ret = PTR_ERR(dev->resets);
 568                 dev_err(&pdev->dev, "Failed to get tdm resets");
 569                 goto exit;
 570         }
 571
 572         ret = reset_control_assert(dev->resets);
 573         if (ret) {
 574                 dev_err(&pdev->dev, "Failed to assert tdm resets\n");
 575                 goto exit;
 576         }
 577
 578         ret = clk_prepare_enable(dev->clk_mclk_inner);
 579         if (ret) {
 580                 dev_err(&pdev->dev, "failed to prepare enable clk_mclk_inner\n");
 581                 goto exit;
 582         }
 583
 584         ret = clk_prepare_enable(dev->clk_ahb0);
 585         if (ret) {
 586                 dev_err(&pdev->dev, "Failed to prepare enable clk_ahb0\n");
 587                 goto dis_mclk_inner;
 588         }
 589
 590         ret = clk_prepare_enable(dev->clk_tdm_ahb);
 591         if (ret) {
 592                 dev_err(&pdev->dev, "Failed to prepare enable clk_tdm_ahb\n");
 593                 goto dis_ahb0;
 594         }
 595
 596         ret = clk_prepare_enable(dev->clk_apb0);
 597         if (ret) {
 598                 dev_err(&pdev->dev, "Failed to prepare enable clk_apb0\n");
 599                 goto dis_tdm_ahb;
 600         }
 601
 602         ret = clk_prepare_enable(dev->clk_tdm_apb);
 603         if (ret) {
 604                 dev_err(&pdev->dev, "Failed to prepare enable clk_tdm_apb\n");
 605                 goto dis_apb0;
 606         }
 607
 608         ret = clk_prepare_enable(dev->clk_tdm_internal);
 609         if (ret) {
 610                 dev_err(&pdev->dev, "Failed to prepare enable clk_tdm_intl\n");
 611                 goto dis_tdm_apb;
 612         }
 613
 614         ret = clk_prepare_enable(dev->clk_tdm_ext);
 615         if (ret) {
 616                 dev_err(&pdev->dev, "failed to prepare enable clk_tdm_ext\n");
 617                 goto dis_tdm_internal;
 618         }
 619
 620         ret = clk_prepare_enable(dev->clk_tdm);
 621         if (ret) {
 622                 dev_err(&pdev->dev, "failed to prepare enable clk_tdm\n");
 623                 goto dis_tdm_ext;
 624         }
 625
 626         ret = reset_control_deassert(dev->resets);
 627         if (ret) {
 628                 dev_err(&pdev->dev, "Failed to deassert tdm resets\n");
 629                 goto dis_tdm_clk;
 630         }
 631
 632         return 0;
 633
 634 dis_tdm_clk:
 635         clk_disable_unprepare(dev->clk_tdm);
 636 dis_tdm_ext:
 637         clk_disable_unprepare(dev->clk_tdm_ext);
 638 dis_tdm_internal:
 639         clk_disable_unprepare(dev->clk_tdm_internal);
 640 dis_tdm_apb:
 641         clk_disable_unprepare(dev->clk_tdm_apb);
 642 dis_apb0:
 643         clk_disable_unprepare(dev->clk_apb0);
 644 dis_tdm_ahb:
 645         clk_disable_unprepare(dev->clk_tdm_ahb);
 646 dis_ahb0:
 647         clk_disable_unprepare(dev->clk_ahb0);
 648 dis_mclk_inner:
 649         clk_disable_unprepare(dev->clk_mclk_inner);
 650 exit:
 651         return ret;
 652 }
 653
 654 static int sf_tdm_probe(struct platform_device *pdev)
 655 {
 656         struct sf_tdm_dev *dev;
 657         struct resource *res;
 658         int ret;
 659
 660         dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
 661         if (!dev)
 662                 return -ENOMEM;
 663
 664         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 665         dev->tdm_base = devm_ioremap_resource(&pdev->dev, res);
 666         if (IS_ERR(dev->tdm_base))
 667                 return PTR_ERR(dev->tdm_base);
 668
 669         dev->dev = &pdev->dev;
 670
 671         ret = sf_tdm_clk_reset_init(pdev, dev);
 672         if (ret) {
 673                 dev_err(&pdev->dev, "failed to enable audio-tdm clock\n");
 674                 return ret;
 675         }
 676
 677         dev->frame_mode = SHORT_LATER;
 678         tdm_init_params(dev);
 679         dev_set_drvdata(&pdev->dev, dev);
 680
 681         ret = devm_snd_soc_register_component(&pdev->dev, &sf_tdm_component,
 682                                          &sf_tdm_dai, 1);
 683         if (ret != 0) {
 684                 dev_err(&pdev->dev, "failed to register dai\n");
 685                 return ret;
 686         }
 687
 688         ret = devm_snd_dmaengine_pcm_register(&pdev->dev,
 689                                         &jh71xx_dmaengine_pcm_config,
 690                                         SND_DMAENGINE_PCM_FLAG_COMPAT);
 691         if (ret) {
 692                 dev_err(&pdev->dev, "could not register pcm: %d\n", ret);
 693                 return ret;
 694         }
 695
 696         pm_runtime_enable(&pdev->dev);
 697 #ifdef CONFIG_PM
 698         sf_tdm_clk_disable(dev);
 699 #endif
 700
 701         return 0;
 702 }
 703
 704 static int sf_tdm_dev_remove(struct platform_device *pdev)
 705 {
 706         pm_runtime_disable(&pdev->dev);
 707         return 0;
 708 }
 709 static const struct of_device_id sf_tdm_of_match[] = {
 710         {.compatible = "starfive,jh7110-tdm",},
 711         {}
 712 };
 713 MODULE_DEVICE_TABLE(of, sf_tdm_of_match);
 714
 715 static const struct dev_pm_ops sf_tdm_pm_ops = {
 716         SET_RUNTIME_PM_OPS(sf_tdm_runtime_suspend,
 717                         sf_tdm_runtime_resume, NULL)
 718 };
 719
 720 static struct platform_driver sf_tdm_driver = {
 721         .driver = {
 722                 .name = "jh7110-tdm",
 723                 .of_match_table = sf_tdm_of_match,
 724                 .pm = &sf_tdm_pm_ops,
 725         },
 726         .probe = sf_tdm_probe,
 727         .remove = sf_tdm_dev_remove,
 728 };
 729 module_platform_driver(sf_tdm_driver);
 730
 731 MODULE_AUTHOR("Walker Chen <walker.chen@starfivetech.com>");
 732 MODULE_DESCRIPTION("Starfive TDM Controller Driver");
 733 MODULE_LICENSE("GPL v2");