sound/soc/starfive/starfive_tdm.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * TDM driver for the StarFive JH7110 SoC
   4  *
   5  * Copyright (C) 2022 StarFive Technology Co., Ltd.
   6  */
   7 #include <linux/clk.h>
   8 #include <linux/device.h>
   9 #include <linux/reset.h>
  10 #include <linux/module.h>
  11 #include <linux/of_irq.h>
  12 #include <linux/of_platform.h>
  13 #include <linux/regmap.h>
  14 #include <linux/pm_runtime.h>
  15 #include <linux/dma/starfive-dma.h>
  16 #include <sound/soc.h>
  17 #include <sound/soc-dai.h>
  18 #include <sound/pcm_params.h>
  19 #include <sound/initval.h>
  20 #include <sound/tlv.h>
  21 #include "starfive_tdm.h"
  22
  23 static inline u32 sf_tdm_readl(struct sf_tdm_dev *dev, u16 reg)
  24 {
  25         return readl_relaxed(dev->tdm_base + reg);
  26 }
  27
  28 static inline void sf_tdm_writel(struct sf_tdm_dev *dev, u16 reg, u32 val)
  29 {
  30         writel_relaxed(val, dev->tdm_base + reg);
  31 }
  32
  33 static void sf_tdm_save_context(struct sf_tdm_dev *dev)
  34 {
  35         dev->saved_reg_value[0] = sf_tdm_readl(dev, TDM_PCMGBCR);
  36         dev->saved_reg_value[1] = sf_tdm_readl(dev, TDM_PCMTXCR);
  37         dev->saved_reg_value[2] = sf_tdm_readl(dev, TDM_PCMRXCR);
  38         dev->saved_reg_value[3] = sf_tdm_readl(dev, TDM_PCMDIV);
  39 }
  40
  41 static void sf_tdm_restore_context(struct sf_tdm_dev *dev)
  42 {
  43         sf_tdm_writel(dev, TDM_PCMGBCR, dev->saved_reg_value[0]);
  44         sf_tdm_writel(dev, TDM_PCMTXCR, dev->saved_reg_value[1]);
  45         sf_tdm_writel(dev, TDM_PCMRXCR, dev->saved_reg_value[2]);
  46         sf_tdm_writel(dev, TDM_PCMDIV, dev->saved_reg_value[3]);
  47 }
  48
  49 static void sf_tdm_start(struct sf_tdm_dev *dev, struct snd_pcm_substream *substream)
  50 {
  51         u32 data;
  52         unsigned int val;
  53
  54         data = sf_tdm_readl(dev, TDM_PCMGBCR);
  55         sf_tdm_writel(dev, TDM_PCMGBCR, data | PCMGBCR_ENABLE);
  56
  57         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  58                 val = sf_tdm_readl(dev, TDM_PCMTXCR);
  59                 sf_tdm_writel(dev, TDM_PCMTXCR, val | PCMTXCR_TXEN);
  60         } else {
  61                 val = sf_tdm_readl(dev, TDM_PCMRXCR);
  62                 sf_tdm_writel(dev, TDM_PCMRXCR, val | PCMRXCR_RXEN);
  63         }
  64 }
  65
  66 static void sf_tdm_stop(struct sf_tdm_dev *dev, struct snd_pcm_substream *substream)
  67 {
  68         unsigned int val;
  69
  70         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  71                 val = sf_tdm_readl(dev, TDM_PCMTXCR);
  72                 val &= ~PCMTXCR_TXEN;
  73                 sf_tdm_writel(dev, TDM_PCMTXCR, val);
  74         } else {
  75                 val = sf_tdm_readl(dev, TDM_PCMRXCR);
  76                 val &= ~PCMRXCR_RXEN;
  77                 sf_tdm_writel(dev, TDM_PCMRXCR, val);
  78         }
  79
  80         val = sf_tdm_readl(dev, TDM_PCMGBCR);
  81         val &= ~PCMGBCR_ENABLE;
  82         sf_tdm_writel(dev, TDM_PCMGBCR, val);
  83 }
  84
  85 static int sf_tdm_syncdiv(struct sf_tdm_dev *dev)
  86 {
  87         u32 sl, sscale, syncdiv;
  88
  89         sl = (dev->rx.sl >= dev->tx.sl) ? dev->rx.sl:dev->tx.sl;
  90         sscale = (dev->rx.sscale >= dev->tx.sscale) ? dev->rx.sscale:dev->tx.sscale;
  91         syncdiv = dev->pcmclk / dev->samplerate - 1;
  92
  93         if ((syncdiv + 1) < (sl * sscale)) {
  94                 pr_info("set syncdiv failed !\n");
  95                 return -1;
  96         }
  97
  98         if ((dev->syncm == TDM_SYNCM_LONG) &&
  99                         ((dev->rx.sscale <= 1) || (dev->tx.sscale <= 1))) {
 100                 if ((syncdiv + 1) <= sl) {
 101                         pr_info("set syncdiv failed! it must be (syncdiv+1) > max[tx.sl, rx.sl]\n");
 102                         return -1;
 103                 }
 104         }
 105
 106         sf_tdm_writel(dev, TDM_PCMDIV, syncdiv);
 107         return 0;
 108 }
 109
 110 static void sf_tdm_contrl(struct sf_tdm_dev *dev)
 111 {
 112         u32 data;
 113
 114         data = (dev->clkpolity << CLKPOL_BIT) |
 115                 (dev->elm << ELM_BIT) |
 116                 (dev->syncm << SYNCM_BIT) |
 117                 (dev->ms_mode << MS_BIT);
 118         sf_tdm_writel(dev, TDM_PCMGBCR, data);
 119 }
 120
 121 static void sf_tdm_config(struct sf_tdm_dev *dev, struct snd_pcm_substream *substream)
 122 {
 123         u32 datarx, datatx;
 124
 125         sf_tdm_contrl(dev);
 126         sf_tdm_syncdiv(dev);
 127
 128         datarx = (dev->rx.ifl << IFL_BIT) |
 129                 (dev->rx.wl << WL_BIT) |
 130                 (dev->rx.sscale << SSCALE_BIT) |
 131                 (dev->rx.sl << SL_BIT) |
 132                 (dev->rx.lrj << LRJ_BIT);
 133
 134         datatx = (dev->tx.ifl << IFL_BIT) |
 135                 (dev->tx.wl << WL_BIT) |
 136                 (dev->tx.sscale << SSCALE_BIT) |
 137                 (dev->tx.sl << SL_BIT) |
 138                 (dev->tx.lrj << LRJ_BIT);
 139
 140         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 141                 sf_tdm_writel(dev, TDM_PCMTXCR, datatx);
 142         else
 143                 sf_tdm_writel(dev, TDM_PCMRXCR, datarx);
 144 }
 145
 146 static void sf_tdm_clk_disable(struct sf_tdm_dev *priv)
 147 {
 148         clk_disable_unprepare(priv->clk_tdm);
 149         clk_disable_unprepare(priv->clk_tdm_ext);
 150         clk_disable_unprepare(priv->clk_tdm_internal);
 151         clk_disable_unprepare(priv->clk_tdm_apb);
 152         clk_disable_unprepare(priv->clk_apb0);
 153         clk_disable_unprepare(priv->clk_tdm_ahb);
 154         clk_disable_unprepare(priv->clk_ahb0);
 155         clk_disable_unprepare(priv->clk_mclk_inner);
 156 }
 157
 158 #ifdef CONFIG_PM
 159 static int sf_tdm_runtime_suspend(struct device *dev)
 160 {
 161         struct sf_tdm_dev *priv = dev_get_drvdata(dev);
 162
 163         sf_tdm_clk_disable(priv);
 164         return 0;
 165 }
 166
 167 static int sf_tdm_runtime_resume(struct device *dev)
 168 {
 169         struct sf_tdm_dev *priv = dev_get_drvdata(dev);
 170         int ret;
 171
 172         ret = clk_prepare_enable(priv->clk_mclk_inner);
 173         if (ret) {
 174                 dev_err(dev, "failed to prepare enable clk_mclk_inner\n");
 175                 return ret;
 176         }
 177
 178         ret = clk_prepare_enable(priv->clk_ahb0);
 179         if (ret) {
 180                 dev_err(dev, "Failed to prepare enable clk_ahb0\n");
 181                 return ret;
 182         }
 183
 184         ret = clk_prepare_enable(priv->clk_tdm_ahb);
 185         if (ret) {
 186                 dev_err(dev, "Failed to prepare enable clk_tdm_ahb\n");
 187                 goto dis_mclk_inner;
 188         }
 189
 190         ret = clk_prepare_enable(priv->clk_apb0);
 191         if (ret) {
 192                 dev_err(dev, "Failed to prepare enable clk_apb0\n");
 193                 return ret;
 194         }
 195
 196         ret = clk_prepare_enable(priv->clk_tdm_apb);
 197         if (ret) {
 198                 dev_err(dev, "Failed to prepare enable clk_tdm_apb\n");
 199                 goto dis_tdm_ahb;
 200         }
 201
 202         ret = clk_prepare_enable(priv->clk_tdm_internal);
 203         if (ret) {
 204                 dev_err(dev, "Failed to prepare enable clk_tdm_intl\n");
 205                 goto dis_tdm_apb;
 206         }
 207
 208         ret = clk_prepare_enable(priv->clk_tdm_ext);
 209         if (ret) {
 210                 dev_err(dev, "Failed to prepare enable clk_tdm_ext\n");
 211                 goto dis_tdm_internal;
 212         }
 213
 214         ret = clk_prepare_enable(priv->clk_tdm);
 215         if (ret) {
 216                 dev_err(dev, "Failed to prepare enable clk_tdm\n");
 217                 goto dis_tdm_ext;
 218         }
 219
 220         ret = reset_control_deassert(priv->resets);
 221         if (ret) {
 222                 dev_err(dev, "Failed to deassert tdm resets\n");
 223                 goto err_reset;
 224         }
 225
 226         return 0;
 227
 228 err_reset:
 229         clk_disable_unprepare(priv->clk_tdm);
 230 dis_tdm_ext:
 231         clk_disable_unprepare(priv->clk_tdm_ext);
 232 dis_tdm_internal:
 233         clk_disable_unprepare(priv->clk_tdm_internal);
 234 dis_tdm_apb:
 235         clk_disable_unprepare(priv->clk_tdm_apb);
 236 dis_tdm_ahb:
 237         clk_disable_unprepare(priv->clk_tdm_ahb);
 238 dis_mclk_inner:
 239         clk_disable_unprepare(priv->clk_mclk_inner);
 240
 241         return ret;
 242 }
 243 #endif
 244
 245 #ifdef CONFIG_PM_SLEEP
 246 static int sf_tdm_suspend(struct snd_soc_component *component)
 247 {
 248         return pm_runtime_force_suspend(component->dev);
 249 }
 250
 251 static int sf_tdm_resume(struct snd_soc_component *component)
 252 {
 253         return pm_runtime_force_resume(component->dev);
 254 }
 255
 256 #else
 257 #define sf_tdm_suspend  NULL
 258 #define sf_tdm_resume   NULL
 259 #endif
 260
 261 /*
 262  * To stop dma first, we must implement this function, because it is
 263  * called before stopping the stream.
 264  */
 265 static int sf_pcm_trigger(struct snd_soc_component *component,
 266                               struct snd_pcm_substream *substream, int cmd)
 267 {
 268         int ret = 0;
 269         struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream);
 270
 271         switch (cmd) {
 272         case SNDRV_PCM_TRIGGER_START:
 273         case SNDRV_PCM_TRIGGER_RESUME:
 274         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 275                 break;
 276
 277         case SNDRV_PCM_TRIGGER_STOP:
 278         case SNDRV_PCM_TRIGGER_SUSPEND:
 279         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 280                 axi_dma_cyclic_stop(chan);
 281                 break;
 282
 283         default:
 284                 ret = -EINVAL;
 285                 break;
 286         }
 287         return ret;
 288 }
 289
 290 static const struct snd_soc_component_driver sf_tdm_component = {
 291         .name           = "jh7110-tdm",
 292         .suspend        = sf_tdm_suspend,
 293         .resume         = sf_tdm_resume,
 294         .trigger        = sf_pcm_trigger,
 295 };
 296
 297 static int sf_tdm_hw_params(struct snd_pcm_substream *substream,
 298                 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 299 {
 300         struct sf_tdm_dev *dev = snd_soc_dai_get_drvdata(dai);
 301         int chan_wl, chan_sl, chan_nr;
 302         unsigned int data_width;
 303         unsigned int mclk_rate;
 304         unsigned int dma_bus_width;
 305         int channels;
 306         int ret;
 307         struct snd_dmaengine_dai_dma_data *dma_data = NULL;
 308         struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
 309         struct snd_soc_dai_link *dai_link = rtd->dai_link;
 310
 311         dai_link->stop_dma_first = 1;
 312
 313         channels = params_channels(params);
 314         data_width = params_width(params);
 315
 316         dev->samplerate = params_rate(params);
 317         switch (dev->samplerate) {
 318         /*  There are some limitation when using 8k sample rate  */
 319         case 8000:
 320                 mclk_rate = 12288000;
 321                 if ((data_width == 16) || (channels == 1)) {
 322                         pr_err("TDM: not support 16bit or 1-channel when using 8k sample rate\n");
 323                         return -EINVAL;
 324                 }
 325                 break;
 326         case 11025:
 327                 /* sysclk */
 328                 mclk_rate = 11289600;
 329                 break;
 330         case 16000:
 331                 mclk_rate = 12288000;
 332                 break;
 333         case 22050:
 334                 mclk_rate = 11289600;
 335                 break;
 336         case 32000:
 337                 mclk_rate = 12288000;
 338                 break;
 339         case 44100:
 340                 mclk_rate = 11289600;
 341                 break;
 342         case 48000:
 343                 mclk_rate = 12288000;
 344                 break;
 345         default:
 346                 pr_err("TDM: not support sample rate:%d\n", dev->samplerate);
 347                 return -EINVAL;
 348         }
 349
 350         dev->pcmclk = channels * dev->samplerate * data_width;
 351
 352         switch (params_format(params)) {
 353         case SNDRV_PCM_FORMAT_S16_LE:
 354                 chan_wl = TDM_16BIT_WORD_LEN;
 355                 chan_sl = TDM_16BIT_SLOT_LEN;
 356                 dma_bus_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
 357                 break;
 358
 359         case SNDRV_PCM_FORMAT_S32_LE:
 360                 chan_wl = TDM_32BIT_WORD_LEN;
 361                 chan_sl = TDM_32BIT_SLOT_LEN;
 362                 dma_bus_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
 363                 break;
 364
 365         default:
 366                 dev_err(dev->dev, "tdm: unsupported PCM fmt");
 367                 return -EINVAL;
 368         }
 369
 370         chan_nr = params_channels(params);
 371         switch (chan_nr) {
 372         case ONE_CHANNEL_SUPPORT:
 373         case TWO_CHANNEL_SUPPORT:
 374         case FOUR_CHANNEL_SUPPORT:
 375         case SIX_CHANNEL_SUPPORT:
 376         case EIGHT_CHANNEL_SUPPORT:
 377                 break;
 378         default:
 379                 dev_err(dev->dev, "channel not supported\n");
 380                 return -EINVAL;
 381         }
 382
 383         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 384                 dev->tx.wl = chan_wl;
 385                 dev->tx.sl = chan_sl;
 386                 dev->tx.sscale = chan_nr;
 387                 dev->play_dma_data.addr_width = dma_bus_width;
 388                 dma_data = &dev->play_dma_data;
 389         } else {
 390                 dev->rx.wl = chan_wl;
 391                 dev->rx.sl = chan_sl;
 392                 dev->rx.sscale = chan_nr;
 393                 dev->capture_dma_data.addr_width = dma_bus_width;
 394                 dma_data = &dev->capture_dma_data;
 395         }
 396
 397         snd_soc_dai_set_dma_data(dai, substream, dma_data);
 398
 399         ret = clk_set_rate(dev->clk_mclk_inner, mclk_rate);
 400         if (ret) {
 401                 dev_info(dev->dev, "Can't set clk_mclk: %d\n", ret);
 402                 return ret;
 403         }
 404
 405         ret = clk_set_rate(dev->clk_tdm_internal, dev->pcmclk);
 406         if (ret) {
 407                 dev_info(dev->dev, "Can't set clk_tdm_internal: %d\n", ret);
 408                 return ret;
 409         }
 410
 411         ret = clk_set_parent(dev->clk_tdm, dev->clk_tdm_ext);
 412         if (ret) {
 413                 dev_info(dev->dev, "Can't set clock source for clk_tdm: %d\n", ret);
 414                 return ret;
 415         }
 416
 417         ret = clk_prepare_enable(dev->clk_tdm_ahb);
 418         if (ret) {
 419                 dev_err(dev->dev, "Failed to prepare enable clk_tdm_ahb\n");
 420                 return ret;
 421         }
 422
 423         ret = clk_prepare_enable(dev->clk_tdm_apb);
 424         if (ret) {
 425                 dev_err(dev->dev, "Failed to prepare enable clk_tdm_apb\n");
 426                 return ret;
 427         }
 428
 429         sf_tdm_config(dev, substream);
 430         sf_tdm_save_context(dev);
 431
 432         return 0;
 433 }
 434
 435 static int sf_tdm_trigger(struct snd_pcm_substream *substream,
 436                 int cmd, struct snd_soc_dai *dai)
 437 {
 438         struct sf_tdm_dev *dev = snd_soc_dai_get_drvdata(dai);
 439         int ret = 0;
 440
 441         switch (cmd) {
 442         case SNDRV_PCM_TRIGGER_START:
 443         case SNDRV_PCM_TRIGGER_RESUME:
 444         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 445                 dev->active++;
 446                 sf_tdm_restore_context(dev);
 447                 sf_tdm_start(dev, substream);
 448                 break;
 449
 450         case SNDRV_PCM_TRIGGER_STOP:
 451         case SNDRV_PCM_TRIGGER_SUSPEND:
 452         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 453                 dev->active--;
 454                 sf_tdm_stop(dev, substream);
 455                 break;
 456         default:
 457                 ret = -EINVAL;
 458                 break;
 459         }
 460         return ret;
 461 }
 462
 463 static int sf_tdm_set_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
 464 {
 465         struct sf_tdm_dev *dev = snd_soc_dai_get_drvdata(cpu_dai);
 466         int ret = 0;
 467
 468         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 469         case SND_SOC_DAIFMT_CBM_CFM:
 470                 dev->ms_mode = TDM_AS_SLAVE;
 471                 break;
 472         case SND_SOC_DAIFMT_CBS_CFS:
 473                 dev->ms_mode = TDM_AS_MASTER;
 474                 break;
 475         case SND_SOC_DAIFMT_CBM_CFS:
 476         case SND_SOC_DAIFMT_CBS_CFM:
 477                 ret = -EINVAL;
 478                 break;
 479         default:
 480                 dev_dbg(dev->dev, "tdm : Invalid master/slave format\n");
 481                 ret = -EINVAL;
 482                 break;
 483         }
 484         return ret;
 485 }
 486
 487 static const struct snd_soc_dai_ops sf_tdm_dai_ops = {
 488         .hw_params      = sf_tdm_hw_params,
 489         .trigger        = sf_tdm_trigger,
 490         .set_fmt        = sf_tdm_set_fmt,
 491 };
 492
 493 static int sf_tdm_dai_probe(struct snd_soc_dai *dai)
 494 {
 495         struct sf_tdm_dev *dev = snd_soc_dai_get_drvdata(dai);
 496
 497         snd_soc_dai_init_dma_data(dai, &dev->play_dma_data, &dev->capture_dma_data);
 498         snd_soc_dai_set_drvdata(dai, dev);
 499         return 0;
 500 }
 501
 502 #define SF_TDM_RATES SNDRV_PCM_RATE_8000_48000
 503
 504 #define SF_TDM_FORMATS  (SNDRV_PCM_FMTBIT_S16_LE | \
 505                         SNDRV_PCM_FMTBIT_S32_LE)
 506
 507 static struct snd_soc_dai_driver sf_tdm_dai = {
 508         .name = "sf_tdm",
 509         .id = 0,
 510         .playback = {
 511                 .stream_name    = "Playback",
 512                 .channels_min   = 1,
 513                 .channels_max   = 8,
 514                 .rates          = SF_TDM_RATES,
 515                 .formats        = SF_TDM_FORMATS,
 516         },
 517         .capture = {
 518                 .stream_name    = "Capture",
 519                 .channels_min   = 1,
 520                 .channels_max   = 8,
 521                 .rates          = SF_TDM_RATES,
 522                 .formats        = SF_TDM_FORMATS,
 523         },
 524         .ops = &sf_tdm_dai_ops,
 525         .probe = sf_tdm_dai_probe,
 526         .symmetric_rate = 1,
 527 };
 528
 529 static const struct snd_pcm_hardware jh71xx_pcm_hardware = {
 530         .info                   = (SNDRV_PCM_INFO_MMAP          |
 531                                    SNDRV_PCM_INFO_MMAP_VALID    |
 532                                    SNDRV_PCM_INFO_PAUSE         |
 533                                    SNDRV_PCM_INFO_RESUME        |
 534                                    SNDRV_PCM_INFO_INTERLEAVED   |
 535                                    SNDRV_PCM_INFO_BLOCK_TRANSFER),
 536         .buffer_bytes_max       = 192512,
 537         .period_bytes_min       = 4096,
 538         .period_bytes_max       = 32768,
 539         .periods_min            = 1,
 540         .periods_max            = 48,
 541         .fifo_size              = 16,
 542 };
 543
 544 static const struct snd_dmaengine_pcm_config jh71xx_dmaengine_pcm_config = {
 545         .pcm_hardware = &jh71xx_pcm_hardware,
 546         .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
 547         .prealloc_buffer_size = 192512,
 548 };
 549
 550 static void tdm_init_params(struct sf_tdm_dev *dev)
 551 {
 552         dev->clkpolity = TDM_TX_RASING_RX_FALLING;
 553         if (dev->frame_mode == SHORT_LATER) {
 554                 dev->elm = TDM_ELM_LATE;
 555                 dev->syncm = TDM_SYNCM_SHORT;
 556         } else if (dev->frame_mode == SHORT_EARLY) {
 557                 dev->elm = TDM_ELM_EARLY;
 558                 dev->syncm = TDM_SYNCM_SHORT;
 559         } else {
 560                 dev->elm = TDM_ELM_EARLY;
 561                 dev->syncm = TDM_SYNCM_LONG;
 562         }
 563
 564         dev->ms_mode = TDM_AS_SLAVE;
 565         dev->rx.ifl = dev->tx.ifl = TDM_FIFO_HALF;
 566         dev->rx.wl = dev->tx.wl = TDM_16BIT_WORD_LEN;
 567         dev->rx.sscale = dev->tx.sscale = 2;
 568         dev->rx.lrj = dev->tx.lrj = TDM_LEFT_JUSTIFT;
 569
 570         dev->play_dma_data.addr = TDM_FIFO;
 571         dev->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
 572         dev->play_dma_data.fifo_size = TDM_FIFO_DEPTH/2;
 573         dev->play_dma_data.maxburst = 16;
 574
 575         dev->capture_dma_data.addr = TDM_FIFO;
 576         dev->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
 577         dev->capture_dma_data.fifo_size = TDM_FIFO_DEPTH/2;
 578         dev->capture_dma_data.maxburst = 8;
 579 }
 580
 581 static int sf_tdm_clk_reset_init(struct platform_device *pdev, struct sf_tdm_dev *dev)
 582 {
 583         int ret;
 584
 585         static struct clk_bulk_data clks[] = {
 586                 { .id = "clk_ahb0" },
 587                 { .id = "clk_tdm_ahb" },
 588                 { .id = "clk_apb0" },
 589                 { .id = "clk_tdm_apb" },
 590                 { .id = "clk_tdm_internal" },
 591                 { .id = "clk_tdm_ext" },
 592                 { .id = "clk_tdm" },
 593                 { .id = "mclk_inner" },
 594         };
 595
 596         ret = devm_clk_bulk_get(&pdev->dev, ARRAY_SIZE(clks), clks);
 597         if (ret) {
 598                 dev_err(&pdev->dev, "failed to get tdm clocks\n");
 599                 goto exit;
 600         }
 601
 602         dev->clk_ahb0 = clks[0].clk;
 603         dev->clk_tdm_ahb = clks[1].clk;
 604         dev->clk_apb0 = clks[2].clk;
 605         dev->clk_tdm_apb = clks[3].clk;
 606         dev->clk_tdm_internal = clks[4].clk;
 607         dev->clk_tdm_ext = clks[5].clk;
 608         dev->clk_tdm = clks[6].clk;
 609         dev->clk_mclk_inner = clks[7].clk;
 610
 611         dev->resets = devm_reset_control_array_get_exclusive(&pdev->dev);
 612         if (IS_ERR(dev->resets)) {
 613                 ret = PTR_ERR(dev->resets);
 614                 dev_err(&pdev->dev, "Failed to get tdm resets");
 615                 goto exit;
 616         }
 617
 618         ret = reset_control_assert(dev->resets);
 619         if (ret) {
 620                 dev_err(&pdev->dev, "Failed to assert tdm resets\n");
 621                 goto exit;
 622         }
 623
 624         ret = clk_prepare_enable(dev->clk_mclk_inner);
 625         if (ret) {
 626                 dev_err(&pdev->dev, "failed to prepare enable clk_mclk_inner\n");
 627                 goto exit;
 628         }
 629
 630         ret = clk_prepare_enable(dev->clk_ahb0);
 631         if (ret) {
 632                 dev_err(&pdev->dev, "Failed to prepare enable clk_ahb0\n");
 633                 goto dis_mclk_inner;
 634         }
 635
 636         ret = clk_prepare_enable(dev->clk_tdm_ahb);
 637         if (ret) {
 638                 dev_err(&pdev->dev, "Failed to prepare enable clk_tdm_ahb\n");
 639                 goto dis_ahb0;
 640         }
 641
 642         ret = clk_prepare_enable(dev->clk_apb0);
 643         if (ret) {
 644                 dev_err(&pdev->dev, "Failed to prepare enable clk_apb0\n");
 645                 goto dis_tdm_ahb;
 646         }
 647
 648         ret = clk_prepare_enable(dev->clk_tdm_apb);
 649         if (ret) {
 650                 dev_err(&pdev->dev, "Failed to prepare enable clk_tdm_apb\n");
 651                 goto dis_apb0;
 652         }
 653
 654         ret = clk_prepare_enable(dev->clk_tdm_internal);
 655         if (ret) {
 656                 dev_err(&pdev->dev, "Failed to prepare enable clk_tdm_intl\n");
 657                 goto dis_tdm_apb;
 658         }
 659
 660         ret = clk_prepare_enable(dev->clk_tdm_ext);
 661         if (ret) {
 662                 dev_err(&pdev->dev, "failed to prepare enable clk_tdm_ext\n");
 663                 goto dis_tdm_internal;
 664         }
 665
 666         ret = clk_prepare_enable(dev->clk_tdm);
 667         if (ret) {
 668                 dev_err(&pdev->dev, "failed to prepare enable clk_tdm\n");
 669                 goto dis_tdm_ext;
 670         }
 671
 672         ret = reset_control_deassert(dev->resets);
 673         if (ret) {
 674                 dev_err(&pdev->dev, "Failed to deassert tdm resets\n");
 675                 goto dis_tdm_clk;
 676         }
 677
 678         return 0;
 679
 680 dis_tdm_clk:
 681         clk_disable_unprepare(dev->clk_tdm);
 682 dis_tdm_ext:
 683         clk_disable_unprepare(dev->clk_tdm_ext);
 684 dis_tdm_internal:
 685         clk_disable_unprepare(dev->clk_tdm_internal);
 686 dis_tdm_apb:
 687         clk_disable_unprepare(dev->clk_tdm_apb);
 688 dis_apb0:
 689         clk_disable_unprepare(dev->clk_apb0);
 690 dis_tdm_ahb:
 691         clk_disable_unprepare(dev->clk_tdm_ahb);
 692 dis_ahb0:
 693         clk_disable_unprepare(dev->clk_ahb0);
 694 dis_mclk_inner:
 695         clk_disable_unprepare(dev->clk_mclk_inner);
 696 exit:
 697         return ret;
 698 }
 699
 700 static int sf_tdm_probe(struct platform_device *pdev)
 701 {
 702         struct sf_tdm_dev *dev;
 703         struct resource *res;
 704         int ret;
 705
 706         dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
 707         if (!dev)
 708                 return -ENOMEM;
 709
 710         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 711         dev->tdm_base = devm_ioremap_resource(&pdev->dev, res);
 712         if (IS_ERR(dev->tdm_base))
 713                 return PTR_ERR(dev->tdm_base);
 714
 715         dev->dev = &pdev->dev;
 716
 717         ret = sf_tdm_clk_reset_init(pdev, dev);
 718         if (ret) {
 719                 dev_err(&pdev->dev, "failed to enable audio-tdm clock\n");
 720                 return ret;
 721         }
 722
 723         dev->frame_mode = SHORT_LATER;
 724         tdm_init_params(dev);
 725         dev_set_drvdata(&pdev->dev, dev);
 726
 727         ret = devm_snd_soc_register_component(&pdev->dev, &sf_tdm_component,
 728                                          &sf_tdm_dai, 1);
 729         if (ret != 0) {
 730                 dev_err(&pdev->dev, "failed to register dai\n");
 731                 return ret;
 732         }
 733
 734         ret = devm_snd_dmaengine_pcm_register(&pdev->dev,
 735                                         &jh71xx_dmaengine_pcm_config,
 736                                         SND_DMAENGINE_PCM_FLAG_COMPAT);
 737         if (ret) {
 738                 dev_err(&pdev->dev, "could not register pcm: %d\n", ret);
 739                 return ret;
 740         }
 741
 742         pm_runtime_enable(&pdev->dev);
 743 #ifdef CONFIG_PM
 744         sf_tdm_clk_disable(dev);
 745 #endif
 746
 747         return 0;
 748 }
 749
 750 static int sf_tdm_dev_remove(struct platform_device *pdev)
 751 {
 752         pm_runtime_disable(&pdev->dev);
 753         return 0;
 754 }
 755 static const struct of_device_id sf_tdm_of_match[] = {
 756         {.compatible = "starfive,jh7110-tdm",},
 757         {}
 758 };
 759 MODULE_DEVICE_TABLE(of, sf_tdm_of_match);
 760
 761 static const struct dev_pm_ops sf_tdm_pm_ops = {
 762         SET_RUNTIME_PM_OPS(sf_tdm_runtime_suspend,
 763                         sf_tdm_runtime_resume, NULL)
 764 };
 765
 766 static struct platform_driver sf_tdm_driver = {
 767         .driver = {
 768                 .name = "jh7110-tdm",
 769                 .of_match_table = sf_tdm_of_match,
 770                 .pm = &sf_tdm_pm_ops,
 771         },
 772         .probe = sf_tdm_probe,
 773         .remove = sf_tdm_dev_remove,
 774 };
 775 module_platform_driver(sf_tdm_driver);
 776
 777 MODULE_AUTHOR("Walker Chen <walker.chen@starfivetech.com>");
 778 MODULE_DESCRIPTION("Starfive TDM Controller Driver");
 779 MODULE_LICENSE("GPL v2");