sound/soc/starfive/starfive_spdif.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * SPDIF driver for the StarFive JH7110 SoC
   4  *
   5  * Copyright (C) 2022 StarFive Technology Co., Ltd.
   6  */
   7
   8 #include <linux/init.h>
   9 #include <linux/kernel.h>
  10 #include <linux/module.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/slab.h>
  13 #include <linux/of.h>
  14 #include <linux/clk.h>
  15 #include <linux/regmap.h>
  16 #include <linux/reset.h>
  17
  18 #include <sound/core.h>
  19 #include <sound/pcm.h>
  20 #include <sound/pcm_params.h>
  21 #include <sound/soc.h>
  22 #include <sound/initval.h>
  23 #include <sound/dmaengine_pcm.h>
  24 #include <linux/pm_runtime.h>
  25 #include "starfive_spdif.h"
  26
  27 static irqreturn_t spdif_irq_handler(int irq, void *dev_id)
  28 {
  29         struct sf_spdif_dev *dev = dev_id;
  30         bool irq_valid = false;
  31         unsigned int intr;
  32         unsigned int stat;
  33
  34         regmap_read(dev->regmap, SPDIF_INT_REG, &intr);
  35         regmap_read(dev->regmap, SPDIF_STAT_REG, &stat);
  36         regmap_update_bits(dev->regmap, SPDIF_CTRL,
  37                 SPDIF_MASK_ENABLE, 0);
  38         regmap_update_bits(dev->regmap, SPDIF_INT_REG,
  39                 SPDIF_INT_REG_BIT, 0);
  40
  41         if ((stat & SPDIF_EMPTY_FLAG) || (stat & SPDIF_AEMPTY_FLAG)) {
  42                 sf_spdif_pcm_push_tx(dev);
  43                 irq_valid = true;
  44         }
  45
  46         if ((stat & SPDIF_FULL_FLAG) || (stat & SPDIF_AFULL_FLAG)) {
  47                 sf_spdif_pcm_pop_rx(dev);
  48                 irq_valid = true;
  49         }
  50
  51         if (stat & SPDIF_PARITY_FLAG)
  52                 irq_valid = true;
  53
  54         if (stat & SPDIF_UNDERR_FLAG)
  55                 irq_valid = true;
  56
  57         if (stat & SPDIF_OVRERR_FLAG)
  58                 irq_valid = true;
  59
  60         if (stat & SPDIF_SYNCERR_FLAG)
  61                 irq_valid = true;
  62
  63         if (stat & SPDIF_LOCK_FLAG)
  64                 irq_valid = true;
  65
  66         if (stat & SPDIF_BEGIN_FLAG)
  67                 irq_valid = true;
  68
  69         if (stat & SPDIF_RIGHT_LEFT)
  70                 irq_valid = true;
  71
  72         regmap_update_bits(dev->regmap, SPDIF_CTRL,
  73                 SPDIF_MASK_ENABLE, SPDIF_MASK_ENABLE);
  74
  75         if (irq_valid)
  76                 return IRQ_HANDLED;
  77         else
  78                 return IRQ_NONE;
  79 }
  80
  81 static int sf_spdif_trigger(struct snd_pcm_substream *substream, int cmd,
  82         struct snd_soc_dai *dai)
  83 {
  84         struct sf_spdif_dev *spdif = snd_soc_dai_get_drvdata(dai);
  85         bool tx;
  86
  87         tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  88         if (tx) {
  89                 /* tx mode */
  90                 regmap_update_bits(spdif->regmap, SPDIF_CTRL,
  91                         SPDIF_TR_MODE, SPDIF_TR_MODE);
  92
  93                 regmap_update_bits(spdif->regmap, SPDIF_CTRL,
  94                         SPDIF_MASK_FIFO, SPDIF_EMPTY_MASK | SPDIF_AEMPTY_MASK);
  95         } else {
  96                 /* rx mode */
  97                 regmap_update_bits(spdif->regmap, SPDIF_CTRL,
  98                         SPDIF_TR_MODE, 0);
  99
 100                 regmap_update_bits(spdif->regmap, SPDIF_CTRL,
 101                         SPDIF_MASK_FIFO, SPDIF_FULL_MASK | SPDIF_AFULL_MASK);
 102         }
 103
 104         switch (cmd) {
 105         case SNDRV_PCM_TRIGGER_START:
 106         case SNDRV_PCM_TRIGGER_RESUME:
 107         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 108                 /* clock recovery form the SPDIF data stream  0:clk_enable */
 109                 regmap_update_bits(spdif->regmap, SPDIF_CTRL,
 110                         SPDIF_CLK_ENABLE, 0);
 111
 112                 regmap_update_bits(spdif->regmap, SPDIF_CTRL,
 113                         SPDIF_ENABLE, SPDIF_ENABLE);
 114                 break;
 115         case SNDRV_PCM_TRIGGER_STOP:
 116         case SNDRV_PCM_TRIGGER_SUSPEND:
 117         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 118                 /* clock recovery form the SPDIF data stream  1:power save mode */
 119                 regmap_update_bits(spdif->regmap, SPDIF_CTRL,
 120                         SPDIF_CLK_ENABLE, SPDIF_CLK_ENABLE);
 121
 122                 regmap_update_bits(spdif->regmap, SPDIF_CTRL,
 123                         SPDIF_ENABLE, 0);
 124                 break;
 125         default:
 126                 dev_err(dai->dev, "%s L.%d cmd:%d\n", __func__, __LINE__, cmd);
 127                 return -EINVAL;
 128         }
 129
 130         return 0;
 131 }
 132
 133 static int sf_spdif_hw_params(struct snd_pcm_substream *substream,
 134         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 135 {
 136         struct sf_spdif_dev *spdif = snd_soc_dai_get_drvdata(dai);
 137         unsigned int channels;
 138         unsigned int rate;
 139         unsigned int format;
 140         unsigned int tsamplerate;
 141         unsigned int mclk;
 142         unsigned int audio_root;
 143         int ret;
 144
 145         channels = params_channels(params);
 146         rate = params_rate(params);
 147         format = params_format(params);
 148
 149         switch (channels) {
 150         case 1:
 151                 regmap_update_bits(spdif->regmap, SPDIF_CTRL,
 152                         SPDIF_CHANNEL_MODE, SPDIF_CHANNEL_MODE);
 153                 regmap_update_bits(spdif->regmap, SPDIF_CTRL,
 154                         SPDIF_DUPLICATE, SPDIF_DUPLICATE);
 155                 spdif->channels = false;
 156                 break;
 157         case 2:
 158                 regmap_update_bits(spdif->regmap, SPDIF_CTRL,
 159                         SPDIF_CHANNEL_MODE, 0);
 160                 spdif->channels = true;
 161                 break;
 162         default:
 163                 dev_err(dai->dev, "invalid channels number\n");
 164                 return -EINVAL;
 165         }
 166
 167         switch (format) {
 168         case SNDRV_PCM_FORMAT_S16_LE:
 169         case SNDRV_PCM_FORMAT_S24_LE:
 170         case SNDRV_PCM_FORMAT_S24_3LE:
 171         case SNDRV_PCM_FORMAT_S32_LE:
 172                 break;
 173         default:
 174                 dev_err(dai->dev, "invalid format\n");
 175                 return -EINVAL;
 176         }
 177
 178         switch (rate) {
 179         case 8000:
 180                 break;
 181         case 11025:
 182                 audio_root = 148500000;
 183                 /* 11025 * 512 = 5644800 */
 184                 /* But now pll2 is 1188m and mclk should be 5711539 closely. */
 185                 mclk = 5711539;
 186                 break;
 187         case 16000:
 188                 break;
 189         case 22050:
 190                 audio_root = 148500000;
 191                 mclk = 11423077;
 192                 break;
 193         default:
 194                 dev_err(dai->dev, "channel:%d sample rate:%d\n", channels, rate);
 195                 return -EINVAL;
 196         }
 197
 198         /* use mclk_inner clock from 1188m PLL2 will be better about 11k and 22k*/
 199         if ((rate == 11025) || (rate == 22050)) {
 200                 ret = clk_set_parent(spdif->mclk, spdif->mclk_inner);
 201                 if (ret) {
 202                         dev_err(dai->dev,
 203                                 "failed to set parent to mclk_inner ret=%d\n", ret);
 204                         goto fail_ext;
 205                 }
 206
 207                 ret = clk_set_rate(spdif->audio_root, audio_root);
 208                 if (ret) {
 209                         dev_err(dai->dev, "failed to set audio_root rate :%d\n", ret);
 210                         goto fail_ext;
 211                 }
 212                 dev_dbg(dai->dev, "audio_root get rate:%ld\n",
 213                                 clk_get_rate(spdif->audio_root));
 214
 215                 ret = clk_set_rate(spdif->mclk_inner, mclk);
 216                 if (ret) {
 217                         dev_err(dai->dev, "failed to set mclk_inner rate :%d\n", ret);
 218                         goto fail_ext;
 219                 }
 220
 221                 mclk = clk_get_rate(spdif->mclk_inner);
 222                 dev_dbg(dai->dev, "mclk_inner get rate:%d\n", mclk);
 223         } else {
 224                 ret = clk_set_parent(spdif->mclk, spdif->mclk_ext);
 225                 if (ret) {
 226                         dev_err(dai->dev,
 227                                 "failed to set parent to mclk_ext ret=%d\n", ret);
 228                         goto fail_ext;
 229                 }
 230
 231                 mclk = clk_get_rate(spdif->mclk_ext);
 232                 dev_dbg(dai->dev, "mclk_ext get rate:%d\n", mclk);
 233         }
 234
 235         /* (FCLK)4096000/128=32000 */
 236         tsamplerate = (mclk / 128 + rate / 2) / rate - 1;
 237         if (tsamplerate < 3)
 238                 tsamplerate = 3;
 239
 240         /* transmission sample rate */
 241         regmap_update_bits(spdif->regmap, SPDIF_CTRL, 0xFF, tsamplerate);
 242
 243         return 0;
 244
 245 fail_ext:
 246         return ret;
 247 }
 248
 249 static int sf_spdif_clks_get(struct platform_device *pdev,
 250                                 struct sf_spdif_dev *spdif)
 251 {
 252         static struct clk_bulk_data clks[] = {
 253                 { .id = "spdif-apb" },          /* clock-names in dts file */
 254                 { .id = "spdif-core" },
 255                 { .id = "audroot" },
 256                 { .id = "mclk_inner"},
 257                 { .id = "mclk_ext"},
 258                 { .id = "mclk"},
 259         };
 260         int ret = devm_clk_bulk_get(&pdev->dev, ARRAY_SIZE(clks), clks);
 261
 262         spdif->spdif_apb = clks[0].clk;
 263         spdif->spdif_core = clks[1].clk;
 264         spdif->audio_root = clks[2].clk;
 265         spdif->mclk_inner = clks[3].clk;
 266         spdif->mclk_ext = clks[4].clk;
 267         spdif->mclk = clks[5].clk;
 268
 269         return ret;
 270 }
 271
 272 static int sf_spdif_resets_get(struct platform_device *pdev,
 273                                 struct sf_spdif_dev *spdif)
 274 {
 275         struct reset_control_bulk_data resets[] = {
 276                         { .id = "rst_apb" },
 277         };
 278         int ret = devm_reset_control_bulk_get_exclusive(&pdev->dev, ARRAY_SIZE(resets), resets);
 279
 280         if (ret)
 281                 return ret;
 282
 283         spdif->rst_apb = resets[0].rstc;
 284
 285         return 0;
 286 }
 287
 288 static int starfive_spdif_crg_enable(struct sf_spdif_dev *spdif, bool enable)
 289 {
 290         int ret;
 291
 292         dev_dbg(spdif->dev, "starfive_spdif clk&rst %sable.\n", enable ? "en":"dis");
 293         if (enable) {
 294                 ret = clk_prepare_enable(spdif->spdif_apb);
 295                 if (ret) {
 296                         dev_err(spdif->dev, "failed to prepare enable spdif_apb\n");
 297                         goto failed_apb_clk;
 298                 }
 299
 300                 ret = clk_prepare_enable(spdif->spdif_core);
 301                 if (ret) {
 302                         dev_err(spdif->dev, "failed to prepare enable spdif_core\n");
 303                         goto failed_core_clk;
 304                 }
 305
 306                 ret = reset_control_deassert(spdif->rst_apb);
 307                 if (ret) {
 308                         dev_err(spdif->dev, "failed to deassert apb\n");
 309                         goto failed_rst;
 310                 }
 311         } else {
 312                 clk_disable_unprepare(spdif->spdif_core);
 313                 clk_disable_unprepare(spdif->spdif_apb);
 314         }
 315
 316         return 0;
 317
 318 failed_rst:
 319         clk_disable_unprepare(spdif->spdif_core);
 320 failed_core_clk:
 321         clk_disable_unprepare(spdif->spdif_apb);
 322 failed_apb_clk:
 323         return ret;
 324 }
 325
 326 static int sf_spdif_clk_init(struct platform_device *pdev,
 327                                 struct sf_spdif_dev *spdif)
 328 {
 329         int ret = 0;
 330
 331         ret = starfive_spdif_crg_enable(spdif, true);
 332         if (ret)
 333                 return ret;
 334
 335         ret = clk_set_rate(spdif->audio_root, 204800000);
 336         if (ret) {
 337                 dev_err(&pdev->dev, "failed to set rate for spdif audroot ret=%d\n", ret);
 338                 goto disable_core_clk;
 339         }
 340
 341         ret = clk_set_rate(spdif->mclk_inner, 8192000);
 342         if (ret) {
 343                 dev_err(&pdev->dev, "failed to set rate for spdif mclk_inner ret=%d\n", ret);
 344                 goto disable_core_clk;
 345         }
 346
 347         dev_dbg(&pdev->dev, "spdif->spdif_apb = %lu\n", clk_get_rate(spdif->spdif_apb));
 348         dev_dbg(&pdev->dev, "spdif->spdif_core = %lu\n", clk_get_rate(spdif->spdif_core));
 349
 350         ret = clk_set_parent(spdif->mclk, spdif->mclk_ext);
 351         if (ret) {
 352                 dev_err(&pdev->dev, "failed to set parent for mclk to mclk_ext ret=%d\n", ret);
 353                 goto disable_core_clk;
 354         }
 355
 356         return 0;
 357
 358 disable_core_clk:
 359         clk_disable_unprepare(spdif->spdif_core);
 360         clk_disable_unprepare(spdif->spdif_apb);
 361
 362         return ret;
 363 }
 364
 365 static int sf_spdif_dai_probe(struct snd_soc_dai *dai)
 366 {
 367         struct sf_spdif_dev *spdif = snd_soc_dai_get_drvdata(dai);
 368
 369         pm_runtime_get_sync(spdif->dev);
 370
 371         /* reset */
 372         regmap_update_bits(spdif->regmap, SPDIF_CTRL,
 373                 SPDIF_ENABLE | SPDIF_SFR_ENABLE | SPDIF_FIFO_ENABLE, 0);
 374
 375         /* clear irq */
 376         regmap_update_bits(spdif->regmap, SPDIF_INT_REG,
 377                 SPDIF_INT_REG_BIT, 0);
 378
 379         /* power save mode */
 380         regmap_update_bits(spdif->regmap, SPDIF_CTRL,
 381                 SPDIF_CLK_ENABLE, SPDIF_CLK_ENABLE);
 382
 383         /* power save mode */
 384         regmap_update_bits(spdif->regmap, SPDIF_CTRL,
 385                 SPDIF_CLK_ENABLE, SPDIF_CLK_ENABLE);
 386
 387         regmap_update_bits(spdif->regmap, SPDIF_CTRL,
 388                 SPDIF_PARITCHECK|SPDIF_VALIDITYCHECK|SPDIF_DUPLICATE,
 389                 SPDIF_PARITCHECK|SPDIF_VALIDITYCHECK|SPDIF_DUPLICATE);
 390
 391         regmap_update_bits(spdif->regmap, SPDIF_CTRL,
 392                 SPDIF_SETPREAMBB, SPDIF_SETPREAMBB);
 393
 394         regmap_update_bits(spdif->regmap, SPDIF_INT_REG,
 395                 BIT8TO20MASK<<SPDIF_PREAMBLEDEL, 0x3<<SPDIF_PREAMBLEDEL);
 396
 397         regmap_update_bits(spdif->regmap, SPDIF_FIFO_CTRL,
 398                 ALLBITMASK, 0x20|(0x20<<SPDIF_AFULL_THRESHOLD));
 399
 400         regmap_update_bits(spdif->regmap, SPDIF_CTRL,
 401                 SPDIF_PARITYGEN, SPDIF_PARITYGEN);
 402
 403         regmap_update_bits(spdif->regmap, SPDIF_CTRL,
 404                 SPDIF_MASK_ENABLE, SPDIF_MASK_ENABLE);
 405
 406         /* APB access to FIFO enable, disable if use DMA/FIFO */
 407         regmap_update_bits(spdif->regmap, SPDIF_CTRL,
 408                 SPDIF_USE_FIFO_IF, 0);
 409
 410         /* two channel */
 411         regmap_update_bits(spdif->regmap, SPDIF_CTRL,
 412                 SPDIF_CHANNEL_MODE, 0);
 413
 414         pm_runtime_put_sync(spdif->dev);
 415         return 0;
 416 }
 417
 418 static const struct snd_soc_dai_ops sf_spdif_dai_ops = {
 419         .trigger = sf_spdif_trigger,
 420         .hw_params = sf_spdif_hw_params,
 421 };
 422
 423 #ifdef CONFIG_PM_SLEEP
 424 static int spdif_system_suspend(struct device *dev)
 425 {
 426         struct sf_spdif_dev *spdif = dev_get_drvdata(dev);
 427
 428         /* save the register value */
 429         regmap_read(spdif->regmap, SPDIF_CTRL, &spdif->reg_spdif_ctrl);
 430         regmap_read(spdif->regmap, SPDIF_INT_REG, &spdif->reg_spdif_int);
 431         regmap_read(spdif->regmap, SPDIF_FIFO_CTRL, &spdif->reg_spdif_fifo_ctrl);
 432
 433         return pm_runtime_force_suspend(dev);
 434 }
 435
 436 static int spdif_system_resume(struct device *dev)
 437 {
 438         struct sf_spdif_dev *spdif = dev_get_drvdata(dev);
 439         int ret;
 440
 441         ret = pm_runtime_force_resume(dev);
 442         if (ret)
 443                 return ret;
 444
 445         /* restore the register value */
 446         regmap_update_bits(spdif->regmap, SPDIF_CTRL,
 447                            ALLBITMASK, spdif->reg_spdif_ctrl);
 448         regmap_update_bits(spdif->regmap, SPDIF_INT_REG,
 449                            ALLBITMASK, spdif->reg_spdif_int);
 450         regmap_update_bits(spdif->regmap, SPDIF_FIFO_CTRL,
 451                            ALLBITMASK, spdif->reg_spdif_fifo_ctrl);
 452
 453         return 0;
 454 }
 455 #endif
 456
 457 #ifdef CONFIG_PM
 458 static int spdif_runtime_suspend(struct device *dev)
 459 {
 460         struct sf_spdif_dev *spdif = dev_get_drvdata(dev);
 461
 462         return starfive_spdif_crg_enable(spdif, false);
 463 }
 464
 465 static int spdif_runtime_resume(struct device *dev)
 466 {
 467         struct sf_spdif_dev *spdif = dev_get_drvdata(dev);
 468
 469         return starfive_spdif_crg_enable(spdif, true);
 470 }
 471 #endif
 472
 473 static const struct dev_pm_ops spdif_pm_ops = {
 474         SET_RUNTIME_PM_OPS(spdif_runtime_suspend, spdif_runtime_resume, NULL)
 475         SET_SYSTEM_SLEEP_PM_OPS(spdif_system_suspend, spdif_system_resume)
 476 };
 477
 478 #define SF_PCM_RATE_44100_192000  (SNDRV_PCM_RATE_44100 | \
 479                                    SNDRV_PCM_RATE_48000 | \
 480                                    SNDRV_PCM_RATE_96000 | \
 481                                    SNDRV_PCM_RATE_192000)
 482
 483 #define SF_PCM_RATE_8000_22050  (SNDRV_PCM_RATE_8000 | \
 484                                  SNDRV_PCM_RATE_11025 | \
 485                                  SNDRV_PCM_RATE_16000 | \
 486                                  SNDRV_PCM_RATE_22050)
 487
 488 static struct snd_soc_dai_driver sf_spdif_dai = {
 489         .name = "spdif",
 490         .id = 0,
 491         .probe = sf_spdif_dai_probe,
 492         .playback = {
 493                 .stream_name = "Playback",
 494                 .channels_min = 1,
 495                 .channels_max = 2,
 496                 .rates = SF_PCM_RATE_8000_22050,
 497                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
 498                            SNDRV_PCM_FMTBIT_S24_LE |
 499                            SNDRV_PCM_FMTBIT_S24_3LE |
 500                            SNDRV_PCM_FMTBIT_S32_LE,
 501         },
 502         .ops = &sf_spdif_dai_ops,
 503         .symmetric_rate = 1,
 504 };
 505
 506 static const struct snd_soc_component_driver sf_spdif_component = {
 507         .name = "starfive-spdif",
 508 };
 509
 510 static const struct regmap_config sf_spdif_regmap_config = {
 511         .reg_bits = 32,
 512         .reg_stride = 4,
 513         .val_bits = 32,
 514         .max_register = 0x200,
 515 };
 516
 517 static int sf_spdif_probe(struct platform_device *pdev)
 518 {
 519         struct sf_spdif_dev *spdif;
 520         struct resource *res;
 521         void __iomem *base;
 522         int ret;
 523         int irq;
 524
 525         spdif = devm_kzalloc(&pdev->dev, sizeof(*spdif), GFP_KERNEL);
 526         if (!spdif)
 527                 return -ENOMEM;
 528
 529         platform_set_drvdata(pdev, spdif);
 530
 531         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 532         base = devm_ioremap_resource(&pdev->dev, res);
 533         if (IS_ERR(base))
 534                 return PTR_ERR(base);
 535
 536         spdif->spdif_base = base;
 537         spdif->regmap = devm_regmap_init_mmio(&pdev->dev, spdif->spdif_base,
 538                                             &sf_spdif_regmap_config);
 539         if (IS_ERR(spdif->regmap))
 540                 return PTR_ERR(spdif->regmap);
 541
 542         spdif->dev = &pdev->dev;
 543
 544         ret = sf_spdif_clks_get(pdev, spdif);
 545         if (ret) {
 546                 dev_err(&pdev->dev, "failed to get audio clock\n");
 547                 return ret;
 548         }
 549
 550         ret = sf_spdif_resets_get(pdev, spdif);
 551         if (ret) {
 552                 dev_err(&pdev->dev, "failed to get audio reset controls\n");
 553                 return ret;
 554         }
 555
 556         ret = sf_spdif_clk_init(pdev, spdif);
 557         if (ret) {
 558                 dev_err(&pdev->dev, "failed to enable audio clock\n");
 559                 return ret;
 560         }
 561
 562         spdif->fifo_th = 16;
 563
 564         irq = platform_get_irq(pdev, 0);
 565         if (irq >= 0) {
 566                 ret = devm_request_irq(&pdev->dev, irq, spdif_irq_handler, 0,
 567                                 pdev->name, spdif);
 568                 if (ret < 0) {
 569                         dev_err(&pdev->dev, "failed to request irq\n");
 570                         return ret;
 571                 }
 572         }
 573
 574         ret = devm_snd_soc_register_component(&pdev->dev, &sf_spdif_component,
 575                                          &sf_spdif_dai, 1);
 576         if (ret)
 577                 goto err_clk_disable;
 578
 579         if (irq >= 0) {
 580                 ret = sf_spdif_pcm_register(pdev);
 581                 spdif->use_pio = true;
 582         } else {
 583                 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL,
 584                                         0);
 585                 spdif->use_pio = false;
 586         }
 587
 588         if (ret)
 589                 goto err_clk_disable;
 590
 591         starfive_spdif_crg_enable(spdif, false);
 592         pm_runtime_enable(&pdev->dev);
 593         dev_info(&pdev->dev, "spdif register done.\n");
 594
 595         return 0;
 596
 597 err_clk_disable:
 598         return ret;
 599 }
 600
 601 static const struct of_device_id sf_spdif_of_match[] = {
 602         { .compatible = "starfive,jh7110-spdif", },
 603         {},
 604 };
 605 MODULE_DEVICE_TABLE(of, sf_spdif_of_match);
 606
 607 static struct platform_driver sf_spdif_driver = {
 608         .driver = {
 609                 .name = "starfive-spdif",
 610                 .of_match_table = sf_spdif_of_match,
 611                 .pm = &spdif_pm_ops,
 612         },
 613         .probe = sf_spdif_probe,
 614 };
 615 module_platform_driver(sf_spdif_driver);
 616
 617 MODULE_AUTHOR("curry.zhang <curry.zhang@starfive.com>");
 618 MODULE_AUTHOR("Xingyu Wu <xingyu.wu@starfivetech.com>");
 619 MODULE_DESCRIPTION("starfive SPDIF driver");
 620 MODULE_LICENSE("GPL v2");