sound/soc/starfive/starfive_pwmdac.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * PWMDAC driver for the StarFive JH7110 SoC
   4  *
   5  * Copyright (C) 2022 StarFive Technology Co., Ltd.
   6  */
   7
   8 #include <linux/clk.h>
   9 #include <linux/device.h>
  10 #include <linux/init.h>
  11 #include <linux/io.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/module.h>
  14 #include <linux/slab.h>
  15 #include <linux/pm_runtime.h>
  16 #include <linux/kthread.h>
  17 #include <linux/reset.h>
  18 #include <linux/dma/starfive-dma.h>
  19 #include <sound/pcm.h>
  20 #include <sound/pcm_params.h>
  21 #include <sound/soc.h>
  22 #include <sound/dmaengine_pcm.h>
  23 #include "pwmdac.h"
  24
  25 struct ct_pwmdac {
  26         char *name;
  27         unsigned int vals;
  28 };
  29
  30 static const struct ct_pwmdac pwmdac_ct_shift_bit[] = {
  31         { .name = "8bit", .vals = PWMDAC_SHIFT_8 },
  32         { .name = "10bit", .vals = PWMDAC_SHIFT_10 }
  33 };
  34
  35 static const struct ct_pwmdac pwmdac_ct_duty_cycle[] = {
  36         { .name = "left", .vals = PWMDAC_CYCLE_LEFT },
  37         { .name = "right", .vals = PWMDAC_CYCLE_RIGHT },
  38         { .name = "center", .vals = PWMDAC_CYCLE_CENTER }
  39 };
  40
  41 static const struct ct_pwmdac pwmdac_ct_data_mode[] = {
  42         { .name = "unsinged", .vals = UNSINGED_DATA },
  43         { .name = "inverter", .vals = INVERTER_DATA_MSB }
  44 };
  45
  46 static const struct ct_pwmdac pwmdac_ct_lr_change[] = {
  47         { .name = "no_change", .vals = NO_CHANGE },
  48         { .name = "change", .vals = CHANGE }
  49 };
  50
  51 static const struct ct_pwmdac pwmdac_ct_shift[] = {
  52         { .name = "left 0 bit", .vals = PWMDAC_DATA_LEFT_SHIFT_BIT_0 },
  53         { .name = "left 1 bit", .vals = PWMDAC_DATA_LEFT_SHIFT_BIT_1 },
  54         { .name = "left 2 bit", .vals = PWMDAC_DATA_LEFT_SHIFT_BIT_2 },
  55         { .name = "left 3 bit", .vals = PWMDAC_DATA_LEFT_SHIFT_BIT_3 },
  56         { .name = "left 4 bit", .vals = PWMDAC_DATA_LEFT_SHIFT_BIT_4 },
  57         { .name = "left 5 bit", .vals = PWMDAC_DATA_LEFT_SHIFT_BIT_5 },
  58         { .name = "left 6 bit", .vals = PWMDAC_DATA_LEFT_SHIFT_BIT_6 }
  59 };
  60
  61 static int pwmdac_shift_bit_info(struct snd_kcontrol *kcontrol,
  62                                     struct snd_ctl_elem_info *uinfo)
  63 {
  64         unsigned int items = ARRAY_SIZE(pwmdac_ct_shift_bit);
  65
  66         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  67         uinfo->count = 1;
  68         uinfo->value.enumerated.items = items;
  69         if (uinfo->value.enumerated.item >= items)
  70                 uinfo->value.enumerated.item = items - 1;
  71         strcpy(uinfo->value.enumerated.name,
  72                 pwmdac_ct_shift_bit[uinfo->value.enumerated.item].name);
  73
  74         return 0;
  75 }
  76 static int pwmdac_shift_bit_get(struct snd_kcontrol *kcontrol,
  77                                    struct snd_ctl_elem_value *ucontrol)
  78 {
  79         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
  80         struct sf_pwmdac_dev *dev = snd_soc_component_get_drvdata(component);
  81         unsigned int item;
  82
  83         if (dev->shift_bit == pwmdac_ct_shift_bit[0].vals)
  84                 item = 0;
  85         else
  86                 item = 1;
  87
  88         ucontrol->value.enumerated.item[0] = item;
  89
  90         return 0;
  91 }
  92
  93 static int pwmdac_shift_bit_put(struct snd_kcontrol *kcontrol,
  94                                    struct snd_ctl_elem_value *ucontrol)
  95 {
  96         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
  97         struct sf_pwmdac_dev *dev = snd_soc_component_get_drvdata(component);
  98         int sel = ucontrol->value.enumerated.item[0];
  99         unsigned int items = ARRAY_SIZE(pwmdac_ct_shift_bit);
 100
 101         if (sel > items)
 102                 return 0;
 103
 104         switch (sel) {
 105         case 1:
 106                 dev->shift_bit = pwmdac_ct_shift_bit[1].vals;
 107                 break;
 108         default:
 109                 dev->shift_bit = pwmdac_ct_shift_bit[0].vals;
 110                 break;
 111         }
 112
 113         return 0;
 114 }
 115
 116 static int pwmdac_duty_cycle_info(struct snd_kcontrol *kcontrol,
 117                                     struct snd_ctl_elem_info *uinfo)
 118 {
 119         unsigned int items = ARRAY_SIZE(pwmdac_ct_duty_cycle);
 120
 121         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
 122         uinfo->count = 1;
 123         uinfo->value.enumerated.items = items;
 124         if (uinfo->value.enumerated.item >= items)
 125                 uinfo->value.enumerated.item = items - 1;
 126         strcpy(uinfo->value.enumerated.name,
 127                 pwmdac_ct_duty_cycle[uinfo->value.enumerated.item].name);
 128
 129         return 0;
 130 }
 131
 132 static int pwmdac_duty_cycle_get(struct snd_kcontrol *kcontrol,
 133                                    struct snd_ctl_elem_value *ucontrol)
 134 {
 135         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 136         struct sf_pwmdac_dev *dev = snd_soc_component_get_drvdata(component);
 137
 138         ucontrol->value.enumerated.item[0] = dev->duty_cycle;
 139         return 0;
 140 }
 141
 142 static int pwmdac_duty_cycle_put(struct snd_kcontrol *kcontrol,
 143                                    struct snd_ctl_elem_value *ucontrol)
 144 {
 145         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 146         struct sf_pwmdac_dev *dev = snd_soc_component_get_drvdata(component);
 147         int sel = ucontrol->value.enumerated.item[0];
 148         unsigned int items = ARRAY_SIZE(pwmdac_ct_duty_cycle);
 149
 150         if (sel > items)
 151                 return 0;
 152
 153         dev->duty_cycle = pwmdac_ct_duty_cycle[sel].vals;
 154         return 0;
 155 }
 156
 157 static int pwmdac_data_mode_info(struct snd_kcontrol *kcontrol,
 158                                     struct snd_ctl_elem_info *uinfo)
 159 {
 160         unsigned int items = ARRAY_SIZE(pwmdac_ct_data_mode);
 161
 162         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
 163         uinfo->count = 1;
 164         uinfo->value.enumerated.items = items;
 165         if (uinfo->value.enumerated.item >= items)
 166                 uinfo->value.enumerated.item = items - 1;
 167         strcpy(uinfo->value.enumerated.name,
 168                 pwmdac_ct_data_mode[uinfo->value.enumerated.item].name);
 169
 170         return 0;
 171 }
 172
 173 static int pwmdac_data_mode_get(struct snd_kcontrol *kcontrol,
 174                                    struct snd_ctl_elem_value *ucontrol)
 175 {
 176         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 177         struct sf_pwmdac_dev *dev = snd_soc_component_get_drvdata(component);
 178
 179         ucontrol->value.enumerated.item[0] = dev->data_mode;
 180         return 0;
 181 }
 182
 183 static int pwmdac_data_mode_put(struct snd_kcontrol *kcontrol,
 184                                    struct snd_ctl_elem_value *ucontrol)
 185 {
 186         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 187         struct sf_pwmdac_dev *dev = snd_soc_component_get_drvdata(component);
 188         int sel = ucontrol->value.enumerated.item[0];
 189         unsigned int items = ARRAY_SIZE(pwmdac_ct_data_mode);
 190
 191         if (sel > items)
 192                 return 0;
 193
 194         dev->data_mode = pwmdac_ct_data_mode[sel].vals;
 195         return 0;
 196 }
 197
 198 static int pwmdac_shift_info(struct snd_kcontrol *kcontrol,
 199                                     struct snd_ctl_elem_info *uinfo)
 200 {
 201         unsigned int items = ARRAY_SIZE(pwmdac_ct_shift);
 202
 203         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
 204         uinfo->count = 1;
 205         uinfo->value.enumerated.items = items;
 206         if (uinfo->value.enumerated.item >= items)
 207                 uinfo->value.enumerated.item = items - 1;
 208         strcpy(uinfo->value.enumerated.name,
 209                 pwmdac_ct_shift[uinfo->value.enumerated.item].name);
 210
 211         return 0;
 212 }
 213
 214 static int pwmdac_shift_get(struct snd_kcontrol *kcontrol,
 215                                    struct snd_ctl_elem_value *ucontrol)
 216 {
 217         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 218         struct sf_pwmdac_dev *dev = snd_soc_component_get_drvdata(component);
 219         unsigned int item = dev->shift;
 220
 221         ucontrol->value.enumerated.item[0] =  pwmdac_ct_shift[item].vals;
 222         return 0;
 223 }
 224
 225 static int pwmdac_shift_put(struct snd_kcontrol *kcontrol,
 226                                    struct snd_ctl_elem_value *ucontrol)
 227 {
 228         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 229         struct sf_pwmdac_dev *dev = snd_soc_component_get_drvdata(component);
 230         int sel = ucontrol->value.enumerated.item[0];
 231         unsigned int items = ARRAY_SIZE(pwmdac_ct_shift);
 232
 233         if (sel > items)
 234                 return 0;
 235
 236         dev->shift = pwmdac_ct_shift[sel].vals;
 237         return 0;
 238 }
 239
 240 static int pwmdac_lr_change_info(struct snd_kcontrol *kcontrol,
 241                                     struct snd_ctl_elem_info *uinfo)
 242 {
 243         unsigned int items = ARRAY_SIZE(pwmdac_ct_lr_change);
 244
 245         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
 246         uinfo->count = 1;
 247         uinfo->value.enumerated.items = items;
 248         if (uinfo->value.enumerated.item >= items)
 249                 uinfo->value.enumerated.item = items - 1;
 250         strcpy(uinfo->value.enumerated.name,
 251                 pwmdac_ct_lr_change[uinfo->value.enumerated.item].name);
 252
 253         return 0;
 254 }
 255
 256 static int pwmdac_lr_change_get(struct snd_kcontrol *kcontrol,
 257                                    struct snd_ctl_elem_value *ucontrol)
 258 {
 259         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 260         struct sf_pwmdac_dev *dev = snd_soc_component_get_drvdata(component);
 261
 262         ucontrol->value.enumerated.item[0] = dev->lr_change;
 263         return 0;
 264 }
 265
 266 static int pwmdac_lr_change_put(struct snd_kcontrol *kcontrol,
 267                                    struct snd_ctl_elem_value *ucontrol)
 268 {
 269         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 270         struct sf_pwmdac_dev *dev = snd_soc_component_get_drvdata(component);
 271         int sel = ucontrol->value.enumerated.item[0];
 272         unsigned int items = ARRAY_SIZE(pwmdac_ct_lr_change);
 273
 274         if (sel > items)
 275                 return 0;
 276
 277         dev->lr_change = pwmdac_ct_lr_change[sel].vals;
 278         return 0;
 279 }
 280
 281 static inline void pwmdc_write_reg(void __iomem *io_base, int reg, u32 val)
 282 {
 283         writel(val, io_base + reg);
 284 }
 285
 286 static inline u32 pwmdc_read_reg(void __iomem *io_base, int reg)
 287 {
 288         return readl(io_base + reg);
 289 }
 290
 291 /*
 292  * 32bit-4byte
 293  */
 294 static void pwmdac_set_ctrl_enable(struct sf_pwmdac_dev *dev)
 295 {
 296         u32 date;
 297
 298         date = pwmdc_read_reg(dev->pwmdac_base, PWMDAC_CTRL);
 299         pwmdc_write_reg(dev->pwmdac_base, PWMDAC_CTRL, date | BIT(0));
 300 }
 301
 302 /*
 303  * 32bit-4byte
 304  */
 305 static void pwmdac_set_ctrl_disable(struct sf_pwmdac_dev *dev)
 306 {
 307         u32 date;
 308
 309         date = pwmdc_read_reg(dev->pwmdac_base, PWMDAC_CTRL);
 310         pwmdc_write_reg(dev->pwmdac_base, PWMDAC_CTRL, date & ~BIT(0));
 311 }
 312
 313 /*
 314  * 8:8-bit
 315  * 10:10-bit
 316  */
 317 static void pwmdac_set_ctrl_shift(struct sf_pwmdac_dev *dev, u8 data)
 318 {
 319         u32 value = 0;
 320
 321         if (data == PWMDAC_SHIFT_8) {
 322                 value = (~((~value) | SFC_PWMDAC_SHIFT));
 323                 pwmdc_write_reg(dev->pwmdac_base, PWMDAC_CTRL, value);
 324         } else if (data == PWMDAC_SHIFT_10) {
 325                 value |= SFC_PWMDAC_SHIFT;
 326                 pwmdc_write_reg(dev->pwmdac_base, PWMDAC_CTRL, value);
 327         }
 328 }
 329
 330 /*
 331  * 00:left
 332  * 01:right
 333  * 10:center
 334  */
 335 static void pwmdac_set_ctrl_dutyCycle(struct sf_pwmdac_dev *dev, u8 data)
 336 {
 337         u32 value = 0;
 338
 339         value = pwmdc_read_reg(dev->pwmdac_base, PWMDAC_CTRL);
 340         if (data == PWMDAC_CYCLE_LEFT) {
 341                 value = (~((~value) | (0x03<<PWMDAC_DUTY_CYCLE_LOW)));
 342                 pwmdc_write_reg(dev->pwmdac_base, PWMDAC_CTRL, value);
 343         } else if (data == PWMDAC_CYCLE_RIGHT) {
 344                 value = (~((~value) | (0x01<<PWMDAC_DUTY_CYCLE_HIGH))) |
 345                         (0x01<<PWMDAC_DUTY_CYCLE_LOW);
 346                 pwmdc_write_reg(dev->pwmdac_base, PWMDAC_CTRL, value);
 347         } else if (data == PWMDAC_CYCLE_CENTER) {
 348                 value = (~((~value) | (0x01<<PWMDAC_DUTY_CYCLE_LOW))) |
 349                         (0x01<<PWMDAC_DUTY_CYCLE_HIGH);
 350                 pwmdc_write_reg(dev->pwmdac_base, PWMDAC_CTRL, value);
 351         }
 352 }
 353
 354
 355 static void pwmdac_set_ctrl_N(struct sf_pwmdac_dev *dev, u16 data)
 356 {
 357         u32 value = 0;
 358
 359         value = pwmdc_read_reg(dev->pwmdac_base, PWMDAC_CTRL);
 360         pwmdc_write_reg(dev->pwmdac_base, PWMDAC_CTRL,
 361                 (value & PWMDAC_CTRL_DATA_MASK) | ((data - 1) << PWMDAC_CTRL_DATA_SHIFT));
 362 }
 363
 364
 365 static void pwmdac_LR_data_change(struct sf_pwmdac_dev *dev, u8 data)
 366 {
 367         u32 value = 0;
 368
 369         value = pwmdc_read_reg(dev->pwmdac_base, PWMDAC_CTRL);
 370         switch (data) {
 371         case NO_CHANGE:
 372                 value &= (~SFC_PWMDAC_LEFT_RIGHT_DATA_CHANGE);
 373                 break;
 374         case CHANGE:
 375                 value |= SFC_PWMDAC_LEFT_RIGHT_DATA_CHANGE;
 376                 break;
 377         }
 378
 379         pwmdc_write_reg(dev->pwmdac_base, PWMDAC_CTRL, value);
 380 }
 381
 382
 383 static void pwmdac_data_mode(struct sf_pwmdac_dev *dev,  u8 data)
 384 {
 385         u32 value = 0;
 386
 387         value = pwmdc_read_reg(dev->pwmdac_base, PWMDAC_CTRL);
 388         if (data == UNSINGED_DATA)
 389                 value &= (~SFC_PWMDAC_DATA_MODE);
 390         else if (data == INVERTER_DATA_MSB)
 391                 value |= SFC_PWMDAC_DATA_MODE;
 392
 393         pwmdc_write_reg(dev->pwmdac_base, PWMDAC_CTRL, value);
 394 }
 395
 396
 397 static int pwmdac_data_shift(struct sf_pwmdac_dev *dev, u8 data)
 398 {
 399         u32 value = 0;
 400
 401         if ((data < PWMDAC_DATA_LEFT_SHIFT_BIT_0) ||
 402                 (data > PWMDAC_DATA_LEFT_SHIFT_BIT_7))
 403                 return -1;
 404
 405         value = pwmdc_read_reg(dev->pwmdac_base, PWMDAC_CTRL);
 406         value &= (~(PWMDAC_DATA_LEFT_SHIFT_BIT_ALL << PWMDAC_DATA_LEFT_SHIFT));
 407         value |= (data<<PWMDAC_DATA_LEFT_SHIFT);
 408         pwmdc_write_reg(dev->pwmdac_base, PWMDAC_CTRL, value);
 409         return 0;
 410 }
 411
 412 static int get_pwmdac_fifo_state(struct sf_pwmdac_dev *dev)
 413 {
 414         u32 value;
 415
 416         value = pwmdc_read_reg(dev->pwmdac_base, PWMDAC_SATAE);
 417         if ((value & 0x02) == 0)
 418                 return FIFO_UN_FULL;
 419
 420         return FIFO_FULL;
 421 }
 422
 423
 424 static void pwmdac_set(struct sf_pwmdac_dev *dev)
 425 {
 426         /*8-bit + left + N=16*/
 427         pwmdac_set_ctrl_shift(dev, dev->shift_bit);
 428         pwmdac_set_ctrl_dutyCycle(dev, dev->duty_cycle);
 429         pwmdac_set_ctrl_N(dev, dev->datan);
 430         pwmdac_set_ctrl_enable(dev);
 431
 432         pwmdac_LR_data_change(dev, dev->lr_change);
 433         pwmdac_data_mode(dev, dev->data_mode);
 434         if (dev->shift)
 435                 pwmdac_data_shift(dev, dev->shift);
 436 }
 437
 438 static void pwmdac_stop(struct sf_pwmdac_dev *dev)
 439 {
 440         pwmdac_set_ctrl_disable(dev);
 441 }
 442
 443 static int pwmdac_config(struct sf_pwmdac_dev *dev)
 444 {
 445         switch (dev->mode) {
 446         case shift_8Bit_unsigned:
 447         case shift_8Bit_unsigned_dataShift:
 448                 /* 8 bit, unsigned */
 449                 dev->shift_bit  = PWMDAC_SHIFT_8;
 450                 dev->duty_cycle = PWMDAC_CYCLE_CENTER;
 451                 dev->datan      = PWMDAC_SAMPLE_CNT_8;
 452                 dev->data_mode  = UNSINGED_DATA;
 453                 break;
 454
 455         case shift_8Bit_inverter:
 456         case shift_8Bit_inverter_dataShift:
 457                 /* 8 bit, invert */
 458                 dev->shift_bit  = PWMDAC_SHIFT_8;
 459                 dev->duty_cycle = PWMDAC_CYCLE_CENTER;
 460                 dev->datan      = PWMDAC_SAMPLE_CNT_8;
 461                 dev->data_mode  = INVERTER_DATA_MSB;
 462                 break;
 463
 464         case shift_10Bit_unsigned:
 465         case shift_10Bit_unsigned_dataShift:
 466                 /* 10 bit, unsigend */
 467                 dev->shift_bit  = PWMDAC_SHIFT_10;
 468                 dev->duty_cycle = PWMDAC_CYCLE_CENTER;
 469                 dev->datan      = PWMDAC_SAMPLE_CNT_8;
 470                 dev->data_mode  = UNSINGED_DATA;
 471                 break;
 472
 473         case shift_10Bit_inverter:
 474         case shift_10Bit_inverter_dataShift:
 475                 /* 10 bit, invert */
 476                 dev->shift_bit  = PWMDAC_SHIFT_10;
 477                 dev->duty_cycle = PWMDAC_CYCLE_CENTER;
 478                 dev->datan      = PWMDAC_SAMPLE_CNT_8;
 479                 dev->data_mode  = INVERTER_DATA_MSB;
 480                 break;
 481
 482         default:
 483                 return -1;
 484         }
 485
 486         if ((dev->mode == shift_8Bit_unsigned_dataShift) ||
 487                 (dev->mode == shift_8Bit_inverter_dataShift) ||
 488                 (dev->mode == shift_10Bit_unsigned_dataShift) ||
 489                 (dev->mode == shift_10Bit_inverter_dataShift))
 490                 dev->shift = 4; /*0~7*/
 491         else
 492                 dev->shift = 0;
 493
 494         dev->lr_change = NO_CHANGE;
 495         return 0;
 496 }
 497
 498 static int sf_pwmdac_prepare(struct snd_pcm_substream *substream,
 499                           struct snd_soc_dai *dai)
 500 {
 501         return 0;
 502 }
 503
 504 int pwmdac_tx_thread(void *dev)
 505 {
 506         struct sf_pwmdac_dev *pwmdac_dev =  (struct sf_pwmdac_dev *)dev;
 507
 508         if (!pwmdac_dev) {
 509                 dev_err(pwmdac_dev->dev, "%s L.%d  dev is null.\n", __FILE__, __LINE__);
 510                 return -1;
 511         }
 512
 513         while (!pwmdac_dev->tx_thread_exit) {
 514                 if (get_pwmdac_fifo_state(pwmdac_dev) == 0)
 515                         sf_pwmdac_pcm_push_tx(pwmdac_dev);
 516                 else
 517                         udelay(100);
 518         }
 519
 520         return 0;
 521 }
 522
 523 static int sf_pwmdac_trigger(struct snd_pcm_substream *substream,
 524                 int cmd, struct snd_soc_dai *dai)
 525 {
 526         struct sf_pwmdac_dev *dev = snd_soc_dai_get_drvdata(dai);
 527         int ret = 0;
 528
 529         switch (cmd) {
 530         case SNDRV_PCM_TRIGGER_START:
 531         case SNDRV_PCM_TRIGGER_RESUME:
 532         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 533                 dev->active++;
 534                 pwmdac_set(dev);
 535                 if (dev->use_pio) {
 536                         dev->tx_thread = kthread_create(pwmdac_tx_thread, (void *)dev, "pwmdac");
 537                         if (IS_ERR(dev->tx_thread))
 538                                 return PTR_ERR(dev->tx_thread);
 539
 540                         wake_up_process(dev->tx_thread);
 541                         dev->tx_thread_exit = 0;
 542                 }
 543                 break;
 544
 545         case SNDRV_PCM_TRIGGER_STOP:
 546         case SNDRV_PCM_TRIGGER_SUSPEND:
 547         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 548                 dev->active--;
 549                 pwmdac_stop(dev);
 550                 if (dev->use_pio) {
 551                         if (dev->tx_thread)
 552                                 dev->tx_thread_exit = 1;
 553                 }
 554                 break;
 555         default:
 556                 ret = -EINVAL;
 557                 break;
 558         }
 559         return ret;
 560 }
 561
 562 static int sf_pwmdac_hw_params(struct snd_pcm_substream *substream,
 563         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 564 {
 565         int ret = 0;
 566         unsigned long mclk_dac_value;
 567         struct sf_pwmdac_dev *dev = dev_get_drvdata(dai->dev);
 568         struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
 569         struct snd_soc_dai_link *dai_link = rtd->dai_link;
 570
 571         dai_link->stop_dma_first = 1;
 572
 573         dev->play_dma_data.addr = dev->mapbase + PWMDAC_WDATA;
 574
 575         switch (params_rate(params)) {
 576         case 8000:
 577                 dev->datan = PWMDAC_SAMPLE_CNT_3;
 578                 mclk_dac_value = 6144000;
 579                 break;
 580         case 11025:
 581                 dev->datan = PWMDAC_SAMPLE_CNT_2;
 582                 mclk_dac_value = 5644800;
 583                 break;
 584         case 16000:
 585                 dev->datan = PWMDAC_SAMPLE_CNT_3;
 586                 mclk_dac_value = 12288000;
 587                 break;
 588         case 22050:
 589                 dev->datan = PWMDAC_SAMPLE_CNT_1;
 590                 mclk_dac_value = 5644800;
 591                 break;
 592         case 32000:
 593                 dev->datan = PWMDAC_SAMPLE_CNT_1;
 594                 mclk_dac_value = 8192000;
 595                 break;
 596         case 44100:
 597                 dev->datan = PWMDAC_SAMPLE_CNT_1;
 598                 mclk_dac_value = 11289600;
 599                 break;
 600         case 48000:
 601                 dev->datan = PWMDAC_SAMPLE_CNT_1;
 602                 mclk_dac_value = 12288000;
 603                 break;
 604         default:
 605                 dev_err(dai->dev, "%d rate not supported\n",
 606                                 params_rate(params));
 607                 return -EINVAL;
 608         }
 609
 610         switch (params_channels(params)) {
 611         case 2:
 612                 dev->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
 613                 break;
 614         case 1:
 615                 dev->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
 616                 break;
 617         default:
 618                 dev_err(dai->dev, "%d channels not supported\n",
 619                                 params_channels(params));
 620                 return -EINVAL;
 621         }
 622
 623         /* The mclock for the clock driver always rounds down so add a little slack */
 624         mclk_dac_value = mclk_dac_value + 64;
 625         pwmdac_set(dev);
 626
 627         ret = clk_set_rate(dev->clk_pwmdac_core, mclk_dac_value);
 628         if (ret) {
 629                 dev_err(dai->dev, "failed to set rate for clk_pwmdac_core %lu\n", mclk_dac_value);
 630                 goto err_clk_pwmdac;
 631         }
 632
 633         dev->play_dma_data.fifo_size = 1;
 634         dev->play_dma_data.maxburst = 16;
 635
 636         snd_soc_dai_init_dma_data(dai, &dev->play_dma_data, NULL);
 637         snd_soc_dai_set_drvdata(dai, dev);
 638
 639         return 0;
 640
 641 err_clk_pwmdac:
 642         return ret;
 643
 644 }
 645
 646 static int sf_pwmdac_clks_get(struct platform_device *pdev,
 647                                 struct sf_pwmdac_dev *dev)
 648 {
 649         dev->clk_apb0 = devm_clk_get(&pdev->dev, "apb0");
 650         if (IS_ERR(dev->clk_apb0))
 651                 return PTR_ERR(dev->clk_apb0);
 652
 653         dev->clk_pwmdac_apb = devm_clk_get(&pdev->dev, "pwmdac-apb");
 654         if (IS_ERR(dev->clk_pwmdac_apb))
 655                 return PTR_ERR(dev->clk_pwmdac_apb);
 656
 657         dev->clk_pwmdac_core = devm_clk_get(&pdev->dev, "pwmdac-core");
 658         if (IS_ERR(dev->clk_pwmdac_core))
 659                 return PTR_ERR(dev->clk_pwmdac_core);
 660
 661         return 0;
 662 }
 663
 664 static int sf_pwmdac_resets_get(struct platform_device *pdev,
 665                                 struct sf_pwmdac_dev *dev)
 666 {
 667         dev->rst_apb = devm_reset_control_get_exclusive(&pdev->dev, "rst-apb");
 668         if (IS_ERR(dev->rst_apb)) {
 669                 dev_err(&pdev->dev, "%s: failed to get pwmdac apb reset control\n", __func__);
 670                 return PTR_ERR(dev->rst_apb);
 671         }
 672
 673         return 0;
 674 }
 675
 676 static int starfive_pwmdac_crg_enable(struct sf_pwmdac_dev *dev, bool enable)
 677 {
 678         int ret = 0;
 679
 680         dev_dbg(dev->dev, "starfive_pwmdac clk&rst %sable.\n", enable ? "en":"dis");
 681         if (enable) {
 682                 ret = clk_prepare_enable(dev->clk_apb0);
 683                 if (ret) {
 684                         dev_err(dev->dev, "failed to prepare enable clk_apb0\n");
 685                         goto err_clk_apb0;
 686                 }
 687
 688                 ret = clk_prepare_enable(dev->clk_pwmdac_apb);
 689                 if (ret) {
 690                         dev_err(dev->dev, "failed to prepare enable clk_pwmdac_apb\n");
 691                         goto err_clk_apb;
 692                 }
 693
 694                 ret = clk_prepare_enable(dev->clk_pwmdac_core);
 695                 if (ret) {
 696                         dev_err(dev->dev, "failed to prepare enable clk_pwmdac_core\n");
 697                         goto err_clk_core;
 698                 }
 699
 700                 ret = reset_control_deassert(dev->rst_apb);
 701                 if (ret) {
 702                         dev_err(dev->dev, "failed to deassert apb\n");
 703                         goto err_rst_apb;
 704                 }
 705         } else {
 706                 clk_disable_unprepare(dev->clk_pwmdac_core);
 707                 clk_disable_unprepare(dev->clk_pwmdac_apb);
 708                 clk_disable_unprepare(dev->clk_apb0);
 709         }
 710
 711         return 0;
 712
 713 err_rst_apb:
 714         clk_disable_unprepare(dev->clk_pwmdac_core);
 715 err_clk_core:
 716         clk_disable_unprepare(dev->clk_pwmdac_apb);
 717 err_clk_apb:
 718         clk_disable_unprepare(dev->clk_apb0);
 719 err_clk_apb0:
 720         return ret;
 721 }
 722
 723 static int sf_pwmdac_clk_init(struct platform_device *pdev,
 724                                 struct sf_pwmdac_dev *dev)
 725 {
 726         int ret = 0;
 727
 728         ret = starfive_pwmdac_crg_enable(dev, true);
 729         if (ret)
 730                 goto err_clk_pwmdac;
 731
 732         ret = clk_set_rate(dev->clk_pwmdac_core, 4096000);
 733         if (ret) {
 734                 dev_err(&pdev->dev, "failed to set rate for clk_pwmdac_core\n");
 735                 goto err_clk_pwmdac;
 736         }
 737
 738         dev_info(&pdev->dev, "clk_apb0 = %lu, clk_pwmdac_apb = %lu, clk_pwmdac_core = %lu\n",
 739                 clk_get_rate(dev->clk_apb0), clk_get_rate(dev->clk_pwmdac_apb),
 740                 clk_get_rate(dev->clk_pwmdac_core));
 741
 742 err_clk_pwmdac:
 743         return ret;
 744 }
 745
 746 static int sf_pwmdac_dai_probe(struct snd_soc_dai *dai)
 747 {
 748         struct sf_pwmdac_dev *dev = dev_get_drvdata(dai->dev);
 749
 750         dev->play_dma_data.addr = dev->mapbase + PWMDAC_WDATA;
 751         dev->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
 752         dev->play_dma_data.fifo_size = 1;
 753         dev->play_dma_data.maxburst = 16;
 754
 755         snd_soc_dai_init_dma_data(dai, &dev->play_dma_data, NULL);
 756         snd_soc_dai_set_drvdata(dai, dev);
 757
 758         return 0;
 759 }
 760
 761 #ifdef CONFIG_PM_SLEEP
 762 static int starfive_pwmdac_system_suspend(struct device *dev)
 763 {
 764         struct sf_pwmdac_dev *pwmdac = dev_get_drvdata(dev);
 765
 766         /* save the register value */
 767         pwmdac->pwmdac_ctrl_data = pwmdc_read_reg(pwmdac->pwmdac_base, PWMDAC_CTRL);
 768         return pm_runtime_force_suspend(dev);
 769 }
 770
 771 static int starfive_pwmdac_system_resume(struct device *dev)
 772 {
 773         struct sf_pwmdac_dev *pwmdac = dev_get_drvdata(dev);
 774         int ret;
 775
 776         ret = pm_runtime_force_resume(dev);
 777         if (ret)
 778                 return ret;
 779
 780         /* restore the register value */
 781         pwmdc_write_reg(pwmdac->pwmdac_base, PWMDAC_CTRL, pwmdac->pwmdac_ctrl_data);
 782         return 0;
 783 }
 784 #endif
 785
 786 #ifdef CONFIG_PM
 787 static int starfive_pwmdac_runtime_suspend(struct device *dev)
 788 {
 789         struct sf_pwmdac_dev *pwmdac = dev_get_drvdata(dev);
 790
 791         return starfive_pwmdac_crg_enable(pwmdac, false);
 792 }
 793
 794 static int starfive_pwmdac_runtime_resume(struct device *dev)
 795 {
 796         struct sf_pwmdac_dev *pwmdac = dev_get_drvdata(dev);
 797
 798         return starfive_pwmdac_crg_enable(pwmdac, true);
 799 }
 800 #endif
 801
 802 static const struct dev_pm_ops starfive_pwmdac_pm_ops = {
 803         SET_RUNTIME_PM_OPS(starfive_pwmdac_runtime_suspend, starfive_pwmdac_runtime_resume, NULL)
 804         SET_SYSTEM_SLEEP_PM_OPS(starfive_pwmdac_system_suspend, starfive_pwmdac_system_resume)
 805 };
 806
 807 #define SOC_PWMDAC_ENUM_DECL(xname, xinfo, xget, xput) \
 808 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 809         .info = xinfo, .get = xget, .put = xput,}
 810
 811 static const struct snd_kcontrol_new pwmdac_snd_controls[] = {
 812         SOC_PWMDAC_ENUM_DECL("shift_bit", pwmdac_shift_bit_info,
 813                 pwmdac_shift_bit_get, pwmdac_shift_bit_put),
 814         SOC_PWMDAC_ENUM_DECL("duty_cycle", pwmdac_duty_cycle_info,
 815                 pwmdac_duty_cycle_get, pwmdac_duty_cycle_put),
 816         SOC_PWMDAC_ENUM_DECL("data_mode", pwmdac_data_mode_info,
 817                 pwmdac_data_mode_get, pwmdac_data_mode_put),
 818         SOC_PWMDAC_ENUM_DECL("shift", pwmdac_shift_info,
 819                 pwmdac_shift_get, pwmdac_shift_put),
 820         SOC_PWMDAC_ENUM_DECL("lr_change", pwmdac_lr_change_info,
 821                 pwmdac_lr_change_get, pwmdac_lr_change_put),
 822 };
 823
 824 static int pwmdac_probe(struct snd_soc_component *component)
 825 {
 826         snd_soc_add_component_controls(component, pwmdac_snd_controls,
 827                                         ARRAY_SIZE(pwmdac_snd_controls));
 828         return 0;
 829 }
 830
 831 static const struct snd_soc_dai_ops sf_pwmdac_dai_ops = {
 832         .hw_params  = sf_pwmdac_hw_params,
 833         .prepare        = sf_pwmdac_prepare,
 834         .trigger        = sf_pwmdac_trigger,
 835 };
 836
 837 static int pwmdac_component_trigger(struct snd_soc_component *component,
 838                               struct snd_pcm_substream *substream, int cmd)
 839 {
 840         int ret = 0;
 841         struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream);
 842
 843         switch (cmd) {
 844         case SNDRV_PCM_TRIGGER_START:
 845         case SNDRV_PCM_TRIGGER_RESUME:
 846         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 847                 break;
 848
 849         case SNDRV_PCM_TRIGGER_STOP:
 850         case SNDRV_PCM_TRIGGER_SUSPEND:
 851         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 852                 axi_dma_cyclic_stop(chan);
 853                 break;
 854
 855         default:
 856                 ret = -EINVAL;
 857                 break;
 858         }
 859         return ret;
 860 }
 861
 862 static const struct snd_soc_component_driver sf_pwmdac_component = {
 863         .name           = "starfive-pwmdac",
 864         .probe          = pwmdac_probe,
 865         .trigger        = pwmdac_component_trigger,
 866 };
 867
 868 static struct snd_soc_dai_driver pwmdac_dai = {
 869         .name = "pwmdac",
 870         .id = 0,
 871         .probe  = sf_pwmdac_dai_probe,
 872         .playback = {
 873                 .channels_min = 1,
 874                 .channels_max = 2,
 875                 .rates = SNDRV_PCM_RATE_8000_48000,
 876                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 877         },
 878         .ops = &sf_pwmdac_dai_ops,
 879 };
 880
 881 static int sf_pwmdac_probe(struct platform_device *pdev)
 882 {
 883         struct sf_pwmdac_dev *dev;
 884         struct resource *res;
 885         int ret;
 886
 887         dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
 888         if (!dev)
 889                 return -ENOMEM;
 890
 891         dev->pwmdac_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
 892         if (IS_ERR(dev->pwmdac_base))
 893                 return PTR_ERR(dev->pwmdac_base);
 894
 895         dev->mapbase = res->start;
 896         dev->dev = &pdev->dev;
 897
 898         ret = sf_pwmdac_clks_get(pdev, dev);
 899         if (ret) {
 900                 dev_err(&pdev->dev, "failed to get pwmdac clock\n");
 901                 return ret;
 902         }
 903
 904         ret = sf_pwmdac_resets_get(pdev, dev);
 905         if (ret) {
 906                 dev_err(&pdev->dev, "failed to get pwmdac reset controls\n");
 907                 return ret;
 908         }
 909
 910         ret = sf_pwmdac_clk_init(pdev, dev);
 911         if (ret) {
 912                 dev_err(&pdev->dev, "failed to enable pwmdac clock\n");
 913                 return ret;
 914         }
 915
 916         dev->mode = shift_8Bit_inverter;
 917         dev->fifo_th = 1;//8byte
 918         pwmdac_config(dev);
 919
 920         dev->use_pio = false;
 921         dev_set_drvdata(&pdev->dev, dev);
 922         ret = devm_snd_soc_register_component(&pdev->dev, &sf_pwmdac_component,
 923                                          &pwmdac_dai, 1);
 924         if (ret != 0) {
 925                 dev_err(&pdev->dev, "not able to register dai\n");
 926                 return ret;
 927         }
 928
 929         if (dev->use_pio) {
 930                 ret = sf_pwmdac_pcm_register(pdev);
 931         } else {
 932                 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL,
 933                                 0);
 934         }
 935
 936 #ifdef CONFIG_PM
 937         starfive_pwmdac_crg_enable(dev, false);
 938 #endif
 939
 940         pm_runtime_enable(dev->dev);
 941
 942         return 0;
 943 }
 944
 945
 946 static int sf_pwmdac_remove(struct platform_device *pdev)
 947 {
 948         return 0;
 949 }
 950
 951 #ifdef CONFIG_OF
 952 static const struct of_device_id sf_pwmdac_of_match[] = {
 953         { .compatible = "starfive,jh7110-pwmdac", },
 954         {},
 955 };
 956
 957 MODULE_DEVICE_TABLE(of, sf_pwmdac_of_match);
 958 #endif
 959
 960
 961 static struct platform_driver sf_pwmdac_driver = {
 962         .probe          = sf_pwmdac_probe,
 963         .remove         = sf_pwmdac_remove,
 964         .driver         = {
 965                 .name   = "starfive-pwmdac",
 966                 .of_match_table = of_match_ptr(sf_pwmdac_of_match),
 967                 .pm = &starfive_pwmdac_pm_ops,
 968         },
 969 };
 970
 971
 972 static int __init pwmdac_driver_init(void)
 973 {
 974         return platform_driver_register(&sf_pwmdac_driver);
 975 }
 976
 977 static void pwmdac_driver_exit(void)
 978 {
 979         platform_driver_unregister(&sf_pwmdac_driver);
 980 }
 981
 982 late_initcall(pwmdac_driver_init);
 983 module_exit(pwmdac_driver_exit);
 984
 985 MODULE_AUTHOR("curry.zhang <curry.zhang@starfivetech.com>");
 986 MODULE_AUTHOR("Xingyu Wu <xingyu.wu@starfivetech.com>");
 987 MODULE_LICENSE("GPL v2");
 988 MODULE_DESCRIPTION("starfive pwmdac SoC Interface");
 989 MODULE_ALIAS("platform:starfive-pwmdac");