ba4bb615d2c53e37808394db7c42ca636750fcc7
[platform/kernel/linux-starfive.git] / sound / soc / starfive / starfive_pdm.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * PDM driver for the StarFive JH7110 SoC
4  *
5  * Copyright (C) 2021 StarFive Technology Co., Ltd.
6  */
7 #include <linux/clk.h>
8 #include <linux/device.h>
9 #include <linux/reset.h>
10 #include <linux/module.h>
11 #include <linux/of_irq.h>
12 #include <linux/of_platform.h>
13 #include <linux/regmap.h>
14 #include <linux/pm_runtime.h>
15 #include <sound/soc.h>
16 #include <sound/soc-dai.h>
17 #include <sound/pcm_params.h>
18 #include <sound/initval.h>
19 #include <sound/tlv.h>
20 #include "starfive_pdm.h"
21
22 struct sf_pdm {
23         struct regmap *pdm_map;
24         struct device *dev;
25         struct clk *clk_pdm_apb;
26         struct clk *clk_pdm_mclk;
27         struct clk *clk_apb0;
28         struct clk *clk_mclk;
29         struct clk *clk_mclk_ext;
30         struct reset_control *rst_pdm_dmic;
31         struct reset_control *rst_pdm_apb;
32         unsigned char flag_first;
33 };
34
35 static const DECLARE_TLV_DB_SCALE(volume_tlv, -9450, 150, 0);
36
37 static const struct snd_kcontrol_new sf_pdm_snd_controls[] = {
38         SOC_SINGLE("DC compensation Control", PDM_DMIC_CTRL0, 30, 1, 0),
39         SOC_SINGLE("High Pass Filter Control", PDM_DMIC_CTRL0, 28, 1, 0),
40         SOC_SINGLE("Left Channel Volume Control", PDM_DMIC_CTRL0, 23, 1, 0),
41         SOC_SINGLE("Right Channel Volume Control", PDM_DMIC_CTRL0, 22, 1, 0),
42         SOC_SINGLE_TLV("Volume", PDM_DMIC_CTRL0, 16, 0x3F, 1, volume_tlv),
43         SOC_SINGLE("Data MSB Shift", PDM_DMIC_CTRL0, 1, 7, 0),
44         SOC_SINGLE("SCALE", PDM_DC_SCALE0, 0, 0x3F, 0),
45         SOC_SINGLE("DC offset", PDM_DC_SCALE0, 8, 0xFFFFF, 0),
46 };
47
48 static void sf_pdm_enable(struct regmap *map)
49 {
50         /* Left and Right Channel Volume Control Enable */
51         regmap_update_bits(map, PDM_DMIC_CTRL0, PDM_DMIC_RVOL_MASK, 0);
52         regmap_update_bits(map, PDM_DMIC_CTRL0, PDM_DMIC_LVOL_MASK, 0);
53 }
54
55 static void sf_pdm_disable(struct regmap *map)
56 {
57         /* Left and Right Channel Volume Control Disable */
58         regmap_update_bits(map, PDM_DMIC_CTRL0,
59                         PDM_DMIC_RVOL_MASK, PDM_DMIC_RVOL_MASK);
60         regmap_update_bits(map, PDM_DMIC_CTRL0,
61                         PDM_DMIC_LVOL_MASK, PDM_DMIC_LVOL_MASK);
62 }
63
64 static int sf_pdm_trigger(struct snd_pcm_substream *substream, int cmd,
65                            struct snd_soc_dai *dai)
66 {
67         struct sf_pdm *priv = snd_soc_dai_get_drvdata(dai);
68
69         switch (cmd) {
70         case SNDRV_PCM_TRIGGER_START:
71         case SNDRV_PCM_TRIGGER_RESUME:
72         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
73                 if (priv->flag_first) {
74                         priv->flag_first = 0;
75                         mdelay(200);
76                 }
77                 sf_pdm_enable(priv->pdm_map);
78                 return 0;
79
80         case SNDRV_PCM_TRIGGER_STOP:
81         case SNDRV_PCM_TRIGGER_SUSPEND:
82         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
83                 sf_pdm_disable(priv->pdm_map);
84                 return 0;
85
86         default:
87                 return -EINVAL;
88         }
89 }
90
91 static int sf_pdm_hw_params(struct snd_pcm_substream *substream,
92                              struct snd_pcm_hw_params *params,
93                              struct snd_soc_dai *dai)
94 {
95         struct sf_pdm *priv = snd_soc_dai_get_drvdata(dai);
96         unsigned int sample_rate;
97         unsigned int data_width;
98         int ret;
99         const int pdm_mul = 128;
100
101         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
102                 return 0;
103
104         sample_rate = params_rate(params);
105         switch (sample_rate) {
106         case 8000:
107         case 11025:
108         case 16000:
109                 break;
110         default:
111                 pr_err("PDM: not support sample rate:%d\n", sample_rate);
112                 return -EINVAL;
113         }
114
115         data_width = params_width(params);
116         switch (data_width) {
117         case 16:
118         case 32:
119                 break;
120         default:
121                 pr_err("PDM: not support bit width %d\n", data_width);
122                 return -EINVAL;
123         }
124
125         /* set pdm_mclk,  PDM MCLK = 128 * LRCLK */
126         ret = clk_set_rate(priv->clk_pdm_mclk, pdm_mul * sample_rate);
127         if (ret) {
128                 dev_info(priv->dev, "Can't set pdm_mclk: %d\n", ret);
129                 return ret;
130         }
131
132         return 0;
133 }
134
135 static const struct snd_soc_dai_ops sf_pdm_dai_ops = {
136         .trigger        = sf_pdm_trigger,
137         .hw_params      = sf_pdm_hw_params,
138 };
139
140 static int sf_pdm_dai_probe(struct snd_soc_dai *dai)
141 {
142         struct sf_pdm *priv = snd_soc_dai_get_drvdata(dai);
143
144         /* Reset */
145         regmap_update_bits(priv->pdm_map, PDM_DMIC_CTRL0,
146                         PDM_SW_RST_MASK, 0x00);
147         regmap_update_bits(priv->pdm_map, PDM_DMIC_CTRL0,
148                         PDM_SW_RST_MASK, PDM_SW_RST_RELEASE);
149
150         /* Make sure the device is initially disabled */
151         sf_pdm_disable(priv->pdm_map);
152
153         /* MUTE */
154         regmap_update_bits(priv->pdm_map, PDM_DMIC_CTRL0,
155                         PDM_DMIC_VOL_MASK, PDM_VOL_DB_MUTE);
156
157         /* UNMUTE */
158         regmap_update_bits(priv->pdm_map, PDM_DMIC_CTRL0,
159                         PDM_DMIC_VOL_MASK, PDM_VOL_DB_MAX);
160
161         /* enable high pass filter */
162         regmap_update_bits(priv->pdm_map, PDM_DMIC_CTRL0,
163                         PDM_DMIC_HPF_EN, PDM_DMIC_HPF_EN);
164
165         /* i2s slave mode */
166         regmap_update_bits(priv->pdm_map, PDM_DMIC_CTRL0,
167                         PDM_DMIC_I2S_SLAVE, PDM_DMIC_I2S_SLAVE);
168
169         /* disable fast mode */
170         regmap_update_bits(priv->pdm_map, PDM_DMIC_CTRL0,
171                         PDM_DMIC_FASTMODE_MASK, 0);
172
173         /* dmic msb shift 0 */
174         regmap_update_bits(priv->pdm_map, PDM_DMIC_CTRL0,
175                         PDM_DMIC_MSB_MASK, 0);
176
177         /* scale: 0x8 */
178         regmap_update_bits(priv->pdm_map, PDM_DC_SCALE0,
179                         DMIC_SCALE_MASK, DMIC_SCALE_DEF_VAL);
180
181         regmap_update_bits(priv->pdm_map, PDM_DC_SCALE0,
182                         DMIC_DCOFF1_MASK, DMIC_DCOFF1_VAL);
183
184         regmap_update_bits(priv->pdm_map, PDM_DC_SCALE0,
185                         DMIC_DCOFF3_MASK, DMIC_DCOFF3_VAL);
186
187         /* scale: 0x3f */
188         regmap_update_bits(priv->pdm_map, PDM_DC_SCALE0,
189                         DMIC_SCALE_MASK, DMIC_SCALE_MASK);
190
191         /* dmic msb shift 2 */
192         regmap_update_bits(priv->pdm_map, PDM_DMIC_CTRL0,
193                         PDM_DMIC_MSB_MASK, PDM_MSB_SHIFT_4);
194
195         return 0;
196 }
197
198 static int sf_pdm_dai_remove(struct snd_soc_dai *dai)
199 {
200         struct sf_pdm *priv = snd_soc_dai_get_drvdata(dai);
201
202         /* MUTE */
203         regmap_update_bits(priv->pdm_map, PDM_DMIC_CTRL0,
204                         PDM_DMIC_VOL_MASK, PDM_DMIC_VOL_MASK);
205
206         return 0;
207 }
208
209 #define SF_PDM_RATES    (SNDRV_PCM_RATE_8000 | \
210                         SNDRV_PCM_RATE_11025 | \
211                         SNDRV_PCM_RATE_16000)
212
213 #define SF_PDM_FORMATS  (SNDRV_PCM_FMTBIT_S16_LE | \
214                         SNDRV_PCM_FMTBIT_S32_LE)
215
216 static struct snd_soc_dai_driver sf_pdm_dai_drv = {
217         .name = "PDM",
218         .id = 0,
219         .capture = {
220                 .stream_name    = "Capture",
221                 .channels_min   = 2,
222                 .channels_max   = 2,
223                 .rates          = SF_PDM_RATES,
224                 .formats        = SF_PDM_FORMATS,
225         },
226         .ops = &sf_pdm_dai_ops,
227         .probe = sf_pdm_dai_probe,
228         .remove = sf_pdm_dai_remove,
229         .symmetric_rate = 1,
230 };
231
232 static int pdm_probe(struct snd_soc_component *component)
233 {
234         struct sf_pdm *priv = snd_soc_component_get_drvdata(component);
235
236         snd_soc_component_init_regmap(component, priv->pdm_map);
237         snd_soc_add_component_controls(component, sf_pdm_snd_controls,
238                                      ARRAY_SIZE(sf_pdm_snd_controls));
239
240         return 0;
241 }
242
243 #ifdef CONFIG_PM
244 static int sf_pdm_runtime_suspend(struct device *dev)
245 {
246         struct sf_pdm *priv = dev_get_drvdata(dev);
247
248         clk_disable_unprepare(priv->clk_pdm_apb);
249         clk_disable_unprepare(priv->clk_pdm_mclk);
250         clk_disable_unprepare(priv->clk_mclk);
251
252         return 0;
253 }
254
255 static int sf_pdm_runtime_resume(struct device *dev)
256 {
257         struct sf_pdm *priv = dev_get_drvdata(dev);
258         int ret;
259
260         ret = clk_prepare_enable(priv->clk_mclk);
261         if (ret) {
262                 dev_err(dev, "failed to prepare enable clk_mclk\n");
263                 return ret;
264         }
265
266         ret = clk_prepare_enable(priv->clk_pdm_mclk);
267         if (ret) {
268                 dev_err(dev, "failed to prepare enable clk_pdm_mclk\n");
269                 goto disable_mclk;
270         }
271
272         ret = clk_prepare_enable(priv->clk_pdm_apb);
273         if (ret) {
274                 dev_err(dev, "failed to prepare enable clk_pdm_apb\n");
275                 goto disable_pdm_mclk;
276         }
277
278         return 0;
279
280 disable_pdm_mclk:
281         clk_disable_unprepare(priv->clk_pdm_mclk);
282 disable_mclk:
283         clk_disable_unprepare(priv->clk_mclk);
284
285         return ret;
286 }
287 #endif
288
289 #ifdef CONFIG_PM_SLEEP
290 static int sf_pdm_suspend(struct snd_soc_component *component)
291 {
292         return pm_runtime_force_suspend(component->dev);
293 }
294
295 static int sf_pdm_resume(struct snd_soc_component *component)
296 {
297         return pm_runtime_force_resume(component->dev);
298 }
299
300 #else
301 #define sf_tdm_suspend  NULL
302 #define sf_tdm_resume   NULL
303 #endif
304
305 static const struct snd_soc_component_driver sf_pdm_component_drv = {
306         .name = "jh7110-pdm",
307         .probe = pdm_probe,
308         .suspend = sf_pdm_suspend,
309         .resume = sf_pdm_resume,
310 };
311
312 static const struct regmap_config sf_pdm_regmap_cfg = {
313         .reg_bits       = 32,
314         .val_bits       = 32,
315         .reg_stride     = 4,
316         .max_register   = 0x20,
317 };
318
319 static int sf_pdm_clock_init(struct platform_device *pdev, struct sf_pdm *priv)
320 {
321         int ret;
322
323         static struct clk_bulk_data clks[] = {
324                 { .id = "pdm_mclk" },
325                 { .id = "clk_apb0" },
326                 { .id = "pdm_apb" },
327                 { .id = "clk_mclk" },
328                 { .id = "mclk_ext" },
329         };
330
331         ret = devm_clk_bulk_get(&pdev->dev, ARRAY_SIZE(clks), clks);
332         if (ret) {
333                 dev_err(&pdev->dev, "failed to get pdm clocks\n");
334                 goto exit;
335         }
336
337         priv->clk_pdm_mclk = clks[0].clk;
338         priv->clk_apb0 = clks[1].clk;
339         priv->clk_pdm_apb = clks[2].clk;
340         priv->clk_mclk = clks[3].clk;
341         priv->clk_mclk_ext = clks[4].clk;
342
343         priv->rst_pdm_dmic = devm_reset_control_get_exclusive(&pdev->dev, "pdm_dmic");
344         if (IS_ERR(priv->rst_pdm_dmic)) {
345                 dev_err(&pdev->dev, "failed to get pdm_dmic reset control\n");
346                 ret = PTR_ERR(priv->rst_pdm_dmic);
347                 goto exit;
348         }
349
350         priv->rst_pdm_apb = devm_reset_control_get_exclusive(&pdev->dev, "pdm_apb");
351         if (IS_ERR(priv->rst_pdm_apb)) {
352                 dev_err(&pdev->dev, "failed to get pdm_apb reset control\n");
353                 ret = PTR_ERR(priv->rst_pdm_apb);
354                 goto exit;
355         }
356
357         /*  Enable PDM Clock  */
358         ret = reset_control_assert(priv->rst_pdm_apb);
359         if (ret) {
360                 dev_err(&pdev->dev, "failed to assert rst_pdm_apb\n");
361                 goto exit;
362         }
363
364         ret = clk_prepare_enable(priv->clk_mclk);
365         if (ret) {
366                 dev_err(&pdev->dev, "failed to prepare enable clk_mclk\n");
367                 goto err_dis_mclk;
368         }
369
370         ret = clk_prepare_enable(priv->clk_pdm_mclk);
371         if (ret) {
372                 dev_err(&pdev->dev, "failed to prepare enable clk_pdm_mclk\n");
373                 goto err_dis_pdm_mclk;
374         }
375
376         ret = clk_prepare_enable(priv->clk_apb0);
377         if (ret) {
378                 dev_err(&pdev->dev, "failed to prepare enable clk_apb0\n");
379                 goto err_dis_apb0;
380         }
381
382         ret = clk_prepare_enable(priv->clk_pdm_apb);
383         if (ret) {
384                 dev_err(&pdev->dev, "failed to prepare enable clk_pdm_apb\n");
385                 goto err_dis_pdm_apb;
386         }
387
388         ret = reset_control_deassert(priv->rst_pdm_dmic);
389         if (ret) {
390                 dev_err(&pdev->dev, "failed to deassert pdm_dmic\n");
391                 goto err_clk_disable;
392         }
393
394         ret = reset_control_deassert(priv->rst_pdm_apb);
395         if (ret) {
396                 dev_err(&pdev->dev, "failed to deassert pdm_apb\n");
397                 goto err_clk_disable;
398         }
399
400         ret = clk_set_parent(priv->clk_mclk, priv->clk_mclk_ext);
401         if (ret) {
402                 dev_err(&pdev->dev, "failed to set parent clk_mclk ret=%d\n", ret);
403                 goto err_clk_disable;
404         }
405
406         return 0;
407
408 err_clk_disable:
409         clk_disable_unprepare(priv->clk_pdm_apb);
410 err_dis_pdm_apb:
411         clk_disable_unprepare(priv->clk_apb0);
412 err_dis_apb0:
413         clk_disable_unprepare(priv->clk_pdm_mclk);
414 err_dis_pdm_mclk:
415         clk_disable_unprepare(priv->clk_mclk);
416 err_dis_mclk:
417 exit:
418         return ret;
419 }
420
421 static int sf_pdm_probe(struct platform_device *pdev)
422 {
423         struct sf_pdm *priv;
424         struct resource *res;
425         void __iomem *regs;
426         int ret;
427
428         priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
429         if (!priv)
430                 return -ENOMEM;
431         platform_set_drvdata(pdev, priv);
432
433         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pdm");
434         regs = devm_ioremap_resource(&pdev->dev, res);
435         if (IS_ERR(regs))
436                 return PTR_ERR(regs);
437
438         priv->pdm_map = devm_regmap_init_mmio(&pdev->dev, regs, &sf_pdm_regmap_cfg);
439         if (IS_ERR(priv->pdm_map)) {
440                 dev_err(&pdev->dev, "failed to init regmap: %ld\n",
441                                 PTR_ERR(priv->pdm_map));
442                 return PTR_ERR(priv->pdm_map);
443         }
444
445         priv->dev = &pdev->dev;
446         priv->flag_first = 1;
447
448         ret = sf_pdm_clock_init(pdev, priv);
449         if (ret) {
450                 dev_err(&pdev->dev, "failed to enable audio-pdm clock\n");
451                 return ret;
452         }
453
454         dev_set_drvdata(&pdev->dev, priv);
455
456         ret = devm_snd_soc_register_component(&pdev->dev, &sf_pdm_component_drv,
457                                                &sf_pdm_dai_drv, 1);
458         if (ret) {
459                 dev_err(&pdev->dev, "failed to register pdm dai\n");
460                 return ret;
461         }
462
463         pm_runtime_enable(&pdev->dev);
464         return 0;
465 }
466
467 static int sf_pdm_dev_remove(struct platform_device *pdev)
468 {
469         pm_runtime_disable(&pdev->dev);
470         return 0;
471 }
472
473 static const struct of_device_id sf_pdm_of_match[] = {
474         {.compatible = "starfive,jh7110-pdm",},
475         {}
476 };
477 MODULE_DEVICE_TABLE(of, sf_pdm_of_match);
478
479 static const struct dev_pm_ops sf_pdm_pm_ops = {
480         SET_RUNTIME_PM_OPS(sf_pdm_runtime_suspend,
481                         sf_pdm_runtime_resume, NULL)
482 };
483
484 static struct platform_driver sf_pdm_driver = {
485         .driver = {
486                 .name = "jh7110-pdm",
487                 .of_match_table = sf_pdm_of_match,
488 #ifdef CONFIG_PM
489                 .pm = &sf_pdm_pm_ops,
490 #endif
491         },
492         .probe = sf_pdm_probe,
493         .remove = sf_pdm_dev_remove,
494 };
495 module_platform_driver(sf_pdm_driver);
496
497 MODULE_AUTHOR("Walker Chen <walker.chen@starfivetech.com>");
498 MODULE_DESCRIPTION("Starfive PDM Controller Driver");
499 MODULE_LICENSE("GPL v2");