sound/soc/starfive/pwmdac.h

   1 /*
   2  * PWMDAC driver for the StarFive JH7110 SoC
   3  *
   4  * Copyright (C) 2022 StarFive Technology Co., Ltd.
   5  */
   6
   7 #ifndef __STARFIVE_PWMDAC_LOCAL_H
   8 #define __STARFIVE_PWMDAC_LOCAL_H
   9
  10 #include <linux/clk.h>
  11 #include <linux/device.h>
  12 #include <linux/types.h>
  13 #include <sound/dmaengine_pcm.h>
  14 #include <sound/pcm.h>
  15
  16 #define PWMDAC_WDATA            0       /*PWMDAC_BASE_ADDR*/
  17 #define PWMDAC_CTRL             0x04    /*PWMDAC_BASE_ADDR + 0x04*/
  18 #define PWMDAC_SATAE            0x08    /*PWMDAC_BASE_ADDR + 0x08*/
  19 #define PWMDAC_RESERVED         0x0C    /*PWMDAC_BASE_ADDR + 0x0C*/
  20
  21 #define SFC_PWMDAC_SHIFT                        BIT(1)
  22 #define SFC_PWMDAC_DUTY_CYCLE                   BIT(2)
  23 #define SFC_PWMDAC_CNT_N                        BIT(4)
  24
  25 #define SFC_PWMDAC_LEFT_RIGHT_DATA_CHANGE       BIT(13)
  26 #define SFC_PWMDAC_DATA_MODE                    BIT(14)
  27
  28 #define FIFO_UN_FULL    0
  29 #define FIFO_FULL       1
  30
  31 #define PWMDAC_CTRL_DATA_SHIFT  4
  32 #define PWMDAC_CTRL_DATA_MASK   0xF
  33 #define PWMDAC_DATA_LEFT_SHIFT  15
  34 #define PWMDAC_DUTY_CYCLE_LOW   2
  35 #define PWMDAC_DUTY_CYCLE_HIGH  3
  36
  37
  38
  39
  40 #define PWMDAC_MCLK     4096000
  41
  42 enum pwmdac_lr_change{
  43         NO_CHANGE = 0,
  44         CHANGE,
  45 };
  46
  47 enum pwmdac_d_mode{
  48         UNSINGED_DATA = 0,
  49         INVERTER_DATA_MSB,
  50 };
  51
  52 enum pwmdac_shift_bit{
  53         PWMDAC_SHIFT_8 = 8,             /*pwmdac shift 8 bit*/
  54         PWMDAC_SHIFT_10 = 10,           /*pwmdac shift 10 bit*/
  55 };
  56
  57 enum pwmdac_duty_cycle{
  58         PWMDAC_CYCLE_LEFT = 0,          /*pwmdac duty cycle left*/
  59         PWMDAC_CYCLE_RIGHT = 1,         /*pwmdac duty cycle right*/
  60         PWMDAC_CYCLE_CENTER = 2,        /*pwmdac duty cycle center*/
  61 };
  62
  63 /*sample count [12:4] <511*/
  64 enum pwmdac_sample_count{
  65         PWMDAC_SAMPLE_CNT_1 = 1,
  66         PWMDAC_SAMPLE_CNT_2,
  67         PWMDAC_SAMPLE_CNT_3,
  68         PWMDAC_SAMPLE_CNT_4,
  69         PWMDAC_SAMPLE_CNT_5,
  70         PWMDAC_SAMPLE_CNT_6,
  71         PWMDAC_SAMPLE_CNT_7,
  72         PWMDAC_SAMPLE_CNT_8 = 1,        /*(32.468/8) == (12.288/3) == 4.096*/
  73         PWMDAC_SAMPLE_CNT_9,
  74         PWMDAC_SAMPLE_CNT_10,
  75         PWMDAC_SAMPLE_CNT_11,
  76         PWMDAC_SAMPLE_CNT_12,
  77         PWMDAC_SAMPLE_CNT_13,
  78         PWMDAC_SAMPLE_CNT_14,
  79         PWMDAC_SAMPLE_CNT_15,
  80         PWMDAC_SAMPLE_CNT_16,
  81         PWMDAC_SAMPLE_CNT_17,
  82         PWMDAC_SAMPLE_CNT_18,
  83         PWMDAC_SAMPLE_CNT_19,
  84         PWMDAC_SAMPLE_CNT_20 = 20,
  85         PWMDAC_SAMPLE_CNT_30 = 30,
  86         PWMDAC_SAMPLE_CNT_511 = 511,
  87 };
  88
  89
  90 enum data_shift{
  91         PWMDAC_DATA_LEFT_SHIFT_BIT_0 = 0,
  92         PWMDAC_DATA_LEFT_SHIFT_BIT_1,
  93         PWMDAC_DATA_LEFT_SHIFT_BIT_2,
  94         PWMDAC_DATA_LEFT_SHIFT_BIT_3,
  95         PWMDAC_DATA_LEFT_SHIFT_BIT_4,
  96         PWMDAC_DATA_LEFT_SHIFT_BIT_5,
  97         PWMDAC_DATA_LEFT_SHIFT_BIT_6,
  98         PWMDAC_DATA_LEFT_SHIFT_BIT_7,
  99         PWMDAC_DATA_LEFT_SHIFT_BIT_ALL,
 100 };
 101
 102 enum pwmdac_config_list{
 103         shift_8Bit_unsigned = 0,
 104         shift_8Bit_unsigned_dataShift,
 105         shift_10Bit_unsigned,
 106         shift_10Bit_unsigned_dataShift,
 107
 108         shift_8Bit_inverter,
 109         shift_8Bit_inverter_dataShift,
 110         shift_10Bit_inverter,
 111         shift_10Bit_inverter_dataShift,
 112 };
 113
 114 struct sf_pwmdac_dev {
 115         void __iomem *pwmdac_base;
 116         resource_size_t mapbase;
 117         u8  mode;
 118         u8 shift_bit;
 119         u8 duty_cycle;
 120         u8 datan;
 121         u8 data_mode;
 122         u8 lr_change;
 123         u8 shift;
 124         u8 fifo_th;
 125         bool use_pio;
 126         spinlock_t lock;
 127         int active;
 128
 129         struct clk *clk_apb0;
 130         struct clk *clk_pwmdac_apb;
 131         struct clk *clk_pwmdac_core;
 132         struct reset_control *rst_apb;
 133
 134         struct device *dev;
 135         struct snd_dmaengine_dai_dma_data play_dma_data;
 136         struct snd_pcm_substream __rcu *tx_substream;
 137         unsigned int (*tx_fn)(struct sf_pwmdac_dev *dev,
 138                         struct snd_pcm_runtime *runtime, unsigned int tx_ptr,
 139                         bool *period_elapsed);
 140         unsigned int tx_ptr;
 141         struct task_struct *tx_thread;
 142         bool tx_thread_exit;
 143
 144         struct clk *audio_src;
 145         struct clk *pwmdac_apb;
 146         struct clk *pwmdac_mclk;
 147 };
 148
 149
 150
 151 #if IS_ENABLED(CONFIG_SND_STARFIVE_PWMDAC_PCM)
 152 void sf_pwmdac_pcm_push_tx(struct sf_pwmdac_dev *dev);
 153 void sf_pwmdac_pcm_pop_rx(struct sf_pwmdac_dev *dev);
 154 int sf_pwmdac_pcm_register(struct platform_device *pdev);
 155 #else
 156 void sf_pwmdac_pcm_push_tx(struct sf_pwmdac_dev *dev) { }
 157 void sf_pwmdac_pcm_pop_rx(struct sf_pwmdac_dev *dev) { }
 158 int sf_pwmdac_pcm_register(struct platform_device *pdev)
 159 {
 160         return -EINVAL;
 161 }
 162 #endif
 163
 164 #endif