1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 // This file is provided under a dual BSD/GPLv2 license. When using or
4 // redistributing this file, you may do so under either license.
6 // Copyright(c) 2022 Intel Corporation. All rights reserved.
9 #include <sound/pcm_params.h>
10 #include <sound/sof/ipc4/header.h>
11 #include "sof-audio.h"
14 #include "ipc4-priv.h"
15 #include "ipc4-topology.h"
16 #include "ipc4-fw-reg.h"
18 static int sof_ipc4_set_multi_pipeline_state(struct snd_sof_dev *sdev, u32 state,
19 struct ipc4_pipeline_set_state_data *trigger_list)
21 struct sof_ipc4_msg msg = {{ 0 }};
22 u32 primary, ipc_size;
24 /* trigger a single pipeline */
25 if (trigger_list->count == 1)
26 return sof_ipc4_set_pipeline_state(sdev, trigger_list->pipeline_ids[0], state);
29 primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_GLB_SET_PIPELINE_STATE);
30 primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST);
31 primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_FW_GEN_MSG);
32 msg.primary = primary;
34 /* trigger multiple pipelines with a single IPC */
35 msg.extension = SOF_IPC4_GLB_PIPE_STATE_EXT_MULTI;
37 /* ipc_size includes the count and the pipeline IDs for the number of pipelines */
38 ipc_size = sizeof(u32) * (trigger_list->count + 1);
39 msg.data_size = ipc_size;
40 msg.data_ptr = trigger_list;
42 return sof_ipc_tx_message(sdev->ipc, &msg, ipc_size, NULL, 0);
45 int sof_ipc4_set_pipeline_state(struct snd_sof_dev *sdev, u32 id, u32 state)
47 struct sof_ipc4_msg msg = {{ 0 }};
50 dev_dbg(sdev->dev, "ipc4 set pipeline %d state %d", id, state);
53 primary |= SOF_IPC4_GLB_PIPE_STATE_ID(id);
54 primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_GLB_SET_PIPELINE_STATE);
55 primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST);
56 primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_FW_GEN_MSG);
58 msg.primary = primary;
60 return sof_ipc_tx_message(sdev->ipc, &msg, 0, NULL, 0);
62 EXPORT_SYMBOL(sof_ipc4_set_pipeline_state);
65 sof_ipc4_add_pipeline_to_trigger_list(struct snd_sof_dev *sdev, int state,
66 struct snd_sof_pipeline *spipe,
67 struct ipc4_pipeline_set_state_data *trigger_list)
69 struct snd_sof_widget *pipe_widget = spipe->pipe_widget;
70 struct sof_ipc4_pipeline *pipeline = pipe_widget->private;
72 if (pipeline->skip_during_fe_trigger)
76 case SOF_IPC4_PIPE_RUNNING:
78 * Trigger pipeline if all PCMs containing it are paused or if it is RUNNING
81 if (spipe->started_count == spipe->paused_count)
82 trigger_list->pipeline_ids[trigger_list->count++] =
83 pipe_widget->instance_id;
85 case SOF_IPC4_PIPE_RESET:
86 /* RESET if the pipeline is neither running nor paused */
87 if (!spipe->started_count && !spipe->paused_count)
88 trigger_list->pipeline_ids[trigger_list->count++] =
89 pipe_widget->instance_id;
91 case SOF_IPC4_PIPE_PAUSED:
92 /* Pause the pipeline only when its started_count is 1 more than paused_count */
93 if (spipe->paused_count == (spipe->started_count - 1))
94 trigger_list->pipeline_ids[trigger_list->count++] =
95 pipe_widget->instance_id;
103 sof_ipc4_update_pipeline_state(struct snd_sof_dev *sdev, int state, int cmd,
104 struct snd_sof_pipeline *spipe,
105 struct ipc4_pipeline_set_state_data *trigger_list)
107 struct snd_sof_widget *pipe_widget = spipe->pipe_widget;
108 struct sof_ipc4_pipeline *pipeline = pipe_widget->private;
111 if (pipeline->skip_during_fe_trigger)
114 /* set state for pipeline if it was just triggered */
115 for (i = 0; i < trigger_list->count; i++) {
116 if (trigger_list->pipeline_ids[i] == pipe_widget->instance_id) {
117 pipeline->state = state;
123 case SOF_IPC4_PIPE_PAUSED:
125 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
127 * increment paused_count if the PAUSED is the final state during
130 spipe->paused_count++;
132 case SNDRV_PCM_TRIGGER_STOP:
133 case SNDRV_PCM_TRIGGER_SUSPEND:
135 * decrement started_count if PAUSED is the final state during the
138 spipe->started_count--;
144 case SOF_IPC4_PIPE_RUNNING:
146 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
147 /* decrement paused_count for RELEASE */
148 spipe->paused_count--;
150 case SNDRV_PCM_TRIGGER_START:
151 case SNDRV_PCM_TRIGGER_RESUME:
152 /* increment started_count for START/RESUME */
153 spipe->started_count++;
165 * The picture below represents the pipeline state machine wrt PCM actions corresponding to the
166 * triggers and ioctls
177 * +----------------+ +------v-------+ +-------------+
178 * | | START | | HW_FREE | |
179 * | RUNNING <-------------+ PAUSED +--------------> + RESET |
181 * +------+---------+ RELEASE +---------+----+ +-------------+
187 * +---------------------------------+
190 * Note that during system suspend, the suspend trigger is followed by a hw_free in
191 * sof_pcm_trigger(). So, the final state during suspend would be RESET.
192 * Also, since the SOF driver doesn't support full resume, streams would be restarted with the
193 * prepare ioctl before the START trigger.
196 static int sof_ipc4_trigger_pipelines(struct snd_soc_component *component,
197 struct snd_pcm_substream *substream, int state, int cmd)
199 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component);
200 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
201 struct snd_sof_pcm_stream_pipeline_list *pipeline_list;
202 struct sof_ipc4_fw_data *ipc4_data = sdev->private;
203 struct ipc4_pipeline_set_state_data *trigger_list;
204 struct snd_sof_pipeline *spipe;
205 struct snd_sof_pcm *spcm;
209 dev_dbg(sdev->dev, "trigger cmd: %d state: %d\n", cmd, state);
211 spcm = snd_sof_find_spcm_dai(component, rtd);
215 pipeline_list = &spcm->stream[substream->stream].pipeline_list;
217 /* nothing to trigger if the list is empty */
218 if (!pipeline_list->pipelines || !pipeline_list->count)
221 /* allocate memory for the pipeline data */
222 trigger_list = kzalloc(struct_size(trigger_list, pipeline_ids, pipeline_list->count),
227 mutex_lock(&ipc4_data->pipeline_state_mutex);
230 * IPC4 requires pipelines to be triggered in order starting at the sink and
231 * walking all the way to the source. So traverse the pipeline_list in the order
232 * sink->source when starting PCM's and in the reverse order to pause/stop PCM's.
233 * Skip the pipelines that have their skip_during_fe_trigger flag set. If there is a fork
234 * in the pipeline, the order of triggering between the left/right paths will be
235 * indeterministic. But the sink->source trigger order sink->source would still be
236 * guaranteed for each fork independently.
238 if (state == SOF_IPC4_PIPE_RUNNING || state == SOF_IPC4_PIPE_RESET)
239 for (i = pipeline_list->count - 1; i >= 0; i--) {
240 spipe = pipeline_list->pipelines[i];
241 sof_ipc4_add_pipeline_to_trigger_list(sdev, state, spipe, trigger_list);
244 for (i = 0; i < pipeline_list->count; i++) {
245 spipe = pipeline_list->pipelines[i];
246 sof_ipc4_add_pipeline_to_trigger_list(sdev, state, spipe, trigger_list);
249 /* return if all pipelines are in the requested state already */
250 if (!trigger_list->count) {
255 /* no need to pause before reset or before pause release */
256 if (state == SOF_IPC4_PIPE_RESET || cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE)
257 goto skip_pause_transition;
260 * set paused state for pipelines if the final state is PAUSED or when the pipeline
261 * is set to RUNNING for the first time after the PCM is started.
263 ret = sof_ipc4_set_multi_pipeline_state(sdev, SOF_IPC4_PIPE_PAUSED, trigger_list);
265 dev_err(sdev->dev, "failed to pause all pipelines\n");
269 /* update PAUSED state for all pipelines just triggered */
270 for (i = 0; i < pipeline_list->count ; i++) {
271 spipe = pipeline_list->pipelines[i];
272 sof_ipc4_update_pipeline_state(sdev, SOF_IPC4_PIPE_PAUSED, cmd, spipe,
276 /* return if this is the final state */
277 if (state == SOF_IPC4_PIPE_PAUSED)
279 skip_pause_transition:
280 /* else set the RUNNING/RESET state in the DSP */
281 ret = sof_ipc4_set_multi_pipeline_state(sdev, state, trigger_list);
283 dev_err(sdev->dev, "failed to set final state %d for all pipelines\n", state);
287 /* update RUNNING/RESET state for all pipelines that were just triggered */
288 for (i = 0; i < pipeline_list->count; i++) {
289 spipe = pipeline_list->pipelines[i];
290 sof_ipc4_update_pipeline_state(sdev, state, cmd, spipe, trigger_list);
294 mutex_unlock(&ipc4_data->pipeline_state_mutex);
299 static int sof_ipc4_pcm_trigger(struct snd_soc_component *component,
300 struct snd_pcm_substream *substream, int cmd)
304 /* determine the pipeline state */
306 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
307 state = SOF_IPC4_PIPE_PAUSED;
309 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
310 case SNDRV_PCM_TRIGGER_RESUME:
311 case SNDRV_PCM_TRIGGER_START:
312 state = SOF_IPC4_PIPE_RUNNING;
314 case SNDRV_PCM_TRIGGER_SUSPEND:
315 case SNDRV_PCM_TRIGGER_STOP:
316 state = SOF_IPC4_PIPE_PAUSED;
319 dev_err(component->dev, "%s: unhandled trigger cmd %d\n", __func__, cmd);
323 /* set the pipeline state */
324 return sof_ipc4_trigger_pipelines(component, substream, state, cmd);
327 static int sof_ipc4_pcm_hw_free(struct snd_soc_component *component,
328 struct snd_pcm_substream *substream)
330 /* command is not relevant with RESET, so just pass 0 */
331 return sof_ipc4_trigger_pipelines(component, substream, SOF_IPC4_PIPE_RESET, 0);
334 static void ipc4_ssp_dai_config_pcm_params_match(struct snd_sof_dev *sdev, const char *link_name,
335 struct snd_pcm_hw_params *params)
337 struct snd_sof_dai_link *slink;
338 struct snd_sof_dai *dai;
339 bool dai_link_found = false;
342 list_for_each_entry(slink, &sdev->dai_link_list, list) {
343 if (!strcmp(slink->link->name, link_name)) {
344 dai_link_found = true;
352 for (i = 0; i < slink->num_hw_configs; i++) {
353 struct snd_soc_tplg_hw_config *hw_config = &slink->hw_configs[i];
355 if (params_rate(params) == le32_to_cpu(hw_config->fsync_rate)) {
356 /* set current config for all DAI's with matching name */
357 list_for_each_entry(dai, &sdev->dai_list, list)
358 if (!strcmp(slink->link->name, dai->name))
359 dai->current_config = le32_to_cpu(hw_config->id);
365 static int sof_ipc4_pcm_dai_link_fixup(struct snd_soc_pcm_runtime *rtd,
366 struct snd_pcm_hw_params *params)
368 struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, SOF_AUDIO_PCM_DRV_NAME);
369 struct snd_sof_dai *dai = snd_sof_find_dai(component, rtd->dai_link->name);
370 struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
371 struct snd_mask *fmt = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT);
372 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component);
373 struct sof_ipc4_copier *ipc4_copier;
376 dev_err(component->dev, "%s: No DAI found with name %s\n", __func__,
377 rtd->dai_link->name);
381 ipc4_copier = dai->private;
383 dev_err(component->dev, "%s: No private data found for DAI %s\n",
384 __func__, rtd->dai_link->name);
388 /* always set BE format to 32-bits for both playback and capture */
390 snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S32_LE);
392 rate->min = ipc4_copier->available_fmt.base_config->audio_fmt.sampling_frequency;
393 rate->max = rate->min;
395 switch (ipc4_copier->dai_type) {
396 case SOF_DAI_INTEL_SSP:
397 ipc4_ssp_dai_config_pcm_params_match(sdev, (char *)rtd->dai_link->name, params);
406 static void sof_ipc4_pcm_free(struct snd_sof_dev *sdev, struct snd_sof_pcm *spcm)
408 struct snd_sof_pcm_stream_pipeline_list *pipeline_list;
411 for_each_pcm_streams(stream) {
412 pipeline_list = &spcm->stream[stream].pipeline_list;
413 kfree(pipeline_list->pipelines);
414 pipeline_list->pipelines = NULL;
415 kfree(spcm->stream[stream].private);
416 spcm->stream[stream].private = NULL;
420 static int sof_ipc4_pcm_setup(struct snd_sof_dev *sdev, struct snd_sof_pcm *spcm)
422 struct snd_sof_pcm_stream_pipeline_list *pipeline_list;
423 struct sof_ipc4_fw_data *ipc4_data = sdev->private;
424 struct sof_ipc4_timestamp_info *stream_info;
425 bool support_info = true;
430 abi_offset = offsetof(struct sof_ipc4_fw_registers, abi_ver);
431 sof_mailbox_read(sdev, sdev->fw_info_box.offset + abi_offset, &abi_version,
432 sizeof(abi_version));
434 if (abi_version < SOF_IPC4_FW_REGS_ABI_VER)
435 support_info = false;
437 for_each_pcm_streams(stream) {
438 pipeline_list = &spcm->stream[stream].pipeline_list;
440 /* allocate memory for max number of pipeline IDs */
441 pipeline_list->pipelines = kcalloc(ipc4_data->max_num_pipelines,
442 sizeof(struct snd_sof_widget *), GFP_KERNEL);
443 if (!pipeline_list->pipelines) {
444 sof_ipc4_pcm_free(sdev, spcm);
451 stream_info = kzalloc(sizeof(*stream_info), GFP_KERNEL);
453 sof_ipc4_pcm_free(sdev, spcm);
457 spcm->stream[stream].private = stream_info;
463 static void sof_ipc4_build_time_info(struct snd_sof_dev *sdev, struct snd_sof_pcm_stream *spcm)
465 struct sof_ipc4_copier *host_copier = NULL;
466 struct sof_ipc4_copier *dai_copier = NULL;
467 struct sof_ipc4_llp_reading_slot llp_slot;
468 struct sof_ipc4_timestamp_info *info;
469 struct snd_soc_dapm_widget *widget;
470 struct snd_sof_dai *dai;
473 /* find host & dai to locate info in memory window */
474 for_each_dapm_widgets(spcm->list, i, widget) {
475 struct snd_sof_widget *swidget = widget->dobj.private;
480 if (WIDGET_IS_AIF(swidget->widget->id)) {
481 host_copier = swidget->private;
482 } else if (WIDGET_IS_DAI(swidget->widget->id)) {
483 dai = swidget->private;
484 dai_copier = dai->private;
488 /* both host and dai copier must be valid for time_info */
489 if (!host_copier || !dai_copier) {
490 dev_err(sdev->dev, "host or dai copier are not found\n");
494 info = spcm->private;
495 info->host_copier = host_copier;
496 info->dai_copier = dai_copier;
497 info->llp_offset = offsetof(struct sof_ipc4_fw_registers, llp_gpdma_reading_slots) +
498 sdev->fw_info_box.offset;
500 /* find llp slot used by current dai */
501 for (i = 0; i < SOF_IPC4_MAX_LLP_GPDMA_READING_SLOTS; i++) {
502 sof_mailbox_read(sdev, info->llp_offset, &llp_slot, sizeof(llp_slot));
503 if (llp_slot.node_id == dai_copier->data.gtw_cfg.node_id)
506 info->llp_offset += sizeof(llp_slot);
509 if (i < SOF_IPC4_MAX_LLP_GPDMA_READING_SLOTS)
512 /* if no llp gpdma slot is used, check aggregated sdw slot */
513 info->llp_offset = offsetof(struct sof_ipc4_fw_registers, llp_sndw_reading_slots) +
514 sdev->fw_info_box.offset;
515 for (i = 0; i < SOF_IPC4_MAX_LLP_SNDW_READING_SLOTS; i++) {
516 sof_mailbox_read(sdev, info->llp_offset, &llp_slot, sizeof(llp_slot));
517 if (llp_slot.node_id == dai_copier->data.gtw_cfg.node_id)
520 info->llp_offset += sizeof(llp_slot);
523 if (i < SOF_IPC4_MAX_LLP_SNDW_READING_SLOTS)
526 /* check EVAD slot */
527 info->llp_offset = offsetof(struct sof_ipc4_fw_registers, llp_evad_reading_slot) +
528 sdev->fw_info_box.offset;
529 sof_mailbox_read(sdev, info->llp_offset, &llp_slot, sizeof(llp_slot));
530 if (llp_slot.node_id != dai_copier->data.gtw_cfg.node_id) {
531 dev_info(sdev->dev, "no llp found, fall back to default HDA path");
532 info->llp_offset = 0;
536 static int sof_ipc4_pcm_hw_params(struct snd_soc_component *component,
537 struct snd_pcm_substream *substream,
538 struct snd_pcm_hw_params *params,
539 struct snd_sof_platform_stream_params *platform_params)
541 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component);
542 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
543 struct sof_ipc4_timestamp_info *time_info;
544 struct snd_sof_pcm *spcm;
546 spcm = snd_sof_find_spcm_dai(component, rtd);
547 time_info = spcm->stream[substream->stream].private;
548 /* delay calculation is not supported by current fw_reg ABI */
552 time_info->stream_start_offset = SOF_IPC4_INVALID_STREAM_POSITION;
553 time_info->llp_offset = 0;
555 sof_ipc4_build_time_info(sdev, &spcm->stream[substream->stream]);
560 static int sof_ipc4_get_stream_start_offset(struct snd_sof_dev *sdev,
561 struct snd_pcm_substream *substream,
562 struct snd_sof_pcm_stream *stream,
563 struct sof_ipc4_timestamp_info *time_info)
565 struct sof_ipc4_copier *host_copier = time_info->host_copier;
566 struct sof_ipc4_copier *dai_copier = time_info->dai_copier;
567 struct sof_ipc4_pipeline_registers ppl_reg;
568 u64 stream_start_position;
573 if (!host_copier || !dai_copier)
576 if (host_copier->data.gtw_cfg.node_id == SOF_IPC4_INVALID_NODE_ID)
579 node_index = SOF_IPC4_NODE_INDEX(host_copier->data.gtw_cfg.node_id);
580 offset = offsetof(struct sof_ipc4_fw_registers, pipeline_regs) + node_index * sizeof(ppl_reg);
581 sof_mailbox_read(sdev, sdev->fw_info_box.offset + offset, &ppl_reg, sizeof(ppl_reg));
582 if (ppl_reg.stream_start_offset == SOF_IPC4_INVALID_STREAM_POSITION)
585 stream_start_position = ppl_reg.stream_start_offset;
586 ch = dai_copier->data.out_format.fmt_cfg;
587 ch = SOF_IPC4_AUDIO_FORMAT_CFG_CHANNELS_COUNT(ch);
588 dai_sample_size = (dai_copier->data.out_format.bit_depth >> 3) * ch;
589 /* convert offset to sample count */
590 do_div(stream_start_position, dai_sample_size);
591 time_info->stream_start_offset = stream_start_position;
596 static snd_pcm_sframes_t sof_ipc4_pcm_delay(struct snd_soc_component *component,
597 struct snd_pcm_substream *substream)
599 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component);
600 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
601 struct sof_ipc4_timestamp_info *time_info;
602 struct sof_ipc4_llp_reading_slot llp;
603 snd_pcm_uframes_t head_ptr, tail_ptr;
604 struct snd_sof_pcm_stream *stream;
605 struct snd_sof_pcm *spcm;
609 spcm = snd_sof_find_spcm_dai(component, rtd);
613 stream = &spcm->stream[substream->stream];
614 time_info = stream->private;
619 * stream_start_offset is updated to memory window by FW based on
620 * pipeline statistics and it may be invalid if host query happens before
621 * the statistics is complete. And it will not change after the first initiailization.
623 if (time_info->stream_start_offset == SOF_IPC4_INVALID_STREAM_POSITION) {
624 ret = sof_ipc4_get_stream_start_offset(sdev, substream, stream, time_info);
630 * HDaudio links don't support the LLP counter reported by firmware
631 * the link position is read directly from hardware registers.
633 if (!time_info->llp_offset) {
634 tmp_ptr = snd_sof_pcm_get_stream_position(sdev, component, substream);
638 sof_mailbox_read(sdev, time_info->llp_offset, &llp, sizeof(llp));
639 tmp_ptr = ((u64)llp.reading.llp_u << 32) | llp.reading.llp_l;
642 /* In two cases dai dma position is not accurate
643 * (1) dai pipeline is started before host pipeline
644 * (2) multiple streams mixed into one. Each stream has the same dai dma position
646 * Firmware calculates correct stream_start_offset for all cases including above two.
647 * Driver subtracts stream_start_offset from dai dma position to get accurate one
649 tmp_ptr -= time_info->stream_start_offset;
651 /* Calculate the delay taking into account that both pointer can wrap */
652 div64_u64_rem(tmp_ptr, substream->runtime->boundary, &tmp_ptr);
653 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
654 head_ptr = substream->runtime->status->hw_ptr;
658 tail_ptr = substream->runtime->status->hw_ptr;
661 if (head_ptr < tail_ptr)
662 return substream->runtime->boundary - tail_ptr + head_ptr;
664 return head_ptr - tail_ptr;
667 const struct sof_ipc_pcm_ops ipc4_pcm_ops = {
668 .hw_params = sof_ipc4_pcm_hw_params,
669 .trigger = sof_ipc4_pcm_trigger,
670 .hw_free = sof_ipc4_pcm_hw_free,
671 .dai_link_fixup = sof_ipc4_pcm_dai_link_fixup,
672 .pcm_setup = sof_ipc4_pcm_setup,
673 .pcm_free = sof_ipc4_pcm_free,
674 .delay = sof_ipc4_pcm_delay