1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 // This file is provided under a dual BSD/GPLv2 license. When using or
4 // redistributing this file, you may do so under either license.
6 // Copyright(c) 2018 Intel Corporation. All rights reserved.
8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9 // Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
10 // Rander Wang <rander.wang@intel.com>
11 // Keyon Jie <yang.jie@linux.intel.com>
15 * Hardware interface for audio DSP on Apollolake and GeminiLake
18 #include <sound/sof/ext_manifest4.h>
19 #include "../ipc4-priv.h"
20 #include "../sof-priv.h"
22 #include "../sof-audio.h"
24 static const struct snd_sof_debugfs_map apl_dsp_debugfs[] = {
25 {"hda", HDA_DSP_HDA_BAR, 0, 0x4000, SOF_DEBUGFS_ACCESS_ALWAYS},
26 {"pp", HDA_DSP_PP_BAR, 0, 0x1000, SOF_DEBUGFS_ACCESS_ALWAYS},
27 {"dsp", HDA_DSP_BAR, 0, 0x10000, SOF_DEBUGFS_ACCESS_ALWAYS},
31 struct snd_sof_dsp_ops sof_apl_ops;
32 EXPORT_SYMBOL_NS(sof_apl_ops, SND_SOC_SOF_INTEL_HDA_COMMON);
34 int sof_apl_ops_init(struct snd_sof_dev *sdev)
37 memcpy(&sof_apl_ops, &sof_hda_common_ops, sizeof(struct snd_sof_dsp_ops));
39 /* probe/remove/shutdown */
40 sof_apl_ops.shutdown = hda_dsp_shutdown;
42 if (sdev->pdata->ipc_type == SOF_IPC) {
44 sof_apl_ops.irq_thread = hda_dsp_ipc_irq_thread;
47 sof_apl_ops.send_msg = hda_dsp_ipc_send_msg;
50 sof_apl_ops.ipc_dump = hda_ipc_dump;
53 if (sdev->pdata->ipc_type == SOF_INTEL_IPC4) {
54 struct sof_ipc4_fw_data *ipc4_data;
56 sdev->private = devm_kzalloc(sdev->dev, sizeof(*ipc4_data), GFP_KERNEL);
60 ipc4_data = sdev->private;
61 ipc4_data->manifest_fw_hdr_offset = SOF_MAN4_FW_HDR_OFFSET;
63 ipc4_data->mtrace_type = SOF_IPC4_MTRACE_INTEL_CAVS_1_5;
65 /* External library loading support */
66 ipc4_data->load_library = hda_dsp_ipc4_load_library;
69 sof_apl_ops.irq_thread = hda_dsp_ipc4_irq_thread;
72 sof_apl_ops.send_msg = hda_dsp_ipc4_send_msg;
75 sof_apl_ops.ipc_dump = hda_ipc4_dump;
78 /* set DAI driver ops */
79 hda_set_dai_drv_ops(sdev, &sof_apl_ops);
82 sof_apl_ops.debug_map = apl_dsp_debugfs;
83 sof_apl_ops.debug_map_count = ARRAY_SIZE(apl_dsp_debugfs);
86 sof_apl_ops.run = hda_dsp_cl_boot_firmware;
89 sof_apl_ops.post_fw_run = hda_dsp_post_fw_run;
91 /* dsp core get/put */
92 sof_apl_ops.core_get = hda_dsp_core_get;
96 EXPORT_SYMBOL_NS(sof_apl_ops_init, SND_SOC_SOF_INTEL_HDA_COMMON);
98 const struct sof_intel_dsp_desc apl_chip_info = {
102 .host_managed_cores_mask = GENMASK(1, 0),
103 .ipc_req = HDA_DSP_REG_HIPCI,
104 .ipc_req_mask = HDA_DSP_REG_HIPCI_BUSY,
105 .ipc_ack = HDA_DSP_REG_HIPCIE,
106 .ipc_ack_mask = HDA_DSP_REG_HIPCIE_DONE,
107 .ipc_ctl = HDA_DSP_REG_HIPCCTL,
108 .rom_status_reg = HDA_DSP_SRAM_REG_ROM_STATUS,
109 .rom_init_timeout = 150,
110 .ssp_count = APL_SSP_COUNT,
111 .ssp_base_offset = APL_SSP_BASE_OFFSET,
112 .d0i3_offset = SOF_HDA_VS_D0I3C,
113 .quirks = SOF_INTEL_PROCEN_FMT_QUIRK,
114 .check_ipc_irq = hda_dsp_check_ipc_irq,
115 .cl_init = cl_dsp_init,
116 .power_down_dsp = hda_power_down_dsp,
117 .disable_interrupts = hda_dsp_disable_interrupts,
118 .hw_ip_version = SOF_INTEL_CAVS_1_5_PLUS,
120 EXPORT_SYMBOL_NS(apl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);