sound/soc/samsung/i2s.c

   1 /* sound/soc/samsung/i2s.c
   2  *
   3  * ALSA SoC Audio Layer - Samsung I2S Controller driver
   4  *
   5  * Copyright (c) 2010 Samsung Electronics Co. Ltd.
   6  *      Jaswinder Singh <jassisinghbrar@gmail.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <dt-bindings/sound/samsung-i2s.h>
  14 #include <linux/delay.h>
  15 #include <linux/slab.h>
  16 #include <linux/clk.h>
  17 #include <linux/clk-provider.h>
  18 #include <linux/io.h>
  19 #include <linux/module.h>
  20 #include <linux/of.h>
  21 #include <linux/of_device.h>
  22 #include <linux/of_gpio.h>
  23 #include <linux/pm_runtime.h>
  24
  25 #include <sound/soc.h>
  26 #include <sound/pcm_params.h>
  27
  28 #include <linux/platform_data/asoc-s3c.h>
  29
  30 #include "dma.h"
  31 #include "idma.h"
  32 #include "i2s.h"
  33 #include "i2s-regs.h"
  34
  35 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
  36
  37 #define SAMSUNG_I2S_ID_PRIMARY          1
  38 #define SAMSUNG_I2S_ID_SECONDARY        2
  39
  40 struct samsung_i2s_variant_regs {
  41         unsigned int    bfs_off;
  42         unsigned int    rfs_off;
  43         unsigned int    sdf_off;
  44         unsigned int    txr_off;
  45         unsigned int    rclksrc_off;
  46         unsigned int    mss_off;
  47         unsigned int    cdclkcon_off;
  48         unsigned int    lrp_off;
  49         unsigned int    bfs_mask;
  50         unsigned int    rfs_mask;
  51         unsigned int    ftx0cnt_off;
  52 };
  53
  54 struct samsung_i2s_dai_data {
  55         u32 quirks;
  56         unsigned int pcm_rates;
  57         const struct samsung_i2s_variant_regs *i2s_variant_regs;
  58 };
  59
  60 struct i2s_dai {
  61         /* Platform device for this DAI */
  62         struct platform_device *pdev;
  63         /* Memory mapped SFR region */
  64         void __iomem    *addr;
  65         /* Rate of RCLK source clock */
  66         unsigned long rclk_srcrate;
  67         /* Frame Clock */
  68         unsigned frmclk;
  69         /*
  70          * Specifically requested RCLK,BCLK by MACHINE Driver.
  71          * 0 indicates CPU driver is free to choose any value.
  72          */
  73         unsigned rfs, bfs;
  74         /* I2S Controller's core clock */
  75         struct clk *clk;
  76         /* Clock for generating I2S signals */
  77         struct clk *op_clk;
  78         /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
  79         struct i2s_dai *pri_dai;
  80         /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
  81         struct i2s_dai *sec_dai;
  82 #define DAI_OPENED      (1 << 0) /* Dai is opened */
  83 #define DAI_MANAGER     (1 << 1) /* Dai is the manager */
  84         unsigned mode;
  85
  86         /* Driver for this DAI */
  87         struct snd_soc_dai_driver *drv;
  88
  89         /* DMA parameters */
  90         struct snd_dmaengine_dai_dma_data dma_playback;
  91         struct snd_dmaengine_dai_dma_data dma_capture;
  92         struct snd_dmaengine_dai_dma_data idma_playback;
  93         dma_filter_fn filter;
  94         u32     quirks;
  95         u32     suspend_i2smod;
  96         u32     suspend_i2scon;
  97         u32     suspend_i2spsr;
  98         const struct samsung_i2s_variant_regs *variant_regs;
  99
 100         spinlock_t *lock;
 101
 102         struct samsung_i2s_priv *priv;
 103 };
 104
 105 /* Lock for cross i/f checks */
 106 static DEFINE_SPINLOCK(lock);
 107
 108 struct samsung_i2s_priv {
 109         struct platform_device *pdev;
 110         struct platform_device *pdev_sec;
 111
 112         /* Spinlock protecting access to the device's registers */
 113         spinlock_t spinlock;
 114
 115         /* CPU DAIs and their corresponding drivers */
 116         struct i2s_dai *dai;
 117         struct snd_soc_dai_driver *dai_drv;
 118         int num_dais;
 119
 120         /* The clock provider's data */
 121         struct clk *clk_table[3];
 122         struct clk_onecell_data clk_data;
 123 };
 124
 125 struct i2s_dai *samsung_i2s_get_pri_dai(struct device *dev)
 126 {
 127         struct samsung_i2s_priv *priv = dev_get_drvdata(dev);
 128
 129         return &priv->dai[SAMSUNG_I2S_ID_PRIMARY - 1];
 130 }
 131
 132 /* Returns true if this is the 'overlay' stereo DAI */
 133 static inline bool is_secondary(struct i2s_dai *i2s)
 134 {
 135         return i2s->drv->id == SAMSUNG_I2S_ID_SECONDARY;
 136 }
 137
 138 /* If operating in SoC-Slave mode */
 139 static inline bool is_slave(struct i2s_dai *i2s)
 140 {
 141         u32 mod = readl(i2s->addr + I2SMOD);
 142         return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
 143 }
 144
 145 /* If this interface of the controller is transmitting data */
 146 static inline bool tx_active(struct i2s_dai *i2s)
 147 {
 148         u32 active;
 149
 150         if (!i2s)
 151                 return false;
 152
 153         active = readl(i2s->addr + I2SCON);
 154
 155         if (is_secondary(i2s))
 156                 active &= CON_TXSDMA_ACTIVE;
 157         else
 158                 active &= CON_TXDMA_ACTIVE;
 159
 160         return active ? true : false;
 161 }
 162
 163 /* Return pointer to the other DAI */
 164 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
 165 {
 166         return i2s->pri_dai ? : i2s->sec_dai;
 167 }
 168
 169 /* If the other interface of the controller is transmitting data */
 170 static inline bool other_tx_active(struct i2s_dai *i2s)
 171 {
 172         struct i2s_dai *other = get_other_dai(i2s);
 173
 174         return tx_active(other);
 175 }
 176
 177 /* If any interface of the controller is transmitting data */
 178 static inline bool any_tx_active(struct i2s_dai *i2s)
 179 {
 180         return tx_active(i2s) || other_tx_active(i2s);
 181 }
 182
 183 /* If this interface of the controller is receiving data */
 184 static inline bool rx_active(struct i2s_dai *i2s)
 185 {
 186         u32 active;
 187
 188         if (!i2s)
 189                 return false;
 190
 191         active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
 192
 193         return active ? true : false;
 194 }
 195
 196 /* If the other interface of the controller is receiving data */
 197 static inline bool other_rx_active(struct i2s_dai *i2s)
 198 {
 199         struct i2s_dai *other = get_other_dai(i2s);
 200
 201         return rx_active(other);
 202 }
 203
 204 /* If any interface of the controller is receiving data */
 205 static inline bool any_rx_active(struct i2s_dai *i2s)
 206 {
 207         return rx_active(i2s) || other_rx_active(i2s);
 208 }
 209
 210 /* If the other DAI is transmitting or receiving data */
 211 static inline bool other_active(struct i2s_dai *i2s)
 212 {
 213         return other_rx_active(i2s) || other_tx_active(i2s);
 214 }
 215
 216 /* If this DAI is transmitting or receiving data */
 217 static inline bool this_active(struct i2s_dai *i2s)
 218 {
 219         return tx_active(i2s) || rx_active(i2s);
 220 }
 221
 222 /* If the controller is active anyway */
 223 static inline bool any_active(struct i2s_dai *i2s)
 224 {
 225         return this_active(i2s) || other_active(i2s);
 226 }
 227
 228 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
 229 {
 230         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
 231
 232         return &priv->dai[dai->id - 1];
 233 }
 234
 235 static inline bool is_opened(struct i2s_dai *i2s)
 236 {
 237         if (i2s && (i2s->mode & DAI_OPENED))
 238                 return true;
 239         else
 240                 return false;
 241 }
 242
 243 static inline bool is_manager(struct i2s_dai *i2s)
 244 {
 245         if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
 246                 return true;
 247         else
 248                 return false;
 249 }
 250
 251 /* Read RCLK of I2S (in multiples of LRCLK) */
 252 static inline unsigned get_rfs(struct i2s_dai *i2s)
 253 {
 254         u32 rfs;
 255         rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
 256         rfs &= i2s->variant_regs->rfs_mask;
 257
 258         switch (rfs) {
 259         case 7: return 192;
 260         case 6: return 96;
 261         case 5: return 128;
 262         case 4: return 64;
 263         case 3: return 768;
 264         case 2: return 384;
 265         case 1: return 512;
 266         default: return 256;
 267         }
 268 }
 269
 270 /* Write RCLK of I2S (in multiples of LRCLK) */
 271 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
 272 {
 273         u32 mod = readl(i2s->addr + I2SMOD);
 274         int rfs_shift = i2s->variant_regs->rfs_off;
 275
 276         mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
 277
 278         switch (rfs) {
 279         case 192:
 280                 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
 281                 break;
 282         case 96:
 283                 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
 284                 break;
 285         case 128:
 286                 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
 287                 break;
 288         case 64:
 289                 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
 290                 break;
 291         case 768:
 292                 mod |= (MOD_RCLK_768FS << rfs_shift);
 293                 break;
 294         case 512:
 295                 mod |= (MOD_RCLK_512FS << rfs_shift);
 296                 break;
 297         case 384:
 298                 mod |= (MOD_RCLK_384FS << rfs_shift);
 299                 break;
 300         default:
 301                 mod |= (MOD_RCLK_256FS << rfs_shift);
 302                 break;
 303         }
 304
 305         writel(mod, i2s->addr + I2SMOD);
 306 }
 307
 308 /* Read Bit-Clock of I2S (in multiples of LRCLK) */
 309 static inline unsigned get_bfs(struct i2s_dai *i2s)
 310 {
 311         u32 bfs;
 312         bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
 313         bfs &= i2s->variant_regs->bfs_mask;
 314
 315         switch (bfs) {
 316         case 8: return 256;
 317         case 7: return 192;
 318         case 6: return 128;
 319         case 5: return 96;
 320         case 4: return 64;
 321         case 3: return 24;
 322         case 2: return 16;
 323         case 1: return 48;
 324         default: return 32;
 325         }
 326 }
 327
 328 /* Write Bit-Clock of I2S (in multiples of LRCLK) */
 329 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
 330 {
 331         u32 mod = readl(i2s->addr + I2SMOD);
 332         int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
 333         int bfs_shift = i2s->variant_regs->bfs_off;
 334
 335         /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
 336         if (!tdm && bfs > 48) {
 337                 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
 338                 return;
 339         }
 340
 341         mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
 342
 343         switch (bfs) {
 344         case 48:
 345                 mod |= (MOD_BCLK_48FS << bfs_shift);
 346                 break;
 347         case 32:
 348                 mod |= (MOD_BCLK_32FS << bfs_shift);
 349                 break;
 350         case 24:
 351                 mod |= (MOD_BCLK_24FS << bfs_shift);
 352                 break;
 353         case 16:
 354                 mod |= (MOD_BCLK_16FS << bfs_shift);
 355                 break;
 356         case 64:
 357                 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
 358                 break;
 359         case 96:
 360                 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
 361                 break;
 362         case 128:
 363                 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
 364                 break;
 365         case 192:
 366                 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
 367                 break;
 368         case 256:
 369                 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
 370                 break;
 371         default:
 372                 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
 373                 return;
 374         }
 375
 376         writel(mod, i2s->addr + I2SMOD);
 377 }
 378
 379 /* Sample-Size */
 380 static inline int get_blc(struct i2s_dai *i2s)
 381 {
 382         int blc = readl(i2s->addr + I2SMOD);
 383
 384         blc = (blc >> 13) & 0x3;
 385
 386         switch (blc) {
 387         case 2: return 24;
 388         case 1: return 8;
 389         default: return 16;
 390         }
 391 }
 392
 393 /* TX Channel Control */
 394 static void i2s_txctrl(struct i2s_dai *i2s, int on)
 395 {
 396         void __iomem *addr = i2s->addr;
 397         int txr_off = i2s->variant_regs->txr_off;
 398         u32 con = readl(addr + I2SCON);
 399         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
 400
 401         if (on) {
 402                 con |= CON_ACTIVE;
 403                 con &= ~CON_TXCH_PAUSE;
 404
 405                 if (is_secondary(i2s)) {
 406                         con |= CON_TXSDMA_ACTIVE;
 407                         con &= ~CON_TXSDMA_PAUSE;
 408                 } else {
 409                         con |= CON_TXDMA_ACTIVE;
 410                         con &= ~CON_TXDMA_PAUSE;
 411                 }
 412
 413                 if (any_rx_active(i2s))
 414                         mod |= 2 << txr_off;
 415                 else
 416                         mod |= 0 << txr_off;
 417         } else {
 418                 if (is_secondary(i2s)) {
 419                         con |=  CON_TXSDMA_PAUSE;
 420                         con &= ~CON_TXSDMA_ACTIVE;
 421                 } else {
 422                         con |=  CON_TXDMA_PAUSE;
 423                         con &= ~CON_TXDMA_ACTIVE;
 424                 }
 425
 426                 if (other_tx_active(i2s)) {
 427                         writel(con, addr + I2SCON);
 428                         return;
 429                 }
 430
 431                 con |=  CON_TXCH_PAUSE;
 432
 433                 if (any_rx_active(i2s))
 434                         mod |= 1 << txr_off;
 435                 else
 436                         con &= ~CON_ACTIVE;
 437         }
 438
 439         writel(mod, addr + I2SMOD);
 440         writel(con, addr + I2SCON);
 441 }
 442
 443 /* RX Channel Control */
 444 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
 445 {
 446         void __iomem *addr = i2s->addr;
 447         int txr_off = i2s->variant_regs->txr_off;
 448         u32 con = readl(addr + I2SCON);
 449         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
 450
 451         if (on) {
 452                 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
 453                 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
 454
 455                 if (any_tx_active(i2s))
 456                         mod |= 2 << txr_off;
 457                 else
 458                         mod |= 1 << txr_off;
 459         } else {
 460                 con |=  CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
 461                 con &= ~CON_RXDMA_ACTIVE;
 462
 463                 if (any_tx_active(i2s))
 464                         mod |= 0 << txr_off;
 465                 else
 466                         con &= ~CON_ACTIVE;
 467         }
 468
 469         writel(mod, addr + I2SMOD);
 470         writel(con, addr + I2SCON);
 471 }
 472
 473 /* Flush FIFO of an interface */
 474 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
 475 {
 476         void __iomem *fic;
 477         u32 val;
 478
 479         if (!i2s)
 480                 return;
 481
 482         if (is_secondary(i2s))
 483                 fic = i2s->addr + I2SFICS;
 484         else
 485                 fic = i2s->addr + I2SFIC;
 486
 487         /* Flush the FIFO */
 488         writel(readl(fic) | flush, fic);
 489
 490         /* Be patient */
 491         val = msecs_to_loops(1) / 1000; /* 1 usec */
 492         while (--val)
 493                 cpu_relax();
 494
 495         writel(readl(fic) & ~flush, fic);
 496 }
 497
 498 static int i2s_set_sysclk(struct snd_soc_dai *dai,
 499           int clk_id, unsigned int rfs, int dir)
 500 {
 501         struct i2s_dai *i2s = to_info(dai);
 502         struct i2s_dai *other = get_other_dai(i2s);
 503         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
 504         unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
 505         unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
 506         u32 mod, mask, val = 0;
 507         unsigned long flags;
 508         int ret = 0;
 509
 510         pm_runtime_get_sync(dai->dev);
 511
 512         spin_lock_irqsave(i2s->lock, flags);
 513         mod = readl(i2s->addr + I2SMOD);
 514         spin_unlock_irqrestore(i2s->lock, flags);
 515
 516         switch (clk_id) {
 517         case SAMSUNG_I2S_OPCLK:
 518                 mask = MOD_OPCLK_MASK;
 519                 val = (dir << MOD_OPCLK_SHIFT) & MOD_OPCLK_MASK;
 520                 break;
 521         case SAMSUNG_I2S_CDCLK:
 522                 mask = 1 << i2s_regs->cdclkcon_off;
 523                 /* Shouldn't matter in GATING(CLOCK_IN) mode */
 524                 if (dir == SND_SOC_CLOCK_IN)
 525                         rfs = 0;
 526
 527                 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
 528                                 (any_active(i2s) &&
 529                                 (((dir == SND_SOC_CLOCK_IN)
 530                                         && !(mod & cdcon_mask)) ||
 531                                 ((dir == SND_SOC_CLOCK_OUT)
 532                                         && (mod & cdcon_mask))))) {
 533                         dev_err(&i2s->pdev->dev,
 534                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 535                         ret = -EAGAIN;
 536                         goto err;
 537                 }
 538
 539                 if (dir == SND_SOC_CLOCK_IN)
 540                         val = 1 << i2s_regs->cdclkcon_off;
 541
 542                 i2s->rfs = rfs;
 543                 break;
 544
 545         case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
 546         case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
 547                 mask = 1 << i2s_regs->rclksrc_off;
 548
 549                 if ((i2s->quirks & QUIRK_NO_MUXPSR)
 550                                 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
 551                         clk_id = 0;
 552                 else
 553                         clk_id = 1;
 554
 555                 if (!any_active(i2s)) {
 556                         if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
 557                                 if ((clk_id && !(mod & rsrc_mask)) ||
 558                                         (!clk_id && (mod & rsrc_mask))) {
 559                                         clk_disable_unprepare(i2s->op_clk);
 560                                         clk_put(i2s->op_clk);
 561                                 } else {
 562                                         i2s->rclk_srcrate =
 563                                                 clk_get_rate(i2s->op_clk);
 564                                         goto done;
 565                                 }
 566                         }
 567
 568                         if (clk_id)
 569                                 i2s->op_clk = clk_get(&i2s->pdev->dev,
 570                                                 "i2s_opclk1");
 571                         else
 572                                 i2s->op_clk = clk_get(&i2s->pdev->dev,
 573                                                 "i2s_opclk0");
 574
 575                         if (WARN_ON(IS_ERR(i2s->op_clk))) {
 576                                 ret = PTR_ERR(i2s->op_clk);
 577                                 i2s->op_clk = NULL;
 578                                 goto err;
 579                         }
 580
 581                         ret = clk_prepare_enable(i2s->op_clk);
 582                         if (ret) {
 583                                 clk_put(i2s->op_clk);
 584                                 i2s->op_clk = NULL;
 585                                 goto err;
 586                         }
 587                         i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
 588
 589                         /* Over-ride the other's */
 590                         if (other) {
 591                                 other->op_clk = i2s->op_clk;
 592                                 other->rclk_srcrate = i2s->rclk_srcrate;
 593                         }
 594                 } else if ((!clk_id && (mod & rsrc_mask))
 595                                 || (clk_id && !(mod & rsrc_mask))) {
 596                         dev_err(&i2s->pdev->dev,
 597                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 598                         ret = -EAGAIN;
 599                         goto err;
 600                 } else {
 601                         /* Call can't be on the active DAI */
 602                         i2s->op_clk = other->op_clk;
 603                         i2s->rclk_srcrate = other->rclk_srcrate;
 604                         goto done;
 605                 }
 606
 607                 if (clk_id == 1)
 608                         val = 1 << i2s_regs->rclksrc_off;
 609                 break;
 610         default:
 611                 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
 612                 ret = -EINVAL;
 613                 goto err;
 614         }
 615
 616         spin_lock_irqsave(i2s->lock, flags);
 617         mod = readl(i2s->addr + I2SMOD);
 618         mod = (mod & ~mask) | val;
 619         writel(mod, i2s->addr + I2SMOD);
 620         spin_unlock_irqrestore(i2s->lock, flags);
 621 done:
 622         pm_runtime_put(dai->dev);
 623
 624         return 0;
 625 err:
 626         pm_runtime_put(dai->dev);
 627         return ret;
 628 }
 629
 630 static int i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 631 {
 632         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
 633         struct i2s_dai *i2s = to_info(dai);
 634         int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
 635         u32 mod, tmp = 0;
 636         unsigned long flags;
 637
 638         lrp_shift = i2s->variant_regs->lrp_off;
 639         sdf_shift = i2s->variant_regs->sdf_off;
 640         mod_slave = 1 << i2s->variant_regs->mss_off;
 641
 642         sdf_mask = MOD_SDF_MASK << sdf_shift;
 643         lrp_rlow = MOD_LR_RLOW << lrp_shift;
 644
 645         /* Format is priority */
 646         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 647         case SND_SOC_DAIFMT_RIGHT_J:
 648                 tmp |= lrp_rlow;
 649                 tmp |= (MOD_SDF_MSB << sdf_shift);
 650                 break;
 651         case SND_SOC_DAIFMT_LEFT_J:
 652                 tmp |= lrp_rlow;
 653                 tmp |= (MOD_SDF_LSB << sdf_shift);
 654                 break;
 655         case SND_SOC_DAIFMT_I2S:
 656                 tmp |= (MOD_SDF_IIS << sdf_shift);
 657                 break;
 658         default:
 659                 dev_err(&i2s->pdev->dev, "Format not supported\n");
 660                 return -EINVAL;
 661         }
 662
 663         /*
 664          * INV flag is relative to the FORMAT flag - if set it simply
 665          * flips the polarity specified by the Standard
 666          */
 667         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 668         case SND_SOC_DAIFMT_NB_NF:
 669                 break;
 670         case SND_SOC_DAIFMT_NB_IF:
 671                 if (tmp & lrp_rlow)
 672                         tmp &= ~lrp_rlow;
 673                 else
 674                         tmp |= lrp_rlow;
 675                 break;
 676         default:
 677                 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
 678                 return -EINVAL;
 679         }
 680
 681         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 682         case SND_SOC_DAIFMT_CBM_CFM:
 683                 tmp |= mod_slave;
 684                 break;
 685         case SND_SOC_DAIFMT_CBS_CFS:
 686                 /*
 687                  * Set default source clock in Master mode, only when the
 688                  * CLK_I2S_RCLK_SRC clock is not exposed so we ensure any
 689                  * clock configuration assigned in DT is not overwritten.
 690                  */
 691                 if (i2s->rclk_srcrate == 0 && priv->clk_data.clks == NULL)
 692                         i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
 693                                                         0, SND_SOC_CLOCK_IN);
 694                 break;
 695         default:
 696                 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
 697                 return -EINVAL;
 698         }
 699
 700         pm_runtime_get_sync(dai->dev);
 701         spin_lock_irqsave(i2s->lock, flags);
 702         mod = readl(i2s->addr + I2SMOD);
 703         /*
 704          * Don't change the I2S mode if any controller is active on this
 705          * channel.
 706          */
 707         if (any_active(i2s) &&
 708                 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
 709                 spin_unlock_irqrestore(i2s->lock, flags);
 710                 pm_runtime_put(dai->dev);
 711                 dev_err(&i2s->pdev->dev,
 712                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 713                 return -EAGAIN;
 714         }
 715
 716         mod &= ~(sdf_mask | lrp_rlow | mod_slave);
 717         mod |= tmp;
 718         writel(mod, i2s->addr + I2SMOD);
 719         spin_unlock_irqrestore(i2s->lock, flags);
 720         pm_runtime_put(dai->dev);
 721
 722         return 0;
 723 }
 724
 725 static int i2s_hw_params(struct snd_pcm_substream *substream,
 726         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 727 {
 728         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
 729         struct i2s_dai *i2s = to_info(dai);
 730         u32 mod, mask = 0, val = 0;
 731         struct clk *rclksrc;
 732         unsigned long flags;
 733
 734         WARN_ON(!pm_runtime_active(dai->dev));
 735
 736         if (!is_secondary(i2s))
 737                 mask |= (MOD_DC2_EN | MOD_DC1_EN);
 738
 739         switch (params_channels(params)) {
 740         case 6:
 741                 val |= MOD_DC2_EN;
 742         case 4:
 743                 val |= MOD_DC1_EN;
 744                 break;
 745         case 2:
 746                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 747                         i2s->dma_playback.addr_width = 4;
 748                 else
 749                         i2s->dma_capture.addr_width = 4;
 750                 break;
 751         case 1:
 752                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 753                         i2s->dma_playback.addr_width = 2;
 754                 else
 755                         i2s->dma_capture.addr_width = 2;
 756
 757                 break;
 758         default:
 759                 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
 760                                 params_channels(params));
 761                 return -EINVAL;
 762         }
 763
 764         if (is_secondary(i2s))
 765                 mask |= MOD_BLCS_MASK;
 766         else
 767                 mask |= MOD_BLCP_MASK;
 768
 769         if (is_manager(i2s))
 770                 mask |= MOD_BLC_MASK;
 771
 772         switch (params_width(params)) {
 773         case 8:
 774                 if (is_secondary(i2s))
 775                         val |= MOD_BLCS_8BIT;
 776                 else
 777                         val |= MOD_BLCP_8BIT;
 778                 if (is_manager(i2s))
 779                         val |= MOD_BLC_8BIT;
 780                 break;
 781         case 16:
 782                 if (is_secondary(i2s))
 783                         val |= MOD_BLCS_16BIT;
 784                 else
 785                         val |= MOD_BLCP_16BIT;
 786                 if (is_manager(i2s))
 787                         val |= MOD_BLC_16BIT;
 788                 break;
 789         case 24:
 790                 if (is_secondary(i2s))
 791                         val |= MOD_BLCS_24BIT;
 792                 else
 793                         val |= MOD_BLCP_24BIT;
 794                 if (is_manager(i2s))
 795                         val |= MOD_BLC_24BIT;
 796                 break;
 797         default:
 798                 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
 799                                 params_format(params));
 800                 return -EINVAL;
 801         }
 802
 803         spin_lock_irqsave(i2s->lock, flags);
 804         mod = readl(i2s->addr + I2SMOD);
 805         mod = (mod & ~mask) | val;
 806         writel(mod, i2s->addr + I2SMOD);
 807         spin_unlock_irqrestore(i2s->lock, flags);
 808
 809         snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
 810
 811         i2s->frmclk = params_rate(params);
 812
 813         rclksrc = priv->clk_table[CLK_I2S_RCLK_SRC];
 814         if (rclksrc && !IS_ERR(rclksrc))
 815                 i2s->rclk_srcrate = clk_get_rate(rclksrc);
 816
 817         return 0;
 818 }
 819
 820 /* We set constraints on the substream acc to the version of I2S */
 821 static int i2s_startup(struct snd_pcm_substream *substream,
 822           struct snd_soc_dai *dai)
 823 {
 824         struct i2s_dai *i2s = to_info(dai);
 825         struct i2s_dai *other = get_other_dai(i2s);
 826         unsigned long flags;
 827
 828         pm_runtime_get_sync(dai->dev);
 829
 830         spin_lock_irqsave(&lock, flags);
 831
 832         i2s->mode |= DAI_OPENED;
 833
 834         if (is_manager(other))
 835                 i2s->mode &= ~DAI_MANAGER;
 836         else
 837                 i2s->mode |= DAI_MANAGER;
 838
 839         if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
 840                 writel(CON_RSTCLR, i2s->addr + I2SCON);
 841
 842         spin_unlock_irqrestore(&lock, flags);
 843
 844         return 0;
 845 }
 846
 847 static void i2s_shutdown(struct snd_pcm_substream *substream,
 848         struct snd_soc_dai *dai)
 849 {
 850         struct i2s_dai *i2s = to_info(dai);
 851         struct i2s_dai *other = get_other_dai(i2s);
 852         unsigned long flags;
 853
 854         spin_lock_irqsave(&lock, flags);
 855
 856         i2s->mode &= ~DAI_OPENED;
 857         i2s->mode &= ~DAI_MANAGER;
 858
 859         if (is_opened(other))
 860                 other->mode |= DAI_MANAGER;
 861
 862         /* Reset any constraint on RFS and BFS */
 863         i2s->rfs = 0;
 864         i2s->bfs = 0;
 865
 866         spin_unlock_irqrestore(&lock, flags);
 867
 868         pm_runtime_put(dai->dev);
 869 }
 870
 871 static int config_setup(struct i2s_dai *i2s)
 872 {
 873         struct i2s_dai *other = get_other_dai(i2s);
 874         unsigned rfs, bfs, blc;
 875         u32 psr;
 876
 877         blc = get_blc(i2s);
 878
 879         bfs = i2s->bfs;
 880
 881         if (!bfs && other)
 882                 bfs = other->bfs;
 883
 884         /* Select least possible multiple(2) if no constraint set */
 885         if (!bfs)
 886                 bfs = blc * 2;
 887
 888         rfs = i2s->rfs;
 889
 890         if (!rfs && other)
 891                 rfs = other->rfs;
 892
 893         if ((rfs == 256 || rfs == 512) && (blc == 24)) {
 894                 dev_err(&i2s->pdev->dev,
 895                         "%d-RFS not supported for 24-blc\n", rfs);
 896                 return -EINVAL;
 897         }
 898
 899         if (!rfs) {
 900                 if (bfs == 16 || bfs == 32)
 901                         rfs = 256;
 902                 else
 903                         rfs = 384;
 904         }
 905
 906         /* If already setup and running */
 907         if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
 908                 dev_err(&i2s->pdev->dev,
 909                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 910                 return -EAGAIN;
 911         }
 912
 913         set_bfs(i2s, bfs);
 914         set_rfs(i2s, rfs);
 915
 916         /* Don't bother with PSR in Slave mode */
 917         if (is_slave(i2s))
 918                 return 0;
 919
 920         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
 921                 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
 922                 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
 923                 dev_dbg(&i2s->pdev->dev,
 924                         "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
 925                                 i2s->rclk_srcrate, psr, rfs, bfs);
 926         }
 927
 928         return 0;
 929 }
 930
 931 static int i2s_trigger(struct snd_pcm_substream *substream,
 932         int cmd, struct snd_soc_dai *dai)
 933 {
 934         int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
 935         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 936         struct i2s_dai *i2s = to_info(rtd->cpu_dai);
 937         unsigned long flags;
 938
 939         switch (cmd) {
 940         case SNDRV_PCM_TRIGGER_START:
 941         case SNDRV_PCM_TRIGGER_RESUME:
 942         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 943                 pm_runtime_get_sync(dai->dev);
 944                 spin_lock_irqsave(i2s->lock, flags);
 945
 946                 if (config_setup(i2s)) {
 947                         spin_unlock_irqrestore(i2s->lock, flags);
 948                         return -EINVAL;
 949                 }
 950
 951                 if (capture)
 952                         i2s_rxctrl(i2s, 1);
 953                 else
 954                         i2s_txctrl(i2s, 1);
 955
 956                 spin_unlock_irqrestore(i2s->lock, flags);
 957                 break;
 958         case SNDRV_PCM_TRIGGER_STOP:
 959         case SNDRV_PCM_TRIGGER_SUSPEND:
 960         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 961                 spin_lock_irqsave(i2s->lock, flags);
 962
 963                 if (capture) {
 964                         i2s_rxctrl(i2s, 0);
 965                         i2s_fifo(i2s, FIC_RXFLUSH);
 966                 } else {
 967                         i2s_txctrl(i2s, 0);
 968                         i2s_fifo(i2s, FIC_TXFLUSH);
 969                 }
 970
 971                 spin_unlock_irqrestore(i2s->lock, flags);
 972                 pm_runtime_put(dai->dev);
 973                 break;
 974         }
 975
 976         return 0;
 977 }
 978
 979 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
 980         int div_id, int div)
 981 {
 982         struct i2s_dai *i2s = to_info(dai);
 983         struct i2s_dai *other = get_other_dai(i2s);
 984
 985         switch (div_id) {
 986         case SAMSUNG_I2S_DIV_BCLK:
 987                 pm_runtime_get_sync(dai->dev);
 988                 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
 989                         || (other && other->bfs && (other->bfs != div))) {
 990                         pm_runtime_put(dai->dev);
 991                         dev_err(&i2s->pdev->dev,
 992                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 993                         return -EAGAIN;
 994                 }
 995                 i2s->bfs = div;
 996                 pm_runtime_put(dai->dev);
 997                 break;
 998         default:
 999                 dev_err(&i2s->pdev->dev,
1000                         "Invalid clock divider(%d)\n", div_id);
1001                 return -EINVAL;
1002         }
1003
1004         return 0;
1005 }
1006
1007 static snd_pcm_sframes_t
1008 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
1009 {
1010         struct i2s_dai *i2s = to_info(dai);
1011         u32 reg = readl(i2s->addr + I2SFIC);
1012         snd_pcm_sframes_t delay;
1013         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
1014
1015         WARN_ON(!pm_runtime_active(dai->dev));
1016
1017         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
1018                 delay = FIC_RXCOUNT(reg);
1019         else if (is_secondary(i2s))
1020                 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
1021         else
1022                 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
1023
1024         return delay;
1025 }
1026
1027 #ifdef CONFIG_PM
1028 static int i2s_suspend(struct snd_soc_dai *dai)
1029 {
1030         return pm_runtime_force_suspend(dai->dev);
1031 }
1032
1033 static int i2s_resume(struct snd_soc_dai *dai)
1034 {
1035         return pm_runtime_force_resume(dai->dev);
1036 }
1037 #else
1038 #define i2s_suspend NULL
1039 #define i2s_resume  NULL
1040 #endif
1041
1042 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
1043 {
1044         struct i2s_dai *i2s = to_info(dai);
1045         struct i2s_dai *other = get_other_dai(i2s);
1046         unsigned long flags;
1047
1048         pm_runtime_get_sync(dai->dev);
1049
1050         if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
1051                 snd_soc_dai_init_dma_data(dai, &other->sec_dai->dma_playback,
1052                                            NULL);
1053         } else {
1054                 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback,
1055                                            &i2s->dma_capture);
1056
1057                 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1058                         writel(CON_RSTCLR, i2s->addr + I2SCON);
1059
1060                 if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
1061                         idma_reg_addr_init(i2s->addr,
1062                                         i2s->sec_dai->idma_playback.addr);
1063         }
1064
1065         /* Reset any constraint on RFS and BFS */
1066         i2s->rfs = 0;
1067         i2s->bfs = 0;
1068         i2s->rclk_srcrate = 0;
1069
1070         spin_lock_irqsave(i2s->lock, flags);
1071         i2s_txctrl(i2s, 0);
1072         i2s_rxctrl(i2s, 0);
1073         i2s_fifo(i2s, FIC_TXFLUSH);
1074         i2s_fifo(other, FIC_TXFLUSH);
1075         i2s_fifo(i2s, FIC_RXFLUSH);
1076         spin_unlock_irqrestore(i2s->lock, flags);
1077
1078         /* Gate CDCLK by default */
1079         if (!is_opened(other))
1080                 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1081                                 0, SND_SOC_CLOCK_IN);
1082         pm_runtime_put(dai->dev);
1083
1084         return 0;
1085 }
1086
1087 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1088 {
1089         struct i2s_dai *i2s = to_info(dai);
1090         unsigned long flags;
1091
1092         pm_runtime_get_sync(dai->dev);
1093
1094         if (!is_secondary(i2s)) {
1095                 if (i2s->quirks & QUIRK_NEED_RSTCLR) {
1096                         spin_lock_irqsave(i2s->lock, flags);
1097                         writel(0, i2s->addr + I2SCON);
1098                         spin_unlock_irqrestore(i2s->lock, flags);
1099                 }
1100         }
1101
1102         pm_runtime_put(dai->dev);
1103
1104         return 0;
1105 }
1106
1107 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1108         .trigger = i2s_trigger,
1109         .hw_params = i2s_hw_params,
1110         .set_fmt = i2s_set_fmt,
1111         .set_clkdiv = i2s_set_clkdiv,
1112         .set_sysclk = i2s_set_sysclk,
1113         .startup = i2s_startup,
1114         .shutdown = i2s_shutdown,
1115         .delay = i2s_delay,
1116 };
1117
1118 static const struct snd_soc_component_driver samsung_i2s_component = {
1119         .name           = "samsung-i2s",
1120 };
1121
1122 #define SAMSUNG_I2S_FMTS        (SNDRV_PCM_FMTBIT_S8 | \
1123                                         SNDRV_PCM_FMTBIT_S16_LE | \
1124                                         SNDRV_PCM_FMTBIT_S24_LE)
1125
1126 static int i2s_alloc_dais(struct samsung_i2s_priv *priv,
1127                           const struct samsung_i2s_dai_data *i2s_dai_data,
1128                           int num_dais)
1129 {
1130         static const char *dai_names[] = { "samsung-i2s", "samsung-i2s-sec" };
1131         struct snd_soc_dai_driver *dai_drv;
1132         struct i2s_dai *dai;
1133         int i;
1134
1135         priv->dai = devm_kcalloc(&priv->pdev->dev, num_dais,
1136                                      sizeof(*dai), GFP_KERNEL);
1137         if (!priv->dai)
1138                 return -ENOMEM;
1139
1140         priv->dai_drv = devm_kcalloc(&priv->pdev->dev, num_dais,
1141                                      sizeof(*dai_drv), GFP_KERNEL);
1142         if (!priv->dai_drv)
1143                 return -ENOMEM;
1144
1145         for (i = 0; i < num_dais; i++) {
1146                 dai_drv = &priv->dai_drv[i];
1147
1148                 dai_drv->probe = samsung_i2s_dai_probe;
1149                 dai_drv->remove = samsung_i2s_dai_remove;
1150                 dai_drv->suspend = i2s_suspend;
1151                 dai_drv->resume = i2s_resume;
1152
1153                 dai_drv->symmetric_rates = 1;
1154                 dai_drv->ops = &samsung_i2s_dai_ops;
1155
1156                 dai_drv->playback.channels_min = 1;
1157                 dai_drv->playback.channels_max = 2;
1158                 dai_drv->playback.rates = i2s_dai_data->pcm_rates;
1159                 dai_drv->playback.formats = SAMSUNG_I2S_FMTS;
1160
1161                 dai_drv->id = i + 1;
1162                 dai_drv->name = dai_names[i];
1163
1164                 priv->dai[i].drv = &priv->dai_drv[i];
1165                 priv->dai[i].pdev = priv->pdev;
1166         }
1167
1168         /* Initialize capture only for the primary DAI */
1169         dai_drv = &priv->dai_drv[SAMSUNG_I2S_ID_PRIMARY - 1];
1170
1171         dai_drv->capture.channels_min = 1;
1172         dai_drv->capture.channels_max = 2;
1173         dai_drv->capture.rates = i2s_dai_data->pcm_rates;
1174         dai_drv->capture.formats = SAMSUNG_I2S_FMTS;
1175
1176         return 0;
1177 }
1178
1179 #ifdef CONFIG_PM
1180 static int i2s_runtime_suspend(struct device *dev)
1181 {
1182         struct i2s_dai *i2s = samsung_i2s_get_pri_dai(dev);
1183
1184         i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
1185         i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
1186         i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
1187
1188         if (i2s->op_clk)
1189                 clk_disable_unprepare(i2s->op_clk);
1190         clk_disable_unprepare(i2s->clk);
1191
1192         return 0;
1193 }
1194
1195 static int i2s_runtime_resume(struct device *dev)
1196 {
1197         struct i2s_dai *i2s = samsung_i2s_get_pri_dai(dev);
1198         int ret;
1199
1200         ret = clk_prepare_enable(i2s->clk);
1201         if (ret)
1202                 return ret;
1203
1204         if (i2s->op_clk) {
1205                 ret = clk_prepare_enable(i2s->op_clk);
1206                 if (ret) {
1207                         clk_disable_unprepare(i2s->clk);
1208                         return ret;
1209                 }
1210         }
1211
1212         writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
1213         writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
1214         writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
1215
1216         return 0;
1217 }
1218 #endif /* CONFIG_PM */
1219
1220 static void i2s_unregister_clocks(struct samsung_i2s_priv *priv)
1221 {
1222         int i;
1223
1224         for (i = 0; i < priv->clk_data.clk_num; i++) {
1225                 if (!IS_ERR(priv->clk_table[i]))
1226                         clk_unregister(priv->clk_table[i]);
1227         }
1228 }
1229
1230 static void i2s_unregister_clock_provider(struct samsung_i2s_priv *priv)
1231 {
1232         of_clk_del_provider(priv->pdev->dev.of_node);
1233         i2s_unregister_clocks(priv);
1234 }
1235
1236
1237 static int i2s_register_clock_provider(struct samsung_i2s_priv *priv)
1238 {
1239
1240         const char * const i2s_clk_desc[] = { "cdclk", "rclk_src", "prescaler" };
1241         const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
1242         const char *p_names[2] = { NULL };
1243         struct device *dev = &priv->pdev->dev;
1244         struct i2s_dai *i2s = samsung_i2s_get_pri_dai(dev);
1245         const struct samsung_i2s_variant_regs *reg_info = i2s->variant_regs;
1246         const char *i2s_clk_name[ARRAY_SIZE(i2s_clk_desc)];
1247         struct clk *rclksrc;
1248         int ret, i;
1249
1250         /* Register the clock provider only if it's expected in the DTB */
1251         if (!of_find_property(dev->of_node, "#clock-cells", NULL))
1252                 return 0;
1253
1254         /* Get the RCLKSRC mux clock parent clock names */
1255         for (i = 0; i < ARRAY_SIZE(p_names); i++) {
1256                 rclksrc = clk_get(dev, clk_name[i]);
1257                 if (IS_ERR(rclksrc))
1258                         continue;
1259                 p_names[i] = __clk_get_name(rclksrc);
1260                 clk_put(rclksrc);
1261         }
1262
1263         for (i = 0; i < ARRAY_SIZE(i2s_clk_desc); i++) {
1264                 i2s_clk_name[i] = devm_kasprintf(dev, GFP_KERNEL, "%s_%s",
1265                                                 dev_name(dev), i2s_clk_desc[i]);
1266                 if (!i2s_clk_name[i])
1267                         return -ENOMEM;
1268         }
1269
1270         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
1271                 /* Activate the prescaler */
1272                 u32 val = readl(i2s->addr + I2SPSR);
1273                 writel(val | PSR_PSREN, i2s->addr + I2SPSR);
1274
1275                 priv->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev,
1276                                 i2s_clk_name[CLK_I2S_RCLK_SRC], p_names,
1277                                 ARRAY_SIZE(p_names),
1278                                 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
1279                                 i2s->addr + I2SMOD, reg_info->rclksrc_off,
1280                                 1, 0, i2s->lock);
1281
1282                 priv->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev,
1283                                 i2s_clk_name[CLK_I2S_RCLK_PSR],
1284                                 i2s_clk_name[CLK_I2S_RCLK_SRC],
1285                                 CLK_SET_RATE_PARENT,
1286                                 i2s->addr + I2SPSR, 8, 6, 0, i2s->lock);
1287
1288                 p_names[0] = i2s_clk_name[CLK_I2S_RCLK_PSR];
1289                 priv->clk_data.clk_num = 2;
1290         }
1291
1292         priv->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev,
1293                                 i2s_clk_name[CLK_I2S_CDCLK], p_names[0],
1294                                 CLK_SET_RATE_PARENT,
1295                                 i2s->addr + I2SMOD, reg_info->cdclkcon_off,
1296                                 CLK_GATE_SET_TO_DISABLE, i2s->lock);
1297
1298         priv->clk_data.clk_num += 1;
1299         priv->clk_data.clks = priv->clk_table;
1300
1301         ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1302                                   &priv->clk_data);
1303         if (ret < 0) {
1304                 dev_err(dev, "failed to add clock provider: %d\n", ret);
1305                 i2s_unregister_clocks(priv);
1306         }
1307
1308         return ret;
1309 }
1310
1311 /* Create platform device for the secondary PCM */
1312 static int i2s_create_secondary_device(struct samsung_i2s_priv *priv)
1313 {
1314         struct platform_device *pdev;
1315         int ret;
1316
1317         pdev = platform_device_register_simple("samsung-i2s-sec", -1, NULL, 0);
1318         if (!pdev)
1319                 return -ENOMEM;
1320
1321         ret = device_attach(&pdev->dev);
1322         if (ret < 0) {
1323                 dev_info(&pdev->dev, "device_attach() failed\n");
1324                 return ret;
1325         }
1326
1327         priv->pdev_sec = pdev;
1328
1329         return 0;
1330 }
1331
1332 static void i2s_delete_secondary_device(struct samsung_i2s_priv *priv)
1333 {
1334         if (priv->pdev_sec) {
1335                 platform_device_del(priv->pdev_sec);
1336                 priv->pdev_sec = NULL;
1337         }
1338 }
1339 static int samsung_i2s_probe(struct platform_device *pdev)
1340 {
1341         struct i2s_dai *pri_dai, *sec_dai = NULL;
1342         struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1343         struct resource *res;
1344         u32 regs_base, quirks = 0, idma_addr = 0;
1345         struct device_node *np = pdev->dev.of_node;
1346         const struct samsung_i2s_dai_data *i2s_dai_data;
1347         int num_dais, ret;
1348         struct samsung_i2s_priv *priv;
1349
1350         if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node)
1351                 i2s_dai_data = of_device_get_match_data(&pdev->dev);
1352         else
1353                 i2s_dai_data = (struct samsung_i2s_dai_data *)
1354                                 platform_get_device_id(pdev)->driver_data;
1355
1356         /* Nothing to do if it is the secondary device probe */
1357         if (!i2s_dai_data)
1358                 return 0;
1359
1360         priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
1361         if (!priv)
1362                 return -ENOMEM;
1363
1364         quirks = np ? i2s_dai_data->quirks : i2s_pdata->type.quirks;
1365         num_dais = (quirks & QUIRK_SEC_DAI) ? 2 : 1;
1366         priv->pdev = pdev;
1367
1368         ret = i2s_alloc_dais(priv, i2s_dai_data, num_dais);
1369         if (ret < 0)
1370                 return ret;
1371
1372         pri_dai = &priv->dai[SAMSUNG_I2S_ID_PRIMARY - 1];
1373
1374         spin_lock_init(&priv->spinlock);
1375         pri_dai->lock = &priv->spinlock;
1376
1377         if (!np) {
1378                 if (i2s_pdata == NULL) {
1379                         dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1380                         return -EINVAL;
1381                 }
1382
1383                 pri_dai->dma_playback.filter_data = i2s_pdata->dma_playback;
1384                 pri_dai->dma_capture.filter_data = i2s_pdata->dma_capture;
1385                 pri_dai->filter = i2s_pdata->dma_filter;
1386
1387                 idma_addr = i2s_pdata->type.idma_addr;
1388         } else {
1389                 if (of_property_read_u32(np, "samsung,idma-addr",
1390                                          &idma_addr)) {
1391                         if (quirks & QUIRK_SUPPORTS_IDMA) {
1392                                 dev_info(&pdev->dev, "idma address is not"\
1393                                                 "specified");
1394                         }
1395                 }
1396         }
1397
1398         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1399         pri_dai->addr = devm_ioremap_resource(&pdev->dev, res);
1400         if (IS_ERR(pri_dai->addr))
1401                 return PTR_ERR(pri_dai->addr);
1402
1403         regs_base = res->start;
1404
1405         pri_dai->clk = devm_clk_get(&pdev->dev, "iis");
1406         if (IS_ERR(pri_dai->clk)) {
1407                 dev_err(&pdev->dev, "Failed to get iis clock\n");
1408                 return PTR_ERR(pri_dai->clk);
1409         }
1410
1411         ret = clk_prepare_enable(pri_dai->clk);
1412         if (ret != 0) {
1413                 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1414                 return ret;
1415         }
1416         pri_dai->dma_playback.addr = regs_base + I2STXD;
1417         pri_dai->dma_capture.addr = regs_base + I2SRXD;
1418         pri_dai->dma_playback.chan_name = "tx";
1419         pri_dai->dma_capture.chan_name = "rx";
1420         pri_dai->dma_playback.addr_width = 4;
1421         pri_dai->dma_capture.addr_width = 4;
1422         pri_dai->quirks = quirks;
1423         pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
1424         pri_dai->priv = priv;
1425
1426         if (quirks & QUIRK_PRI_6CHAN)
1427                 pri_dai->drv->playback.channels_max = 6;
1428
1429         ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter,
1430                                                  NULL, NULL, NULL);
1431         if (ret < 0)
1432                 goto err_disable_clk;
1433
1434         if (quirks & QUIRK_SEC_DAI) {
1435                 sec_dai = &priv->dai[SAMSUNG_I2S_ID_SECONDARY - 1];
1436
1437                 sec_dai->lock = &priv->spinlock;
1438                 sec_dai->variant_regs = pri_dai->variant_regs;
1439                 sec_dai->dma_playback.addr = regs_base + I2STXDS;
1440                 sec_dai->dma_playback.chan_name = "tx-sec";
1441
1442                 if (!np) {
1443                         sec_dai->dma_playback.filter_data = i2s_pdata->dma_play_sec;
1444                         sec_dai->filter = i2s_pdata->dma_filter;
1445                 }
1446
1447                 sec_dai->dma_playback.addr_width = 4;
1448                 sec_dai->addr = pri_dai->addr;
1449                 sec_dai->clk = pri_dai->clk;
1450                 sec_dai->quirks = quirks;
1451                 sec_dai->idma_playback.addr = idma_addr;
1452                 sec_dai->pri_dai = pri_dai;
1453                 sec_dai->priv = priv;
1454                 pri_dai->sec_dai = sec_dai;
1455
1456                 ret = i2s_create_secondary_device(priv);
1457                 if (ret < 0)
1458                         goto err_disable_clk;
1459
1460                 ret = samsung_asoc_dma_platform_register(&priv->pdev_sec->dev,
1461                                                 sec_dai->filter, "tx-sec", NULL,
1462                                                 &pdev->dev);
1463                 if (ret < 0)
1464                         goto err_disable_clk;
1465
1466         }
1467
1468         if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1469                 dev_err(&pdev->dev, "Unable to configure gpio\n");
1470                 ret = -EINVAL;
1471                 goto err_disable_clk;
1472         }
1473
1474         dev_set_drvdata(&pdev->dev, priv);
1475
1476         ret = devm_snd_soc_register_component(&pdev->dev,
1477                                         &samsung_i2s_component,
1478                                         priv->dai_drv, num_dais);
1479         if (ret < 0)
1480                 goto err_disable_clk;
1481
1482         pm_runtime_set_active(&pdev->dev);
1483         pm_runtime_enable(&pdev->dev);
1484
1485         ret = i2s_register_clock_provider(priv);
1486         if (ret < 0)
1487                 goto err_disable_pm;
1488
1489         pri_dai->op_clk = clk_get_parent(priv->clk_table[CLK_I2S_RCLK_SRC]);
1490
1491         return 0;
1492
1493 err_disable_pm:
1494         pm_runtime_disable(&pdev->dev);
1495 err_disable_clk:
1496         clk_disable_unprepare(pri_dai->clk);
1497         i2s_delete_secondary_device(priv);
1498         return ret;
1499 }
1500
1501 static int samsung_i2s_remove(struct platform_device *pdev)
1502 {
1503         struct samsung_i2s_priv *priv = dev_get_drvdata(&pdev->dev);
1504         struct i2s_dai *pri_dai = samsung_i2s_get_pri_dai(&pdev->dev);
1505
1506         /* The secondary device has no driver data assigned */
1507         if (!priv)
1508                 return 0;
1509
1510         pm_runtime_get_sync(&pdev->dev);
1511         pm_runtime_disable(&pdev->dev);
1512
1513         i2s_unregister_clock_provider(priv);
1514         clk_disable_unprepare(pri_dai->clk);
1515         pm_runtime_put_noidle(&pdev->dev);
1516         i2s_delete_secondary_device(priv);
1517
1518         return 0;
1519 }
1520
1521 static const struct samsung_i2s_variant_regs i2sv3_regs = {
1522         .bfs_off = 1,
1523         .rfs_off = 3,
1524         .sdf_off = 5,
1525         .txr_off = 8,
1526         .rclksrc_off = 10,
1527         .mss_off = 11,
1528         .cdclkcon_off = 12,
1529         .lrp_off = 7,
1530         .bfs_mask = 0x3,
1531         .rfs_mask = 0x3,
1532         .ftx0cnt_off = 8,
1533 };
1534
1535 static const struct samsung_i2s_variant_regs i2sv6_regs = {
1536         .bfs_off = 0,
1537         .rfs_off = 4,
1538         .sdf_off = 6,
1539         .txr_off = 8,
1540         .rclksrc_off = 10,
1541         .mss_off = 11,
1542         .cdclkcon_off = 12,
1543         .lrp_off = 15,
1544         .bfs_mask = 0xf,
1545         .rfs_mask = 0x3,
1546         .ftx0cnt_off = 8,
1547 };
1548
1549 static const struct samsung_i2s_variant_regs i2sv7_regs = {
1550         .bfs_off = 0,
1551         .rfs_off = 4,
1552         .sdf_off = 7,
1553         .txr_off = 9,
1554         .rclksrc_off = 11,
1555         .mss_off = 12,
1556         .cdclkcon_off = 22,
1557         .lrp_off = 15,
1558         .bfs_mask = 0xf,
1559         .rfs_mask = 0x7,
1560         .ftx0cnt_off = 0,
1561 };
1562
1563 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1564         .bfs_off = 0,
1565         .rfs_off = 3,
1566         .sdf_off = 6,
1567         .txr_off = 8,
1568         .rclksrc_off = 10,
1569         .mss_off = 11,
1570         .cdclkcon_off = 12,
1571         .lrp_off = 15,
1572         .bfs_mask = 0x7,
1573         .rfs_mask = 0x7,
1574         .ftx0cnt_off = 8,
1575 };
1576
1577 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1578         .quirks = QUIRK_NO_MUXPSR,
1579         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1580         .i2s_variant_regs = &i2sv3_regs,
1581 };
1582
1583 static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1584         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1585                         QUIRK_SUPPORTS_IDMA,
1586         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1587         .i2s_variant_regs = &i2sv3_regs,
1588 };
1589
1590 static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1591         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1592                         QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1593         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1594         .i2s_variant_regs = &i2sv6_regs,
1595 };
1596
1597 static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1598         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1599                         QUIRK_SUPPORTS_TDM,
1600         .pcm_rates = SNDRV_PCM_RATE_8000_192000,
1601         .i2s_variant_regs = &i2sv7_regs,
1602 };
1603
1604 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1605         .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1606         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1607         .i2s_variant_regs = &i2sv5_i2s1_regs,
1608 };
1609
1610 static const struct platform_device_id samsung_i2s_driver_ids[] = {
1611         {
1612                 .name           = "samsung-i2s",
1613                 .driver_data    = (kernel_ulong_t)&i2sv3_dai_type,
1614         }, {
1615                 .name           = "samsung-i2s-sec",
1616         },
1617         {},
1618 };
1619 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1620
1621 #ifdef CONFIG_OF
1622 static const struct of_device_id exynos_i2s_match[] = {
1623         {
1624                 .compatible = "samsung,s3c6410-i2s",
1625                 .data = &i2sv3_dai_type,
1626         }, {
1627                 .compatible = "samsung,s5pv210-i2s",
1628                 .data = &i2sv5_dai_type,
1629         }, {
1630                 .compatible = "samsung,exynos5420-i2s",
1631                 .data = &i2sv6_dai_type,
1632         }, {
1633                 .compatible = "samsung,exynos7-i2s",
1634                 .data = &i2sv7_dai_type,
1635         }, {
1636                 .compatible = "samsung,exynos7-i2s1",
1637                 .data = &i2sv5_dai_type_i2s1,
1638         },
1639         {},
1640 };
1641 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1642 #endif
1643
1644 static const struct dev_pm_ops samsung_i2s_pm = {
1645         SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1646                                 i2s_runtime_resume, NULL)
1647         SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1648                                      pm_runtime_force_resume)
1649 };
1650
1651 static struct platform_driver samsung_i2s_driver = {
1652         .probe  = samsung_i2s_probe,
1653         .remove = samsung_i2s_remove,
1654         .id_table = samsung_i2s_driver_ids,
1655         .driver = {
1656                 .name = "samsung-i2s",
1657                 .of_match_table = of_match_ptr(exynos_i2s_match),
1658                 .pm = &samsung_i2s_pm,
1659         },
1660 };
1661
1662 module_platform_driver(samsung_i2s_driver);
1663
1664 /* Module information */
1665 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1666 MODULE_DESCRIPTION("Samsung I2S Interface");
1667 MODULE_ALIAS("platform:samsung-i2s");
1668 MODULE_LICENSE("GPL");