sound/soc/samsung/i2s.c

   1 /* sound/soc/samsung/i2s.c
   2  *
   3  * ALSA SoC Audio Layer - Samsung I2S Controller driver
   4  *
   5  * Copyright (c) 2010 Samsung Electronics Co. Ltd.
   6  *      Jaswinder Singh <jassisinghbrar@gmail.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <dt-bindings/sound/samsung-i2s.h>
  14 #include <linux/delay.h>
  15 #include <linux/slab.h>
  16 #include <linux/clk.h>
  17 #include <linux/clk-provider.h>
  18 #include <linux/io.h>
  19 #include <linux/module.h>
  20 #include <linux/of.h>
  21 #include <linux/of_device.h>
  22 #include <linux/of_gpio.h>
  23 #include <linux/pm_runtime.h>
  24
  25 #include <sound/soc.h>
  26 #include <sound/pcm_params.h>
  27
  28 #include <linux/platform_data/asoc-s3c.h>
  29
  30 #include "dma.h"
  31 #include "idma.h"
  32 #include "i2s.h"
  33 #include "i2s-regs.h"
  34
  35 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
  36
  37 #define SAMSUNG_I2S_ID_PRIMARY          1
  38 #define SAMSUNG_I2S_ID_SECONDARY        2
  39
  40 struct samsung_i2s_variant_regs {
  41         unsigned int    bfs_off;
  42         unsigned int    rfs_off;
  43         unsigned int    sdf_off;
  44         unsigned int    txr_off;
  45         unsigned int    rclksrc_off;
  46         unsigned int    mss_off;
  47         unsigned int    cdclkcon_off;
  48         unsigned int    lrp_off;
  49         unsigned int    bfs_mask;
  50         unsigned int    rfs_mask;
  51         unsigned int    ftx0cnt_off;
  52 };
  53
  54 struct samsung_i2s_dai_data {
  55         u32 quirks;
  56         unsigned int pcm_rates;
  57         const struct samsung_i2s_variant_regs *i2s_variant_regs;
  58 };
  59
  60 struct i2s_dai {
  61         /* Platform device for this DAI */
  62         struct platform_device *pdev;
  63         /* Memory mapped SFR region */
  64         void __iomem    *addr;
  65         /* Frame Clock */
  66         unsigned frmclk;
  67         /*
  68          * Specifically requested RCLK,BCLK by MACHINE Driver.
  69          * 0 indicates CPU driver is free to choose any value.
  70          */
  71         unsigned rfs, bfs;
  72         /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
  73         struct i2s_dai *pri_dai;
  74         /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
  75         struct i2s_dai *sec_dai;
  76 #define DAI_OPENED      (1 << 0) /* Dai is opened */
  77 #define DAI_MANAGER     (1 << 1) /* Dai is the manager */
  78         unsigned mode;
  79
  80         /* Driver for this DAI */
  81         struct snd_soc_dai_driver *drv;
  82
  83         /* DMA parameters */
  84         struct snd_dmaengine_dai_dma_data dma_playback;
  85         struct snd_dmaengine_dai_dma_data dma_capture;
  86         struct snd_dmaengine_dai_dma_data idma_playback;
  87         dma_filter_fn filter;
  88         u32     quirks;
  89         u32     suspend_i2smod;
  90         u32     suspend_i2scon;
  91         u32     suspend_i2spsr;
  92         const struct samsung_i2s_variant_regs *variant_regs;
  93
  94         spinlock_t *lock;
  95
  96         struct samsung_i2s_priv *priv;
  97 };
  98
  99 /* Lock for cross i/f checks */
 100 static DEFINE_SPINLOCK(lock);
 101
 102 struct samsung_i2s_priv {
 103         struct platform_device *pdev;
 104         struct platform_device *pdev_sec;
 105
 106         /* Spinlock protecting access to the device's registers */
 107         spinlock_t spinlock;
 108
 109         /* CPU DAIs and their corresponding drivers */
 110         struct i2s_dai *dai;
 111         struct snd_soc_dai_driver *dai_drv;
 112         int num_dais;
 113
 114         /* The I2S controller's core clock */
 115         struct clk *clk;
 116
 117         /* Clock for generating I2S signals */
 118         struct clk *op_clk;
 119
 120         /* Rate of RCLK source clock */
 121         unsigned long rclk_srcrate;
 122
 123         /* The clock provider's data */
 124         struct clk *clk_table[3];
 125         struct clk_onecell_data clk_data;
 126 };
 127
 128 struct i2s_dai *samsung_i2s_get_pri_dai(struct device *dev)
 129 {
 130         struct samsung_i2s_priv *priv = dev_get_drvdata(dev);
 131
 132         return &priv->dai[SAMSUNG_I2S_ID_PRIMARY - 1];
 133 }
 134
 135 /* Returns true if this is the 'overlay' stereo DAI */
 136 static inline bool is_secondary(struct i2s_dai *i2s)
 137 {
 138         return i2s->drv->id == SAMSUNG_I2S_ID_SECONDARY;
 139 }
 140
 141 /* If operating in SoC-Slave mode */
 142 static inline bool is_slave(struct i2s_dai *i2s)
 143 {
 144         u32 mod = readl(i2s->addr + I2SMOD);
 145         return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
 146 }
 147
 148 /* If this interface of the controller is transmitting data */
 149 static inline bool tx_active(struct i2s_dai *i2s)
 150 {
 151         u32 active;
 152
 153         if (!i2s)
 154                 return false;
 155
 156         active = readl(i2s->addr + I2SCON);
 157
 158         if (is_secondary(i2s))
 159                 active &= CON_TXSDMA_ACTIVE;
 160         else
 161                 active &= CON_TXDMA_ACTIVE;
 162
 163         return active ? true : false;
 164 }
 165
 166 /* Return pointer to the other DAI */
 167 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
 168 {
 169         return i2s->pri_dai ? : i2s->sec_dai;
 170 }
 171
 172 /* If the other interface of the controller is transmitting data */
 173 static inline bool other_tx_active(struct i2s_dai *i2s)
 174 {
 175         struct i2s_dai *other = get_other_dai(i2s);
 176
 177         return tx_active(other);
 178 }
 179
 180 /* If any interface of the controller is transmitting data */
 181 static inline bool any_tx_active(struct i2s_dai *i2s)
 182 {
 183         return tx_active(i2s) || other_tx_active(i2s);
 184 }
 185
 186 /* If this interface of the controller is receiving data */
 187 static inline bool rx_active(struct i2s_dai *i2s)
 188 {
 189         u32 active;
 190
 191         if (!i2s)
 192                 return false;
 193
 194         active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
 195
 196         return active ? true : false;
 197 }
 198
 199 /* If the other interface of the controller is receiving data */
 200 static inline bool other_rx_active(struct i2s_dai *i2s)
 201 {
 202         struct i2s_dai *other = get_other_dai(i2s);
 203
 204         return rx_active(other);
 205 }
 206
 207 /* If any interface of the controller is receiving data */
 208 static inline bool any_rx_active(struct i2s_dai *i2s)
 209 {
 210         return rx_active(i2s) || other_rx_active(i2s);
 211 }
 212
 213 /* If the other DAI is transmitting or receiving data */
 214 static inline bool other_active(struct i2s_dai *i2s)
 215 {
 216         return other_rx_active(i2s) || other_tx_active(i2s);
 217 }
 218
 219 /* If this DAI is transmitting or receiving data */
 220 static inline bool this_active(struct i2s_dai *i2s)
 221 {
 222         return tx_active(i2s) || rx_active(i2s);
 223 }
 224
 225 /* If the controller is active anyway */
 226 static inline bool any_active(struct i2s_dai *i2s)
 227 {
 228         return this_active(i2s) || other_active(i2s);
 229 }
 230
 231 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
 232 {
 233         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
 234
 235         return &priv->dai[dai->id - 1];
 236 }
 237
 238 static inline bool is_opened(struct i2s_dai *i2s)
 239 {
 240         if (i2s && (i2s->mode & DAI_OPENED))
 241                 return true;
 242         else
 243                 return false;
 244 }
 245
 246 static inline bool is_manager(struct i2s_dai *i2s)
 247 {
 248         if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
 249                 return true;
 250         else
 251                 return false;
 252 }
 253
 254 /* Read RCLK of I2S (in multiples of LRCLK) */
 255 static inline unsigned get_rfs(struct i2s_dai *i2s)
 256 {
 257         u32 rfs;
 258         rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
 259         rfs &= i2s->variant_regs->rfs_mask;
 260
 261         switch (rfs) {
 262         case 7: return 192;
 263         case 6: return 96;
 264         case 5: return 128;
 265         case 4: return 64;
 266         case 3: return 768;
 267         case 2: return 384;
 268         case 1: return 512;
 269         default: return 256;
 270         }
 271 }
 272
 273 /* Write RCLK of I2S (in multiples of LRCLK) */
 274 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
 275 {
 276         u32 mod = readl(i2s->addr + I2SMOD);
 277         int rfs_shift = i2s->variant_regs->rfs_off;
 278
 279         mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
 280
 281         switch (rfs) {
 282         case 192:
 283                 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
 284                 break;
 285         case 96:
 286                 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
 287                 break;
 288         case 128:
 289                 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
 290                 break;
 291         case 64:
 292                 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
 293                 break;
 294         case 768:
 295                 mod |= (MOD_RCLK_768FS << rfs_shift);
 296                 break;
 297         case 512:
 298                 mod |= (MOD_RCLK_512FS << rfs_shift);
 299                 break;
 300         case 384:
 301                 mod |= (MOD_RCLK_384FS << rfs_shift);
 302                 break;
 303         default:
 304                 mod |= (MOD_RCLK_256FS << rfs_shift);
 305                 break;
 306         }
 307
 308         writel(mod, i2s->addr + I2SMOD);
 309 }
 310
 311 /* Read Bit-Clock of I2S (in multiples of LRCLK) */
 312 static inline unsigned get_bfs(struct i2s_dai *i2s)
 313 {
 314         u32 bfs;
 315         bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
 316         bfs &= i2s->variant_regs->bfs_mask;
 317
 318         switch (bfs) {
 319         case 8: return 256;
 320         case 7: return 192;
 321         case 6: return 128;
 322         case 5: return 96;
 323         case 4: return 64;
 324         case 3: return 24;
 325         case 2: return 16;
 326         case 1: return 48;
 327         default: return 32;
 328         }
 329 }
 330
 331 /* Write Bit-Clock of I2S (in multiples of LRCLK) */
 332 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
 333 {
 334         u32 mod = readl(i2s->addr + I2SMOD);
 335         int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
 336         int bfs_shift = i2s->variant_regs->bfs_off;
 337
 338         /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
 339         if (!tdm && bfs > 48) {
 340                 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
 341                 return;
 342         }
 343
 344         mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
 345
 346         switch (bfs) {
 347         case 48:
 348                 mod |= (MOD_BCLK_48FS << bfs_shift);
 349                 break;
 350         case 32:
 351                 mod |= (MOD_BCLK_32FS << bfs_shift);
 352                 break;
 353         case 24:
 354                 mod |= (MOD_BCLK_24FS << bfs_shift);
 355                 break;
 356         case 16:
 357                 mod |= (MOD_BCLK_16FS << bfs_shift);
 358                 break;
 359         case 64:
 360                 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
 361                 break;
 362         case 96:
 363                 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
 364                 break;
 365         case 128:
 366                 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
 367                 break;
 368         case 192:
 369                 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
 370                 break;
 371         case 256:
 372                 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
 373                 break;
 374         default:
 375                 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
 376                 return;
 377         }
 378
 379         writel(mod, i2s->addr + I2SMOD);
 380 }
 381
 382 /* Sample-Size */
 383 static inline int get_blc(struct i2s_dai *i2s)
 384 {
 385         int blc = readl(i2s->addr + I2SMOD);
 386
 387         blc = (blc >> 13) & 0x3;
 388
 389         switch (blc) {
 390         case 2: return 24;
 391         case 1: return 8;
 392         default: return 16;
 393         }
 394 }
 395
 396 /* TX Channel Control */
 397 static void i2s_txctrl(struct i2s_dai *i2s, int on)
 398 {
 399         void __iomem *addr = i2s->addr;
 400         int txr_off = i2s->variant_regs->txr_off;
 401         u32 con = readl(addr + I2SCON);
 402         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
 403
 404         if (on) {
 405                 con |= CON_ACTIVE;
 406                 con &= ~CON_TXCH_PAUSE;
 407
 408                 if (is_secondary(i2s)) {
 409                         con |= CON_TXSDMA_ACTIVE;
 410                         con &= ~CON_TXSDMA_PAUSE;
 411                 } else {
 412                         con |= CON_TXDMA_ACTIVE;
 413                         con &= ~CON_TXDMA_PAUSE;
 414                 }
 415
 416                 if (any_rx_active(i2s))
 417                         mod |= 2 << txr_off;
 418                 else
 419                         mod |= 0 << txr_off;
 420         } else {
 421                 if (is_secondary(i2s)) {
 422                         con |=  CON_TXSDMA_PAUSE;
 423                         con &= ~CON_TXSDMA_ACTIVE;
 424                 } else {
 425                         con |=  CON_TXDMA_PAUSE;
 426                         con &= ~CON_TXDMA_ACTIVE;
 427                 }
 428
 429                 if (other_tx_active(i2s)) {
 430                         writel(con, addr + I2SCON);
 431                         return;
 432                 }
 433
 434                 con |=  CON_TXCH_PAUSE;
 435
 436                 if (any_rx_active(i2s))
 437                         mod |= 1 << txr_off;
 438                 else
 439                         con &= ~CON_ACTIVE;
 440         }
 441
 442         writel(mod, addr + I2SMOD);
 443         writel(con, addr + I2SCON);
 444 }
 445
 446 /* RX Channel Control */
 447 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
 448 {
 449         void __iomem *addr = i2s->addr;
 450         int txr_off = i2s->variant_regs->txr_off;
 451         u32 con = readl(addr + I2SCON);
 452         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
 453
 454         if (on) {
 455                 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
 456                 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
 457
 458                 if (any_tx_active(i2s))
 459                         mod |= 2 << txr_off;
 460                 else
 461                         mod |= 1 << txr_off;
 462         } else {
 463                 con |=  CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
 464                 con &= ~CON_RXDMA_ACTIVE;
 465
 466                 if (any_tx_active(i2s))
 467                         mod |= 0 << txr_off;
 468                 else
 469                         con &= ~CON_ACTIVE;
 470         }
 471
 472         writel(mod, addr + I2SMOD);
 473         writel(con, addr + I2SCON);
 474 }
 475
 476 /* Flush FIFO of an interface */
 477 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
 478 {
 479         void __iomem *fic;
 480         u32 val;
 481
 482         if (!i2s)
 483                 return;
 484
 485         if (is_secondary(i2s))
 486                 fic = i2s->addr + I2SFICS;
 487         else
 488                 fic = i2s->addr + I2SFIC;
 489
 490         /* Flush the FIFO */
 491         writel(readl(fic) | flush, fic);
 492
 493         /* Be patient */
 494         val = msecs_to_loops(1) / 1000; /* 1 usec */
 495         while (--val)
 496                 cpu_relax();
 497
 498         writel(readl(fic) & ~flush, fic);
 499 }
 500
 501 static int i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id, unsigned int rfs,
 502                           int dir)
 503 {
 504         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
 505         struct i2s_dai *i2s = to_info(dai);
 506         struct i2s_dai *other = get_other_dai(i2s);
 507         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
 508         unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
 509         unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
 510         u32 mod, mask, val = 0;
 511         unsigned long flags;
 512         int ret = 0;
 513
 514         pm_runtime_get_sync(dai->dev);
 515
 516         spin_lock_irqsave(i2s->lock, flags);
 517         mod = readl(i2s->addr + I2SMOD);
 518         spin_unlock_irqrestore(i2s->lock, flags);
 519
 520         switch (clk_id) {
 521         case SAMSUNG_I2S_OPCLK:
 522                 mask = MOD_OPCLK_MASK;
 523                 val = (dir << MOD_OPCLK_SHIFT) & MOD_OPCLK_MASK;
 524                 break;
 525         case SAMSUNG_I2S_CDCLK:
 526                 mask = 1 << i2s_regs->cdclkcon_off;
 527                 /* Shouldn't matter in GATING(CLOCK_IN) mode */
 528                 if (dir == SND_SOC_CLOCK_IN)
 529                         rfs = 0;
 530
 531                 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
 532                                 (any_active(i2s) &&
 533                                 (((dir == SND_SOC_CLOCK_IN)
 534                                         && !(mod & cdcon_mask)) ||
 535                                 ((dir == SND_SOC_CLOCK_OUT)
 536                                         && (mod & cdcon_mask))))) {
 537                         dev_err(&i2s->pdev->dev,
 538                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 539                         ret = -EAGAIN;
 540                         goto err;
 541                 }
 542
 543                 if (dir == SND_SOC_CLOCK_IN)
 544                         val = 1 << i2s_regs->cdclkcon_off;
 545
 546                 i2s->rfs = rfs;
 547                 break;
 548
 549         case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
 550         case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
 551                 mask = 1 << i2s_regs->rclksrc_off;
 552
 553                 if ((i2s->quirks & QUIRK_NO_MUXPSR)
 554                                 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
 555                         clk_id = 0;
 556                 else
 557                         clk_id = 1;
 558
 559                 if (!any_active(i2s)) {
 560                         if (priv->op_clk && !IS_ERR(priv->op_clk)) {
 561                                 if ((clk_id && !(mod & rsrc_mask)) ||
 562                                         (!clk_id && (mod & rsrc_mask))) {
 563                                         clk_disable_unprepare(priv->op_clk);
 564                                         clk_put(priv->op_clk);
 565                                 } else {
 566                                         priv->rclk_srcrate =
 567                                                 clk_get_rate(priv->op_clk);
 568                                         goto done;
 569                                 }
 570                         }
 571
 572                         if (clk_id)
 573                                 priv->op_clk = clk_get(&i2s->pdev->dev,
 574                                                 "i2s_opclk1");
 575                         else
 576                                 priv->op_clk = clk_get(&i2s->pdev->dev,
 577                                                 "i2s_opclk0");
 578
 579                         if (WARN_ON(IS_ERR(priv->op_clk))) {
 580                                 ret = PTR_ERR(priv->op_clk);
 581                                 priv->op_clk = NULL;
 582                                 goto err;
 583                         }
 584
 585                         ret = clk_prepare_enable(priv->op_clk);
 586                         if (ret) {
 587                                 clk_put(priv->op_clk);
 588                                 priv->op_clk = NULL;
 589                                 goto err;
 590                         }
 591                         priv->rclk_srcrate = clk_get_rate(priv->op_clk);
 592
 593                 } else if ((!clk_id && (mod & rsrc_mask))
 594                                 || (clk_id && !(mod & rsrc_mask))) {
 595                         dev_err(&i2s->pdev->dev,
 596                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 597                         ret = -EAGAIN;
 598                         goto err;
 599                 } else {
 600                         /* Call can't be on the active DAI */
 601                         goto done;
 602                 }
 603
 604                 if (clk_id == 1)
 605                         val = 1 << i2s_regs->rclksrc_off;
 606                 break;
 607         default:
 608                 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
 609                 ret = -EINVAL;
 610                 goto err;
 611         }
 612
 613         spin_lock_irqsave(i2s->lock, flags);
 614         mod = readl(i2s->addr + I2SMOD);
 615         mod = (mod & ~mask) | val;
 616         writel(mod, i2s->addr + I2SMOD);
 617         spin_unlock_irqrestore(i2s->lock, flags);
 618 done:
 619         pm_runtime_put(dai->dev);
 620
 621         return 0;
 622 err:
 623         pm_runtime_put(dai->dev);
 624         return ret;
 625 }
 626
 627 static int i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 628 {
 629         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
 630         struct i2s_dai *i2s = to_info(dai);
 631         int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
 632         u32 mod, tmp = 0;
 633         unsigned long flags;
 634
 635         lrp_shift = i2s->variant_regs->lrp_off;
 636         sdf_shift = i2s->variant_regs->sdf_off;
 637         mod_slave = 1 << i2s->variant_regs->mss_off;
 638
 639         sdf_mask = MOD_SDF_MASK << sdf_shift;
 640         lrp_rlow = MOD_LR_RLOW << lrp_shift;
 641
 642         /* Format is priority */
 643         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 644         case SND_SOC_DAIFMT_RIGHT_J:
 645                 tmp |= lrp_rlow;
 646                 tmp |= (MOD_SDF_MSB << sdf_shift);
 647                 break;
 648         case SND_SOC_DAIFMT_LEFT_J:
 649                 tmp |= lrp_rlow;
 650                 tmp |= (MOD_SDF_LSB << sdf_shift);
 651                 break;
 652         case SND_SOC_DAIFMT_I2S:
 653                 tmp |= (MOD_SDF_IIS << sdf_shift);
 654                 break;
 655         default:
 656                 dev_err(&i2s->pdev->dev, "Format not supported\n");
 657                 return -EINVAL;
 658         }
 659
 660         /*
 661          * INV flag is relative to the FORMAT flag - if set it simply
 662          * flips the polarity specified by the Standard
 663          */
 664         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 665         case SND_SOC_DAIFMT_NB_NF:
 666                 break;
 667         case SND_SOC_DAIFMT_NB_IF:
 668                 if (tmp & lrp_rlow)
 669                         tmp &= ~lrp_rlow;
 670                 else
 671                         tmp |= lrp_rlow;
 672                 break;
 673         default:
 674                 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
 675                 return -EINVAL;
 676         }
 677
 678         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 679         case SND_SOC_DAIFMT_CBM_CFM:
 680                 tmp |= mod_slave;
 681                 break;
 682         case SND_SOC_DAIFMT_CBS_CFS:
 683                 /*
 684                  * Set default source clock in Master mode, only when the
 685                  * CLK_I2S_RCLK_SRC clock is not exposed so we ensure any
 686                  * clock configuration assigned in DT is not overwritten.
 687                  */
 688                 if (priv->rclk_srcrate == 0 && priv->clk_data.clks == NULL)
 689                         i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
 690                                                         0, SND_SOC_CLOCK_IN);
 691                 break;
 692         default:
 693                 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
 694                 return -EINVAL;
 695         }
 696
 697         pm_runtime_get_sync(dai->dev);
 698         spin_lock_irqsave(i2s->lock, flags);
 699         mod = readl(i2s->addr + I2SMOD);
 700         /*
 701          * Don't change the I2S mode if any controller is active on this
 702          * channel.
 703          */
 704         if (any_active(i2s) &&
 705                 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
 706                 spin_unlock_irqrestore(i2s->lock, flags);
 707                 pm_runtime_put(dai->dev);
 708                 dev_err(&i2s->pdev->dev,
 709                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 710                 return -EAGAIN;
 711         }
 712
 713         mod &= ~(sdf_mask | lrp_rlow | mod_slave);
 714         mod |= tmp;
 715         writel(mod, i2s->addr + I2SMOD);
 716         spin_unlock_irqrestore(i2s->lock, flags);
 717         pm_runtime_put(dai->dev);
 718
 719         return 0;
 720 }
 721
 722 static int i2s_hw_params(struct snd_pcm_substream *substream,
 723         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 724 {
 725         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
 726         struct i2s_dai *i2s = to_info(dai);
 727         u32 mod, mask = 0, val = 0;
 728         struct clk *rclksrc;
 729         unsigned long flags;
 730
 731         WARN_ON(!pm_runtime_active(dai->dev));
 732
 733         if (!is_secondary(i2s))
 734                 mask |= (MOD_DC2_EN | MOD_DC1_EN);
 735
 736         switch (params_channels(params)) {
 737         case 6:
 738                 val |= MOD_DC2_EN;
 739         case 4:
 740                 val |= MOD_DC1_EN;
 741                 break;
 742         case 2:
 743                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 744                         i2s->dma_playback.addr_width = 4;
 745                 else
 746                         i2s->dma_capture.addr_width = 4;
 747                 break;
 748         case 1:
 749                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 750                         i2s->dma_playback.addr_width = 2;
 751                 else
 752                         i2s->dma_capture.addr_width = 2;
 753
 754                 break;
 755         default:
 756                 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
 757                                 params_channels(params));
 758                 return -EINVAL;
 759         }
 760
 761         if (is_secondary(i2s))
 762                 mask |= MOD_BLCS_MASK;
 763         else
 764                 mask |= MOD_BLCP_MASK;
 765
 766         if (is_manager(i2s))
 767                 mask |= MOD_BLC_MASK;
 768
 769         switch (params_width(params)) {
 770         case 8:
 771                 if (is_secondary(i2s))
 772                         val |= MOD_BLCS_8BIT;
 773                 else
 774                         val |= MOD_BLCP_8BIT;
 775                 if (is_manager(i2s))
 776                         val |= MOD_BLC_8BIT;
 777                 break;
 778         case 16:
 779                 if (is_secondary(i2s))
 780                         val |= MOD_BLCS_16BIT;
 781                 else
 782                         val |= MOD_BLCP_16BIT;
 783                 if (is_manager(i2s))
 784                         val |= MOD_BLC_16BIT;
 785                 break;
 786         case 24:
 787                 if (is_secondary(i2s))
 788                         val |= MOD_BLCS_24BIT;
 789                 else
 790                         val |= MOD_BLCP_24BIT;
 791                 if (is_manager(i2s))
 792                         val |= MOD_BLC_24BIT;
 793                 break;
 794         default:
 795                 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
 796                                 params_format(params));
 797                 return -EINVAL;
 798         }
 799
 800         spin_lock_irqsave(i2s->lock, flags);
 801         mod = readl(i2s->addr + I2SMOD);
 802         mod = (mod & ~mask) | val;
 803         writel(mod, i2s->addr + I2SMOD);
 804         spin_unlock_irqrestore(i2s->lock, flags);
 805
 806         snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
 807
 808         i2s->frmclk = params_rate(params);
 809
 810         rclksrc = priv->clk_table[CLK_I2S_RCLK_SRC];
 811         if (rclksrc && !IS_ERR(rclksrc))
 812                 priv->rclk_srcrate = clk_get_rate(rclksrc);
 813
 814         return 0;
 815 }
 816
 817 /* We set constraints on the substream acc to the version of I2S */
 818 static int i2s_startup(struct snd_pcm_substream *substream,
 819           struct snd_soc_dai *dai)
 820 {
 821         struct i2s_dai *i2s = to_info(dai);
 822         struct i2s_dai *other = get_other_dai(i2s);
 823         unsigned long flags;
 824
 825         pm_runtime_get_sync(dai->dev);
 826
 827         spin_lock_irqsave(&lock, flags);
 828
 829         i2s->mode |= DAI_OPENED;
 830
 831         if (is_manager(other))
 832                 i2s->mode &= ~DAI_MANAGER;
 833         else
 834                 i2s->mode |= DAI_MANAGER;
 835
 836         if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
 837                 writel(CON_RSTCLR, i2s->addr + I2SCON);
 838
 839         spin_unlock_irqrestore(&lock, flags);
 840
 841         return 0;
 842 }
 843
 844 static void i2s_shutdown(struct snd_pcm_substream *substream,
 845         struct snd_soc_dai *dai)
 846 {
 847         struct i2s_dai *i2s = to_info(dai);
 848         struct i2s_dai *other = get_other_dai(i2s);
 849         unsigned long flags;
 850
 851         spin_lock_irqsave(&lock, flags);
 852
 853         i2s->mode &= ~DAI_OPENED;
 854         i2s->mode &= ~DAI_MANAGER;
 855
 856         if (is_opened(other))
 857                 other->mode |= DAI_MANAGER;
 858
 859         /* Reset any constraint on RFS and BFS */
 860         i2s->rfs = 0;
 861         i2s->bfs = 0;
 862
 863         spin_unlock_irqrestore(&lock, flags);
 864
 865         pm_runtime_put(dai->dev);
 866 }
 867
 868 static int config_setup(struct i2s_dai *i2s)
 869 {
 870         struct samsung_i2s_priv *priv = i2s->priv;
 871         struct i2s_dai *other = get_other_dai(i2s);
 872         unsigned rfs, bfs, blc;
 873         u32 psr;
 874
 875         blc = get_blc(i2s);
 876
 877         bfs = i2s->bfs;
 878
 879         if (!bfs && other)
 880                 bfs = other->bfs;
 881
 882         /* Select least possible multiple(2) if no constraint set */
 883         if (!bfs)
 884                 bfs = blc * 2;
 885
 886         rfs = i2s->rfs;
 887
 888         if (!rfs && other)
 889                 rfs = other->rfs;
 890
 891         if ((rfs == 256 || rfs == 512) && (blc == 24)) {
 892                 dev_err(&i2s->pdev->dev,
 893                         "%d-RFS not supported for 24-blc\n", rfs);
 894                 return -EINVAL;
 895         }
 896
 897         if (!rfs) {
 898                 if (bfs == 16 || bfs == 32)
 899                         rfs = 256;
 900                 else
 901                         rfs = 384;
 902         }
 903
 904         /* If already setup and running */
 905         if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
 906                 dev_err(&i2s->pdev->dev,
 907                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 908                 return -EAGAIN;
 909         }
 910
 911         set_bfs(i2s, bfs);
 912         set_rfs(i2s, rfs);
 913
 914         /* Don't bother with PSR in Slave mode */
 915         if (is_slave(i2s))
 916                 return 0;
 917
 918         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
 919                 psr = priv->rclk_srcrate / i2s->frmclk / rfs;
 920                 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
 921                 dev_dbg(&i2s->pdev->dev,
 922                         "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
 923                                 priv->rclk_srcrate, psr, rfs, bfs);
 924         }
 925
 926         return 0;
 927 }
 928
 929 static int i2s_trigger(struct snd_pcm_substream *substream,
 930         int cmd, struct snd_soc_dai *dai)
 931 {
 932         int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
 933         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 934         struct i2s_dai *i2s = to_info(rtd->cpu_dai);
 935         unsigned long flags;
 936
 937         switch (cmd) {
 938         case SNDRV_PCM_TRIGGER_START:
 939         case SNDRV_PCM_TRIGGER_RESUME:
 940         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 941                 pm_runtime_get_sync(dai->dev);
 942                 spin_lock_irqsave(i2s->lock, flags);
 943
 944                 if (config_setup(i2s)) {
 945                         spin_unlock_irqrestore(i2s->lock, flags);
 946                         return -EINVAL;
 947                 }
 948
 949                 if (capture)
 950                         i2s_rxctrl(i2s, 1);
 951                 else
 952                         i2s_txctrl(i2s, 1);
 953
 954                 spin_unlock_irqrestore(i2s->lock, flags);
 955                 break;
 956         case SNDRV_PCM_TRIGGER_STOP:
 957         case SNDRV_PCM_TRIGGER_SUSPEND:
 958         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 959                 spin_lock_irqsave(i2s->lock, flags);
 960
 961                 if (capture) {
 962                         i2s_rxctrl(i2s, 0);
 963                         i2s_fifo(i2s, FIC_RXFLUSH);
 964                 } else {
 965                         i2s_txctrl(i2s, 0);
 966                         i2s_fifo(i2s, FIC_TXFLUSH);
 967                 }
 968
 969                 spin_unlock_irqrestore(i2s->lock, flags);
 970                 pm_runtime_put(dai->dev);
 971                 break;
 972         }
 973
 974         return 0;
 975 }
 976
 977 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
 978         int div_id, int div)
 979 {
 980         struct i2s_dai *i2s = to_info(dai);
 981         struct i2s_dai *other = get_other_dai(i2s);
 982
 983         switch (div_id) {
 984         case SAMSUNG_I2S_DIV_BCLK:
 985                 pm_runtime_get_sync(dai->dev);
 986                 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
 987                         || (other && other->bfs && (other->bfs != div))) {
 988                         pm_runtime_put(dai->dev);
 989                         dev_err(&i2s->pdev->dev,
 990                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 991                         return -EAGAIN;
 992                 }
 993                 i2s->bfs = div;
 994                 pm_runtime_put(dai->dev);
 995                 break;
 996         default:
 997                 dev_err(&i2s->pdev->dev,
 998                         "Invalid clock divider(%d)\n", div_id);
 999                 return -EINVAL;
1000         }
1001
1002         return 0;
1003 }
1004
1005 static snd_pcm_sframes_t
1006 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
1007 {
1008         struct i2s_dai *i2s = to_info(dai);
1009         u32 reg = readl(i2s->addr + I2SFIC);
1010         snd_pcm_sframes_t delay;
1011         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
1012
1013         WARN_ON(!pm_runtime_active(dai->dev));
1014
1015         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
1016                 delay = FIC_RXCOUNT(reg);
1017         else if (is_secondary(i2s))
1018                 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
1019         else
1020                 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
1021
1022         return delay;
1023 }
1024
1025 #ifdef CONFIG_PM
1026 static int i2s_suspend(struct snd_soc_dai *dai)
1027 {
1028         return pm_runtime_force_suspend(dai->dev);
1029 }
1030
1031 static int i2s_resume(struct snd_soc_dai *dai)
1032 {
1033         return pm_runtime_force_resume(dai->dev);
1034 }
1035 #else
1036 #define i2s_suspend NULL
1037 #define i2s_resume  NULL
1038 #endif
1039
1040 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
1041 {
1042         struct i2s_dai *i2s = to_info(dai);
1043         struct i2s_dai *other = get_other_dai(i2s);
1044         unsigned long flags;
1045
1046         pm_runtime_get_sync(dai->dev);
1047
1048         if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
1049                 snd_soc_dai_init_dma_data(dai, &other->sec_dai->dma_playback,
1050                                            NULL);
1051         } else {
1052                 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback,
1053                                            &i2s->dma_capture);
1054
1055                 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1056                         writel(CON_RSTCLR, i2s->addr + I2SCON);
1057
1058                 if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
1059                         idma_reg_addr_init(i2s->addr,
1060                                         i2s->sec_dai->idma_playback.addr);
1061         }
1062
1063         /* Reset any constraint on RFS and BFS */
1064         i2s->rfs = 0;
1065         i2s->bfs = 0;
1066
1067         spin_lock_irqsave(i2s->lock, flags);
1068         i2s_txctrl(i2s, 0);
1069         i2s_rxctrl(i2s, 0);
1070         i2s_fifo(i2s, FIC_TXFLUSH);
1071         i2s_fifo(other, FIC_TXFLUSH);
1072         i2s_fifo(i2s, FIC_RXFLUSH);
1073         spin_unlock_irqrestore(i2s->lock, flags);
1074
1075         /* Gate CDCLK by default */
1076         if (!is_opened(other))
1077                 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1078                                 0, SND_SOC_CLOCK_IN);
1079         pm_runtime_put(dai->dev);
1080
1081         return 0;
1082 }
1083
1084 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1085 {
1086         struct i2s_dai *i2s = to_info(dai);
1087         unsigned long flags;
1088
1089         pm_runtime_get_sync(dai->dev);
1090
1091         if (!is_secondary(i2s)) {
1092                 if (i2s->quirks & QUIRK_NEED_RSTCLR) {
1093                         spin_lock_irqsave(i2s->lock, flags);
1094                         writel(0, i2s->addr + I2SCON);
1095                         spin_unlock_irqrestore(i2s->lock, flags);
1096                 }
1097         }
1098
1099         pm_runtime_put(dai->dev);
1100
1101         return 0;
1102 }
1103
1104 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1105         .trigger = i2s_trigger,
1106         .hw_params = i2s_hw_params,
1107         .set_fmt = i2s_set_fmt,
1108         .set_clkdiv = i2s_set_clkdiv,
1109         .set_sysclk = i2s_set_sysclk,
1110         .startup = i2s_startup,
1111         .shutdown = i2s_shutdown,
1112         .delay = i2s_delay,
1113 };
1114
1115 static const struct snd_soc_dapm_widget samsung_i2s_widgets[] = {
1116         /* Backend DAI  */
1117         SND_SOC_DAPM_AIF_OUT("Mixer DAI TX", NULL, 0, SND_SOC_NOPM, 0, 0),
1118         SND_SOC_DAPM_AIF_IN("Mixer DAI RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1119
1120         /* Playback Mixer */
1121         SND_SOC_DAPM_MIXER("Playback Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
1122 };
1123
1124 static const struct snd_soc_dapm_route samsung_i2s_dapm_routes[] = {
1125         { "Playback Mixer", NULL, "Primary" },
1126         { "Playback Mixer", NULL, "Secondary" },
1127
1128         { "Mixer DAI TX", NULL, "Playback Mixer" },
1129         { "Playback Mixer", NULL, "Mixer DAI RX" },
1130 };
1131
1132 static const struct snd_soc_component_driver samsung_i2s_component = {
1133         .name = "samsung-i2s",
1134
1135         .dapm_widgets = samsung_i2s_widgets,
1136         .num_dapm_widgets = ARRAY_SIZE(samsung_i2s_widgets),
1137
1138         .dapm_routes = samsung_i2s_dapm_routes,
1139         .num_dapm_routes = ARRAY_SIZE(samsung_i2s_dapm_routes),
1140 };
1141
1142 #define SAMSUNG_I2S_FMTS        (SNDRV_PCM_FMTBIT_S8 | \
1143                                         SNDRV_PCM_FMTBIT_S16_LE | \
1144                                         SNDRV_PCM_FMTBIT_S24_LE)
1145
1146 static int i2s_alloc_dais(struct samsung_i2s_priv *priv,
1147                           const struct samsung_i2s_dai_data *i2s_dai_data,
1148                           int num_dais)
1149 {
1150         static const char *dai_names[] = { "samsung-i2s", "samsung-i2s-sec" };
1151         static const char *stream_names[] = { "Primary", "Secondary" };
1152         struct snd_soc_dai_driver *dai_drv;
1153         struct i2s_dai *dai;
1154         int i;
1155
1156         priv->dai = devm_kcalloc(&priv->pdev->dev, num_dais,
1157                                      sizeof(*dai), GFP_KERNEL);
1158         if (!priv->dai)
1159                 return -ENOMEM;
1160
1161         priv->dai_drv = devm_kcalloc(&priv->pdev->dev, num_dais,
1162                                      sizeof(*dai_drv), GFP_KERNEL);
1163         if (!priv->dai_drv)
1164                 return -ENOMEM;
1165
1166         for (i = 0; i < num_dais; i++) {
1167                 dai_drv = &priv->dai_drv[i];
1168
1169                 dai_drv->probe = samsung_i2s_dai_probe;
1170                 dai_drv->remove = samsung_i2s_dai_remove;
1171                 dai_drv->suspend = i2s_suspend;
1172                 dai_drv->resume = i2s_resume;
1173
1174                 dai_drv->symmetric_rates = 1;
1175                 dai_drv->ops = &samsung_i2s_dai_ops;
1176
1177                 dai_drv->playback.channels_min = 1;
1178                 dai_drv->playback.channels_max = 2;
1179                 dai_drv->playback.rates = i2s_dai_data->pcm_rates;
1180                 dai_drv->playback.formats = SAMSUNG_I2S_FMTS;
1181                 dai_drv->playback.stream_name = stream_names[i];
1182
1183                 dai_drv->id = i + 1;
1184                 dai_drv->name = dai_names[i];
1185
1186                 priv->dai[i].drv = &priv->dai_drv[i];
1187                 priv->dai[i].pdev = priv->pdev;
1188         }
1189
1190         /* Initialize capture only for the primary DAI */
1191         dai_drv = &priv->dai_drv[SAMSUNG_I2S_ID_PRIMARY - 1];
1192
1193         dai_drv->capture.channels_min = 1;
1194         dai_drv->capture.channels_max = 2;
1195         dai_drv->capture.rates = i2s_dai_data->pcm_rates;
1196         dai_drv->capture.formats = SAMSUNG_I2S_FMTS;
1197
1198         return 0;
1199 }
1200
1201 #ifdef CONFIG_PM
1202 static int i2s_runtime_suspend(struct device *dev)
1203 {
1204         struct samsung_i2s_priv *priv = dev_get_drvdata(dev);
1205         struct i2s_dai *i2s = samsung_i2s_get_pri_dai(dev);
1206
1207         i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
1208         i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
1209         i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
1210
1211         if (priv->op_clk)
1212                 clk_disable_unprepare(priv->op_clk);
1213         clk_disable_unprepare(priv->clk);
1214
1215         return 0;
1216 }
1217
1218 static int i2s_runtime_resume(struct device *dev)
1219 {
1220         struct samsung_i2s_priv *priv = dev_get_drvdata(dev);
1221         struct i2s_dai *i2s = samsung_i2s_get_pri_dai(dev);
1222         int ret;
1223
1224         ret = clk_prepare_enable(priv->clk);
1225         if (ret)
1226                 return ret;
1227
1228         if (priv->op_clk) {
1229                 ret = clk_prepare_enable(priv->op_clk);
1230                 if (ret) {
1231                         clk_disable_unprepare(priv->clk);
1232                         return ret;
1233                 }
1234         }
1235
1236         writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
1237         writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
1238         writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
1239
1240         return 0;
1241 }
1242 #endif /* CONFIG_PM */
1243
1244 static void i2s_unregister_clocks(struct samsung_i2s_priv *priv)
1245 {
1246         int i;
1247
1248         for (i = 0; i < priv->clk_data.clk_num; i++) {
1249                 if (!IS_ERR(priv->clk_table[i]))
1250                         clk_unregister(priv->clk_table[i]);
1251         }
1252 }
1253
1254 static void i2s_unregister_clock_provider(struct samsung_i2s_priv *priv)
1255 {
1256         of_clk_del_provider(priv->pdev->dev.of_node);
1257         i2s_unregister_clocks(priv);
1258 }
1259
1260
1261 static int i2s_register_clock_provider(struct samsung_i2s_priv *priv)
1262 {
1263
1264         const char * const i2s_clk_desc[] = { "cdclk", "rclk_src", "prescaler" };
1265         const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
1266         const char *p_names[2] = { NULL };
1267         struct device *dev = &priv->pdev->dev;
1268         struct i2s_dai *i2s = samsung_i2s_get_pri_dai(dev);
1269         const struct samsung_i2s_variant_regs *reg_info = i2s->variant_regs;
1270         const char *i2s_clk_name[ARRAY_SIZE(i2s_clk_desc)];
1271         struct clk *rclksrc;
1272         int ret, i;
1273
1274         /* Register the clock provider only if it's expected in the DTB */
1275         if (!of_find_property(dev->of_node, "#clock-cells", NULL))
1276                 return 0;
1277
1278         /* Get the RCLKSRC mux clock parent clock names */
1279         for (i = 0; i < ARRAY_SIZE(p_names); i++) {
1280                 rclksrc = clk_get(dev, clk_name[i]);
1281                 if (IS_ERR(rclksrc))
1282                         continue;
1283                 p_names[i] = __clk_get_name(rclksrc);
1284                 clk_put(rclksrc);
1285         }
1286
1287         for (i = 0; i < ARRAY_SIZE(i2s_clk_desc); i++) {
1288                 i2s_clk_name[i] = devm_kasprintf(dev, GFP_KERNEL, "%s_%s",
1289                                                 dev_name(dev), i2s_clk_desc[i]);
1290                 if (!i2s_clk_name[i])
1291                         return -ENOMEM;
1292         }
1293
1294         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
1295                 /* Activate the prescaler */
1296                 u32 val = readl(i2s->addr + I2SPSR);
1297                 writel(val | PSR_PSREN, i2s->addr + I2SPSR);
1298
1299                 priv->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev,
1300                                 i2s_clk_name[CLK_I2S_RCLK_SRC], p_names,
1301                                 ARRAY_SIZE(p_names),
1302                                 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
1303                                 i2s->addr + I2SMOD, reg_info->rclksrc_off,
1304                                 1, 0, i2s->lock);
1305
1306                 priv->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev,
1307                                 i2s_clk_name[CLK_I2S_RCLK_PSR],
1308                                 i2s_clk_name[CLK_I2S_RCLK_SRC],
1309                                 CLK_SET_RATE_PARENT,
1310                                 i2s->addr + I2SPSR, 8, 6, 0, i2s->lock);
1311
1312                 p_names[0] = i2s_clk_name[CLK_I2S_RCLK_PSR];
1313                 priv->clk_data.clk_num = 2;
1314         }
1315
1316         priv->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev,
1317                                 i2s_clk_name[CLK_I2S_CDCLK], p_names[0],
1318                                 CLK_SET_RATE_PARENT,
1319                                 i2s->addr + I2SMOD, reg_info->cdclkcon_off,
1320                                 CLK_GATE_SET_TO_DISABLE, i2s->lock);
1321
1322         priv->clk_data.clk_num += 1;
1323         priv->clk_data.clks = priv->clk_table;
1324
1325         ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1326                                   &priv->clk_data);
1327         if (ret < 0) {
1328                 dev_err(dev, "failed to add clock provider: %d\n", ret);
1329                 i2s_unregister_clocks(priv);
1330         }
1331
1332         return ret;
1333 }
1334
1335 /* Create platform device for the secondary PCM */
1336 static int i2s_create_secondary_device(struct samsung_i2s_priv *priv)
1337 {
1338         struct platform_device *pdev;
1339         int ret;
1340
1341         pdev = platform_device_register_simple("samsung-i2s-sec", -1, NULL, 0);
1342         if (!pdev)
1343                 return -ENOMEM;
1344
1345         ret = device_attach(&pdev->dev);
1346         if (ret < 0) {
1347                 dev_info(&pdev->dev, "device_attach() failed\n");
1348                 return ret;
1349         }
1350
1351         priv->pdev_sec = pdev;
1352
1353         return 0;
1354 }
1355
1356 static void i2s_delete_secondary_device(struct samsung_i2s_priv *priv)
1357 {
1358         if (priv->pdev_sec) {
1359                 platform_device_del(priv->pdev_sec);
1360                 priv->pdev_sec = NULL;
1361         }
1362 }
1363 static int samsung_i2s_probe(struct platform_device *pdev)
1364 {
1365         struct i2s_dai *pri_dai, *sec_dai = NULL;
1366         struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1367         struct resource *res;
1368         u32 regs_base, quirks = 0, idma_addr = 0;
1369         struct device_node *np = pdev->dev.of_node;
1370         const struct samsung_i2s_dai_data *i2s_dai_data;
1371         int num_dais, ret;
1372         struct samsung_i2s_priv *priv;
1373
1374         if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node)
1375                 i2s_dai_data = of_device_get_match_data(&pdev->dev);
1376         else
1377                 i2s_dai_data = (struct samsung_i2s_dai_data *)
1378                                 platform_get_device_id(pdev)->driver_data;
1379
1380         /* Nothing to do if it is the secondary device probe */
1381         if (!i2s_dai_data)
1382                 return 0;
1383
1384         priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
1385         if (!priv)
1386                 return -ENOMEM;
1387
1388         quirks = np ? i2s_dai_data->quirks : i2s_pdata->type.quirks;
1389         num_dais = (quirks & QUIRK_SEC_DAI) ? 2 : 1;
1390         priv->pdev = pdev;
1391
1392         ret = i2s_alloc_dais(priv, i2s_dai_data, num_dais);
1393         if (ret < 0)
1394                 return ret;
1395
1396         pri_dai = &priv->dai[SAMSUNG_I2S_ID_PRIMARY - 1];
1397
1398         spin_lock_init(&priv->spinlock);
1399         pri_dai->lock = &priv->spinlock;
1400
1401         if (!np) {
1402                 if (i2s_pdata == NULL) {
1403                         dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1404                         return -EINVAL;
1405                 }
1406
1407                 pri_dai->dma_playback.filter_data = i2s_pdata->dma_playback;
1408                 pri_dai->dma_capture.filter_data = i2s_pdata->dma_capture;
1409                 pri_dai->filter = i2s_pdata->dma_filter;
1410
1411                 idma_addr = i2s_pdata->type.idma_addr;
1412         } else {
1413                 if (of_property_read_u32(np, "samsung,idma-addr",
1414                                          &idma_addr)) {
1415                         if (quirks & QUIRK_SUPPORTS_IDMA) {
1416                                 dev_info(&pdev->dev, "idma address is not"\
1417                                                 "specified");
1418                         }
1419                 }
1420         }
1421
1422         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1423         pri_dai->addr = devm_ioremap_resource(&pdev->dev, res);
1424         if (IS_ERR(pri_dai->addr))
1425                 return PTR_ERR(pri_dai->addr);
1426
1427         regs_base = res->start;
1428
1429         priv->clk = devm_clk_get(&pdev->dev, "iis");
1430         if (IS_ERR(priv->clk)) {
1431                 dev_err(&pdev->dev, "Failed to get iis clock\n");
1432                 return PTR_ERR(priv->clk);
1433         }
1434
1435         ret = clk_prepare_enable(priv->clk);
1436         if (ret != 0) {
1437                 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1438                 return ret;
1439         }
1440         pri_dai->dma_playback.addr = regs_base + I2STXD;
1441         pri_dai->dma_capture.addr = regs_base + I2SRXD;
1442         pri_dai->dma_playback.chan_name = "tx";
1443         pri_dai->dma_capture.chan_name = "rx";
1444         pri_dai->dma_playback.addr_width = 4;
1445         pri_dai->dma_capture.addr_width = 4;
1446         pri_dai->quirks = quirks;
1447         pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
1448         pri_dai->priv = priv;
1449
1450         if (quirks & QUIRK_PRI_6CHAN)
1451                 pri_dai->drv->playback.channels_max = 6;
1452
1453         ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter,
1454                                                  NULL, NULL, NULL);
1455         if (ret < 0)
1456                 goto err_disable_clk;
1457
1458         if (quirks & QUIRK_SEC_DAI) {
1459                 sec_dai = &priv->dai[SAMSUNG_I2S_ID_SECONDARY - 1];
1460
1461                 sec_dai->lock = &priv->spinlock;
1462                 sec_dai->variant_regs = pri_dai->variant_regs;
1463                 sec_dai->dma_playback.addr = regs_base + I2STXDS;
1464                 sec_dai->dma_playback.chan_name = "tx-sec";
1465
1466                 if (!np) {
1467                         sec_dai->dma_playback.filter_data = i2s_pdata->dma_play_sec;
1468                         sec_dai->filter = i2s_pdata->dma_filter;
1469                 }
1470
1471                 sec_dai->dma_playback.addr_width = 4;
1472                 sec_dai->addr = pri_dai->addr;
1473                 sec_dai->quirks = quirks;
1474                 sec_dai->idma_playback.addr = idma_addr;
1475                 sec_dai->pri_dai = pri_dai;
1476                 sec_dai->priv = priv;
1477                 pri_dai->sec_dai = sec_dai;
1478
1479                 ret = i2s_create_secondary_device(priv);
1480                 if (ret < 0)
1481                         goto err_disable_clk;
1482
1483                 ret = samsung_asoc_dma_platform_register(&priv->pdev_sec->dev,
1484                                                 sec_dai->filter, "tx-sec", NULL,
1485                                                 &pdev->dev);
1486                 if (ret < 0)
1487                         goto err_disable_clk;
1488
1489         }
1490
1491         if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1492                 dev_err(&pdev->dev, "Unable to configure gpio\n");
1493                 ret = -EINVAL;
1494                 goto err_disable_clk;
1495         }
1496
1497         dev_set_drvdata(&pdev->dev, priv);
1498
1499         ret = devm_snd_soc_register_component(&pdev->dev,
1500                                         &samsung_i2s_component,
1501                                         priv->dai_drv, num_dais);
1502         if (ret < 0)
1503                 goto err_disable_clk;
1504
1505         pm_runtime_set_active(&pdev->dev);
1506         pm_runtime_enable(&pdev->dev);
1507
1508         ret = i2s_register_clock_provider(priv);
1509         if (ret < 0)
1510                 goto err_disable_pm;
1511
1512         priv->op_clk = clk_get_parent(priv->clk_table[CLK_I2S_RCLK_SRC]);
1513
1514         return 0;
1515
1516 err_disable_pm:
1517         pm_runtime_disable(&pdev->dev);
1518 err_disable_clk:
1519         clk_disable_unprepare(priv->clk);
1520         i2s_delete_secondary_device(priv);
1521         return ret;
1522 }
1523
1524 static int samsung_i2s_remove(struct platform_device *pdev)
1525 {
1526         struct samsung_i2s_priv *priv = dev_get_drvdata(&pdev->dev);
1527
1528         /* The secondary device has no driver data assigned */
1529         if (!priv)
1530                 return 0;
1531
1532         pm_runtime_get_sync(&pdev->dev);
1533         pm_runtime_disable(&pdev->dev);
1534
1535         i2s_unregister_clock_provider(priv);
1536         clk_disable_unprepare(priv->clk);
1537         pm_runtime_put_noidle(&pdev->dev);
1538         i2s_delete_secondary_device(priv);
1539
1540         return 0;
1541 }
1542
1543 static const struct samsung_i2s_variant_regs i2sv3_regs = {
1544         .bfs_off = 1,
1545         .rfs_off = 3,
1546         .sdf_off = 5,
1547         .txr_off = 8,
1548         .rclksrc_off = 10,
1549         .mss_off = 11,
1550         .cdclkcon_off = 12,
1551         .lrp_off = 7,
1552         .bfs_mask = 0x3,
1553         .rfs_mask = 0x3,
1554         .ftx0cnt_off = 8,
1555 };
1556
1557 static const struct samsung_i2s_variant_regs i2sv6_regs = {
1558         .bfs_off = 0,
1559         .rfs_off = 4,
1560         .sdf_off = 6,
1561         .txr_off = 8,
1562         .rclksrc_off = 10,
1563         .mss_off = 11,
1564         .cdclkcon_off = 12,
1565         .lrp_off = 15,
1566         .bfs_mask = 0xf,
1567         .rfs_mask = 0x3,
1568         .ftx0cnt_off = 8,
1569 };
1570
1571 static const struct samsung_i2s_variant_regs i2sv7_regs = {
1572         .bfs_off = 0,
1573         .rfs_off = 4,
1574         .sdf_off = 7,
1575         .txr_off = 9,
1576         .rclksrc_off = 11,
1577         .mss_off = 12,
1578         .cdclkcon_off = 22,
1579         .lrp_off = 15,
1580         .bfs_mask = 0xf,
1581         .rfs_mask = 0x7,
1582         .ftx0cnt_off = 0,
1583 };
1584
1585 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1586         .bfs_off = 0,
1587         .rfs_off = 3,
1588         .sdf_off = 6,
1589         .txr_off = 8,
1590         .rclksrc_off = 10,
1591         .mss_off = 11,
1592         .cdclkcon_off = 12,
1593         .lrp_off = 15,
1594         .bfs_mask = 0x7,
1595         .rfs_mask = 0x7,
1596         .ftx0cnt_off = 8,
1597 };
1598
1599 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1600         .quirks = QUIRK_NO_MUXPSR,
1601         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1602         .i2s_variant_regs = &i2sv3_regs,
1603 };
1604
1605 static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1606         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1607                         QUIRK_SUPPORTS_IDMA,
1608         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1609         .i2s_variant_regs = &i2sv3_regs,
1610 };
1611
1612 static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1613         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1614                         QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1615         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1616         .i2s_variant_regs = &i2sv6_regs,
1617 };
1618
1619 static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1620         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1621                         QUIRK_SUPPORTS_TDM,
1622         .pcm_rates = SNDRV_PCM_RATE_8000_192000,
1623         .i2s_variant_regs = &i2sv7_regs,
1624 };
1625
1626 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1627         .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1628         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1629         .i2s_variant_regs = &i2sv5_i2s1_regs,
1630 };
1631
1632 static const struct platform_device_id samsung_i2s_driver_ids[] = {
1633         {
1634                 .name           = "samsung-i2s",
1635                 .driver_data    = (kernel_ulong_t)&i2sv3_dai_type,
1636         }, {
1637                 .name           = "samsung-i2s-sec",
1638         },
1639         {},
1640 };
1641 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1642
1643 #ifdef CONFIG_OF
1644 static const struct of_device_id exynos_i2s_match[] = {
1645         {
1646                 .compatible = "samsung,s3c6410-i2s",
1647                 .data = &i2sv3_dai_type,
1648         }, {
1649                 .compatible = "samsung,s5pv210-i2s",
1650                 .data = &i2sv5_dai_type,
1651         }, {
1652                 .compatible = "samsung,exynos5420-i2s",
1653                 .data = &i2sv6_dai_type,
1654         }, {
1655                 .compatible = "samsung,exynos7-i2s",
1656                 .data = &i2sv7_dai_type,
1657         }, {
1658                 .compatible = "samsung,exynos7-i2s1",
1659                 .data = &i2sv5_dai_type_i2s1,
1660         },
1661         {},
1662 };
1663 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1664 #endif
1665
1666 static const struct dev_pm_ops samsung_i2s_pm = {
1667         SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1668                                 i2s_runtime_resume, NULL)
1669         SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1670                                      pm_runtime_force_resume)
1671 };
1672
1673 static struct platform_driver samsung_i2s_driver = {
1674         .probe  = samsung_i2s_probe,
1675         .remove = samsung_i2s_remove,
1676         .id_table = samsung_i2s_driver_ids,
1677         .driver = {
1678                 .name = "samsung-i2s",
1679                 .of_match_table = of_match_ptr(exynos_i2s_match),
1680                 .pm = &samsung_i2s_pm,
1681         },
1682 };
1683
1684 module_platform_driver(samsung_i2s_driver);
1685
1686 /* Module information */
1687 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1688 MODULE_DESCRIPTION("Samsung I2S Interface");
1689 MODULE_ALIAS("platform:samsung-i2s");
1690 MODULE_LICENSE("GPL");