sound/soc/samsung/i2s.c

   1 /* sound/soc/samsung/i2s.c
   2  *
   3  * ALSA SoC Audio Layer - Samsung I2S Controller driver
   4  *
   5  * Copyright (c) 2010 Samsung Electronics Co. Ltd.
   6  *      Jaswinder Singh <jassisinghbrar@gmail.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <dt-bindings/sound/samsung-i2s.h>
  14 #include <linux/delay.h>
  15 #include <linux/slab.h>
  16 #include <linux/clk.h>
  17 #include <linux/clk-provider.h>
  18 #include <linux/io.h>
  19 #include <linux/module.h>
  20 #include <linux/of.h>
  21 #include <linux/of_device.h>
  22 #include <linux/of_gpio.h>
  23 #include <linux/pm_runtime.h>
  24
  25 #include <sound/soc.h>
  26 #include <sound/pcm_params.h>
  27
  28 #include <linux/platform_data/asoc-s3c.h>
  29
  30 #include "dma.h"
  31 #include "idma.h"
  32 #include "i2s.h"
  33 #include "i2s-regs.h"
  34
  35 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
  36
  37 #define SAMSUNG_I2S_ID_PRIMARY          1
  38 #define SAMSUNG_I2S_ID_SECONDARY        2
  39
  40 struct samsung_i2s_variant_regs {
  41         unsigned int    bfs_off;
  42         unsigned int    rfs_off;
  43         unsigned int    sdf_off;
  44         unsigned int    txr_off;
  45         unsigned int    rclksrc_off;
  46         unsigned int    mss_off;
  47         unsigned int    cdclkcon_off;
  48         unsigned int    lrp_off;
  49         unsigned int    bfs_mask;
  50         unsigned int    rfs_mask;
  51         unsigned int    ftx0cnt_off;
  52 };
  53
  54 struct samsung_i2s_dai_data {
  55         u32 quirks;
  56         unsigned int pcm_rates;
  57         const struct samsung_i2s_variant_regs *i2s_variant_regs;
  58 };
  59
  60 struct i2s_dai {
  61         /* Platform device for this DAI */
  62         struct platform_device *pdev;
  63         /* Memory mapped SFR region */
  64         void __iomem    *addr;
  65         /* Frame Clock */
  66         unsigned frmclk;
  67         /*
  68          * Specifically requested RCLK,BCLK by MACHINE Driver.
  69          * 0 indicates CPU driver is free to choose any value.
  70          */
  71         unsigned rfs, bfs;
  72         /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
  73         struct i2s_dai *pri_dai;
  74         /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
  75         struct i2s_dai *sec_dai;
  76 #define DAI_OPENED      (1 << 0) /* Dai is opened */
  77 #define DAI_MANAGER     (1 << 1) /* Dai is the manager */
  78         unsigned mode;
  79
  80         /* Driver for this DAI */
  81         struct snd_soc_dai_driver *drv;
  82
  83         /* DMA parameters */
  84         struct snd_dmaengine_dai_dma_data dma_playback;
  85         struct snd_dmaengine_dai_dma_data dma_capture;
  86         struct snd_dmaengine_dai_dma_data idma_playback;
  87         dma_filter_fn filter;
  88         u32     quirks;
  89         const struct samsung_i2s_variant_regs *variant_regs;
  90
  91         spinlock_t *lock;
  92
  93         struct samsung_i2s_priv *priv;
  94 };
  95
  96 /* Lock for cross i/f checks */
  97 static DEFINE_SPINLOCK(lock);
  98
  99 struct samsung_i2s_priv {
 100         struct platform_device *pdev;
 101         struct platform_device *pdev_sec;
 102
 103         /* Spinlock protecting access to the device's registers */
 104         spinlock_t spinlock;
 105
 106         /* CPU DAIs and their corresponding drivers */
 107         struct i2s_dai *dai;
 108         struct snd_soc_dai_driver *dai_drv;
 109         int num_dais;
 110
 111         /* The I2S controller's core clock */
 112         struct clk *clk;
 113
 114         /* Clock for generating I2S signals */
 115         struct clk *op_clk;
 116
 117         /* Rate of RCLK source clock */
 118         unsigned long rclk_srcrate;
 119
 120         /* Cache of selected I2S registers for system suspend */
 121         u32 suspend_i2smod;
 122         u32 suspend_i2scon;
 123         u32 suspend_i2spsr;
 124
 125         /* The clock provider's data */
 126         struct clk *clk_table[3];
 127         struct clk_onecell_data clk_data;
 128 };
 129
 130 struct i2s_dai *samsung_i2s_get_pri_dai(struct device *dev)
 131 {
 132         struct samsung_i2s_priv *priv = dev_get_drvdata(dev);
 133
 134         return &priv->dai[SAMSUNG_I2S_ID_PRIMARY - 1];
 135 }
 136
 137 /* Returns true if this is the 'overlay' stereo DAI */
 138 static inline bool is_secondary(struct i2s_dai *i2s)
 139 {
 140         return i2s->drv->id == SAMSUNG_I2S_ID_SECONDARY;
 141 }
 142
 143 /* If operating in SoC-Slave mode */
 144 static inline bool is_slave(struct i2s_dai *i2s)
 145 {
 146         u32 mod = readl(i2s->addr + I2SMOD);
 147         return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
 148 }
 149
 150 /* If this interface of the controller is transmitting data */
 151 static inline bool tx_active(struct i2s_dai *i2s)
 152 {
 153         u32 active;
 154
 155         if (!i2s)
 156                 return false;
 157
 158         active = readl(i2s->addr + I2SCON);
 159
 160         if (is_secondary(i2s))
 161                 active &= CON_TXSDMA_ACTIVE;
 162         else
 163                 active &= CON_TXDMA_ACTIVE;
 164
 165         return active ? true : false;
 166 }
 167
 168 /* Return pointer to the other DAI */
 169 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
 170 {
 171         return i2s->pri_dai ? : i2s->sec_dai;
 172 }
 173
 174 /* If the other interface of the controller is transmitting data */
 175 static inline bool other_tx_active(struct i2s_dai *i2s)
 176 {
 177         struct i2s_dai *other = get_other_dai(i2s);
 178
 179         return tx_active(other);
 180 }
 181
 182 /* If any interface of the controller is transmitting data */
 183 static inline bool any_tx_active(struct i2s_dai *i2s)
 184 {
 185         return tx_active(i2s) || other_tx_active(i2s);
 186 }
 187
 188 /* If this interface of the controller is receiving data */
 189 static inline bool rx_active(struct i2s_dai *i2s)
 190 {
 191         u32 active;
 192
 193         if (!i2s)
 194                 return false;
 195
 196         active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
 197
 198         return active ? true : false;
 199 }
 200
 201 /* If the other interface of the controller is receiving data */
 202 static inline bool other_rx_active(struct i2s_dai *i2s)
 203 {
 204         struct i2s_dai *other = get_other_dai(i2s);
 205
 206         return rx_active(other);
 207 }
 208
 209 /* If any interface of the controller is receiving data */
 210 static inline bool any_rx_active(struct i2s_dai *i2s)
 211 {
 212         return rx_active(i2s) || other_rx_active(i2s);
 213 }
 214
 215 /* If the other DAI is transmitting or receiving data */
 216 static inline bool other_active(struct i2s_dai *i2s)
 217 {
 218         return other_rx_active(i2s) || other_tx_active(i2s);
 219 }
 220
 221 /* If this DAI is transmitting or receiving data */
 222 static inline bool this_active(struct i2s_dai *i2s)
 223 {
 224         return tx_active(i2s) || rx_active(i2s);
 225 }
 226
 227 /* If the controller is active anyway */
 228 static inline bool any_active(struct i2s_dai *i2s)
 229 {
 230         return this_active(i2s) || other_active(i2s);
 231 }
 232
 233 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
 234 {
 235         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
 236
 237         return &priv->dai[dai->id - 1];
 238 }
 239
 240 static inline bool is_opened(struct i2s_dai *i2s)
 241 {
 242         if (i2s && (i2s->mode & DAI_OPENED))
 243                 return true;
 244         else
 245                 return false;
 246 }
 247
 248 static inline bool is_manager(struct i2s_dai *i2s)
 249 {
 250         if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
 251                 return true;
 252         else
 253                 return false;
 254 }
 255
 256 /* Read RCLK of I2S (in multiples of LRCLK) */
 257 static inline unsigned get_rfs(struct i2s_dai *i2s)
 258 {
 259         u32 rfs;
 260         rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
 261         rfs &= i2s->variant_regs->rfs_mask;
 262
 263         switch (rfs) {
 264         case 7: return 192;
 265         case 6: return 96;
 266         case 5: return 128;
 267         case 4: return 64;
 268         case 3: return 768;
 269         case 2: return 384;
 270         case 1: return 512;
 271         default: return 256;
 272         }
 273 }
 274
 275 /* Write RCLK of I2S (in multiples of LRCLK) */
 276 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
 277 {
 278         u32 mod = readl(i2s->addr + I2SMOD);
 279         int rfs_shift = i2s->variant_regs->rfs_off;
 280
 281         mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
 282
 283         switch (rfs) {
 284         case 192:
 285                 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
 286                 break;
 287         case 96:
 288                 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
 289                 break;
 290         case 128:
 291                 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
 292                 break;
 293         case 64:
 294                 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
 295                 break;
 296         case 768:
 297                 mod |= (MOD_RCLK_768FS << rfs_shift);
 298                 break;
 299         case 512:
 300                 mod |= (MOD_RCLK_512FS << rfs_shift);
 301                 break;
 302         case 384:
 303                 mod |= (MOD_RCLK_384FS << rfs_shift);
 304                 break;
 305         default:
 306                 mod |= (MOD_RCLK_256FS << rfs_shift);
 307                 break;
 308         }
 309
 310         writel(mod, i2s->addr + I2SMOD);
 311 }
 312
 313 /* Read Bit-Clock of I2S (in multiples of LRCLK) */
 314 static inline unsigned get_bfs(struct i2s_dai *i2s)
 315 {
 316         u32 bfs;
 317         bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
 318         bfs &= i2s->variant_regs->bfs_mask;
 319
 320         switch (bfs) {
 321         case 8: return 256;
 322         case 7: return 192;
 323         case 6: return 128;
 324         case 5: return 96;
 325         case 4: return 64;
 326         case 3: return 24;
 327         case 2: return 16;
 328         case 1: return 48;
 329         default: return 32;
 330         }
 331 }
 332
 333 /* Write Bit-Clock of I2S (in multiples of LRCLK) */
 334 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
 335 {
 336         u32 mod = readl(i2s->addr + I2SMOD);
 337         int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
 338         int bfs_shift = i2s->variant_regs->bfs_off;
 339
 340         /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
 341         if (!tdm && bfs > 48) {
 342                 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
 343                 return;
 344         }
 345
 346         mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
 347
 348         switch (bfs) {
 349         case 48:
 350                 mod |= (MOD_BCLK_48FS << bfs_shift);
 351                 break;
 352         case 32:
 353                 mod |= (MOD_BCLK_32FS << bfs_shift);
 354                 break;
 355         case 24:
 356                 mod |= (MOD_BCLK_24FS << bfs_shift);
 357                 break;
 358         case 16:
 359                 mod |= (MOD_BCLK_16FS << bfs_shift);
 360                 break;
 361         case 64:
 362                 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
 363                 break;
 364         case 96:
 365                 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
 366                 break;
 367         case 128:
 368                 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
 369                 break;
 370         case 192:
 371                 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
 372                 break;
 373         case 256:
 374                 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
 375                 break;
 376         default:
 377                 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
 378                 return;
 379         }
 380
 381         writel(mod, i2s->addr + I2SMOD);
 382 }
 383
 384 /* Sample-Size */
 385 static inline int get_blc(struct i2s_dai *i2s)
 386 {
 387         int blc = readl(i2s->addr + I2SMOD);
 388
 389         blc = (blc >> 13) & 0x3;
 390
 391         switch (blc) {
 392         case 2: return 24;
 393         case 1: return 8;
 394         default: return 16;
 395         }
 396 }
 397
 398 /* TX Channel Control */
 399 static void i2s_txctrl(struct i2s_dai *i2s, int on)
 400 {
 401         void __iomem *addr = i2s->addr;
 402         int txr_off = i2s->variant_regs->txr_off;
 403         u32 con = readl(addr + I2SCON);
 404         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
 405
 406         if (on) {
 407                 con |= CON_ACTIVE;
 408                 con &= ~CON_TXCH_PAUSE;
 409
 410                 if (is_secondary(i2s)) {
 411                         con |= CON_TXSDMA_ACTIVE;
 412                         con &= ~CON_TXSDMA_PAUSE;
 413                 } else {
 414                         con |= CON_TXDMA_ACTIVE;
 415                         con &= ~CON_TXDMA_PAUSE;
 416                 }
 417
 418                 if (any_rx_active(i2s))
 419                         mod |= 2 << txr_off;
 420                 else
 421                         mod |= 0 << txr_off;
 422         } else {
 423                 if (is_secondary(i2s)) {
 424                         con |=  CON_TXSDMA_PAUSE;
 425                         con &= ~CON_TXSDMA_ACTIVE;
 426                 } else {
 427                         con |=  CON_TXDMA_PAUSE;
 428                         con &= ~CON_TXDMA_ACTIVE;
 429                 }
 430
 431                 if (other_tx_active(i2s)) {
 432                         writel(con, addr + I2SCON);
 433                         return;
 434                 }
 435
 436                 con |=  CON_TXCH_PAUSE;
 437
 438                 if (any_rx_active(i2s))
 439                         mod |= 1 << txr_off;
 440                 else
 441                         con &= ~CON_ACTIVE;
 442         }
 443
 444         writel(mod, addr + I2SMOD);
 445         writel(con, addr + I2SCON);
 446 }
 447
 448 /* RX Channel Control */
 449 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
 450 {
 451         void __iomem *addr = i2s->addr;
 452         int txr_off = i2s->variant_regs->txr_off;
 453         u32 con = readl(addr + I2SCON);
 454         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
 455
 456         if (on) {
 457                 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
 458                 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
 459
 460                 if (any_tx_active(i2s))
 461                         mod |= 2 << txr_off;
 462                 else
 463                         mod |= 1 << txr_off;
 464         } else {
 465                 con |=  CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
 466                 con &= ~CON_RXDMA_ACTIVE;
 467
 468                 if (any_tx_active(i2s))
 469                         mod |= 0 << txr_off;
 470                 else
 471                         con &= ~CON_ACTIVE;
 472         }
 473
 474         writel(mod, addr + I2SMOD);
 475         writel(con, addr + I2SCON);
 476 }
 477
 478 /* Flush FIFO of an interface */
 479 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
 480 {
 481         void __iomem *fic;
 482         u32 val;
 483
 484         if (!i2s)
 485                 return;
 486
 487         if (is_secondary(i2s))
 488                 fic = i2s->addr + I2SFICS;
 489         else
 490                 fic = i2s->addr + I2SFIC;
 491
 492         /* Flush the FIFO */
 493         writel(readl(fic) | flush, fic);
 494
 495         /* Be patient */
 496         val = msecs_to_loops(1) / 1000; /* 1 usec */
 497         while (--val)
 498                 cpu_relax();
 499
 500         writel(readl(fic) & ~flush, fic);
 501 }
 502
 503 static int i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id, unsigned int rfs,
 504                           int dir)
 505 {
 506         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
 507         struct i2s_dai *i2s = to_info(dai);
 508         struct i2s_dai *other = get_other_dai(i2s);
 509         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
 510         unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
 511         unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
 512         u32 mod, mask, val = 0;
 513         unsigned long flags;
 514         int ret = 0;
 515
 516         pm_runtime_get_sync(dai->dev);
 517
 518         spin_lock_irqsave(i2s->lock, flags);
 519         mod = readl(i2s->addr + I2SMOD);
 520         spin_unlock_irqrestore(i2s->lock, flags);
 521
 522         switch (clk_id) {
 523         case SAMSUNG_I2S_OPCLK:
 524                 mask = MOD_OPCLK_MASK;
 525                 val = (dir << MOD_OPCLK_SHIFT) & MOD_OPCLK_MASK;
 526                 break;
 527         case SAMSUNG_I2S_CDCLK:
 528                 mask = 1 << i2s_regs->cdclkcon_off;
 529                 /* Shouldn't matter in GATING(CLOCK_IN) mode */
 530                 if (dir == SND_SOC_CLOCK_IN)
 531                         rfs = 0;
 532
 533                 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
 534                                 (any_active(i2s) &&
 535                                 (((dir == SND_SOC_CLOCK_IN)
 536                                         && !(mod & cdcon_mask)) ||
 537                                 ((dir == SND_SOC_CLOCK_OUT)
 538                                         && (mod & cdcon_mask))))) {
 539                         dev_err(&i2s->pdev->dev,
 540                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 541                         ret = -EAGAIN;
 542                         goto err;
 543                 }
 544
 545                 if (dir == SND_SOC_CLOCK_IN)
 546                         val = 1 << i2s_regs->cdclkcon_off;
 547
 548                 i2s->rfs = rfs;
 549                 break;
 550
 551         case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
 552         case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
 553                 mask = 1 << i2s_regs->rclksrc_off;
 554
 555                 if ((i2s->quirks & QUIRK_NO_MUXPSR)
 556                                 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
 557                         clk_id = 0;
 558                 else
 559                         clk_id = 1;
 560
 561                 if (!any_active(i2s)) {
 562                         if (priv->op_clk && !IS_ERR(priv->op_clk)) {
 563                                 if ((clk_id && !(mod & rsrc_mask)) ||
 564                                         (!clk_id && (mod & rsrc_mask))) {
 565                                         clk_disable_unprepare(priv->op_clk);
 566                                         clk_put(priv->op_clk);
 567                                 } else {
 568                                         priv->rclk_srcrate =
 569                                                 clk_get_rate(priv->op_clk);
 570                                         goto done;
 571                                 }
 572                         }
 573
 574                         if (clk_id)
 575                                 priv->op_clk = clk_get(&i2s->pdev->dev,
 576                                                 "i2s_opclk1");
 577                         else
 578                                 priv->op_clk = clk_get(&i2s->pdev->dev,
 579                                                 "i2s_opclk0");
 580
 581                         if (WARN_ON(IS_ERR(priv->op_clk))) {
 582                                 ret = PTR_ERR(priv->op_clk);
 583                                 priv->op_clk = NULL;
 584                                 goto err;
 585                         }
 586
 587                         ret = clk_prepare_enable(priv->op_clk);
 588                         if (ret) {
 589                                 clk_put(priv->op_clk);
 590                                 priv->op_clk = NULL;
 591                                 goto err;
 592                         }
 593                         priv->rclk_srcrate = clk_get_rate(priv->op_clk);
 594
 595                 } else if ((!clk_id && (mod & rsrc_mask))
 596                                 || (clk_id && !(mod & rsrc_mask))) {
 597                         dev_err(&i2s->pdev->dev,
 598                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 599                         ret = -EAGAIN;
 600                         goto err;
 601                 } else {
 602                         /* Call can't be on the active DAI */
 603                         goto done;
 604                 }
 605
 606                 if (clk_id == 1)
 607                         val = 1 << i2s_regs->rclksrc_off;
 608                 break;
 609         default:
 610                 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
 611                 ret = -EINVAL;
 612                 goto err;
 613         }
 614
 615         spin_lock_irqsave(i2s->lock, flags);
 616         mod = readl(i2s->addr + I2SMOD);
 617         mod = (mod & ~mask) | val;
 618         writel(mod, i2s->addr + I2SMOD);
 619         spin_unlock_irqrestore(i2s->lock, flags);
 620 done:
 621         pm_runtime_put(dai->dev);
 622
 623         return 0;
 624 err:
 625         pm_runtime_put(dai->dev);
 626         return ret;
 627 }
 628
 629 static int i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 630 {
 631         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
 632         struct i2s_dai *i2s = to_info(dai);
 633         int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
 634         u32 mod, tmp = 0;
 635         unsigned long flags;
 636
 637         lrp_shift = i2s->variant_regs->lrp_off;
 638         sdf_shift = i2s->variant_regs->sdf_off;
 639         mod_slave = 1 << i2s->variant_regs->mss_off;
 640
 641         sdf_mask = MOD_SDF_MASK << sdf_shift;
 642         lrp_rlow = MOD_LR_RLOW << lrp_shift;
 643
 644         /* Format is priority */
 645         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 646         case SND_SOC_DAIFMT_RIGHT_J:
 647                 tmp |= lrp_rlow;
 648                 tmp |= (MOD_SDF_MSB << sdf_shift);
 649                 break;
 650         case SND_SOC_DAIFMT_LEFT_J:
 651                 tmp |= lrp_rlow;
 652                 tmp |= (MOD_SDF_LSB << sdf_shift);
 653                 break;
 654         case SND_SOC_DAIFMT_I2S:
 655                 tmp |= (MOD_SDF_IIS << sdf_shift);
 656                 break;
 657         default:
 658                 dev_err(&i2s->pdev->dev, "Format not supported\n");
 659                 return -EINVAL;
 660         }
 661
 662         /*
 663          * INV flag is relative to the FORMAT flag - if set it simply
 664          * flips the polarity specified by the Standard
 665          */
 666         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 667         case SND_SOC_DAIFMT_NB_NF:
 668                 break;
 669         case SND_SOC_DAIFMT_NB_IF:
 670                 if (tmp & lrp_rlow)
 671                         tmp &= ~lrp_rlow;
 672                 else
 673                         tmp |= lrp_rlow;
 674                 break;
 675         default:
 676                 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
 677                 return -EINVAL;
 678         }
 679
 680         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 681         case SND_SOC_DAIFMT_CBM_CFM:
 682                 tmp |= mod_slave;
 683                 break;
 684         case SND_SOC_DAIFMT_CBS_CFS:
 685                 /*
 686                  * Set default source clock in Master mode, only when the
 687                  * CLK_I2S_RCLK_SRC clock is not exposed so we ensure any
 688                  * clock configuration assigned in DT is not overwritten.
 689                  */
 690                 if (priv->rclk_srcrate == 0 && priv->clk_data.clks == NULL)
 691                         i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
 692                                                         0, SND_SOC_CLOCK_IN);
 693                 break;
 694         default:
 695                 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
 696                 return -EINVAL;
 697         }
 698
 699         pm_runtime_get_sync(dai->dev);
 700         spin_lock_irqsave(i2s->lock, flags);
 701         mod = readl(i2s->addr + I2SMOD);
 702         /*
 703          * Don't change the I2S mode if any controller is active on this
 704          * channel.
 705          */
 706         if (any_active(i2s) &&
 707                 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
 708                 spin_unlock_irqrestore(i2s->lock, flags);
 709                 pm_runtime_put(dai->dev);
 710                 dev_err(&i2s->pdev->dev,
 711                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 712                 return -EAGAIN;
 713         }
 714
 715         mod &= ~(sdf_mask | lrp_rlow | mod_slave);
 716         mod |= tmp;
 717         writel(mod, i2s->addr + I2SMOD);
 718         spin_unlock_irqrestore(i2s->lock, flags);
 719         pm_runtime_put(dai->dev);
 720
 721         return 0;
 722 }
 723
 724 static int i2s_hw_params(struct snd_pcm_substream *substream,
 725         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 726 {
 727         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
 728         struct i2s_dai *i2s = to_info(dai);
 729         u32 mod, mask = 0, val = 0;
 730         struct clk *rclksrc;
 731         unsigned long flags;
 732
 733         WARN_ON(!pm_runtime_active(dai->dev));
 734
 735         if (!is_secondary(i2s))
 736                 mask |= (MOD_DC2_EN | MOD_DC1_EN);
 737
 738         switch (params_channels(params)) {
 739         case 6:
 740                 val |= MOD_DC2_EN;
 741         case 4:
 742                 val |= MOD_DC1_EN;
 743                 break;
 744         case 2:
 745                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 746                         i2s->dma_playback.addr_width = 4;
 747                 else
 748                         i2s->dma_capture.addr_width = 4;
 749                 break;
 750         case 1:
 751                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 752                         i2s->dma_playback.addr_width = 2;
 753                 else
 754                         i2s->dma_capture.addr_width = 2;
 755
 756                 break;
 757         default:
 758                 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
 759                                 params_channels(params));
 760                 return -EINVAL;
 761         }
 762
 763         if (is_secondary(i2s))
 764                 mask |= MOD_BLCS_MASK;
 765         else
 766                 mask |= MOD_BLCP_MASK;
 767
 768         if (is_manager(i2s))
 769                 mask |= MOD_BLC_MASK;
 770
 771         switch (params_width(params)) {
 772         case 8:
 773                 if (is_secondary(i2s))
 774                         val |= MOD_BLCS_8BIT;
 775                 else
 776                         val |= MOD_BLCP_8BIT;
 777                 if (is_manager(i2s))
 778                         val |= MOD_BLC_8BIT;
 779                 break;
 780         case 16:
 781                 if (is_secondary(i2s))
 782                         val |= MOD_BLCS_16BIT;
 783                 else
 784                         val |= MOD_BLCP_16BIT;
 785                 if (is_manager(i2s))
 786                         val |= MOD_BLC_16BIT;
 787                 break;
 788         case 24:
 789                 if (is_secondary(i2s))
 790                         val |= MOD_BLCS_24BIT;
 791                 else
 792                         val |= MOD_BLCP_24BIT;
 793                 if (is_manager(i2s))
 794                         val |= MOD_BLC_24BIT;
 795                 break;
 796         default:
 797                 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
 798                                 params_format(params));
 799                 return -EINVAL;
 800         }
 801
 802         spin_lock_irqsave(i2s->lock, flags);
 803         mod = readl(i2s->addr + I2SMOD);
 804         mod = (mod & ~mask) | val;
 805         writel(mod, i2s->addr + I2SMOD);
 806         spin_unlock_irqrestore(i2s->lock, flags);
 807
 808         snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
 809
 810         i2s->frmclk = params_rate(params);
 811
 812         rclksrc = priv->clk_table[CLK_I2S_RCLK_SRC];
 813         if (rclksrc && !IS_ERR(rclksrc))
 814                 priv->rclk_srcrate = clk_get_rate(rclksrc);
 815
 816         return 0;
 817 }
 818
 819 /* We set constraints on the substream acc to the version of I2S */
 820 static int i2s_startup(struct snd_pcm_substream *substream,
 821           struct snd_soc_dai *dai)
 822 {
 823         struct i2s_dai *i2s = to_info(dai);
 824         struct i2s_dai *other = get_other_dai(i2s);
 825         unsigned long flags;
 826
 827         pm_runtime_get_sync(dai->dev);
 828
 829         spin_lock_irqsave(&lock, flags);
 830
 831         i2s->mode |= DAI_OPENED;
 832
 833         if (is_manager(other))
 834                 i2s->mode &= ~DAI_MANAGER;
 835         else
 836                 i2s->mode |= DAI_MANAGER;
 837
 838         if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
 839                 writel(CON_RSTCLR, i2s->addr + I2SCON);
 840
 841         spin_unlock_irqrestore(&lock, flags);
 842
 843         return 0;
 844 }
 845
 846 static void i2s_shutdown(struct snd_pcm_substream *substream,
 847         struct snd_soc_dai *dai)
 848 {
 849         struct i2s_dai *i2s = to_info(dai);
 850         struct i2s_dai *other = get_other_dai(i2s);
 851         unsigned long flags;
 852
 853         spin_lock_irqsave(&lock, flags);
 854
 855         i2s->mode &= ~DAI_OPENED;
 856         i2s->mode &= ~DAI_MANAGER;
 857
 858         if (is_opened(other))
 859                 other->mode |= DAI_MANAGER;
 860
 861         /* Reset any constraint on RFS and BFS */
 862         i2s->rfs = 0;
 863         i2s->bfs = 0;
 864
 865         spin_unlock_irqrestore(&lock, flags);
 866
 867         pm_runtime_put(dai->dev);
 868 }
 869
 870 static int config_setup(struct i2s_dai *i2s)
 871 {
 872         struct samsung_i2s_priv *priv = i2s->priv;
 873         struct i2s_dai *other = get_other_dai(i2s);
 874         unsigned rfs, bfs, blc;
 875         u32 psr;
 876
 877         blc = get_blc(i2s);
 878
 879         bfs = i2s->bfs;
 880
 881         if (!bfs && other)
 882                 bfs = other->bfs;
 883
 884         /* Select least possible multiple(2) if no constraint set */
 885         if (!bfs)
 886                 bfs = blc * 2;
 887
 888         rfs = i2s->rfs;
 889
 890         if (!rfs && other)
 891                 rfs = other->rfs;
 892
 893         if ((rfs == 256 || rfs == 512) && (blc == 24)) {
 894                 dev_err(&i2s->pdev->dev,
 895                         "%d-RFS not supported for 24-blc\n", rfs);
 896                 return -EINVAL;
 897         }
 898
 899         if (!rfs) {
 900                 if (bfs == 16 || bfs == 32)
 901                         rfs = 256;
 902                 else
 903                         rfs = 384;
 904         }
 905
 906         /* If already setup and running */
 907         if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
 908                 dev_err(&i2s->pdev->dev,
 909                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 910                 return -EAGAIN;
 911         }
 912
 913         set_bfs(i2s, bfs);
 914         set_rfs(i2s, rfs);
 915
 916         /* Don't bother with PSR in Slave mode */
 917         if (is_slave(i2s))
 918                 return 0;
 919
 920         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
 921                 psr = priv->rclk_srcrate / i2s->frmclk / rfs;
 922                 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
 923                 dev_dbg(&i2s->pdev->dev,
 924                         "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
 925                                 priv->rclk_srcrate, psr, rfs, bfs);
 926         }
 927
 928         return 0;
 929 }
 930
 931 static int i2s_trigger(struct snd_pcm_substream *substream,
 932         int cmd, struct snd_soc_dai *dai)
 933 {
 934         int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
 935         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 936         struct i2s_dai *i2s = to_info(rtd->cpu_dai);
 937         unsigned long flags;
 938
 939         switch (cmd) {
 940         case SNDRV_PCM_TRIGGER_START:
 941         case SNDRV_PCM_TRIGGER_RESUME:
 942         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 943                 pm_runtime_get_sync(dai->dev);
 944                 spin_lock_irqsave(i2s->lock, flags);
 945
 946                 if (config_setup(i2s)) {
 947                         spin_unlock_irqrestore(i2s->lock, flags);
 948                         return -EINVAL;
 949                 }
 950
 951                 if (capture)
 952                         i2s_rxctrl(i2s, 1);
 953                 else
 954                         i2s_txctrl(i2s, 1);
 955
 956                 spin_unlock_irqrestore(i2s->lock, flags);
 957                 break;
 958         case SNDRV_PCM_TRIGGER_STOP:
 959         case SNDRV_PCM_TRIGGER_SUSPEND:
 960         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 961                 spin_lock_irqsave(i2s->lock, flags);
 962
 963                 if (capture) {
 964                         i2s_rxctrl(i2s, 0);
 965                         i2s_fifo(i2s, FIC_RXFLUSH);
 966                 } else {
 967                         i2s_txctrl(i2s, 0);
 968                         i2s_fifo(i2s, FIC_TXFLUSH);
 969                 }
 970
 971                 spin_unlock_irqrestore(i2s->lock, flags);
 972                 pm_runtime_put(dai->dev);
 973                 break;
 974         }
 975
 976         return 0;
 977 }
 978
 979 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
 980         int div_id, int div)
 981 {
 982         struct i2s_dai *i2s = to_info(dai);
 983         struct i2s_dai *other = get_other_dai(i2s);
 984
 985         switch (div_id) {
 986         case SAMSUNG_I2S_DIV_BCLK:
 987                 pm_runtime_get_sync(dai->dev);
 988                 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
 989                         || (other && other->bfs && (other->bfs != div))) {
 990                         pm_runtime_put(dai->dev);
 991                         dev_err(&i2s->pdev->dev,
 992                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 993                         return -EAGAIN;
 994                 }
 995                 i2s->bfs = div;
 996                 pm_runtime_put(dai->dev);
 997                 break;
 998         default:
 999                 dev_err(&i2s->pdev->dev,
1000                         "Invalid clock divider(%d)\n", div_id);
1001                 return -EINVAL;
1002         }
1003
1004         return 0;
1005 }
1006
1007 static snd_pcm_sframes_t
1008 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
1009 {
1010         struct i2s_dai *i2s = to_info(dai);
1011         u32 reg = readl(i2s->addr + I2SFIC);
1012         snd_pcm_sframes_t delay;
1013         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
1014
1015         WARN_ON(!pm_runtime_active(dai->dev));
1016
1017         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
1018                 delay = FIC_RXCOUNT(reg);
1019         else if (is_secondary(i2s))
1020                 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
1021         else
1022                 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
1023
1024         return delay;
1025 }
1026
1027 #ifdef CONFIG_PM
1028 static int i2s_suspend(struct snd_soc_dai *dai)
1029 {
1030         return pm_runtime_force_suspend(dai->dev);
1031 }
1032
1033 static int i2s_resume(struct snd_soc_dai *dai)
1034 {
1035         return pm_runtime_force_resume(dai->dev);
1036 }
1037 #else
1038 #define i2s_suspend NULL
1039 #define i2s_resume  NULL
1040 #endif
1041
1042 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
1043 {
1044         struct i2s_dai *i2s = to_info(dai);
1045         struct i2s_dai *other = get_other_dai(i2s);
1046         unsigned long flags;
1047
1048         pm_runtime_get_sync(dai->dev);
1049
1050         if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
1051                 snd_soc_dai_init_dma_data(dai, &other->sec_dai->dma_playback,
1052                                            NULL);
1053         } else {
1054                 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback,
1055                                            &i2s->dma_capture);
1056
1057                 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1058                         writel(CON_RSTCLR, i2s->addr + I2SCON);
1059
1060                 if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
1061                         idma_reg_addr_init(i2s->addr,
1062                                         i2s->sec_dai->idma_playback.addr);
1063         }
1064
1065         /* Reset any constraint on RFS and BFS */
1066         i2s->rfs = 0;
1067         i2s->bfs = 0;
1068
1069         spin_lock_irqsave(i2s->lock, flags);
1070         i2s_txctrl(i2s, 0);
1071         i2s_rxctrl(i2s, 0);
1072         i2s_fifo(i2s, FIC_TXFLUSH);
1073         i2s_fifo(other, FIC_TXFLUSH);
1074         i2s_fifo(i2s, FIC_RXFLUSH);
1075         spin_unlock_irqrestore(i2s->lock, flags);
1076
1077         /* Gate CDCLK by default */
1078         if (!is_opened(other))
1079                 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1080                                 0, SND_SOC_CLOCK_IN);
1081         pm_runtime_put(dai->dev);
1082
1083         return 0;
1084 }
1085
1086 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1087 {
1088         struct i2s_dai *i2s = to_info(dai);
1089         unsigned long flags;
1090
1091         pm_runtime_get_sync(dai->dev);
1092
1093         if (!is_secondary(i2s)) {
1094                 if (i2s->quirks & QUIRK_NEED_RSTCLR) {
1095                         spin_lock_irqsave(i2s->lock, flags);
1096                         writel(0, i2s->addr + I2SCON);
1097                         spin_unlock_irqrestore(i2s->lock, flags);
1098                 }
1099         }
1100
1101         pm_runtime_put(dai->dev);
1102
1103         return 0;
1104 }
1105
1106 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1107         .trigger = i2s_trigger,
1108         .hw_params = i2s_hw_params,
1109         .set_fmt = i2s_set_fmt,
1110         .set_clkdiv = i2s_set_clkdiv,
1111         .set_sysclk = i2s_set_sysclk,
1112         .startup = i2s_startup,
1113         .shutdown = i2s_shutdown,
1114         .delay = i2s_delay,
1115 };
1116
1117 static const struct snd_soc_dapm_widget samsung_i2s_widgets[] = {
1118         /* Backend DAI  */
1119         SND_SOC_DAPM_AIF_OUT("Mixer DAI TX", NULL, 0, SND_SOC_NOPM, 0, 0),
1120         SND_SOC_DAPM_AIF_IN("Mixer DAI RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1121
1122         /* Playback Mixer */
1123         SND_SOC_DAPM_MIXER("Playback Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
1124 };
1125
1126 static const struct snd_soc_dapm_route samsung_i2s_dapm_routes[] = {
1127         { "Playback Mixer", NULL, "Primary" },
1128         { "Playback Mixer", NULL, "Secondary" },
1129
1130         { "Mixer DAI TX", NULL, "Playback Mixer" },
1131         { "Playback Mixer", NULL, "Mixer DAI RX" },
1132 };
1133
1134 static const struct snd_soc_component_driver samsung_i2s_component = {
1135         .name = "samsung-i2s",
1136
1137         .dapm_widgets = samsung_i2s_widgets,
1138         .num_dapm_widgets = ARRAY_SIZE(samsung_i2s_widgets),
1139
1140         .dapm_routes = samsung_i2s_dapm_routes,
1141         .num_dapm_routes = ARRAY_SIZE(samsung_i2s_dapm_routes),
1142 };
1143
1144 #define SAMSUNG_I2S_FMTS        (SNDRV_PCM_FMTBIT_S8 | \
1145                                         SNDRV_PCM_FMTBIT_S16_LE | \
1146                                         SNDRV_PCM_FMTBIT_S24_LE)
1147
1148 static int i2s_alloc_dais(struct samsung_i2s_priv *priv,
1149                           const struct samsung_i2s_dai_data *i2s_dai_data,
1150                           int num_dais)
1151 {
1152         static const char *dai_names[] = { "samsung-i2s", "samsung-i2s-sec" };
1153         static const char *stream_names[] = { "Primary", "Secondary" };
1154         struct snd_soc_dai_driver *dai_drv;
1155         struct i2s_dai *dai;
1156         int i;
1157
1158         priv->dai = devm_kcalloc(&priv->pdev->dev, num_dais,
1159                                      sizeof(*dai), GFP_KERNEL);
1160         if (!priv->dai)
1161                 return -ENOMEM;
1162
1163         priv->dai_drv = devm_kcalloc(&priv->pdev->dev, num_dais,
1164                                      sizeof(*dai_drv), GFP_KERNEL);
1165         if (!priv->dai_drv)
1166                 return -ENOMEM;
1167
1168         for (i = 0; i < num_dais; i++) {
1169                 dai_drv = &priv->dai_drv[i];
1170
1171                 dai_drv->probe = samsung_i2s_dai_probe;
1172                 dai_drv->remove = samsung_i2s_dai_remove;
1173                 dai_drv->suspend = i2s_suspend;
1174                 dai_drv->resume = i2s_resume;
1175
1176                 dai_drv->symmetric_rates = 1;
1177                 dai_drv->ops = &samsung_i2s_dai_ops;
1178
1179                 dai_drv->playback.channels_min = 1;
1180                 dai_drv->playback.channels_max = 2;
1181                 dai_drv->playback.rates = i2s_dai_data->pcm_rates;
1182                 dai_drv->playback.formats = SAMSUNG_I2S_FMTS;
1183                 dai_drv->playback.stream_name = stream_names[i];
1184
1185                 dai_drv->id = i + 1;
1186                 dai_drv->name = dai_names[i];
1187
1188                 priv->dai[i].drv = &priv->dai_drv[i];
1189                 priv->dai[i].pdev = priv->pdev;
1190         }
1191
1192         /* Initialize capture only for the primary DAI */
1193         dai_drv = &priv->dai_drv[SAMSUNG_I2S_ID_PRIMARY - 1];
1194
1195         dai_drv->capture.channels_min = 1;
1196         dai_drv->capture.channels_max = 2;
1197         dai_drv->capture.rates = i2s_dai_data->pcm_rates;
1198         dai_drv->capture.formats = SAMSUNG_I2S_FMTS;
1199
1200         return 0;
1201 }
1202
1203 #ifdef CONFIG_PM
1204 static int i2s_runtime_suspend(struct device *dev)
1205 {
1206         struct samsung_i2s_priv *priv = dev_get_drvdata(dev);
1207         struct i2s_dai *i2s = samsung_i2s_get_pri_dai(dev);
1208
1209         priv->suspend_i2smod = readl(i2s->addr + I2SMOD);
1210         priv->suspend_i2scon = readl(i2s->addr + I2SCON);
1211         priv->suspend_i2spsr = readl(i2s->addr + I2SPSR);
1212
1213         if (priv->op_clk)
1214                 clk_disable_unprepare(priv->op_clk);
1215         clk_disable_unprepare(priv->clk);
1216
1217         return 0;
1218 }
1219
1220 static int i2s_runtime_resume(struct device *dev)
1221 {
1222         struct samsung_i2s_priv *priv = dev_get_drvdata(dev);
1223         struct i2s_dai *i2s = samsung_i2s_get_pri_dai(dev);
1224         int ret;
1225
1226         ret = clk_prepare_enable(priv->clk);
1227         if (ret)
1228                 return ret;
1229
1230         if (priv->op_clk) {
1231                 ret = clk_prepare_enable(priv->op_clk);
1232                 if (ret) {
1233                         clk_disable_unprepare(priv->clk);
1234                         return ret;
1235                 }
1236         }
1237
1238         writel(priv->suspend_i2scon, i2s->addr + I2SCON);
1239         writel(priv->suspend_i2smod, i2s->addr + I2SMOD);
1240         writel(priv->suspend_i2spsr, i2s->addr + I2SPSR);
1241
1242         return 0;
1243 }
1244 #endif /* CONFIG_PM */
1245
1246 static void i2s_unregister_clocks(struct samsung_i2s_priv *priv)
1247 {
1248         int i;
1249
1250         for (i = 0; i < priv->clk_data.clk_num; i++) {
1251                 if (!IS_ERR(priv->clk_table[i]))
1252                         clk_unregister(priv->clk_table[i]);
1253         }
1254 }
1255
1256 static void i2s_unregister_clock_provider(struct samsung_i2s_priv *priv)
1257 {
1258         of_clk_del_provider(priv->pdev->dev.of_node);
1259         i2s_unregister_clocks(priv);
1260 }
1261
1262
1263 static int i2s_register_clock_provider(struct samsung_i2s_priv *priv)
1264 {
1265
1266         const char * const i2s_clk_desc[] = { "cdclk", "rclk_src", "prescaler" };
1267         const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
1268         const char *p_names[2] = { NULL };
1269         struct device *dev = &priv->pdev->dev;
1270         struct i2s_dai *i2s = samsung_i2s_get_pri_dai(dev);
1271         const struct samsung_i2s_variant_regs *reg_info = i2s->variant_regs;
1272         const char *i2s_clk_name[ARRAY_SIZE(i2s_clk_desc)];
1273         struct clk *rclksrc;
1274         int ret, i;
1275
1276         /* Register the clock provider only if it's expected in the DTB */
1277         if (!of_find_property(dev->of_node, "#clock-cells", NULL))
1278                 return 0;
1279
1280         /* Get the RCLKSRC mux clock parent clock names */
1281         for (i = 0; i < ARRAY_SIZE(p_names); i++) {
1282                 rclksrc = clk_get(dev, clk_name[i]);
1283                 if (IS_ERR(rclksrc))
1284                         continue;
1285                 p_names[i] = __clk_get_name(rclksrc);
1286                 clk_put(rclksrc);
1287         }
1288
1289         for (i = 0; i < ARRAY_SIZE(i2s_clk_desc); i++) {
1290                 i2s_clk_name[i] = devm_kasprintf(dev, GFP_KERNEL, "%s_%s",
1291                                                 dev_name(dev), i2s_clk_desc[i]);
1292                 if (!i2s_clk_name[i])
1293                         return -ENOMEM;
1294         }
1295
1296         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
1297                 /* Activate the prescaler */
1298                 u32 val = readl(i2s->addr + I2SPSR);
1299                 writel(val | PSR_PSREN, i2s->addr + I2SPSR);
1300
1301                 priv->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev,
1302                                 i2s_clk_name[CLK_I2S_RCLK_SRC], p_names,
1303                                 ARRAY_SIZE(p_names),
1304                                 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
1305                                 i2s->addr + I2SMOD, reg_info->rclksrc_off,
1306                                 1, 0, i2s->lock);
1307
1308                 priv->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev,
1309                                 i2s_clk_name[CLK_I2S_RCLK_PSR],
1310                                 i2s_clk_name[CLK_I2S_RCLK_SRC],
1311                                 CLK_SET_RATE_PARENT,
1312                                 i2s->addr + I2SPSR, 8, 6, 0, i2s->lock);
1313
1314                 p_names[0] = i2s_clk_name[CLK_I2S_RCLK_PSR];
1315                 priv->clk_data.clk_num = 2;
1316         }
1317
1318         priv->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev,
1319                                 i2s_clk_name[CLK_I2S_CDCLK], p_names[0],
1320                                 CLK_SET_RATE_PARENT,
1321                                 i2s->addr + I2SMOD, reg_info->cdclkcon_off,
1322                                 CLK_GATE_SET_TO_DISABLE, i2s->lock);
1323
1324         priv->clk_data.clk_num += 1;
1325         priv->clk_data.clks = priv->clk_table;
1326
1327         ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1328                                   &priv->clk_data);
1329         if (ret < 0) {
1330                 dev_err(dev, "failed to add clock provider: %d\n", ret);
1331                 i2s_unregister_clocks(priv);
1332         }
1333
1334         return ret;
1335 }
1336
1337 /* Create platform device for the secondary PCM */
1338 static int i2s_create_secondary_device(struct samsung_i2s_priv *priv)
1339 {
1340         struct platform_device *pdev;
1341         int ret;
1342
1343         pdev = platform_device_register_simple("samsung-i2s-sec", -1, NULL, 0);
1344         if (!pdev)
1345                 return -ENOMEM;
1346
1347         ret = device_attach(&pdev->dev);
1348         if (ret < 0) {
1349                 dev_info(&pdev->dev, "device_attach() failed\n");
1350                 return ret;
1351         }
1352
1353         priv->pdev_sec = pdev;
1354
1355         return 0;
1356 }
1357
1358 static void i2s_delete_secondary_device(struct samsung_i2s_priv *priv)
1359 {
1360         if (priv->pdev_sec) {
1361                 platform_device_del(priv->pdev_sec);
1362                 priv->pdev_sec = NULL;
1363         }
1364 }
1365 static int samsung_i2s_probe(struct platform_device *pdev)
1366 {
1367         struct i2s_dai *pri_dai, *sec_dai = NULL;
1368         struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1369         struct resource *res;
1370         u32 regs_base, quirks = 0, idma_addr = 0;
1371         struct device_node *np = pdev->dev.of_node;
1372         const struct samsung_i2s_dai_data *i2s_dai_data;
1373         int num_dais, ret;
1374         struct samsung_i2s_priv *priv;
1375
1376         if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node)
1377                 i2s_dai_data = of_device_get_match_data(&pdev->dev);
1378         else
1379                 i2s_dai_data = (struct samsung_i2s_dai_data *)
1380                                 platform_get_device_id(pdev)->driver_data;
1381
1382         /* Nothing to do if it is the secondary device probe */
1383         if (!i2s_dai_data)
1384                 return 0;
1385
1386         priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
1387         if (!priv)
1388                 return -ENOMEM;
1389
1390         quirks = np ? i2s_dai_data->quirks : i2s_pdata->type.quirks;
1391         num_dais = (quirks & QUIRK_SEC_DAI) ? 2 : 1;
1392         priv->pdev = pdev;
1393
1394         ret = i2s_alloc_dais(priv, i2s_dai_data, num_dais);
1395         if (ret < 0)
1396                 return ret;
1397
1398         pri_dai = &priv->dai[SAMSUNG_I2S_ID_PRIMARY - 1];
1399
1400         spin_lock_init(&priv->spinlock);
1401         pri_dai->lock = &priv->spinlock;
1402
1403         if (!np) {
1404                 if (i2s_pdata == NULL) {
1405                         dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1406                         return -EINVAL;
1407                 }
1408
1409                 pri_dai->dma_playback.filter_data = i2s_pdata->dma_playback;
1410                 pri_dai->dma_capture.filter_data = i2s_pdata->dma_capture;
1411                 pri_dai->filter = i2s_pdata->dma_filter;
1412
1413                 idma_addr = i2s_pdata->type.idma_addr;
1414         } else {
1415                 if (of_property_read_u32(np, "samsung,idma-addr",
1416                                          &idma_addr)) {
1417                         if (quirks & QUIRK_SUPPORTS_IDMA) {
1418                                 dev_info(&pdev->dev, "idma address is not"\
1419                                                 "specified");
1420                         }
1421                 }
1422         }
1423
1424         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1425         pri_dai->addr = devm_ioremap_resource(&pdev->dev, res);
1426         if (IS_ERR(pri_dai->addr))
1427                 return PTR_ERR(pri_dai->addr);
1428
1429         regs_base = res->start;
1430
1431         priv->clk = devm_clk_get(&pdev->dev, "iis");
1432         if (IS_ERR(priv->clk)) {
1433                 dev_err(&pdev->dev, "Failed to get iis clock\n");
1434                 return PTR_ERR(priv->clk);
1435         }
1436
1437         ret = clk_prepare_enable(priv->clk);
1438         if (ret != 0) {
1439                 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1440                 return ret;
1441         }
1442         pri_dai->dma_playback.addr = regs_base + I2STXD;
1443         pri_dai->dma_capture.addr = regs_base + I2SRXD;
1444         pri_dai->dma_playback.chan_name = "tx";
1445         pri_dai->dma_capture.chan_name = "rx";
1446         pri_dai->dma_playback.addr_width = 4;
1447         pri_dai->dma_capture.addr_width = 4;
1448         pri_dai->quirks = quirks;
1449         pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
1450         pri_dai->priv = priv;
1451
1452         if (quirks & QUIRK_PRI_6CHAN)
1453                 pri_dai->drv->playback.channels_max = 6;
1454
1455         ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter,
1456                                                  NULL, NULL, NULL);
1457         if (ret < 0)
1458                 goto err_disable_clk;
1459
1460         if (quirks & QUIRK_SEC_DAI) {
1461                 sec_dai = &priv->dai[SAMSUNG_I2S_ID_SECONDARY - 1];
1462
1463                 sec_dai->lock = &priv->spinlock;
1464                 sec_dai->variant_regs = pri_dai->variant_regs;
1465                 sec_dai->dma_playback.addr = regs_base + I2STXDS;
1466                 sec_dai->dma_playback.chan_name = "tx-sec";
1467
1468                 if (!np) {
1469                         sec_dai->dma_playback.filter_data = i2s_pdata->dma_play_sec;
1470                         sec_dai->filter = i2s_pdata->dma_filter;
1471                 }
1472
1473                 sec_dai->dma_playback.addr_width = 4;
1474                 sec_dai->addr = pri_dai->addr;
1475                 sec_dai->quirks = quirks;
1476                 sec_dai->idma_playback.addr = idma_addr;
1477                 sec_dai->pri_dai = pri_dai;
1478                 sec_dai->priv = priv;
1479                 pri_dai->sec_dai = sec_dai;
1480
1481                 ret = i2s_create_secondary_device(priv);
1482                 if (ret < 0)
1483                         goto err_disable_clk;
1484
1485                 ret = samsung_asoc_dma_platform_register(&priv->pdev_sec->dev,
1486                                                 sec_dai->filter, "tx-sec", NULL,
1487                                                 &pdev->dev);
1488                 if (ret < 0)
1489                         goto err_disable_clk;
1490
1491         }
1492
1493         if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1494                 dev_err(&pdev->dev, "Unable to configure gpio\n");
1495                 ret = -EINVAL;
1496                 goto err_disable_clk;
1497         }
1498
1499         dev_set_drvdata(&pdev->dev, priv);
1500
1501         ret = devm_snd_soc_register_component(&pdev->dev,
1502                                         &samsung_i2s_component,
1503                                         priv->dai_drv, num_dais);
1504         if (ret < 0)
1505                 goto err_disable_clk;
1506
1507         pm_runtime_set_active(&pdev->dev);
1508         pm_runtime_enable(&pdev->dev);
1509
1510         ret = i2s_register_clock_provider(priv);
1511         if (ret < 0)
1512                 goto err_disable_pm;
1513
1514         priv->op_clk = clk_get_parent(priv->clk_table[CLK_I2S_RCLK_SRC]);
1515
1516         return 0;
1517
1518 err_disable_pm:
1519         pm_runtime_disable(&pdev->dev);
1520 err_disable_clk:
1521         clk_disable_unprepare(priv->clk);
1522         i2s_delete_secondary_device(priv);
1523         return ret;
1524 }
1525
1526 static int samsung_i2s_remove(struct platform_device *pdev)
1527 {
1528         struct samsung_i2s_priv *priv = dev_get_drvdata(&pdev->dev);
1529
1530         /* The secondary device has no driver data assigned */
1531         if (!priv)
1532                 return 0;
1533
1534         pm_runtime_get_sync(&pdev->dev);
1535         pm_runtime_disable(&pdev->dev);
1536
1537         i2s_unregister_clock_provider(priv);
1538         clk_disable_unprepare(priv->clk);
1539         pm_runtime_put_noidle(&pdev->dev);
1540         i2s_delete_secondary_device(priv);
1541
1542         return 0;
1543 }
1544
1545 static const struct samsung_i2s_variant_regs i2sv3_regs = {
1546         .bfs_off = 1,
1547         .rfs_off = 3,
1548         .sdf_off = 5,
1549         .txr_off = 8,
1550         .rclksrc_off = 10,
1551         .mss_off = 11,
1552         .cdclkcon_off = 12,
1553         .lrp_off = 7,
1554         .bfs_mask = 0x3,
1555         .rfs_mask = 0x3,
1556         .ftx0cnt_off = 8,
1557 };
1558
1559 static const struct samsung_i2s_variant_regs i2sv6_regs = {
1560         .bfs_off = 0,
1561         .rfs_off = 4,
1562         .sdf_off = 6,
1563         .txr_off = 8,
1564         .rclksrc_off = 10,
1565         .mss_off = 11,
1566         .cdclkcon_off = 12,
1567         .lrp_off = 15,
1568         .bfs_mask = 0xf,
1569         .rfs_mask = 0x3,
1570         .ftx0cnt_off = 8,
1571 };
1572
1573 static const struct samsung_i2s_variant_regs i2sv7_regs = {
1574         .bfs_off = 0,
1575         .rfs_off = 4,
1576         .sdf_off = 7,
1577         .txr_off = 9,
1578         .rclksrc_off = 11,
1579         .mss_off = 12,
1580         .cdclkcon_off = 22,
1581         .lrp_off = 15,
1582         .bfs_mask = 0xf,
1583         .rfs_mask = 0x7,
1584         .ftx0cnt_off = 0,
1585 };
1586
1587 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1588         .bfs_off = 0,
1589         .rfs_off = 3,
1590         .sdf_off = 6,
1591         .txr_off = 8,
1592         .rclksrc_off = 10,
1593         .mss_off = 11,
1594         .cdclkcon_off = 12,
1595         .lrp_off = 15,
1596         .bfs_mask = 0x7,
1597         .rfs_mask = 0x7,
1598         .ftx0cnt_off = 8,
1599 };
1600
1601 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1602         .quirks = QUIRK_NO_MUXPSR,
1603         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1604         .i2s_variant_regs = &i2sv3_regs,
1605 };
1606
1607 static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1608         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1609                         QUIRK_SUPPORTS_IDMA,
1610         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1611         .i2s_variant_regs = &i2sv3_regs,
1612 };
1613
1614 static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1615         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1616                         QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1617         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1618         .i2s_variant_regs = &i2sv6_regs,
1619 };
1620
1621 static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1622         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1623                         QUIRK_SUPPORTS_TDM,
1624         .pcm_rates = SNDRV_PCM_RATE_8000_192000,
1625         .i2s_variant_regs = &i2sv7_regs,
1626 };
1627
1628 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1629         .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1630         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1631         .i2s_variant_regs = &i2sv5_i2s1_regs,
1632 };
1633
1634 static const struct platform_device_id samsung_i2s_driver_ids[] = {
1635         {
1636                 .name           = "samsung-i2s",
1637                 .driver_data    = (kernel_ulong_t)&i2sv3_dai_type,
1638         }, {
1639                 .name           = "samsung-i2s-sec",
1640         },
1641         {},
1642 };
1643 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1644
1645 #ifdef CONFIG_OF
1646 static const struct of_device_id exynos_i2s_match[] = {
1647         {
1648                 .compatible = "samsung,s3c6410-i2s",
1649                 .data = &i2sv3_dai_type,
1650         }, {
1651                 .compatible = "samsung,s5pv210-i2s",
1652                 .data = &i2sv5_dai_type,
1653         }, {
1654                 .compatible = "samsung,exynos5420-i2s",
1655                 .data = &i2sv6_dai_type,
1656         }, {
1657                 .compatible = "samsung,exynos7-i2s",
1658                 .data = &i2sv7_dai_type,
1659         }, {
1660                 .compatible = "samsung,exynos7-i2s1",
1661                 .data = &i2sv5_dai_type_i2s1,
1662         },
1663         {},
1664 };
1665 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1666 #endif
1667
1668 static const struct dev_pm_ops samsung_i2s_pm = {
1669         SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1670                                 i2s_runtime_resume, NULL)
1671         SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1672                                      pm_runtime_force_resume)
1673 };
1674
1675 static struct platform_driver samsung_i2s_driver = {
1676         .probe  = samsung_i2s_probe,
1677         .remove = samsung_i2s_remove,
1678         .id_table = samsung_i2s_driver_ids,
1679         .driver = {
1680                 .name = "samsung-i2s",
1681                 .of_match_table = of_match_ptr(exynos_i2s_match),
1682                 .pm = &samsung_i2s_pm,
1683         },
1684 };
1685
1686 module_platform_driver(samsung_i2s_driver);
1687
1688 /* Module information */
1689 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1690 MODULE_DESCRIPTION("Samsung I2S Interface");
1691 MODULE_ALIAS("platform:samsung-i2s");
1692 MODULE_LICENSE("GPL");