2 * skl.c - Implementation of ASoC Intel SKL HD Audio driver
4 * Copyright (C) 2014-2015 Intel Corp
5 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * Derived mostly from Intel HDA driver with following copyrights:
8 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
9 * PeiSen Hou <pshou@realtek.com.tw>
10 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; version 2 of the License.
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
21 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
24 #include <linux/module.h>
25 #include <linux/pci.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/platform_device.h>
28 #include <linux/firmware.h>
29 #include <sound/pcm.h>
30 #include "../common/sst-acpi.h"
31 #include <sound/hda_register.h>
32 #include <sound/hdaudio.h>
33 #include <sound/hda_i915.h>
35 #include "skl-sst-dsp.h"
36 #include "skl-sst-ipc.h"
38 static struct skl_machine_pdata skl_dmic_data;
41 * initialize the PCI registers
43 static void skl_update_pci_byte(struct pci_dev *pci, unsigned int reg,
44 unsigned char mask, unsigned char val)
48 pci_read_config_byte(pci, reg, &data);
51 pci_write_config_byte(pci, reg, data);
54 static void skl_init_pci(struct skl *skl)
56 struct hdac_ext_bus *ebus = &skl->ebus;
59 * Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
60 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
61 * Ensuring these bits are 0 clears playback static on some HD Audio
63 * The PCI register TCSEL is defined in the Intel manuals.
65 dev_dbg(ebus_to_hbus(ebus)->dev, "Clearing TCSEL\n");
66 skl_update_pci_byte(skl->pci, AZX_PCIREG_TCSEL, 0x07, 0);
69 static void update_pci_dword(struct pci_dev *pci,
70 unsigned int reg, u32 mask, u32 val)
74 pci_read_config_dword(pci, reg, &data);
77 pci_write_config_dword(pci, reg, data);
81 * skl_enable_miscbdcge - enable/dsiable CGCTL.MISCBDCGE bits
83 * @dev: device pointer
84 * @enable: enable/disable flag
86 static void skl_enable_miscbdcge(struct device *dev, bool enable)
88 struct pci_dev *pci = to_pci_dev(dev);
91 val = enable ? AZX_CGCTL_MISCBDCGE_MASK : 0;
93 update_pci_dword(pci, AZX_PCIREG_CGCTL, AZX_CGCTL_MISCBDCGE_MASK, val);
97 * While performing reset, controller may not come back properly causing
98 * issues, so recommendation is to set CGCTL.MISCBDCGE to 0 then do reset
99 * (init chip) and then again set CGCTL.MISCBDCGE to 1
101 static int skl_init_chip(struct hdac_bus *bus, bool full_reset)
105 skl_enable_miscbdcge(bus->dev, false);
106 ret = snd_hdac_bus_init_chip(bus, full_reset);
107 skl_enable_miscbdcge(bus->dev, true);
112 /* called from IRQ */
113 static void skl_stream_update(struct hdac_bus *bus, struct hdac_stream *hstr)
115 snd_pcm_period_elapsed(hstr->substream);
118 static irqreturn_t skl_interrupt(int irq, void *dev_id)
120 struct hdac_ext_bus *ebus = dev_id;
121 struct hdac_bus *bus = ebus_to_hbus(ebus);
124 if (!pm_runtime_active(bus->dev))
127 spin_lock(&bus->reg_lock);
129 status = snd_hdac_chip_readl(bus, INTSTS);
130 if (status == 0 || status == 0xffffffff) {
131 spin_unlock(&bus->reg_lock);
136 status = snd_hdac_chip_readb(bus, RIRBSTS);
137 if (status & RIRB_INT_MASK) {
138 if (status & RIRB_INT_RESPONSE)
139 snd_hdac_bus_update_rirb(bus);
140 snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK);
143 spin_unlock(&bus->reg_lock);
145 return snd_hdac_chip_readl(bus, INTSTS) ? IRQ_WAKE_THREAD : IRQ_HANDLED;
148 static irqreturn_t skl_threaded_handler(int irq, void *dev_id)
150 struct hdac_ext_bus *ebus = dev_id;
151 struct hdac_bus *bus = ebus_to_hbus(ebus);
154 status = snd_hdac_chip_readl(bus, INTSTS);
156 snd_hdac_bus_handle_stream_irq(bus, status, skl_stream_update);
161 static int skl_acquire_irq(struct hdac_ext_bus *ebus, int do_disconnect)
163 struct skl *skl = ebus_to_skl(ebus);
164 struct hdac_bus *bus = ebus_to_hbus(ebus);
167 ret = request_threaded_irq(skl->pci->irq, skl_interrupt,
168 skl_threaded_handler,
170 KBUILD_MODNAME, ebus);
173 "unable to grab IRQ %d, disabling device\n",
178 bus->irq = skl->pci->irq;
179 pci_intx(skl->pci, 1);
185 static int _skl_suspend(struct hdac_ext_bus *ebus)
187 struct skl *skl = ebus_to_skl(ebus);
188 struct hdac_bus *bus = ebus_to_hbus(ebus);
189 struct pci_dev *pci = to_pci_dev(bus->dev);
192 snd_hdac_ext_bus_link_power_down_all(ebus);
194 ret = skl_suspend_dsp(skl);
198 snd_hdac_bus_stop_chip(bus);
199 update_pci_dword(pci, AZX_PCIREG_PGCTL,
200 AZX_PGCTL_LSRMD_MASK, AZX_PGCTL_LSRMD_MASK);
201 skl_enable_miscbdcge(bus->dev, false);
202 snd_hdac_bus_enter_link_reset(bus);
203 skl_enable_miscbdcge(bus->dev, true);
204 skl_cleanup_resources(skl);
209 static int _skl_resume(struct hdac_ext_bus *ebus)
211 struct skl *skl = ebus_to_skl(ebus);
212 struct hdac_bus *bus = ebus_to_hbus(ebus);
215 skl_init_chip(bus, true);
217 return skl_resume_dsp(skl);
221 #ifdef CONFIG_PM_SLEEP
225 static int skl_suspend(struct device *dev)
227 struct pci_dev *pci = to_pci_dev(dev);
228 struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
229 struct skl *skl = ebus_to_skl(ebus);
230 struct hdac_bus *bus = ebus_to_hbus(ebus);
234 * Do not suspend if streams which are marked ignore suspend are
235 * running, we need to save the state for these and continue
237 if (skl->supend_active) {
238 /* turn off the links and stop the CORB/RIRB DMA if it is On */
239 snd_hdac_ext_bus_link_power_down_all(ebus);
241 if (ebus->cmd_dma_state)
242 snd_hdac_bus_stop_cmd_io(&ebus->bus);
244 enable_irq_wake(bus->irq);
246 pci_disable_device(pci);
248 ret = _skl_suspend(ebus);
251 skl->skl_sst->fw_loaded = false;
254 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
255 ret = snd_hdac_display_power(bus, false);
258 "Cannot turn OFF display power on i915\n");
264 static int skl_resume(struct device *dev)
266 struct pci_dev *pci = to_pci_dev(dev);
267 struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
268 struct skl *skl = ebus_to_skl(ebus);
269 struct hdac_bus *bus = ebus_to_hbus(ebus);
270 struct hdac_ext_link *hlink = NULL;
273 /* Turned OFF in HDMI codec driver after codec reconfiguration */
274 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
275 ret = snd_hdac_display_power(bus, true);
278 "Cannot turn on display power on i915\n");
284 * resume only when we are not in suspend active, otherwise need to
287 if (skl->supend_active) {
288 pci_restore_state(pci);
289 ret = pci_enable_device(pci);
290 snd_hdac_ext_bus_link_power_up_all(ebus);
291 disable_irq_wake(bus->irq);
293 * turn On the links which are On before active suspend
294 * and start the CORB/RIRB DMA if On before
297 list_for_each_entry(hlink, &ebus->hlink_list, list) {
298 if (hlink->ref_count)
299 snd_hdac_ext_bus_link_power_up(hlink);
302 if (ebus->cmd_dma_state)
303 snd_hdac_bus_init_cmd_io(&ebus->bus);
305 ret = _skl_resume(ebus);
307 /* turn off the links which are off before suspend */
308 list_for_each_entry(hlink, &ebus->hlink_list, list) {
309 if (!hlink->ref_count)
310 snd_hdac_ext_bus_link_power_down(hlink);
313 if (!ebus->cmd_dma_state)
314 snd_hdac_bus_stop_cmd_io(&ebus->bus);
319 #endif /* CONFIG_PM_SLEEP */
322 static int skl_runtime_suspend(struct device *dev)
324 struct pci_dev *pci = to_pci_dev(dev);
325 struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
326 struct hdac_bus *bus = ebus_to_hbus(ebus);
328 dev_dbg(bus->dev, "in %s\n", __func__);
330 return _skl_suspend(ebus);
333 static int skl_runtime_resume(struct device *dev)
335 struct pci_dev *pci = to_pci_dev(dev);
336 struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
337 struct hdac_bus *bus = ebus_to_hbus(ebus);
339 dev_dbg(bus->dev, "in %s\n", __func__);
341 return _skl_resume(ebus);
343 #endif /* CONFIG_PM */
345 static const struct dev_pm_ops skl_pm = {
346 SET_SYSTEM_SLEEP_PM_OPS(skl_suspend, skl_resume)
347 SET_RUNTIME_PM_OPS(skl_runtime_suspend, skl_runtime_resume, NULL)
353 static int skl_free(struct hdac_ext_bus *ebus)
355 struct skl *skl = ebus_to_skl(ebus);
356 struct hdac_bus *bus = ebus_to_hbus(ebus);
358 skl->init_failed = 1; /* to be sure */
360 snd_hdac_ext_stop_streams(ebus);
363 free_irq(bus->irq, (void *)bus);
364 snd_hdac_bus_free_stream_pages(bus);
365 snd_hdac_stream_free_all(ebus);
366 snd_hdac_link_free_all(ebus);
369 iounmap(bus->remap_addr);
371 pci_release_regions(skl->pci);
372 pci_disable_device(skl->pci);
374 snd_hdac_ext_bus_exit(ebus);
376 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
377 snd_hdac_i915_exit(&ebus->bus);
381 static int skl_machine_device_register(struct skl *skl, void *driver_data)
383 struct hdac_bus *bus = ebus_to_hbus(&skl->ebus);
384 struct platform_device *pdev;
385 struct sst_acpi_mach *mach = driver_data;
388 mach = sst_acpi_find_machine(mach);
390 dev_err(bus->dev, "No matching machine driver found\n");
393 skl->fw_name = mach->fw_filename;
395 pdev = platform_device_alloc(mach->drv_name, -1);
397 dev_err(bus->dev, "platform device alloc failed\n");
401 ret = platform_device_add(pdev);
403 dev_err(bus->dev, "failed to add machine device\n");
404 platform_device_put(pdev);
409 dev_set_drvdata(&pdev->dev, mach->pdata);
416 static void skl_machine_device_unregister(struct skl *skl)
419 platform_device_unregister(skl->i2s_dev);
422 static int skl_dmic_device_register(struct skl *skl)
424 struct hdac_bus *bus = ebus_to_hbus(&skl->ebus);
425 struct platform_device *pdev;
428 /* SKL has one dmic port, so allocate dmic device for this */
429 pdev = platform_device_alloc("dmic-codec", -1);
431 dev_err(bus->dev, "failed to allocate dmic device\n");
435 ret = platform_device_add(pdev);
437 dev_err(bus->dev, "failed to add dmic device: %d\n", ret);
438 platform_device_put(pdev);
441 skl->dmic_dev = pdev;
446 static void skl_dmic_device_unregister(struct skl *skl)
449 platform_device_unregister(skl->dmic_dev);
453 * Probe the given codec address
455 static int probe_codec(struct hdac_ext_bus *ebus, int addr)
457 struct hdac_bus *bus = ebus_to_hbus(ebus);
458 unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) |
459 (AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
462 mutex_lock(&bus->cmd_mutex);
463 snd_hdac_bus_send_cmd(bus, cmd);
464 snd_hdac_bus_get_response(bus, addr, &res);
465 mutex_unlock(&bus->cmd_mutex);
468 dev_dbg(bus->dev, "codec #%d probed OK\n", addr);
470 return snd_hdac_ext_bus_device_init(ebus, addr);
473 /* Codec initialization */
474 static int skl_codec_create(struct hdac_ext_bus *ebus)
476 struct hdac_bus *bus = ebus_to_hbus(ebus);
479 max_slots = HDA_MAX_CODECS;
481 /* First try to probe all given codec slots */
482 for (c = 0; c < max_slots; c++) {
483 if ((bus->codec_mask & (1 << c))) {
484 if (probe_codec(ebus, c) < 0) {
486 * Some BIOSen give you wrong codec addresses
490 "Codec #%d probe error; disabling it...\n", c);
491 bus->codec_mask &= ~(1 << c);
493 * More badly, accessing to a non-existing
494 * codec often screws up the controller bus,
495 * and disturbs the further communications.
496 * Thus if an error occurs during probing,
497 * better to reset the controller bus to get
498 * back to the sanity state.
500 snd_hdac_bus_stop_chip(bus);
501 skl_init_chip(bus, true);
509 static const struct hdac_bus_ops bus_core_ops = {
510 .command = snd_hdac_bus_send_cmd,
511 .get_response = snd_hdac_bus_get_response,
517 static int skl_create(struct pci_dev *pci,
518 const struct hdac_io_ops *io_ops,
522 struct hdac_ext_bus *ebus;
528 err = pci_enable_device(pci);
532 skl = devm_kzalloc(&pci->dev, sizeof(*skl), GFP_KERNEL);
534 pci_disable_device(pci);
538 snd_hdac_ext_bus_init(ebus, &pci->dev, &bus_core_ops, io_ops);
539 ebus->bus.use_posbuf = 1;
542 ebus->bus.bdl_pos_adj = 0;
549 static int skl_i915_init(struct hdac_bus *bus)
554 * The HDMI codec is in GPU so we need to ensure that it is powered
555 * up and ready for probe
557 err = snd_hdac_i915_init(bus);
561 err = snd_hdac_display_power(bus, true);
563 dev_err(bus->dev, "Cannot turn on display power on i915\n");
570 static int skl_first_init(struct hdac_ext_bus *ebus)
572 struct skl *skl = ebus_to_skl(ebus);
573 struct hdac_bus *bus = ebus_to_hbus(ebus);
574 struct pci_dev *pci = skl->pci;
577 int cp_streams, pb_streams, start_idx;
579 err = pci_request_regions(pci, "Skylake HD audio");
583 bus->addr = pci_resource_start(pci, 0);
584 bus->remap_addr = pci_ioremap_bar(pci, 0);
585 if (bus->remap_addr == NULL) {
586 dev_err(bus->dev, "ioremap error\n");
590 snd_hdac_ext_bus_parse_capabilities(ebus);
592 if (skl_acquire_irq(ebus, 0) < 0)
596 synchronize_irq(bus->irq);
598 gcap = snd_hdac_chip_readw(bus, GCAP);
599 dev_dbg(bus->dev, "chipset global capabilities = 0x%x\n", gcap);
601 /* allow 64bit DMA address if supported by H/W */
602 if (!dma_set_mask(bus->dev, DMA_BIT_MASK(64))) {
603 dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(64));
605 dma_set_mask(bus->dev, DMA_BIT_MASK(32));
606 dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(32));
609 /* read number of streams from GCAP register */
610 cp_streams = (gcap >> 8) & 0x0f;
611 pb_streams = (gcap >> 12) & 0x0f;
613 if (!pb_streams && !cp_streams)
616 ebus->num_streams = cp_streams + pb_streams;
618 /* initialize streams */
619 snd_hdac_ext_stream_init_all
620 (ebus, 0, cp_streams, SNDRV_PCM_STREAM_CAPTURE);
621 start_idx = cp_streams;
622 snd_hdac_ext_stream_init_all
623 (ebus, start_idx, pb_streams, SNDRV_PCM_STREAM_PLAYBACK);
625 err = snd_hdac_bus_alloc_stream_pages(bus);
629 /* initialize chip */
632 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
633 err = skl_i915_init(bus);
638 skl_init_chip(bus, true);
640 /* codec detection */
641 if (!bus->codec_mask) {
642 dev_info(bus->dev, "no hda codecs found!\n");
648 static int skl_probe(struct pci_dev *pci,
649 const struct pci_device_id *pci_id)
652 struct hdac_ext_bus *ebus = NULL;
653 struct hdac_bus *bus = NULL;
654 struct hdac_ext_link *hlink = NULL;
657 /* we use ext core ops, so provide NULL for ops here */
658 err = skl_create(pci, NULL, &skl);
663 bus = ebus_to_hbus(ebus);
665 err = skl_first_init(ebus);
669 skl->pci_id = pci->device;
671 device_disable_async_suspend(bus->dev);
673 skl->nhlt = skl_nhlt_init(bus->dev);
675 if (skl->nhlt == NULL) {
680 skl_nhlt_update_topology_bin(skl);
682 pci_set_drvdata(skl->pci, ebus);
684 skl_dmic_data.dmic_num = skl_get_dmic_geo(skl);
686 /* check if dsp is there */
688 err = skl_machine_device_register(skl,
689 (void *)pci_id->driver_data);
693 err = skl_init_dsp(skl);
695 dev_dbg(bus->dev, "error failed to register dsp\n");
698 skl->skl_sst->enable_miscbdcge = skl_enable_miscbdcge;
702 snd_hdac_ext_bus_get_ml_capabilities(ebus);
704 /* create device for soc dmic */
705 err = skl_dmic_device_register(skl);
709 /* register platform dai and controls */
710 err = skl_platform_register(bus->dev);
714 /* create codec instances */
715 err = skl_codec_create(ebus);
719 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
720 err = snd_hdac_display_power(bus, false);
722 dev_err(bus->dev, "Cannot turn off display power on i915\n");
728 * we are done probling so decrement link counts
730 list_for_each_entry(hlink, &ebus->hlink_list, list)
731 snd_hdac_ext_bus_link_put(ebus, hlink);
734 pm_runtime_put_noidle(bus->dev);
735 pm_runtime_allow(bus->dev);
740 skl_platform_unregister(bus->dev);
742 skl_dmic_device_unregister(skl);
746 skl_machine_device_unregister(skl);
748 skl_nhlt_free(skl->nhlt);
750 skl->init_failed = 1;
756 static void skl_shutdown(struct pci_dev *pci)
758 struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
759 struct hdac_bus *bus = ebus_to_hbus(ebus);
760 struct hdac_stream *s;
761 struct hdac_ext_stream *stream;
767 skl = ebus_to_skl(ebus);
769 if (skl->init_failed)
772 snd_hdac_ext_stop_streams(ebus);
773 list_for_each_entry(s, &bus->stream_list, list) {
774 stream = stream_to_hdac_ext_stream(s);
775 snd_hdac_ext_stream_decouple(ebus, stream, false);
778 snd_hdac_bus_stop_chip(bus);
781 static void skl_remove(struct pci_dev *pci)
783 struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
784 struct skl *skl = ebus_to_skl(ebus);
786 release_firmware(skl->tplg);
788 if (pci_dev_run_wake(pci))
789 pm_runtime_get_noresume(&pci->dev);
791 /* codec removal, invoke bus_device_remove */
792 snd_hdac_ext_bus_device_remove(ebus);
794 skl_platform_unregister(&pci->dev);
796 skl_machine_device_unregister(skl);
797 skl_dmic_device_unregister(skl);
798 skl_nhlt_free(skl->nhlt);
800 dev_set_drvdata(&pci->dev, NULL);
803 static struct sst_acpi_mach sst_skl_devdata[] = {
804 { "INT343A", "skl_alc286s_i2s", "intel/dsp_fw_release.bin", NULL, NULL, NULL },
805 { "INT343B", "skl_n88l25_s4567", "intel/dsp_fw_release.bin",
806 NULL, NULL, &skl_dmic_data },
807 { "MX98357A", "skl_n88l25_m98357a", "intel/dsp_fw_release.bin",
808 NULL, NULL, &skl_dmic_data },
812 static struct sst_acpi_mach sst_bxtp_devdata[] = {
813 { "INT343A", "bxt_alc298s_i2s", "intel/dsp_fw_bxtn.bin", NULL, NULL, NULL },
814 { "DLGS7219", "bxt_da7219_max98357a_i2s", "intel/dsp_fw_bxtn.bin", NULL, NULL, NULL },
817 static struct sst_acpi_mach sst_kbl_devdata[] = {
818 { "INT343A", "kbl_alc286s_i2s", "intel/dsp_fw_kbl.bin", NULL, NULL, NULL },
819 { "INT343B", "kbl_n88l25_s4567", "intel/dsp_fw_kbl.bin", NULL, NULL, &skl_dmic_data },
820 { "MX98357A", "kbl_n88l25_m98357a", "intel/dsp_fw_kbl.bin", NULL, NULL, &skl_dmic_data },
825 static const struct pci_device_id skl_ids[] = {
826 /* Sunrise Point-LP */
827 { PCI_DEVICE(0x8086, 0x9d70),
828 .driver_data = (unsigned long)&sst_skl_devdata},
830 { PCI_DEVICE(0x8086, 0x5a98),
831 .driver_data = (unsigned long)&sst_bxtp_devdata},
833 { PCI_DEVICE(0x8086, 0x9D71),
834 .driver_data = (unsigned long)&sst_kbl_devdata},
837 MODULE_DEVICE_TABLE(pci, skl_ids);
839 /* pci_driver definition */
840 static struct pci_driver skl_driver = {
841 .name = KBUILD_MODNAME,
844 .remove = skl_remove,
845 .shutdown = skl_shutdown,
850 module_pci_driver(skl_driver);
852 MODULE_LICENSE("GPL v2");
853 MODULE_DESCRIPTION("Intel Skylake ASoC HDA driver");