1 // SPDX-License-Identifier: GPL-2.0-only
3 // Copyright(c) 2021-2022 Intel Corporation. All rights reserved.
5 // Authors: Cezary Rojewski <cezary.rojewski@intel.com>
6 // Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
9 // Krzysztof Hejmowski <krzysztof.hejmowski@intel.com>
10 // Michal Sienkiewicz <michal.sienkiewicz@intel.com>
13 // for sharing Intel AudioDSP expertise and helping shape the very
14 // foundation of this driver
17 #include <linux/module.h>
18 #include <linux/pci.h>
19 #include <sound/hda_codec.h>
20 #include <sound/hda_i915.h>
21 #include <sound/hda_register.h>
22 #include <sound/hdaudio.h>
23 #include <sound/hdaudio_ext.h>
24 #include <sound/intel-dsp-config.h>
25 #include <sound/intel-nhlt.h>
26 #include "../../codecs/hda.h"
31 avs_hda_update_config_dword(struct hdac_bus *bus, u32 reg, u32 mask, u32 value)
33 struct pci_dev *pci = to_pci_dev(bus->dev);
36 pci_read_config_dword(pci, reg, &data);
38 data |= (value & mask);
39 pci_write_config_dword(pci, reg, data);
42 void avs_hda_power_gating_enable(struct avs_dev *adev, bool enable)
46 value = enable ? 0 : AZX_PGCTL_LSRMD_MASK;
47 avs_hda_update_config_dword(&adev->base.core, AZX_PCIREG_PGCTL,
48 AZX_PGCTL_LSRMD_MASK, value);
51 static void avs_hdac_clock_gating_enable(struct hdac_bus *bus, bool enable)
55 value = enable ? AZX_CGCTL_MISCBDCGE_MASK : 0;
56 avs_hda_update_config_dword(bus, AZX_PCIREG_CGCTL, AZX_CGCTL_MISCBDCGE_MASK, value);
59 void avs_hda_clock_gating_enable(struct avs_dev *adev, bool enable)
61 avs_hdac_clock_gating_enable(&adev->base.core, enable);
64 void avs_hda_l1sen_enable(struct avs_dev *adev, bool enable)
68 value = enable ? AZX_VS_EM2_L1SEN : 0;
69 snd_hdac_chip_updatel(&adev->base.core, VS_EM2, AZX_VS_EM2_L1SEN, value);
72 static int avs_hdac_bus_init_streams(struct hdac_bus *bus)
74 unsigned int cp_streams, pb_streams;
77 gcap = snd_hdac_chip_readw(bus, GCAP);
78 cp_streams = (gcap >> 8) & 0x0F;
79 pb_streams = (gcap >> 12) & 0x0F;
80 bus->num_streams = cp_streams + pb_streams;
82 snd_hdac_ext_stream_init_all(bus, 0, cp_streams, SNDRV_PCM_STREAM_CAPTURE);
83 snd_hdac_ext_stream_init_all(bus, cp_streams, pb_streams, SNDRV_PCM_STREAM_PLAYBACK);
85 return snd_hdac_bus_alloc_stream_pages(bus);
88 static bool avs_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset)
90 struct hdac_ext_link *hlink;
93 avs_hdac_clock_gating_enable(bus, false);
94 ret = snd_hdac_bus_init_chip(bus, full_reset);
96 /* Reset stream-to-link mapping */
97 list_for_each_entry(hlink, &bus->hlink_list, list)
98 writel(0, hlink->ml_addr + AZX_REG_ML_LOSIDV);
100 avs_hdac_clock_gating_enable(bus, true);
102 /* Set DUM bit to address incorrect position reporting for capture
103 * streams. In order to do so, CTRL needs to be out of reset state
105 snd_hdac_chip_updatel(bus, VS_EM2, AZX_VS_EM2_DUM, AZX_VS_EM2_DUM);
110 static int probe_codec(struct hdac_bus *bus, int addr)
112 struct hda_codec *codec;
113 unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) |
114 (AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
115 unsigned int res = -1;
118 mutex_lock(&bus->cmd_mutex);
119 snd_hdac_bus_send_cmd(bus, cmd);
120 snd_hdac_bus_get_response(bus, addr, &res);
121 mutex_unlock(&bus->cmd_mutex);
125 dev_dbg(bus->dev, "codec #%d probed OK: 0x%x\n", addr, res);
127 codec = snd_hda_codec_device_init(to_hda_bus(bus), addr, "hdaudioB%dD%d", bus->idx, addr);
129 dev_err(bus->dev, "init codec failed: %ld\n", PTR_ERR(codec));
130 return PTR_ERR(codec);
133 * Allow avs_core suspend by forcing suspended state on all
134 * of its codec child devices. Component interested in
135 * dealing with hda codecs directly takes pm responsibilities
137 pm_runtime_set_suspended(hda_codec_dev(codec));
139 /* configure effectively creates new ASoC component */
140 ret = snd_hda_codec_configure(codec);
142 dev_err(bus->dev, "failed to config codec %d\n", ret);
149 static void avs_hdac_bus_probe_codecs(struct hdac_bus *bus)
153 /* First try to probe all given codec slots */
154 for (c = 0; c < HDA_MAX_CODECS; c++) {
155 if (!(bus->codec_mask & BIT(c)))
158 if (!probe_codec(bus, c))
159 /* success, continue probing */
163 * Some BIOSen give you wrong codec addresses
166 dev_warn(bus->dev, "Codec #%d probe error; disabling it...\n", c);
167 bus->codec_mask &= ~BIT(c);
169 * More badly, accessing to a non-existing
170 * codec often screws up the controller bus,
171 * and disturbs the further communications.
172 * Thus if an error occurs during probing,
173 * better to reset the controller bus to get
174 * back to the sanity state.
176 snd_hdac_bus_stop_chip(bus);
177 avs_hdac_bus_init_chip(bus, true);
181 static void avs_hda_probe_work(struct work_struct *work)
183 struct avs_dev *adev = container_of(work, struct avs_dev, probe_work);
184 struct hdac_bus *bus = &adev->base.core;
185 struct hdac_ext_link *hlink;
188 pm_runtime_set_active(bus->dev); /* clear runtime_error flag */
190 ret = snd_hdac_i915_init(bus);
192 dev_info(bus->dev, "i915 init unsuccessful: %d\n", ret);
194 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, true);
195 avs_hdac_bus_init_chip(bus, true);
196 avs_hdac_bus_probe_codecs(bus);
197 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
199 /* with all codecs probed, links can be powered down */
200 list_for_each_entry(hlink, &bus->hlink_list, list)
201 snd_hdac_ext_bus_link_put(bus, hlink);
203 snd_hdac_ext_bus_ppcap_enable(bus, true);
204 snd_hdac_ext_bus_ppcap_int_enable(bus, true);
206 ret = avs_dsp_first_boot_firmware(adev);
210 adev->nhlt = intel_nhlt_init(adev->dev);
212 dev_info(bus->dev, "platform has no NHLT\n");
214 avs_register_all_boards(adev);
217 pm_runtime_set_autosuspend_delay(bus->dev, 2000);
218 pm_runtime_use_autosuspend(bus->dev);
219 pm_runtime_mark_last_busy(bus->dev);
220 pm_runtime_put_autosuspend(bus->dev);
221 pm_runtime_allow(bus->dev);
224 static void hdac_stream_update_pos(struct hdac_stream *stream, u64 buffer_size)
226 u64 prev_pos, pos, num_bytes;
228 div64_u64_rem(stream->curr_pos, buffer_size, &prev_pos);
229 pos = snd_hdac_stream_get_pos_posbuf(stream);
232 num_bytes = (buffer_size - prev_pos) + pos;
234 num_bytes = pos - prev_pos;
236 stream->curr_pos += num_bytes;
239 /* called from IRQ */
240 static void hdac_update_stream(struct hdac_bus *bus, struct hdac_stream *stream)
242 if (stream->substream) {
243 snd_pcm_period_elapsed(stream->substream);
244 } else if (stream->cstream) {
245 u64 buffer_size = stream->cstream->runtime->buffer_size;
247 hdac_stream_update_pos(stream, buffer_size);
248 snd_compr_fragment_elapsed(stream->cstream);
252 static irqreturn_t hdac_bus_irq_handler(int irq, void *context)
254 struct hdac_bus *bus = context;
255 u32 mask, int_enable;
259 if (!pm_runtime_active(bus->dev))
262 spin_lock(&bus->reg_lock);
264 status = snd_hdac_chip_readl(bus, INTSTS);
265 if (status == 0 || status == UINT_MAX) {
266 spin_unlock(&bus->reg_lock);
271 status = snd_hdac_chip_readb(bus, RIRBSTS);
272 if (status & RIRB_INT_MASK) {
273 if (status & RIRB_INT_RESPONSE)
274 snd_hdac_bus_update_rirb(bus);
275 snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK);
278 mask = (0x1 << bus->num_streams) - 1;
280 status = snd_hdac_chip_readl(bus, INTSTS);
283 /* Disable stream interrupts; Re-enable in bottom half */
284 int_enable = snd_hdac_chip_readl(bus, INTCTL);
285 snd_hdac_chip_writel(bus, INTCTL, (int_enable & (~mask)));
286 ret = IRQ_WAKE_THREAD;
291 spin_unlock(&bus->reg_lock);
295 static irqreturn_t hdac_bus_irq_thread(int irq, void *context)
297 struct hdac_bus *bus = context;
303 status = snd_hdac_chip_readl(bus, INTSTS);
305 snd_hdac_bus_handle_stream_irq(bus, status, hdac_update_stream);
307 /* Re-enable stream interrupts */
308 mask = (0x1 << bus->num_streams) - 1;
309 spin_lock_irqsave(&bus->reg_lock, flags);
310 int_enable = snd_hdac_chip_readl(bus, INTCTL);
311 snd_hdac_chip_writel(bus, INTCTL, (int_enable | mask));
312 spin_unlock_irqrestore(&bus->reg_lock, flags);
317 static int avs_hdac_acquire_irq(struct avs_dev *adev)
319 struct hdac_bus *bus = &adev->base.core;
320 struct pci_dev *pci = to_pci_dev(bus->dev);
323 /* request one and check that we only got one interrupt */
324 ret = pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI | PCI_IRQ_LEGACY);
326 dev_err(adev->dev, "Failed to allocate IRQ vector: %d\n", ret);
330 ret = pci_request_irq(pci, 0, hdac_bus_irq_handler, hdac_bus_irq_thread, bus,
333 dev_err(adev->dev, "Failed to request stream IRQ handler: %d\n", ret);
337 ret = pci_request_irq(pci, 0, avs_dsp_irq_handler, avs_dsp_irq_thread, adev,
340 dev_err(adev->dev, "Failed to request IPC IRQ handler: %d\n", ret);
341 goto free_stream_irq;
347 pci_free_irq(pci, 0, bus);
349 pci_free_irq_vectors(pci);
353 static int avs_bus_init(struct avs_dev *adev, struct pci_dev *pci, const struct pci_device_id *id)
355 struct hda_bus *bus = &adev->base;
357 struct device *dev = &pci->dev;
360 ret = snd_hdac_ext_bus_init(&bus->core, dev, NULL, &soc_hda_ext_bus_ops);
364 bus->core.use_posbuf = 1;
365 bus->core.bdl_pos_adj = 0;
366 bus->core.sync_write = 1;
368 bus->mixer_assigned = -1;
369 mutex_init(&bus->prepare_mutex);
371 ipc = devm_kzalloc(dev, sizeof(*ipc), GFP_KERNEL);
374 ret = avs_ipc_init(ipc, dev);
379 adev->spec = (const struct avs_spec *)id->driver_data;
381 adev->hw_cfg.dsp_cores = hweight_long(AVS_MAIN_CORE_MASK);
382 INIT_WORK(&adev->probe_work, avs_hda_probe_work);
383 INIT_LIST_HEAD(&adev->comp_list);
384 INIT_LIST_HEAD(&adev->path_list);
385 INIT_LIST_HEAD(&adev->fw_list);
386 init_completion(&adev->fw_ready);
387 spin_lock_init(&adev->path_list_lock);
388 mutex_init(&adev->modres_mutex);
389 mutex_init(&adev->comp_list_mutex);
390 mutex_init(&adev->path_mutex);
395 static int avs_pci_probe(struct pci_dev *pci, const struct pci_device_id *id)
397 struct hdac_bus *bus;
398 struct avs_dev *adev;
399 struct device *dev = &pci->dev;
402 ret = snd_intel_dsp_driver_probe(pci);
403 if (ret != SND_INTEL_DSP_DRIVER_ANY && ret != SND_INTEL_DSP_DRIVER_AVS)
406 ret = pcim_enable_device(pci);
410 adev = devm_kzalloc(dev, sizeof(*adev), GFP_KERNEL);
413 ret = avs_bus_init(adev, pci, id);
415 dev_err(dev, "failed to init avs bus: %d\n", ret);
419 ret = pci_request_regions(pci, "AVS HDAudio");
423 bus = &adev->base.core;
424 bus->addr = pci_resource_start(pci, 0);
425 bus->remap_addr = pci_ioremap_bar(pci, 0);
426 if (!bus->remap_addr) {
427 dev_err(bus->dev, "ioremap error\n");
432 adev->dsp_ba = pci_ioremap_bar(pci, 4);
434 dev_err(bus->dev, "ioremap error\n");
439 snd_hdac_bus_parse_capabilities(bus);
441 snd_hdac_ext_bus_get_ml_capabilities(bus);
443 if (!dma_set_mask(dev, DMA_BIT_MASK(64))) {
444 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
446 dma_set_mask(dev, DMA_BIT_MASK(32));
447 dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
449 dma_set_max_seg_size(dev, UINT_MAX);
451 ret = avs_hdac_bus_init_streams(bus);
453 dev_err(dev, "failed to init streams: %d\n", ret);
454 goto err_init_streams;
457 ret = avs_hdac_acquire_irq(adev);
459 dev_err(bus->dev, "failed to acquire irq: %d\n", ret);
460 goto err_acquire_irq;
464 pci_set_drvdata(pci, bus);
465 device_disable_async_suspend(dev);
467 schedule_work(&adev->probe_work);
472 snd_hdac_bus_free_stream_pages(bus);
473 snd_hdac_stream_free_all(bus);
475 iounmap(adev->dsp_ba);
477 iounmap(bus->remap_addr);
479 pci_release_regions(pci);
483 static void avs_pci_remove(struct pci_dev *pci)
485 struct hdac_device *hdev, *save;
486 struct hdac_bus *bus = pci_get_drvdata(pci);
487 struct avs_dev *adev = hdac_to_avs(bus);
489 cancel_work_sync(&adev->probe_work);
490 avs_ipc_block(adev->ipc);
492 avs_unregister_all_boards(adev);
495 intel_nhlt_free(adev->nhlt);
497 if (avs_platattr_test(adev, CLDMA))
498 hda_cldma_free(&code_loader);
500 snd_hdac_stop_streams_and_chip(bus);
501 avs_dsp_op(adev, int_control, false);
502 snd_hdac_ext_bus_ppcap_int_enable(bus, false);
504 /* it is safe to remove all codecs from the system now */
505 list_for_each_entry_safe(hdev, save, &bus->codec_list, list)
506 snd_hda_codec_unregister(hdac_to_hda_codec(hdev));
508 snd_hdac_bus_free_stream_pages(bus);
509 snd_hdac_stream_free_all(bus);
510 /* reverse ml_capabilities */
511 snd_hdac_link_free_all(bus);
512 snd_hdac_ext_bus_exit(bus);
514 avs_dsp_core_disable(adev, GENMASK(adev->hw_cfg.dsp_cores - 1, 0));
515 snd_hdac_ext_bus_ppcap_enable(bus, false);
517 /* snd_hdac_stop_streams_and_chip does that already? */
518 snd_hdac_bus_stop_chip(bus);
519 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
520 if (bus->audio_component)
521 snd_hdac_i915_exit(bus);
523 avs_module_info_free(adev);
524 pci_free_irq(pci, 0, adev);
525 pci_free_irq(pci, 0, bus);
526 pci_free_irq_vectors(pci);
527 iounmap(bus->remap_addr);
528 iounmap(adev->dsp_ba);
529 pci_release_regions(pci);
531 /* Firmware is not needed anymore */
532 avs_release_firmwares(adev);
534 /* pm_runtime_forbid() can rpm_resume() which we do not want */
535 pm_runtime_disable(&pci->dev);
536 pm_runtime_forbid(&pci->dev);
537 pm_runtime_enable(&pci->dev);
538 pm_runtime_get_noresume(&pci->dev);
541 static int __maybe_unused avs_suspend_common(struct avs_dev *adev)
543 struct hdac_bus *bus = &adev->base.core;
546 flush_work(&adev->probe_work);
548 snd_hdac_ext_bus_link_power_down_all(bus);
550 ret = avs_ipc_set_dx(adev, AVS_MAIN_CORE_MASK, false);
552 * pm_runtime is blocked on DSP failure but system-wide suspend is not.
553 * Do not block entire system from suspending if that's the case.
555 if (ret && ret != -EPERM) {
556 dev_err(adev->dev, "set dx failed: %d\n", ret);
557 return AVS_IPC_RET(ret);
560 avs_ipc_block(adev->ipc);
561 avs_dsp_op(adev, int_control, false);
562 snd_hdac_ext_bus_ppcap_int_enable(bus, false);
564 ret = avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
566 dev_err(adev->dev, "core_mask %ld disable failed: %d\n", AVS_MAIN_CORE_MASK, ret);
570 snd_hdac_ext_bus_ppcap_enable(bus, false);
571 /* disable LP SRAM retention */
572 avs_hda_power_gating_enable(adev, false);
573 snd_hdac_bus_stop_chip(bus);
574 /* disable CG when putting controller to reset */
575 avs_hdac_clock_gating_enable(bus, false);
576 snd_hdac_bus_enter_link_reset(bus);
577 avs_hdac_clock_gating_enable(bus, true);
579 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
584 static int __maybe_unused avs_resume_common(struct avs_dev *adev, bool purge)
586 struct hdac_bus *bus = &adev->base.core;
587 struct hdac_ext_link *hlink;
590 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, true);
591 avs_hdac_bus_init_chip(bus, true);
593 snd_hdac_ext_bus_ppcap_enable(bus, true);
594 snd_hdac_ext_bus_ppcap_int_enable(bus, true);
596 ret = avs_dsp_boot_firmware(adev, purge);
598 dev_err(adev->dev, "firmware boot failed: %d\n", ret);
602 /* turn off the links that were off before suspend */
603 list_for_each_entry(hlink, &bus->hlink_list, list) {
604 if (!hlink->ref_count)
605 snd_hdac_ext_bus_link_power_down(hlink);
608 /* check dma status and clean up CORB/RIRB buffers */
609 if (!bus->cmd_dma_state)
610 snd_hdac_bus_stop_cmd_io(bus);
615 static int __maybe_unused avs_suspend(struct device *dev)
617 return avs_suspend_common(to_avs_dev(dev));
620 static int __maybe_unused avs_resume(struct device *dev)
622 return avs_resume_common(to_avs_dev(dev), true);
625 static int __maybe_unused avs_runtime_suspend(struct device *dev)
627 return avs_suspend_common(to_avs_dev(dev));
630 static int __maybe_unused avs_runtime_resume(struct device *dev)
632 return avs_resume_common(to_avs_dev(dev), true);
635 static const struct dev_pm_ops avs_dev_pm = {
636 SET_SYSTEM_SLEEP_PM_OPS(avs_suspend, avs_resume)
637 SET_RUNTIME_PM_OPS(avs_runtime_suspend, avs_runtime_resume, NULL)
640 static const struct avs_spec skl_desc = {
648 .dsp_ops = &skl_dsp_ops,
650 .attributes = AVS_PLATATTR_CLDMA,
651 .sram_base_offset = SKL_ADSP_SRAM_BASE_OFFSET,
652 .sram_window_size = SKL_ADSP_SRAM_WINDOW_SIZE,
653 .rom_status = SKL_ADSP_SRAM_BASE_OFFSET,
656 static const struct avs_spec apl_desc = {
664 .dsp_ops = &apl_dsp_ops,
666 .attributes = AVS_PLATATTR_IMR,
667 .sram_base_offset = APL_ADSP_SRAM_BASE_OFFSET,
668 .sram_window_size = APL_ADSP_SRAM_WINDOW_SIZE,
669 .rom_status = APL_ADSP_SRAM_BASE_OFFSET,
672 static const struct pci_device_id avs_ids[] = {
673 { PCI_VDEVICE(INTEL, 0x9d70), (unsigned long)&skl_desc }, /* SKL */
674 { PCI_VDEVICE(INTEL, 0x9d71), (unsigned long)&skl_desc }, /* KBL */
675 { PCI_VDEVICE(INTEL, 0x5a98), (unsigned long)&apl_desc }, /* APL */
676 { PCI_VDEVICE(INTEL, 0x3198), (unsigned long)&apl_desc }, /* GML */
679 MODULE_DEVICE_TABLE(pci, avs_ids);
681 static struct pci_driver avs_pci_driver = {
682 .name = KBUILD_MODNAME,
684 .probe = avs_pci_probe,
685 .remove = avs_pci_remove,
690 module_pci_driver(avs_pci_driver);
692 MODULE_AUTHOR("Cezary Rojewski <cezary.rojewski@intel.com>");
693 MODULE_AUTHOR("Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>");
694 MODULE_DESCRIPTION("Intel cAVS sound driver");
695 MODULE_LICENSE("GPL");