2 * imx-ssi.c -- ALSA Soc Audio Layer
4 * Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
6 * This code is based on code copyrighted by Freescale,
7 * Liam Girdwood, Javier Martin and probably others.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 * The i.MX SSI core has some nasty limitations in AC97 mode. While most
16 * sane processor vendors have a FIFO per AC97 slot, the i.MX has only
17 * one FIFO which combines all valid receive slots. We cannot even select
18 * which slots we want to receive. The WM9712 with which this driver
19 * was developed with always sends GPIO status data in slot 12 which
20 * we receive in our (PCM-) data stream. The only chance we have is to
21 * manually skip this data in the FIQ handler. With sampling rates different
22 * from 48000Hz not every frame has valid receive data, so the ratio
23 * between pcm data and GPIO status data changes. Our FIQ handler is not
24 * able to handle this, hence this driver only works with 48000Hz sampling
26 * Reading and writing AC97 registers is another challenge. The core
27 * provides us status bits when the read register is updated with *another*
28 * value. When we read the same register two times (and the register still
29 * contains the same value) these status bits are not set. We work
30 * around this by not polling these bits but only wait a fixed delay.
34 #include <linux/clk.h>
35 #include <linux/delay.h>
36 #include <linux/device.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/init.h>
39 #include <linux/interrupt.h>
40 #include <linux/module.h>
41 #include <linux/platform_device.h>
42 #include <linux/slab.h>
44 #include <sound/core.h>
45 #include <sound/initval.h>
46 #include <sound/pcm.h>
47 #include <sound/pcm_params.h>
48 #include <sound/soc.h>
51 #include <mach/hardware.h>
55 #define SSI_SACNT_DEFAULT (SSI_SACNT_AC97EN | SSI_SACNT_FV)
58 * SSI Network Mode or TDM slots configuration.
59 * Should only be called when port is inactive (i.e. SSIEN = 0).
61 static int imx_ssi_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
62 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
64 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
67 sccr = readl(ssi->base + SSI_STCCR);
68 sccr &= ~SSI_STCCR_DC_MASK;
69 sccr |= SSI_STCCR_DC(slots - 1);
70 writel(sccr, ssi->base + SSI_STCCR);
72 sccr = readl(ssi->base + SSI_SRCCR);
73 sccr &= ~SSI_STCCR_DC_MASK;
74 sccr |= SSI_STCCR_DC(slots - 1);
75 writel(sccr, ssi->base + SSI_SRCCR);
77 writel(tx_mask, ssi->base + SSI_STMSK);
78 writel(rx_mask, ssi->base + SSI_SRMSK);
84 * SSI DAI format configuration.
85 * Should only be called when port is inactive (i.e. SSIEN = 0).
87 static int imx_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
89 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
92 scr = readl(ssi->base + SSI_SCR) & ~(SSI_SCR_SYN | SSI_SCR_NET);
95 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
96 case SND_SOC_DAIFMT_I2S:
97 /* data on rising edge of bclk, frame low 1clk before data */
98 strcr |= SSI_STCR_TFSI | SSI_STCR_TEFS | SSI_STCR_TXBIT0;
100 if (ssi->flags & IMX_SSI_USE_I2S_SLAVE) {
101 scr &= ~SSI_I2S_MODE_MASK;
102 scr |= SSI_SCR_I2S_MODE_SLAVE;
105 case SND_SOC_DAIFMT_LEFT_J:
106 /* data on rising edge of bclk, frame high with data */
107 strcr |= SSI_STCR_TXBIT0;
109 case SND_SOC_DAIFMT_DSP_B:
110 /* data on rising edge of bclk, frame high with data */
111 strcr |= SSI_STCR_TFSL | SSI_STCR_TXBIT0;
113 case SND_SOC_DAIFMT_DSP_A:
114 /* data on rising edge of bclk, frame high 1clk before data */
115 strcr |= SSI_STCR_TFSL | SSI_STCR_TXBIT0 | SSI_STCR_TEFS;
119 /* DAI clock inversion */
120 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
121 case SND_SOC_DAIFMT_IB_IF:
122 strcr |= SSI_STCR_TFSI;
123 strcr &= ~SSI_STCR_TSCKP;
125 case SND_SOC_DAIFMT_IB_NF:
126 strcr &= ~(SSI_STCR_TSCKP | SSI_STCR_TFSI);
128 case SND_SOC_DAIFMT_NB_IF:
129 strcr |= SSI_STCR_TFSI | SSI_STCR_TSCKP;
131 case SND_SOC_DAIFMT_NB_NF:
132 strcr &= ~SSI_STCR_TFSI;
133 strcr |= SSI_STCR_TSCKP;
137 /* DAI clock master masks */
138 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
139 case SND_SOC_DAIFMT_CBM_CFM:
142 /* Master mode not implemented, needs handling of clocks. */
146 strcr |= SSI_STCR_TFEN0;
148 if (ssi->flags & IMX_SSI_NET)
150 if (ssi->flags & IMX_SSI_SYN)
153 writel(strcr, ssi->base + SSI_STCR);
154 writel(strcr, ssi->base + SSI_SRCR);
155 writel(scr, ssi->base + SSI_SCR);
161 * SSI system clock configuration.
162 * Should only be called when port is inactive (i.e. SSIEN = 0).
164 static int imx_ssi_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
165 int clk_id, unsigned int freq, int dir)
167 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
170 scr = readl(ssi->base + SSI_SCR);
173 case IMX_SSP_SYS_CLK:
174 if (dir == SND_SOC_CLOCK_OUT)
175 scr |= SSI_SCR_SYS_CLK_EN;
177 scr &= ~SSI_SCR_SYS_CLK_EN;
183 writel(scr, ssi->base + SSI_SCR);
190 * Should only be called when port is inactive (i.e. SSIEN = 0).
192 static int imx_ssi_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
195 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
198 stccr = readl(ssi->base + SSI_STCCR);
199 srccr = readl(ssi->base + SSI_SRCCR);
202 case IMX_SSI_TX_DIV_2:
203 stccr &= ~SSI_STCCR_DIV2;
206 case IMX_SSI_TX_DIV_PSR:
207 stccr &= ~SSI_STCCR_PSR;
210 case IMX_SSI_TX_DIV_PM:
212 stccr |= SSI_STCCR_PM(div);
214 case IMX_SSI_RX_DIV_2:
215 stccr &= ~SSI_STCCR_DIV2;
218 case IMX_SSI_RX_DIV_PSR:
219 stccr &= ~SSI_STCCR_PSR;
222 case IMX_SSI_RX_DIV_PM:
224 stccr |= SSI_STCCR_PM(div);
230 writel(stccr, ssi->base + SSI_STCCR);
231 writel(srccr, ssi->base + SSI_SRCCR);
236 static int imx_ssi_startup(struct snd_pcm_substream *substream,
237 struct snd_soc_dai *cpu_dai)
239 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
240 struct imx_pcm_dma_params *dma_data;
243 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
244 dma_data = &ssi->dma_params_tx;
246 dma_data = &ssi->dma_params_rx;
248 snd_soc_dai_set_dma_data(cpu_dai, substream, dma_data);
254 * Should only be called when port is inactive (i.e. SSIEN = 0),
255 * although can be called multiple times by upper layers.
257 static int imx_ssi_hw_params(struct snd_pcm_substream *substream,
258 struct snd_pcm_hw_params *params,
259 struct snd_soc_dai *cpu_dai)
261 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
265 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
270 if (ssi->flags & IMX_SSI_SYN)
273 sccr = readl(ssi->base + reg) & ~SSI_STCCR_WL_MASK;
275 /* DAI data (word) size */
276 switch (params_format(params)) {
277 case SNDRV_PCM_FORMAT_S16_LE:
278 sccr |= SSI_SRCCR_WL(16);
280 case SNDRV_PCM_FORMAT_S20_3LE:
281 sccr |= SSI_SRCCR_WL(20);
283 case SNDRV_PCM_FORMAT_S24_LE:
284 sccr |= SSI_SRCCR_WL(24);
288 writel(sccr, ssi->base + reg);
293 static int imx_ssi_trigger(struct snd_pcm_substream *substream, int cmd,
294 struct snd_soc_dai *dai)
296 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(dai);
297 unsigned int sier_bits, sier;
300 scr = readl(ssi->base + SSI_SCR);
301 sier = readl(ssi->base + SSI_SIER);
303 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
304 if (ssi->flags & IMX_SSI_DMA)
305 sier_bits = SSI_SIER_TDMAE;
307 sier_bits = SSI_SIER_TIE | SSI_SIER_TFE0_EN;
309 if (ssi->flags & IMX_SSI_DMA)
310 sier_bits = SSI_SIER_RDMAE;
312 sier_bits = SSI_SIER_RIE | SSI_SIER_RFF0_EN;
316 case SNDRV_PCM_TRIGGER_START:
317 case SNDRV_PCM_TRIGGER_RESUME:
318 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
319 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
325 if (++ssi->enabled == 1)
326 scr |= SSI_SCR_SSIEN;
330 case SNDRV_PCM_TRIGGER_STOP:
331 case SNDRV_PCM_TRIGGER_SUSPEND:
332 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
333 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
339 if (--ssi->enabled == 0)
340 scr &= ~SSI_SCR_SSIEN;
347 if (!(ssi->flags & IMX_SSI_USE_AC97))
348 /* rx/tx are always enabled to access ac97 registers */
349 writel(scr, ssi->base + SSI_SCR);
351 writel(sier, ssi->base + SSI_SIER);
356 static const struct snd_soc_dai_ops imx_ssi_pcm_dai_ops = {
357 .startup = imx_ssi_startup,
358 .hw_params = imx_ssi_hw_params,
359 .set_fmt = imx_ssi_set_dai_fmt,
360 .set_clkdiv = imx_ssi_set_dai_clkdiv,
361 .set_sysclk = imx_ssi_set_dai_sysclk,
362 .set_tdm_slot = imx_ssi_set_dai_tdm_slot,
363 .trigger = imx_ssi_trigger,
366 static int imx_ssi_dai_probe(struct snd_soc_dai *dai)
368 struct imx_ssi *ssi = dev_get_drvdata(dai->dev);
371 snd_soc_dai_set_drvdata(dai, ssi);
373 val = SSI_SFCSR_TFWM0(ssi->dma_params_tx.burstsize) |
374 SSI_SFCSR_RFWM0(ssi->dma_params_rx.burstsize);
375 writel(val, ssi->base + SSI_SFCSR);
380 static struct snd_soc_dai_driver imx_ssi_dai = {
381 .probe = imx_ssi_dai_probe,
385 .rates = SNDRV_PCM_RATE_8000_96000,
386 .formats = SNDRV_PCM_FMTBIT_S16_LE,
391 .rates = SNDRV_PCM_RATE_8000_96000,
392 .formats = SNDRV_PCM_FMTBIT_S16_LE,
394 .ops = &imx_ssi_pcm_dai_ops,
397 static struct snd_soc_dai_driver imx_ac97_dai = {
398 .probe = imx_ssi_dai_probe,
401 .stream_name = "AC97 Playback",
404 .rates = SNDRV_PCM_RATE_48000,
405 .formats = SNDRV_PCM_FMTBIT_S16_LE,
408 .stream_name = "AC97 Capture",
411 .rates = SNDRV_PCM_RATE_48000,
412 .formats = SNDRV_PCM_FMTBIT_S16_LE,
414 .ops = &imx_ssi_pcm_dai_ops,
417 static void setup_channel_to_ac97(struct imx_ssi *imx_ssi)
419 void __iomem *base = imx_ssi->base;
421 writel(0x0, base + SSI_SCR);
422 writel(0x0, base + SSI_STCR);
423 writel(0x0, base + SSI_SRCR);
425 writel(SSI_SCR_SYN | SSI_SCR_NET, base + SSI_SCR);
427 writel(SSI_SFCSR_RFWM0(8) |
430 SSI_SFCSR_TFWM1(8), base + SSI_SFCSR);
432 writel(SSI_STCCR_WL(16) | SSI_STCCR_DC(12), base + SSI_STCCR);
433 writel(SSI_STCCR_WL(16) | SSI_STCCR_DC(12), base + SSI_SRCCR);
435 writel(SSI_SCR_SYN | SSI_SCR_NET | SSI_SCR_SSIEN, base + SSI_SCR);
436 writel(SSI_SOR_WAIT(3), base + SSI_SOR);
438 writel(SSI_SCR_SYN | SSI_SCR_NET | SSI_SCR_SSIEN |
439 SSI_SCR_TE | SSI_SCR_RE,
442 writel(SSI_SACNT_DEFAULT, base + SSI_SACNT);
443 writel(0xff, base + SSI_SACCDIS);
444 writel(0x300, base + SSI_SACCEN);
447 static struct imx_ssi *ac97_ssi;
449 static void imx_ssi_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
452 struct imx_ssi *imx_ssi = ac97_ssi;
453 void __iomem *base = imx_ssi->base;
460 pr_debug("%s: 0x%02x 0x%04x\n", __func__, reg, val);
463 writel(lreg, base + SSI_SACADD);
466 writel(lval , base + SSI_SACDAT);
468 writel(SSI_SACNT_DEFAULT | SSI_SACNT_WR, base + SSI_SACNT);
472 static unsigned short imx_ssi_ac97_read(struct snd_ac97 *ac97,
475 struct imx_ssi *imx_ssi = ac97_ssi;
476 void __iomem *base = imx_ssi->base;
478 unsigned short val = -1;
481 lreg = (reg & 0x7f) << 12 ;
482 writel(lreg, base + SSI_SACADD);
483 writel(SSI_SACNT_DEFAULT | SSI_SACNT_RD, base + SSI_SACNT);
487 val = (readl(base + SSI_SACDAT) >> 4) & 0xffff;
489 pr_debug("%s: 0x%02x 0x%04x\n", __func__, reg, val);
494 static void imx_ssi_ac97_reset(struct snd_ac97 *ac97)
496 struct imx_ssi *imx_ssi = ac97_ssi;
498 if (imx_ssi->ac97_reset)
499 imx_ssi->ac97_reset(ac97);
502 static void imx_ssi_ac97_warm_reset(struct snd_ac97 *ac97)
504 struct imx_ssi *imx_ssi = ac97_ssi;
506 if (imx_ssi->ac97_warm_reset)
507 imx_ssi->ac97_warm_reset(ac97);
510 struct snd_ac97_bus_ops soc_ac97_ops = {
511 .read = imx_ssi_ac97_read,
512 .write = imx_ssi_ac97_write,
513 .reset = imx_ssi_ac97_reset,
514 .warm_reset = imx_ssi_ac97_warm_reset
516 EXPORT_SYMBOL_GPL(soc_ac97_ops);
518 static int imx_ssi_probe(struct platform_device *pdev)
520 struct resource *res;
522 struct imx_ssi_platform_data *pdata = pdev->dev.platform_data;
524 struct snd_soc_dai_driver *dai;
526 ssi = devm_kzalloc(&pdev->dev, sizeof(*ssi), GFP_KERNEL);
529 dev_set_drvdata(&pdev->dev, ssi);
532 ssi->ac97_reset = pdata->ac97_reset;
533 ssi->ac97_warm_reset = pdata->ac97_warm_reset;
534 ssi->flags = pdata->flags;
537 ssi->irq = platform_get_irq(pdev, 0);
539 ssi->clk = devm_clk_get(&pdev->dev, NULL);
540 if (IS_ERR(ssi->clk)) {
541 ret = PTR_ERR(ssi->clk);
542 dev_err(&pdev->dev, "Cannot get the clock: %d\n",
546 clk_prepare_enable(ssi->clk);
548 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
551 goto failed_get_resource;
554 ssi->base = devm_request_and_ioremap(&pdev->dev, res);
556 dev_err(&pdev->dev, "ioremap failed\n");
558 goto failed_register;
561 if (ssi->flags & IMX_SSI_USE_AC97) {
563 dev_err(&pdev->dev, "AC'97 SSI already registered\n");
565 goto failed_register;
568 setup_channel_to_ac97(ssi);
573 writel(0x0, ssi->base + SSI_SIER);
575 ssi->dma_params_rx.dma_addr = res->start + SSI_SRX0;
576 ssi->dma_params_tx.dma_addr = res->start + SSI_STX0;
578 ssi->dma_params_tx.burstsize = 6;
579 ssi->dma_params_rx.burstsize = 4;
581 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx0");
583 ssi->dma_params_tx.dma = res->start;
585 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx0");
587 ssi->dma_params_rx.dma = res->start;
589 platform_set_drvdata(pdev, ssi);
591 ret = snd_soc_register_dai(&pdev->dev, dai);
593 dev_err(&pdev->dev, "register DAI failed\n");
594 goto failed_register;
597 ssi->soc_platform_pdev_fiq = platform_device_alloc("imx-fiq-pcm-audio", pdev->id);
598 if (!ssi->soc_platform_pdev_fiq) {
600 goto failed_pdev_fiq_alloc;
603 platform_set_drvdata(ssi->soc_platform_pdev_fiq, ssi);
604 ret = platform_device_add(ssi->soc_platform_pdev_fiq);
606 dev_err(&pdev->dev, "failed to add platform device\n");
607 goto failed_pdev_fiq_add;
610 ssi->soc_platform_pdev = platform_device_alloc("imx-pcm-audio", pdev->id);
611 if (!ssi->soc_platform_pdev) {
613 goto failed_pdev_alloc;
616 platform_set_drvdata(ssi->soc_platform_pdev, ssi);
617 ret = platform_device_add(ssi->soc_platform_pdev);
619 dev_err(&pdev->dev, "failed to add platform device\n");
620 goto failed_pdev_add;
626 platform_device_put(ssi->soc_platform_pdev);
628 platform_device_del(ssi->soc_platform_pdev_fiq);
630 platform_device_put(ssi->soc_platform_pdev_fiq);
631 failed_pdev_fiq_alloc:
632 snd_soc_unregister_dai(&pdev->dev);
634 release_mem_region(res->start, resource_size(res));
636 clk_disable_unprepare(ssi->clk);
642 static int __devexit imx_ssi_remove(struct platform_device *pdev)
644 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
645 struct imx_ssi *ssi = platform_get_drvdata(pdev);
647 platform_device_unregister(ssi->soc_platform_pdev);
648 platform_device_unregister(ssi->soc_platform_pdev_fiq);
650 snd_soc_unregister_dai(&pdev->dev);
652 if (ssi->flags & IMX_SSI_USE_AC97)
655 release_mem_region(res->start, resource_size(res));
656 clk_disable_unprepare(ssi->clk);
661 static struct platform_driver imx_ssi_driver = {
662 .probe = imx_ssi_probe,
663 .remove = __devexit_p(imx_ssi_remove),
667 .owner = THIS_MODULE,
671 module_platform_driver(imx_ssi_driver);
673 /* Module information */
674 MODULE_AUTHOR("Sascha Hauer, <s.hauer@pengutronix.de>");
675 MODULE_DESCRIPTION("i.MX I2S/ac97 SoC Interface");
676 MODULE_LICENSE("GPL");
677 MODULE_ALIAS("platform:imx-ssi");