sound/soc/codecs/rt5682-sdw.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 //
   3 // rt5682-sdw.c  --  RT5682 ALSA SoC audio component driver
   4 //
   5 // Copyright 2019 Realtek Semiconductor Corp.
   6 // Author: Oder Chiou <oder_chiou@realtek.com>
   7 //
   8
   9 #include <linux/module.h>
  10 #include <linux/moduleparam.h>
  11 #include <linux/init.h>
  12 #include <linux/delay.h>
  13 #include <linux/pm.h>
  14 #include <linux/acpi.h>
  15 #include <linux/gpio.h>
  16 #include <linux/of_gpio.h>
  17 #include <linux/pm_runtime.h>
  18 #include <linux/regulator/consumer.h>
  19 #include <linux/mutex.h>
  20 #include <linux/soundwire/sdw.h>
  21 #include <linux/soundwire/sdw_type.h>
  22 #include <linux/soundwire/sdw_registers.h>
  23 #include <sound/core.h>
  24 #include <sound/pcm.h>
  25 #include <sound/pcm_params.h>
  26 #include <sound/jack.h>
  27 #include <sound/sdw.h>
  28 #include <sound/soc.h>
  29 #include <sound/soc-dapm.h>
  30 #include <sound/initval.h>
  31 #include <sound/tlv.h>
  32
  33 #include "rt5682.h"
  34
  35 #define RT5682_SDW_ADDR_L                       0x3000
  36 #define RT5682_SDW_ADDR_H                       0x3001
  37 #define RT5682_SDW_DATA_L                       0x3004
  38 #define RT5682_SDW_DATA_H                       0x3005
  39 #define RT5682_SDW_CMD                          0x3008
  40
  41 static int rt5682_sdw_read(void *context, unsigned int reg, unsigned int *val)
  42 {
  43         struct device *dev = context;
  44         struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
  45         unsigned int data_l, data_h;
  46
  47         regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 0);
  48         regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff);
  49         regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff));
  50         regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_H, &data_h);
  51         regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_L, &data_l);
  52
  53         *val = (data_h << 8) | data_l;
  54
  55         dev_vdbg(dev, "[%s] %04x => %04x\n", __func__, reg, *val);
  56
  57         return 0;
  58 }
  59
  60 static int rt5682_sdw_write(void *context, unsigned int reg, unsigned int val)
  61 {
  62         struct device *dev = context;
  63         struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
  64
  65         regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 1);
  66         regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff);
  67         regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff));
  68         regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_H, (val >> 8) & 0xff);
  69         regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_L, (val & 0xff));
  70
  71         dev_vdbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val);
  72
  73         return 0;
  74 }
  75
  76 static const struct regmap_config rt5682_sdw_indirect_regmap = {
  77         .reg_bits = 16,
  78         .val_bits = 16,
  79         .max_register = RT5682_I2C_MODE,
  80         .volatile_reg = rt5682_volatile_register,
  81         .readable_reg = rt5682_readable_register,
  82         .cache_type = REGCACHE_MAPLE,
  83         .reg_defaults = rt5682_reg,
  84         .num_reg_defaults = RT5682_REG_NUM,
  85         .use_single_read = true,
  86         .use_single_write = true,
  87         .reg_read = rt5682_sdw_read,
  88         .reg_write = rt5682_sdw_write,
  89 };
  90
  91 static int rt5682_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
  92                                  int direction)
  93 {
  94         snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
  95
  96         return 0;
  97 }
  98
  99 static void rt5682_sdw_shutdown(struct snd_pcm_substream *substream,
 100                                 struct snd_soc_dai *dai)
 101 {
 102         snd_soc_dai_set_dma_data(dai, substream, NULL);
 103 }
 104
 105 static int rt5682_sdw_hw_params(struct snd_pcm_substream *substream,
 106                                 struct snd_pcm_hw_params *params,
 107                                 struct snd_soc_dai *dai)
 108 {
 109         struct snd_soc_component *component = dai->component;
 110         struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
 111         struct sdw_stream_config stream_config = {0};
 112         struct sdw_port_config port_config = {0};
 113         struct sdw_stream_runtime *sdw_stream;
 114         int retval;
 115         unsigned int val_p = 0, val_c = 0, osr_p = 0, osr_c = 0;
 116
 117         dev_dbg(dai->dev, "%s %s", __func__, dai->name);
 118
 119         sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
 120         if (!sdw_stream)
 121                 return -ENOMEM;
 122
 123         if (!rt5682->slave)
 124                 return -EINVAL;
 125
 126         /* SoundWire specific configuration */
 127         snd_sdw_params_to_config(substream, params, &stream_config, &port_config);
 128
 129         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 130                 port_config.num = 1;
 131         else
 132                 port_config.num = 2;
 133
 134         retval = sdw_stream_add_slave(rt5682->slave, &stream_config,
 135                                       &port_config, 1, sdw_stream);
 136         if (retval) {
 137                 dev_err(dai->dev, "Unable to configure port\n");
 138                 return retval;
 139         }
 140
 141         switch (params_rate(params)) {
 142         case 48000:
 143                 val_p = RT5682_SDW_REF_1_48K;
 144                 val_c = RT5682_SDW_REF_2_48K;
 145                 break;
 146         case 96000:
 147                 val_p = RT5682_SDW_REF_1_96K;
 148                 val_c = RT5682_SDW_REF_2_96K;
 149                 break;
 150         case 192000:
 151                 val_p = RT5682_SDW_REF_1_192K;
 152                 val_c = RT5682_SDW_REF_2_192K;
 153                 break;
 154         case 32000:
 155                 val_p = RT5682_SDW_REF_1_32K;
 156                 val_c = RT5682_SDW_REF_2_32K;
 157                 break;
 158         case 24000:
 159                 val_p = RT5682_SDW_REF_1_24K;
 160                 val_c = RT5682_SDW_REF_2_24K;
 161                 break;
 162         case 16000:
 163                 val_p = RT5682_SDW_REF_1_16K;
 164                 val_c = RT5682_SDW_REF_2_16K;
 165                 break;
 166         case 12000:
 167                 val_p = RT5682_SDW_REF_1_12K;
 168                 val_c = RT5682_SDW_REF_2_12K;
 169                 break;
 170         case 8000:
 171                 val_p = RT5682_SDW_REF_1_8K;
 172                 val_c = RT5682_SDW_REF_2_8K;
 173                 break;
 174         case 44100:
 175                 val_p = RT5682_SDW_REF_1_44K;
 176                 val_c = RT5682_SDW_REF_2_44K;
 177                 break;
 178         case 88200:
 179                 val_p = RT5682_SDW_REF_1_88K;
 180                 val_c = RT5682_SDW_REF_2_88K;
 181                 break;
 182         case 176400:
 183                 val_p = RT5682_SDW_REF_1_176K;
 184                 val_c = RT5682_SDW_REF_2_176K;
 185                 break;
 186         case 22050:
 187                 val_p = RT5682_SDW_REF_1_22K;
 188                 val_c = RT5682_SDW_REF_2_22K;
 189                 break;
 190         case 11025:
 191                 val_p = RT5682_SDW_REF_1_11K;
 192                 val_c = RT5682_SDW_REF_2_11K;
 193                 break;
 194         default:
 195                 return -EINVAL;
 196         }
 197
 198         if (params_rate(params) <= 48000) {
 199                 osr_p = RT5682_DAC_OSR_D_8;
 200                 osr_c = RT5682_ADC_OSR_D_8;
 201         } else if (params_rate(params) <= 96000) {
 202                 osr_p = RT5682_DAC_OSR_D_4;
 203                 osr_c = RT5682_ADC_OSR_D_4;
 204         } else {
 205                 osr_p = RT5682_DAC_OSR_D_2;
 206                 osr_c = RT5682_ADC_OSR_D_2;
 207         }
 208
 209         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 210                 regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK,
 211                         RT5682_SDW_REF_1_MASK, val_p);
 212                 regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1,
 213                         RT5682_DAC_OSR_MASK, osr_p);
 214         } else {
 215                 regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK,
 216                         RT5682_SDW_REF_2_MASK, val_c);
 217                 regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1,
 218                         RT5682_ADC_OSR_MASK, osr_c);
 219         }
 220
 221         return retval;
 222 }
 223
 224 static int rt5682_sdw_hw_free(struct snd_pcm_substream *substream,
 225                               struct snd_soc_dai *dai)
 226 {
 227         struct snd_soc_component *component = dai->component;
 228         struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
 229         struct sdw_stream_runtime *sdw_stream =
 230                 snd_soc_dai_get_dma_data(dai, substream);
 231
 232         if (!rt5682->slave)
 233                 return -EINVAL;
 234
 235         sdw_stream_remove_slave(rt5682->slave, sdw_stream);
 236         return 0;
 237 }
 238
 239 static const struct snd_soc_dai_ops rt5682_sdw_ops = {
 240         .hw_params      = rt5682_sdw_hw_params,
 241         .hw_free        = rt5682_sdw_hw_free,
 242         .set_stream     = rt5682_set_sdw_stream,
 243         .shutdown       = rt5682_sdw_shutdown,
 244 };
 245
 246 static struct snd_soc_dai_driver rt5682_dai[] = {
 247         {
 248                 .name = "rt5682-aif1",
 249                 .id = RT5682_AIF1,
 250                 .playback = {
 251                         .stream_name = "AIF1 Playback",
 252                         .channels_min = 1,
 253                         .channels_max = 2,
 254                         .rates = RT5682_STEREO_RATES,
 255                         .formats = RT5682_FORMATS,
 256                 },
 257                 .capture = {
 258                         .stream_name = "AIF1 Capture",
 259                         .channels_min = 1,
 260                         .channels_max = 2,
 261                         .rates = RT5682_STEREO_RATES,
 262                         .formats = RT5682_FORMATS,
 263                 },
 264                 .ops = &rt5682_aif1_dai_ops,
 265         },
 266         {
 267                 .name = "rt5682-aif2",
 268                 .id = RT5682_AIF2,
 269                 .capture = {
 270                         .stream_name = "AIF2 Capture",
 271                         .channels_min = 1,
 272                         .channels_max = 2,
 273                         .rates = RT5682_STEREO_RATES,
 274                         .formats = RT5682_FORMATS,
 275                 },
 276                 .ops = &rt5682_aif2_dai_ops,
 277         },
 278         {
 279                 .name = "rt5682-sdw",
 280                 .id = RT5682_SDW,
 281                 .playback = {
 282                         .stream_name = "SDW Playback",
 283                         .channels_min = 1,
 284                         .channels_max = 2,
 285                         .rates = RT5682_STEREO_RATES,
 286                         .formats = RT5682_FORMATS,
 287                 },
 288                 .capture = {
 289                         .stream_name = "SDW Capture",
 290                         .channels_min = 1,
 291                         .channels_max = 2,
 292                         .rates = RT5682_STEREO_RATES,
 293                         .formats = RT5682_FORMATS,
 294                 },
 295                 .ops = &rt5682_sdw_ops,
 296         },
 297 };
 298
 299 static int rt5682_sdw_init(struct device *dev, struct regmap *regmap,
 300                            struct sdw_slave *slave)
 301 {
 302         struct rt5682_priv *rt5682;
 303         int ret;
 304
 305         rt5682 = devm_kzalloc(dev, sizeof(*rt5682), GFP_KERNEL);
 306         if (!rt5682)
 307                 return -ENOMEM;
 308
 309         dev_set_drvdata(dev, rt5682);
 310         rt5682->slave = slave;
 311         rt5682->sdw_regmap = regmap;
 312         rt5682->is_sdw = true;
 313
 314         mutex_init(&rt5682->disable_irq_lock);
 315
 316         rt5682->regmap = devm_regmap_init(dev, NULL, dev,
 317                                           &rt5682_sdw_indirect_regmap);
 318         if (IS_ERR(rt5682->regmap)) {
 319                 ret = PTR_ERR(rt5682->regmap);
 320                 dev_err(dev, "Failed to allocate register map: %d\n",
 321                         ret);
 322                 return ret;
 323         }
 324
 325         /*
 326          * Mark hw_init to false
 327          * HW init will be performed when device reports present
 328          */
 329         rt5682->hw_init = false;
 330         rt5682->first_hw_init = false;
 331
 332         mutex_init(&rt5682->calibrate_mutex);
 333         INIT_DELAYED_WORK(&rt5682->jack_detect_work,
 334                 rt5682_jack_detect_handler);
 335
 336         ret = devm_snd_soc_register_component(dev,
 337                                               &rt5682_soc_component_dev,
 338                                               rt5682_dai, ARRAY_SIZE(rt5682_dai));
 339         dev_dbg(&slave->dev, "%s\n", __func__);
 340
 341         return ret;
 342 }
 343
 344 static int rt5682_io_init(struct device *dev, struct sdw_slave *slave)
 345 {
 346         struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
 347         int ret = 0, loop = 10;
 348         unsigned int val;
 349
 350         rt5682->disable_irq = false;
 351
 352         if (rt5682->hw_init)
 353                 return 0;
 354
 355         /*
 356          * PM runtime is only enabled when a Slave reports as Attached
 357          */
 358         if (!rt5682->first_hw_init) {
 359                 /* set autosuspend parameters */
 360                 pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
 361                 pm_runtime_use_autosuspend(&slave->dev);
 362
 363                 /* update count of parent 'active' children */
 364                 pm_runtime_set_active(&slave->dev);
 365
 366                 /* make sure the device does not suspend immediately */
 367                 pm_runtime_mark_last_busy(&slave->dev);
 368
 369                 pm_runtime_enable(&slave->dev);
 370         }
 371
 372         pm_runtime_get_noresume(&slave->dev);
 373
 374         if (rt5682->first_hw_init) {
 375                 regcache_cache_only(rt5682->regmap, false);
 376                 regcache_cache_bypass(rt5682->regmap, true);
 377         }
 378
 379         while (loop > 0) {
 380                 regmap_read(rt5682->regmap, RT5682_DEVICE_ID, &val);
 381                 if (val == DEVICE_ID)
 382                         break;
 383                 dev_warn(dev, "Device with ID register %x is not rt5682\n", val);
 384                 usleep_range(30000, 30005);
 385                 loop--;
 386         }
 387
 388         if (val != DEVICE_ID) {
 389                 dev_err(dev, "Device with ID register %x is not rt5682\n", val);
 390                 ret = -ENODEV;
 391                 goto err_nodev;
 392         }
 393
 394         rt5682_calibrate(rt5682);
 395
 396         if (rt5682->first_hw_init) {
 397                 regcache_cache_bypass(rt5682->regmap, false);
 398                 regcache_mark_dirty(rt5682->regmap);
 399                 regcache_sync(rt5682->regmap);
 400
 401                 /* volatile registers */
 402                 regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2,
 403                         RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL);
 404
 405                 goto reinit;
 406         }
 407
 408         rt5682_apply_patch_list(rt5682, dev);
 409
 410         regmap_write(rt5682->regmap, RT5682_DEPOP_1, 0x0000);
 411
 412         regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1,
 413                 RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK,
 414                 RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X);
 415         regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080);
 416         regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000);
 417         regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8,
 418                 RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA);
 419         regmap_update_bits(rt5682->regmap, RT5682_CHARGE_PUMP_1,
 420                 RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ);
 421         regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1,
 422                 RT5682_PM_HP_MASK, RT5682_PM_HP_HV);
 423
 424         /* Soundwire */
 425         regmap_write(rt5682->regmap, RT5682_PLL2_INTERNAL, 0xa266);
 426         regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_1, 0x1700);
 427         regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_2, 0x0006);
 428         regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_3, 0x2600);
 429         regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_4, 0x0c8f);
 430         regmap_write(rt5682->regmap, RT5682_PLL_TRACK_2, 0x3000);
 431         regmap_write(rt5682->regmap, RT5682_PLL_TRACK_3, 0x4000);
 432         regmap_update_bits(rt5682->regmap, RT5682_GLB_CLK,
 433                 RT5682_SCLK_SRC_MASK | RT5682_PLL2_SRC_MASK,
 434                 RT5682_SCLK_SRC_PLL2 | RT5682_PLL2_SRC_SDW);
 435
 436         regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2,
 437                 RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL);
 438         regmap_write(rt5682->regmap, RT5682_CBJ_CTRL_1, 0xd142);
 439         regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_5, 0x0700, 0x0600);
 440         regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_3,
 441                 RT5682_CBJ_IN_BUF_EN, RT5682_CBJ_IN_BUF_EN);
 442         regmap_update_bits(rt5682->regmap, RT5682_SAR_IL_CMD_1,
 443                 RT5682_SAR_POW_MASK, RT5682_SAR_POW_EN);
 444         regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL,
 445                 RT5682_POW_IRQ | RT5682_POW_JDH |
 446                 RT5682_POW_ANA, RT5682_POW_IRQ |
 447                 RT5682_POW_JDH | RT5682_POW_ANA);
 448         regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2,
 449                 RT5682_PWR_JDH, RT5682_PWR_JDH);
 450         regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2,
 451                 RT5682_JD1_EN_MASK | RT5682_JD1_IRQ_MASK,
 452                 RT5682_JD1_EN | RT5682_JD1_IRQ_PUL);
 453
 454 reinit:
 455         mod_delayed_work(system_power_efficient_wq,
 456                 &rt5682->jack_detect_work, msecs_to_jiffies(250));
 457
 458         /* Mark Slave initialization complete */
 459         rt5682->hw_init = true;
 460         rt5682->first_hw_init = true;
 461
 462 err_nodev:
 463         pm_runtime_mark_last_busy(&slave->dev);
 464         pm_runtime_put_autosuspend(&slave->dev);
 465
 466         dev_dbg(&slave->dev, "%s hw_init complete: %d\n", __func__, ret);
 467
 468         return ret;
 469 }
 470
 471 static bool rt5682_sdw_readable_register(struct device *dev, unsigned int reg)
 472 {
 473         switch (reg) {
 474         case 0x00e0:
 475         case 0x00f0:
 476         case 0x3000:
 477         case 0x3001:
 478         case 0x3004:
 479         case 0x3005:
 480         case 0x3008:
 481                 return true;
 482         default:
 483                 return false;
 484         }
 485 }
 486
 487 static const struct regmap_config rt5682_sdw_regmap = {
 488         .name = "sdw",
 489         .reg_bits = 32,
 490         .val_bits = 8,
 491         .max_register = RT5682_I2C_MODE,
 492         .readable_reg = rt5682_sdw_readable_register,
 493         .cache_type = REGCACHE_NONE,
 494         .use_single_read = true,
 495         .use_single_write = true,
 496 };
 497
 498 static int rt5682_update_status(struct sdw_slave *slave,
 499                                         enum sdw_slave_status status)
 500 {
 501         struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
 502
 503         if (status == SDW_SLAVE_UNATTACHED)
 504                 rt5682->hw_init = false;
 505
 506         /*
 507          * Perform initialization only if slave status is present and
 508          * hw_init flag is false
 509          */
 510         if (rt5682->hw_init || status != SDW_SLAVE_ATTACHED)
 511                 return 0;
 512
 513         /* perform I/O transfers required for Slave initialization */
 514         return rt5682_io_init(&slave->dev, slave);
 515 }
 516
 517 static int rt5682_read_prop(struct sdw_slave *slave)
 518 {
 519         struct sdw_slave_prop *prop = &slave->prop;
 520         int nval, i;
 521         u32 bit;
 522         unsigned long addr;
 523         struct sdw_dpn_prop *dpn;
 524
 525         prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH |
 526                 SDW_SCP_INT1_PARITY;
 527         prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
 528
 529         prop->paging_support = false;
 530
 531         /* first we need to allocate memory for set bits in port lists */
 532         prop->source_ports = 0x4;       /* BITMAP: 00000100 */
 533         prop->sink_ports = 0x2;         /* BITMAP: 00000010 */
 534
 535         nval = hweight32(prop->source_ports);
 536         prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
 537                                           sizeof(*prop->src_dpn_prop),
 538                                           GFP_KERNEL);
 539         if (!prop->src_dpn_prop)
 540                 return -ENOMEM;
 541
 542         i = 0;
 543         dpn = prop->src_dpn_prop;
 544         addr = prop->source_ports;
 545         for_each_set_bit(bit, &addr, 32) {
 546                 dpn[i].num = bit;
 547                 dpn[i].type = SDW_DPN_FULL;
 548                 dpn[i].simple_ch_prep_sm = true;
 549                 dpn[i].ch_prep_timeout = 10;
 550                 i++;
 551         }
 552
 553         /* do this again for sink now */
 554         nval = hweight32(prop->sink_ports);
 555         prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
 556                                            sizeof(*prop->sink_dpn_prop),
 557                                            GFP_KERNEL);
 558         if (!prop->sink_dpn_prop)
 559                 return -ENOMEM;
 560
 561         i = 0;
 562         dpn = prop->sink_dpn_prop;
 563         addr = prop->sink_ports;
 564         for_each_set_bit(bit, &addr, 32) {
 565                 dpn[i].num = bit;
 566                 dpn[i].type = SDW_DPN_FULL;
 567                 dpn[i].simple_ch_prep_sm = true;
 568                 dpn[i].ch_prep_timeout = 10;
 569                 i++;
 570         }
 571
 572         /* set the timeout values */
 573         prop->clk_stop_timeout = 20;
 574
 575         /* wake-up event */
 576         prop->wake_capable = 1;
 577
 578         return 0;
 579 }
 580
 581 /* Bus clock frequency */
 582 #define RT5682_CLK_FREQ_9600000HZ 9600000
 583 #define RT5682_CLK_FREQ_12000000HZ 12000000
 584 #define RT5682_CLK_FREQ_6000000HZ 6000000
 585 #define RT5682_CLK_FREQ_4800000HZ 4800000
 586 #define RT5682_CLK_FREQ_2400000HZ 2400000
 587 #define RT5682_CLK_FREQ_12288000HZ 12288000
 588
 589 static int rt5682_clock_config(struct device *dev)
 590 {
 591         struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
 592         unsigned int clk_freq, value;
 593
 594         clk_freq = (rt5682->params.curr_dr_freq >> 1);
 595
 596         switch (clk_freq) {
 597         case RT5682_CLK_FREQ_12000000HZ:
 598                 value = 0x0;
 599                 break;
 600         case RT5682_CLK_FREQ_6000000HZ:
 601                 value = 0x1;
 602                 break;
 603         case RT5682_CLK_FREQ_9600000HZ:
 604                 value = 0x2;
 605                 break;
 606         case RT5682_CLK_FREQ_4800000HZ:
 607                 value = 0x3;
 608                 break;
 609         case RT5682_CLK_FREQ_2400000HZ:
 610                 value = 0x4;
 611                 break;
 612         case RT5682_CLK_FREQ_12288000HZ:
 613                 value = 0x5;
 614                 break;
 615         default:
 616                 return -EINVAL;
 617         }
 618
 619         regmap_write(rt5682->sdw_regmap, 0xe0, value);
 620         regmap_write(rt5682->sdw_regmap, 0xf0, value);
 621
 622         dev_dbg(dev, "%s complete, clk_freq=%d\n", __func__, clk_freq);
 623
 624         return 0;
 625 }
 626
 627 static int rt5682_bus_config(struct sdw_slave *slave,
 628                                         struct sdw_bus_params *params)
 629 {
 630         struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
 631         int ret;
 632
 633         memcpy(&rt5682->params, params, sizeof(*params));
 634
 635         ret = rt5682_clock_config(&slave->dev);
 636         if (ret < 0)
 637                 dev_err(&slave->dev, "Invalid clk config");
 638
 639         return ret;
 640 }
 641
 642 static int rt5682_interrupt_callback(struct sdw_slave *slave,
 643                                         struct sdw_slave_intr_status *status)
 644 {
 645         struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
 646
 647         dev_dbg(&slave->dev,
 648                 "%s control_port_stat=%x", __func__, status->control_port);
 649
 650         mutex_lock(&rt5682->disable_irq_lock);
 651         if (status->control_port & 0x4 && !rt5682->disable_irq) {
 652                 mod_delayed_work(system_power_efficient_wq,
 653                         &rt5682->jack_detect_work, msecs_to_jiffies(rt5682->irq_work_delay_time));
 654         }
 655         mutex_unlock(&rt5682->disable_irq_lock);
 656
 657         return 0;
 658 }
 659
 660 static const struct sdw_slave_ops rt5682_slave_ops = {
 661         .read_prop = rt5682_read_prop,
 662         .interrupt_callback = rt5682_interrupt_callback,
 663         .update_status = rt5682_update_status,
 664         .bus_config = rt5682_bus_config,
 665 };
 666
 667 static int rt5682_sdw_probe(struct sdw_slave *slave,
 668                            const struct sdw_device_id *id)
 669 {
 670         struct regmap *regmap;
 671
 672         /* Regmap Initialization */
 673         regmap = devm_regmap_init_sdw(slave, &rt5682_sdw_regmap);
 674         if (IS_ERR(regmap))
 675                 return -EINVAL;
 676
 677         rt5682_sdw_init(&slave->dev, regmap, slave);
 678
 679         return 0;
 680 }
 681
 682 static int rt5682_sdw_remove(struct sdw_slave *slave)
 683 {
 684         struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
 685
 686         if (rt5682->hw_init)
 687                 cancel_delayed_work_sync(&rt5682->jack_detect_work);
 688
 689         if (rt5682->first_hw_init)
 690                 pm_runtime_disable(&slave->dev);
 691
 692         return 0;
 693 }
 694
 695 static const struct sdw_device_id rt5682_id[] = {
 696         SDW_SLAVE_ENTRY_EXT(0x025d, 0x5682, 0x2, 0, 0),
 697         {},
 698 };
 699 MODULE_DEVICE_TABLE(sdw, rt5682_id);
 700
 701 static int __maybe_unused rt5682_dev_suspend(struct device *dev)
 702 {
 703         struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
 704
 705         if (!rt5682->hw_init)
 706                 return 0;
 707
 708         cancel_delayed_work_sync(&rt5682->jack_detect_work);
 709
 710         regcache_cache_only(rt5682->regmap, true);
 711         regcache_mark_dirty(rt5682->regmap);
 712
 713         return 0;
 714 }
 715
 716 static int __maybe_unused rt5682_dev_system_suspend(struct device *dev)
 717 {
 718         struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
 719         struct sdw_slave *slave = dev_to_sdw_dev(dev);
 720         int ret;
 721
 722         if (!rt5682->hw_init)
 723                 return 0;
 724
 725         /*
 726          * prevent new interrupts from being handled after the
 727          * deferred work completes and before the parent disables
 728          * interrupts on the link
 729          */
 730         mutex_lock(&rt5682->disable_irq_lock);
 731         rt5682->disable_irq = true;
 732         ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1,
 733                                SDW_SCP_INT1_IMPL_DEF, 0);
 734         mutex_unlock(&rt5682->disable_irq_lock);
 735
 736         if (ret < 0) {
 737                 /* log but don't prevent suspend from happening */
 738                 dev_dbg(&slave->dev, "%s: could not disable imp-def interrupts\n:", __func__);
 739         }
 740
 741         return rt5682_dev_suspend(dev);
 742 }
 743
 744 static int __maybe_unused rt5682_dev_resume(struct device *dev)
 745 {
 746         struct sdw_slave *slave = dev_to_sdw_dev(dev);
 747         struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
 748         unsigned long time;
 749
 750         if (!rt5682->first_hw_init)
 751                 return 0;
 752
 753         if (!slave->unattach_request)
 754                 goto regmap_sync;
 755
 756         time = wait_for_completion_timeout(&slave->initialization_complete,
 757                                 msecs_to_jiffies(RT5682_PROBE_TIMEOUT));
 758         if (!time) {
 759                 dev_err(&slave->dev, "Initialization not complete, timed out\n");
 760                 sdw_show_ping_status(slave->bus, true);
 761
 762                 return -ETIMEDOUT;
 763         }
 764
 765 regmap_sync:
 766         slave->unattach_request = 0;
 767         regcache_cache_only(rt5682->regmap, false);
 768         regcache_sync(rt5682->regmap);
 769
 770         return 0;
 771 }
 772
 773 static const struct dev_pm_ops rt5682_pm = {
 774         SET_SYSTEM_SLEEP_PM_OPS(rt5682_dev_system_suspend, rt5682_dev_resume)
 775         SET_RUNTIME_PM_OPS(rt5682_dev_suspend, rt5682_dev_resume, NULL)
 776 };
 777
 778 static struct sdw_driver rt5682_sdw_driver = {
 779         .driver = {
 780                 .name = "rt5682",
 781                 .owner = THIS_MODULE,
 782                 .pm = &rt5682_pm,
 783         },
 784         .probe = rt5682_sdw_probe,
 785         .remove = rt5682_sdw_remove,
 786         .ops = &rt5682_slave_ops,
 787         .id_table = rt5682_id,
 788 };
 789 module_sdw_driver(rt5682_sdw_driver);
 790
 791 MODULE_DESCRIPTION("ASoC RT5682 driver SDW");
 792 MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>");
 793 MODULE_LICENSE("GPL v2");