1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5645.c -- RT5645 ALSA SoC audio codec driver
5 * Copyright 2013 Realtek Semiconductor Corp.
6 * Author: Bard Liao <bardliao@realtek.com>
9 #include <linux/module.h>
10 #include <linux/moduleparam.h>
11 #include <linux/init.h>
12 #include <linux/delay.h>
14 #include <linux/i2c.h>
15 #include <linux/platform_device.h>
16 #include <linux/spi/spi.h>
17 #include <linux/gpio.h>
18 #include <linux/gpio/consumer.h>
19 #include <linux/acpi.h>
20 #include <linux/dmi.h>
21 #include <linux/regulator/consumer.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/jack.h>
26 #include <sound/soc.h>
27 #include <sound/soc-dapm.h>
28 #include <sound/initval.h>
29 #include <sound/tlv.h>
34 #define QUIRK_INV_JD1_1(q) ((q) & 1)
35 #define QUIRK_LEVEL_IRQ(q) (((q) >> 1) & 1)
36 #define QUIRK_IN2_DIFF(q) (((q) >> 2) & 1)
37 #define QUIRK_INV_HP_POL(q) (((q) >> 3) & 1)
38 #define QUIRK_JD_MODE(q) (((q) >> 4) & 7)
39 #define QUIRK_DMIC1_DATA_PIN(q) (((q) >> 8) & 3)
40 #define QUIRK_DMIC2_DATA_PIN(q) (((q) >> 12) & 3)
42 static unsigned int quirk = -1;
43 module_param(quirk, uint, 0444);
44 MODULE_PARM_DESC(quirk, "RT5645 pdata quirk override");
46 static const struct acpi_gpio_mapping *cht_rt5645_gpios;
48 #define RT5645_DEVICE_ID 0x6308
49 #define RT5650_DEVICE_ID 0x6419
51 #define RT5645_PR_RANGE_BASE (0xff + 1)
52 #define RT5645_PR_SPACING 0x100
54 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
56 #define RT5645_HWEQ_NUM 57
58 #define TIME_TO_POWER_MS 400
60 static const struct regmap_range_cfg rt5645_ranges[] = {
63 .range_min = RT5645_PR_BASE,
64 .range_max = RT5645_PR_BASE + 0xf8,
65 .selector_reg = RT5645_PRIV_INDEX,
66 .selector_mask = 0xff,
67 .selector_shift = 0x0,
68 .window_start = RT5645_PRIV_DATA,
73 static const struct reg_sequence init_list[] = {
74 {RT5645_PR_BASE + 0x3d, 0x3600},
75 {RT5645_PR_BASE + 0x1c, 0xfd70},
76 {RT5645_PR_BASE + 0x20, 0x611f},
77 {RT5645_PR_BASE + 0x21, 0x4040},
78 {RT5645_PR_BASE + 0x23, 0x0004},
79 {RT5645_ASRC_4, 0x0120},
82 static const struct reg_sequence rt5650_init_list[] = {
86 static const struct reg_default rt5645_reg[] = {
242 static const struct reg_default rt5650_reg[] = {
399 struct rt5645_eq_param_s {
404 struct rt5645_eq_param_s_be16 {
409 static const char *const rt5645_supply_names[] = {
414 struct rt5645_platform_data {
415 /* IN2 can optionally be differential */
418 unsigned int dmic1_data_pin;
419 /* 0 = IN2N; 1 = GPIO5; 2 = GPIO11 */
420 unsigned int dmic2_data_pin;
421 /* 0 = IN2P; 1 = GPIO6; 2 = GPIO10; 3 = GPIO12 */
423 unsigned int jd_mode;
424 /* Use level triggered irq */
425 bool level_trigger_irq;
426 /* Invert JD1_1 status polarity */
428 /* Invert HP detect status polarity */
431 /* Value to assign to snd_soc_card.long_name */
432 const char *long_name;
434 /* Some (package) variants have the headset-mic pin not-connected */
439 struct snd_soc_component *component;
440 struct rt5645_platform_data pdata;
441 struct regmap *regmap;
442 struct i2c_client *i2c;
443 struct gpio_desc *gpiod_hp_det;
444 struct snd_soc_jack *hp_jack;
445 struct snd_soc_jack *mic_jack;
446 struct snd_soc_jack *btn_jack;
447 struct delayed_work jack_detect_work, rcclock_work;
448 struct regulator_bulk_data supplies[ARRAY_SIZE(rt5645_supply_names)];
449 struct rt5645_eq_param_s *eq_param;
450 struct timer_list btn_check_timer;
455 int lrck[RT5645_AIFS];
456 int bclk[RT5645_AIFS];
457 int master[RT5645_AIFS];
468 static int rt5645_reset(struct snd_soc_component *component)
470 return snd_soc_component_write(component, RT5645_RESET, 0);
473 static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
477 for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
478 if (reg >= rt5645_ranges[i].range_min &&
479 reg <= rt5645_ranges[i].range_max) {
486 case RT5645_PRIV_INDEX:
487 case RT5645_PRIV_DATA:
488 case RT5645_IN1_CTRL1:
489 case RT5645_IN1_CTRL2:
490 case RT5645_IN1_CTRL3:
491 case RT5645_A_JD_CTRL1:
492 case RT5645_ADC_EQ_CTRL1:
493 case RT5645_EQ_CTRL1:
494 case RT5645_ALC_CTRL_1:
495 case RT5645_IRQ_CTRL2:
496 case RT5645_IRQ_CTRL3:
497 case RT5645_INT_IRQ_ST:
499 case RT5650_4BTN_IL_CMD1:
500 case RT5645_VENDOR_ID:
501 case RT5645_VENDOR_ID1:
502 case RT5645_VENDOR_ID2:
509 static bool rt5645_readable_register(struct device *dev, unsigned int reg)
513 for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
514 if (reg >= rt5645_ranges[i].range_min &&
515 reg <= rt5645_ranges[i].range_max) {
525 case RT5645_IN1_CTRL1:
526 case RT5645_IN1_CTRL2:
527 case RT5645_IN1_CTRL3:
528 case RT5645_IN2_CTRL:
529 case RT5645_INL1_INR1_VOL:
530 case RT5645_SPK_FUNC_LIM:
531 case RT5645_ADJ_HPF_CTRL:
532 case RT5645_DAC1_DIG_VOL:
533 case RT5645_DAC2_DIG_VOL:
534 case RT5645_DAC_CTRL:
535 case RT5645_STO1_ADC_DIG_VOL:
536 case RT5645_MONO_ADC_DIG_VOL:
537 case RT5645_ADC_BST_VOL1:
538 case RT5645_ADC_BST_VOL2:
539 case RT5645_STO1_ADC_MIXER:
540 case RT5645_MONO_ADC_MIXER:
541 case RT5645_AD_DA_MIXER:
542 case RT5645_STO_DAC_MIXER:
543 case RT5645_MONO_DAC_MIXER:
544 case RT5645_DIG_MIXER:
545 case RT5650_A_DAC_SOUR:
546 case RT5645_DIG_INF1_DATA:
547 case RT5645_PDM_OUT_CTRL:
548 case RT5645_REC_L1_MIXER:
549 case RT5645_REC_L2_MIXER:
550 case RT5645_REC_R1_MIXER:
551 case RT5645_REC_R2_MIXER:
552 case RT5645_HPMIXL_CTRL:
553 case RT5645_HPOMIXL_CTRL:
554 case RT5645_HPMIXR_CTRL:
555 case RT5645_HPOMIXR_CTRL:
556 case RT5645_HPO_MIXER:
557 case RT5645_SPK_L_MIXER:
558 case RT5645_SPK_R_MIXER:
559 case RT5645_SPO_MIXER:
560 case RT5645_SPO_CLSD_RATIO:
561 case RT5645_OUT_L1_MIXER:
562 case RT5645_OUT_R1_MIXER:
563 case RT5645_OUT_L_GAIN1:
564 case RT5645_OUT_L_GAIN2:
565 case RT5645_OUT_R_GAIN1:
566 case RT5645_OUT_R_GAIN2:
567 case RT5645_LOUT_MIXER:
568 case RT5645_HAPTIC_CTRL1:
569 case RT5645_HAPTIC_CTRL2:
570 case RT5645_HAPTIC_CTRL3:
571 case RT5645_HAPTIC_CTRL4:
572 case RT5645_HAPTIC_CTRL5:
573 case RT5645_HAPTIC_CTRL6:
574 case RT5645_HAPTIC_CTRL7:
575 case RT5645_HAPTIC_CTRL8:
576 case RT5645_HAPTIC_CTRL9:
577 case RT5645_HAPTIC_CTRL10:
578 case RT5645_PWR_DIG1:
579 case RT5645_PWR_DIG2:
580 case RT5645_PWR_ANLG1:
581 case RT5645_PWR_ANLG2:
582 case RT5645_PWR_MIXER:
584 case RT5645_PRIV_INDEX:
585 case RT5645_PRIV_DATA:
586 case RT5645_I2S1_SDP:
587 case RT5645_I2S2_SDP:
588 case RT5645_ADDA_CLK1:
589 case RT5645_ADDA_CLK2:
590 case RT5645_DMIC_CTRL1:
591 case RT5645_DMIC_CTRL2:
592 case RT5645_TDM_CTRL_1:
593 case RT5645_TDM_CTRL_2:
594 case RT5645_TDM_CTRL_3:
595 case RT5650_TDM_CTRL_4:
597 case RT5645_PLL_CTRL1:
598 case RT5645_PLL_CTRL2:
603 case RT5645_DEPOP_M1:
604 case RT5645_DEPOP_M2:
605 case RT5645_DEPOP_M3:
606 case RT5645_CHARGE_PUMP:
608 case RT5645_A_JD_CTRL1:
609 case RT5645_VAD_CTRL4:
610 case RT5645_CLSD_OUT_CTRL:
611 case RT5645_ADC_EQ_CTRL1:
612 case RT5645_ADC_EQ_CTRL2:
613 case RT5645_EQ_CTRL1:
614 case RT5645_EQ_CTRL2:
615 case RT5645_ALC_CTRL_1:
616 case RT5645_ALC_CTRL_2:
617 case RT5645_ALC_CTRL_3:
618 case RT5645_ALC_CTRL_4:
619 case RT5645_ALC_CTRL_5:
621 case RT5645_IRQ_CTRL1:
622 case RT5645_IRQ_CTRL2:
623 case RT5645_IRQ_CTRL3:
624 case RT5645_INT_IRQ_ST:
625 case RT5645_GPIO_CTRL1:
626 case RT5645_GPIO_CTRL2:
627 case RT5645_GPIO_CTRL3:
628 case RT5645_BASS_BACK:
629 case RT5645_MP3_PLUS1:
630 case RT5645_MP3_PLUS2:
631 case RT5645_ADJ_HPF1:
632 case RT5645_ADJ_HPF2:
633 case RT5645_HP_CALIB_AMP_DET:
639 case RT5650_4BTN_IL_CMD1:
640 case RT5650_4BTN_IL_CMD2:
641 case RT5645_DRC1_HL_CTRL1:
642 case RT5645_DRC2_HL_CTRL1:
643 case RT5645_ADC_MONO_HP_CTRL1:
644 case RT5645_ADC_MONO_HP_CTRL2:
645 case RT5645_DRC2_CTRL1:
646 case RT5645_DRC2_CTRL2:
647 case RT5645_DRC2_CTRL3:
648 case RT5645_DRC2_CTRL4:
649 case RT5645_DRC2_CTRL5:
650 case RT5645_JD_CTRL3:
651 case RT5645_JD_CTRL4:
652 case RT5645_GEN_CTRL1:
653 case RT5645_GEN_CTRL2:
654 case RT5645_GEN_CTRL3:
655 case RT5645_VENDOR_ID:
656 case RT5645_VENDOR_ID1:
657 case RT5645_VENDOR_ID2:
664 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
665 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0);
666 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
667 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
668 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
670 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
671 static const DECLARE_TLV_DB_RANGE(bst_tlv,
672 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
673 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
674 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
675 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
676 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
677 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
678 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
681 /* {-6, -4.5, -3, -1.5, 0, 0.82, 1.58, 2.28} dB */
682 static const DECLARE_TLV_DB_RANGE(spk_clsd_tlv,
683 0, 4, TLV_DB_SCALE_ITEM(-600, 150, 0),
684 5, 5, TLV_DB_SCALE_ITEM(82, 0, 0),
685 6, 6, TLV_DB_SCALE_ITEM(158, 0, 0),
686 7, 7, TLV_DB_SCALE_ITEM(228, 0, 0)
689 static int rt5645_hweq_info(struct snd_kcontrol *kcontrol,
690 struct snd_ctl_elem_info *uinfo)
692 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
693 uinfo->count = RT5645_HWEQ_NUM * sizeof(struct rt5645_eq_param_s);
698 static int rt5645_hweq_get(struct snd_kcontrol *kcontrol,
699 struct snd_ctl_elem_value *ucontrol)
701 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
702 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
703 struct rt5645_eq_param_s_be16 *eq_param =
704 (struct rt5645_eq_param_s_be16 *)ucontrol->value.bytes.data;
707 for (i = 0; i < RT5645_HWEQ_NUM; i++) {
708 eq_param[i].reg = cpu_to_be16(rt5645->eq_param[i].reg);
709 eq_param[i].val = cpu_to_be16(rt5645->eq_param[i].val);
715 static bool rt5645_validate_hweq(unsigned short reg)
717 if ((reg >= 0x1a4 && reg <= 0x1cd) || (reg >= 0x1e5 && reg <= 0x1f8) ||
718 (reg == RT5645_EQ_CTRL2))
724 static int rt5645_hweq_put(struct snd_kcontrol *kcontrol,
725 struct snd_ctl_elem_value *ucontrol)
727 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
728 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
729 struct rt5645_eq_param_s_be16 *eq_param =
730 (struct rt5645_eq_param_s_be16 *)ucontrol->value.bytes.data;
733 for (i = 0; i < RT5645_HWEQ_NUM; i++) {
734 rt5645->eq_param[i].reg = be16_to_cpu(eq_param[i].reg);
735 rt5645->eq_param[i].val = be16_to_cpu(eq_param[i].val);
738 /* The final setting of the table should be RT5645_EQ_CTRL2 */
739 for (i = RT5645_HWEQ_NUM - 1; i >= 0; i--) {
740 if (rt5645->eq_param[i].reg == 0)
742 else if (rt5645->eq_param[i].reg != RT5645_EQ_CTRL2)
748 for (i = 0; i < RT5645_HWEQ_NUM; i++) {
749 if (!rt5645_validate_hweq(rt5645->eq_param[i].reg) &&
750 rt5645->eq_param[i].reg != 0)
752 else if (rt5645->eq_param[i].reg == 0)
759 #define RT5645_HWEQ(xname) \
760 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
761 .info = rt5645_hweq_info, \
762 .get = rt5645_hweq_get, \
763 .put = rt5645_hweq_put \
766 static int rt5645_spk_put_volsw(struct snd_kcontrol *kcontrol,
767 struct snd_ctl_elem_value *ucontrol)
769 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
770 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
773 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
774 RT5645_PWR_CLK25M_MASK, RT5645_PWR_CLK25M_PU);
776 ret = snd_soc_put_volsw(kcontrol, ucontrol);
778 mod_delayed_work(system_power_efficient_wq, &rt5645->rcclock_work,
779 msecs_to_jiffies(200));
784 static const char * const rt5645_dac1_vol_ctrl_mode_text[] = {
785 "immediately", "zero crossing", "soft ramp"
788 static SOC_ENUM_SINGLE_DECL(
789 rt5645_dac1_vol_ctrl_mode, RT5645_PR_BASE,
790 RT5645_DA1_ZDET_SFT, rt5645_dac1_vol_ctrl_mode_text);
792 static const struct snd_kcontrol_new rt5645_snd_controls[] = {
793 /* Speaker Output Volume */
794 SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
795 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
796 SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
797 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, snd_soc_get_volsw,
798 rt5645_spk_put_volsw, out_vol_tlv),
800 /* ClassD modulator Speaker Gain Ratio */
801 SOC_SINGLE_TLV("Speaker ClassD Playback Volume", RT5645_SPO_CLSD_RATIO,
802 RT5645_SPK_G_CLSD_SFT, 7, 0, spk_clsd_tlv),
804 /* Headphone Output Volume */
805 SOC_DOUBLE("Headphone Channel Switch", RT5645_HP_VOL,
806 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
807 SOC_DOUBLE_TLV("Headphone Playback Volume", RT5645_HP_VOL,
808 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
811 SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
812 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
813 SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
814 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
815 SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
816 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
818 /* DAC Digital Volume */
819 SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
820 RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
821 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
822 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
823 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
824 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
826 /* IN1/IN2 Control */
827 SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
828 RT5645_BST_SFT1, 12, 0, bst_tlv),
829 SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
830 RT5645_BST_SFT2, 8, 0, bst_tlv),
832 /* INL/INR Volume Control */
833 SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
834 RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
836 /* ADC Digital Volume Control */
837 SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
838 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
839 SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
840 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
841 SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
842 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
843 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
844 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
846 /* ADC Boost Volume Control */
847 SOC_DOUBLE_TLV("ADC Boost Capture Volume", RT5645_ADC_BST_VOL1,
848 RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
850 SOC_DOUBLE_TLV("Mono ADC Boost Capture Volume", RT5645_ADC_BST_VOL2,
851 RT5645_MONO_ADC_L_BST_SFT, RT5645_MONO_ADC_R_BST_SFT, 3, 0,
854 /* I2S2 function select */
855 SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
857 RT5645_HWEQ("Speaker HWEQ"),
859 /* Digital Soft Volume Control */
860 SOC_ENUM("DAC1 Digital Volume Control Func", rt5645_dac1_vol_ctrl_mode),
864 * set_dmic_clk - Set parameter of dmic.
867 * @kcontrol: The kcontrol of this widget.
871 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
872 struct snd_kcontrol *kcontrol, int event)
874 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
875 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
878 rate = rt5645->sysclk / rl6231_get_pre_div(rt5645->regmap,
879 RT5645_ADDA_CLK1, RT5645_I2S_PD1_SFT);
880 idx = rl6231_calc_dmic_clk(rate);
882 dev_err(component->dev, "Failed to set DMIC clock\n");
884 snd_soc_component_update_bits(component, RT5645_DMIC_CTRL1,
885 RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
889 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
890 struct snd_soc_dapm_widget *sink)
892 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
895 val = snd_soc_component_read(component, RT5645_GLB_CLK);
896 val &= RT5645_SCLK_SRC_MASK;
897 if (val == RT5645_SCLK_SRC_PLL1)
903 static int is_using_asrc(struct snd_soc_dapm_widget *source,
904 struct snd_soc_dapm_widget *sink)
906 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
907 unsigned int reg, shift, val;
909 switch (source->shift) {
938 val = (snd_soc_component_read(component, reg) >> shift) & 0xf;
951 static int rt5645_enable_hweq(struct snd_soc_component *component)
953 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
956 for (i = 0; i < RT5645_HWEQ_NUM; i++) {
957 if (rt5645_validate_hweq(rt5645->eq_param[i].reg))
958 regmap_write(rt5645->regmap, rt5645->eq_param[i].reg,
959 rt5645->eq_param[i].val);
968 * rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters
969 * @component: SoC audio component device.
970 * @filter_mask: mask of filters.
971 * @clk_src: clock source
973 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can
974 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
975 * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
976 * ASRC function will track i2s clock and generate a corresponding system clock
977 * for codec. This function provides an API to select the clock source for a
978 * set of filters specified by the mask. And the codec driver will turn on ASRC
979 * for these filters if ASRC is selected as their clock source.
981 int rt5645_sel_asrc_clk_src(struct snd_soc_component *component,
982 unsigned int filter_mask, unsigned int clk_src)
984 unsigned int asrc2_mask = 0;
985 unsigned int asrc2_value = 0;
986 unsigned int asrc3_mask = 0;
987 unsigned int asrc3_value = 0;
990 case RT5645_CLK_SEL_SYS:
991 case RT5645_CLK_SEL_I2S1_ASRC:
992 case RT5645_CLK_SEL_I2S2_ASRC:
993 case RT5645_CLK_SEL_SYS2:
1000 if (filter_mask & RT5645_DA_STEREO_FILTER) {
1001 asrc2_mask |= RT5645_DA_STO_CLK_SEL_MASK;
1002 asrc2_value = (asrc2_value & ~RT5645_DA_STO_CLK_SEL_MASK)
1003 | (clk_src << RT5645_DA_STO_CLK_SEL_SFT);
1006 if (filter_mask & RT5645_DA_MONO_L_FILTER) {
1007 asrc2_mask |= RT5645_DA_MONOL_CLK_SEL_MASK;
1008 asrc2_value = (asrc2_value & ~RT5645_DA_MONOL_CLK_SEL_MASK)
1009 | (clk_src << RT5645_DA_MONOL_CLK_SEL_SFT);
1012 if (filter_mask & RT5645_DA_MONO_R_FILTER) {
1013 asrc2_mask |= RT5645_DA_MONOR_CLK_SEL_MASK;
1014 asrc2_value = (asrc2_value & ~RT5645_DA_MONOR_CLK_SEL_MASK)
1015 | (clk_src << RT5645_DA_MONOR_CLK_SEL_SFT);
1018 if (filter_mask & RT5645_AD_STEREO_FILTER) {
1019 asrc2_mask |= RT5645_AD_STO1_CLK_SEL_MASK;
1020 asrc2_value = (asrc2_value & ~RT5645_AD_STO1_CLK_SEL_MASK)
1021 | (clk_src << RT5645_AD_STO1_CLK_SEL_SFT);
1024 if (filter_mask & RT5645_AD_MONO_L_FILTER) {
1025 asrc3_mask |= RT5645_AD_MONOL_CLK_SEL_MASK;
1026 asrc3_value = (asrc3_value & ~RT5645_AD_MONOL_CLK_SEL_MASK)
1027 | (clk_src << RT5645_AD_MONOL_CLK_SEL_SFT);
1030 if (filter_mask & RT5645_AD_MONO_R_FILTER) {
1031 asrc3_mask |= RT5645_AD_MONOR_CLK_SEL_MASK;
1032 asrc3_value = (asrc3_value & ~RT5645_AD_MONOR_CLK_SEL_MASK)
1033 | (clk_src << RT5645_AD_MONOR_CLK_SEL_SFT);
1037 snd_soc_component_update_bits(component, RT5645_ASRC_2,
1038 asrc2_mask, asrc2_value);
1041 snd_soc_component_update_bits(component, RT5645_ASRC_3,
1042 asrc3_mask, asrc3_value);
1046 EXPORT_SYMBOL_GPL(rt5645_sel_asrc_clk_src);
1049 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
1050 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
1051 RT5645_M_ADC_L1_SFT, 1, 1),
1052 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
1053 RT5645_M_ADC_L2_SFT, 1, 1),
1056 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
1057 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
1058 RT5645_M_ADC_R1_SFT, 1, 1),
1059 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
1060 RT5645_M_ADC_R2_SFT, 1, 1),
1063 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
1064 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
1065 RT5645_M_MONO_ADC_L1_SFT, 1, 1),
1066 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
1067 RT5645_M_MONO_ADC_L2_SFT, 1, 1),
1070 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
1071 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
1072 RT5645_M_MONO_ADC_R1_SFT, 1, 1),
1073 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
1074 RT5645_M_MONO_ADC_R2_SFT, 1, 1),
1077 static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
1078 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
1079 RT5645_M_ADCMIX_L_SFT, 1, 1),
1080 SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
1081 RT5645_M_DAC1_L_SFT, 1, 1),
1084 static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
1085 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
1086 RT5645_M_ADCMIX_R_SFT, 1, 1),
1087 SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
1088 RT5645_M_DAC1_R_SFT, 1, 1),
1091 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
1092 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
1093 RT5645_M_DAC_L1_SFT, 1, 1),
1094 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
1095 RT5645_M_DAC_L2_SFT, 1, 1),
1096 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
1097 RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
1100 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
1101 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
1102 RT5645_M_DAC_R1_SFT, 1, 1),
1103 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
1104 RT5645_M_DAC_R2_SFT, 1, 1),
1105 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
1106 RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
1109 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
1110 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
1111 RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
1112 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
1113 RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
1114 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
1115 RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
1118 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
1119 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
1120 RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
1121 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
1122 RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
1123 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
1124 RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
1127 static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
1128 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
1129 RT5645_M_STO_L_DAC_L_SFT, 1, 1),
1130 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
1131 RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
1132 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
1133 RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
1136 static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
1137 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
1138 RT5645_M_STO_R_DAC_R_SFT, 1, 1),
1139 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
1140 RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
1141 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
1142 RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
1145 /* Analog Input Mixer */
1146 static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
1147 SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
1148 RT5645_M_HP_L_RM_L_SFT, 1, 1),
1149 SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
1150 RT5645_M_IN_L_RM_L_SFT, 1, 1),
1151 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
1152 RT5645_M_BST2_RM_L_SFT, 1, 1),
1153 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
1154 RT5645_M_BST1_RM_L_SFT, 1, 1),
1155 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
1156 RT5645_M_OM_L_RM_L_SFT, 1, 1),
1159 static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
1160 SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
1161 RT5645_M_HP_R_RM_R_SFT, 1, 1),
1162 SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
1163 RT5645_M_IN_R_RM_R_SFT, 1, 1),
1164 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
1165 RT5645_M_BST2_RM_R_SFT, 1, 1),
1166 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
1167 RT5645_M_BST1_RM_R_SFT, 1, 1),
1168 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
1169 RT5645_M_OM_R_RM_R_SFT, 1, 1),
1172 static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
1173 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
1174 RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
1175 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
1176 RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
1177 SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
1178 RT5645_M_IN_L_SM_L_SFT, 1, 1),
1179 SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
1180 RT5645_M_BST1_L_SM_L_SFT, 1, 1),
1183 static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
1184 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
1185 RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
1186 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
1187 RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
1188 SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
1189 RT5645_M_IN_R_SM_R_SFT, 1, 1),
1190 SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
1191 RT5645_M_BST2_R_SM_R_SFT, 1, 1),
1194 static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
1195 SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
1196 RT5645_M_BST1_OM_L_SFT, 1, 1),
1197 SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
1198 RT5645_M_IN_L_OM_L_SFT, 1, 1),
1199 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
1200 RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
1201 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
1202 RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
1205 static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
1206 SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
1207 RT5645_M_BST2_OM_R_SFT, 1, 1),
1208 SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
1209 RT5645_M_IN_R_OM_R_SFT, 1, 1),
1210 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
1211 RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
1212 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
1213 RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
1216 static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
1217 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
1218 RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
1219 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
1220 RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
1221 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
1222 RT5645_M_SV_R_SPM_L_SFT, 1, 1),
1223 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
1224 RT5645_M_SV_L_SPM_L_SFT, 1, 1),
1227 static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
1228 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
1229 RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
1230 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
1231 RT5645_M_SV_R_SPM_R_SFT, 1, 1),
1234 static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
1235 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
1236 RT5645_M_DAC1_HM_SFT, 1, 1),
1237 SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
1238 RT5645_M_HPVOL_HM_SFT, 1, 1),
1241 static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
1242 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
1243 RT5645_M_DAC1_HV_SFT, 1, 1),
1244 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
1245 RT5645_M_DAC2_HV_SFT, 1, 1),
1246 SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
1247 RT5645_M_IN_HV_SFT, 1, 1),
1248 SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
1249 RT5645_M_BST1_HV_SFT, 1, 1),
1252 static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
1253 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
1254 RT5645_M_DAC1_HV_SFT, 1, 1),
1255 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
1256 RT5645_M_DAC2_HV_SFT, 1, 1),
1257 SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
1258 RT5645_M_IN_HV_SFT, 1, 1),
1259 SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
1260 RT5645_M_BST2_HV_SFT, 1, 1),
1263 static const struct snd_kcontrol_new rt5645_lout_mix[] = {
1264 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
1265 RT5645_M_DAC_L1_LM_SFT, 1, 1),
1266 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
1267 RT5645_M_DAC_R1_LM_SFT, 1, 1),
1268 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
1269 RT5645_M_OV_L_LM_SFT, 1, 1),
1270 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
1271 RT5645_M_OV_R_LM_SFT, 1, 1),
1274 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
1275 static const char * const rt5645_dac1_src[] = {
1276 "IF1 DAC", "IF2 DAC", "IF3 DAC"
1279 static SOC_ENUM_SINGLE_DECL(
1280 rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
1281 RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
1283 static const struct snd_kcontrol_new rt5645_dac1l_mux =
1284 SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
1286 static SOC_ENUM_SINGLE_DECL(
1287 rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
1288 RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
1290 static const struct snd_kcontrol_new rt5645_dac1r_mux =
1291 SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
1293 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
1294 static const char * const rt5645_dac12_src[] = {
1295 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
1298 static SOC_ENUM_SINGLE_DECL(
1299 rt5645_dac2l_enum, RT5645_DAC_CTRL,
1300 RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
1302 static const struct snd_kcontrol_new rt5645_dac_l2_mux =
1303 SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
1305 static const char * const rt5645_dacr2_src[] = {
1306 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
1309 static SOC_ENUM_SINGLE_DECL(
1310 rt5645_dac2r_enum, RT5645_DAC_CTRL,
1311 RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
1313 static const struct snd_kcontrol_new rt5645_dac_r2_mux =
1314 SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
1316 /* Stereo1 ADC source */
1318 static const char * const rt5645_stereo_adc1_src[] = {
1322 static SOC_ENUM_SINGLE_DECL(
1323 rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
1324 RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
1326 static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
1327 SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
1330 static const char * const rt5645_stereo_adc2_src[] = {
1334 static SOC_ENUM_SINGLE_DECL(
1335 rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
1336 RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
1338 static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
1339 SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
1342 static const char * const rt5645_stereo_dmic_src[] = {
1346 static SOC_ENUM_SINGLE_DECL(
1347 rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
1348 RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
1350 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
1351 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
1353 /* Mono ADC source */
1355 static const char * const rt5645_mono_adc_l1_src[] = {
1356 "Mono DAC MIXL", "ADC"
1359 static SOC_ENUM_SINGLE_DECL(
1360 rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
1361 RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
1363 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
1364 SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
1366 static const char * const rt5645_mono_adc_l2_src[] = {
1367 "Mono DAC MIXL", "DMIC"
1370 static SOC_ENUM_SINGLE_DECL(
1371 rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
1372 RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
1374 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
1375 SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
1378 static const char * const rt5645_mono_dmic_src[] = {
1382 static SOC_ENUM_SINGLE_DECL(
1383 rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
1384 RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
1386 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
1387 SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
1389 static SOC_ENUM_SINGLE_DECL(
1390 rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
1391 RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
1393 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
1394 SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
1396 static const char * const rt5645_mono_adc_r1_src[] = {
1397 "Mono DAC MIXR", "ADC"
1400 static SOC_ENUM_SINGLE_DECL(
1401 rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
1402 RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
1404 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
1405 SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
1407 static const char * const rt5645_mono_adc_r2_src[] = {
1408 "Mono DAC MIXR", "DMIC"
1411 static SOC_ENUM_SINGLE_DECL(
1412 rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
1413 RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
1415 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
1416 SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
1419 static const char * const rt5645_if1_adc_in_src[] = {
1420 "IF_ADC1/IF_ADC2/VAD_ADC", "IF_ADC2/IF_ADC1/VAD_ADC",
1421 "VAD_ADC/IF_ADC1/IF_ADC2", "VAD_ADC/IF_ADC2/IF_ADC1"
1424 static SOC_ENUM_SINGLE_DECL(
1425 rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
1426 RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
1428 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
1429 SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
1432 static const char * const rt5650_if1_adc_in_src[] = {
1433 "IF_ADC1/IF_ADC2/DAC_REF/Null",
1434 "IF_ADC1/IF_ADC2/Null/DAC_REF",
1435 "IF_ADC1/DAC_REF/IF_ADC2/Null",
1436 "IF_ADC1/DAC_REF/Null/IF_ADC2",
1437 "IF_ADC1/Null/DAC_REF/IF_ADC2",
1438 "IF_ADC1/Null/IF_ADC2/DAC_REF",
1440 "IF_ADC2/IF_ADC1/DAC_REF/Null",
1441 "IF_ADC2/IF_ADC1/Null/DAC_REF",
1442 "IF_ADC2/DAC_REF/IF_ADC1/Null",
1443 "IF_ADC2/DAC_REF/Null/IF_ADC1",
1444 "IF_ADC2/Null/DAC_REF/IF_ADC1",
1445 "IF_ADC2/Null/IF_ADC1/DAC_REF",
1447 "DAC_REF/IF_ADC1/IF_ADC2/Null",
1448 "DAC_REF/IF_ADC1/Null/IF_ADC2",
1449 "DAC_REF/IF_ADC2/IF_ADC1/Null",
1450 "DAC_REF/IF_ADC2/Null/IF_ADC1",
1451 "DAC_REF/Null/IF_ADC1/IF_ADC2",
1452 "DAC_REF/Null/IF_ADC2/IF_ADC1",
1454 "Null/IF_ADC1/IF_ADC2/DAC_REF",
1455 "Null/IF_ADC1/DAC_REF/IF_ADC2",
1456 "Null/IF_ADC2/IF_ADC1/DAC_REF",
1457 "Null/IF_ADC2/DAC_REF/IF_ADC1",
1458 "Null/DAC_REF/IF_ADC1/IF_ADC2",
1459 "Null/DAC_REF/IF_ADC2/IF_ADC1",
1462 static SOC_ENUM_SINGLE_DECL(
1463 rt5650_if1_adc_in_enum, RT5645_TDM_CTRL_2,
1464 0, rt5650_if1_adc_in_src);
1466 static const struct snd_kcontrol_new rt5650_if1_adc_in_mux =
1467 SOC_DAPM_ENUM("IF1 ADC IN source", rt5650_if1_adc_in_enum);
1469 /* MX-78 [15:14][13:12][11:10] */
1470 static const char * const rt5645_tdm_adc_swap_select[] = {
1471 "L/R", "R/L", "L/L", "R/R"
1474 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot0_1_enum,
1475 RT5645_TDM_CTRL_2, 14, rt5645_tdm_adc_swap_select);
1477 static const struct snd_kcontrol_new rt5650_if1_adc1_in_mux =
1478 SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5650_tdm_adc_slot0_1_enum);
1480 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot2_3_enum,
1481 RT5645_TDM_CTRL_2, 12, rt5645_tdm_adc_swap_select);
1483 static const struct snd_kcontrol_new rt5650_if1_adc2_in_mux =
1484 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5650_tdm_adc_slot2_3_enum);
1486 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot4_5_enum,
1487 RT5645_TDM_CTRL_2, 10, rt5645_tdm_adc_swap_select);
1489 static const struct snd_kcontrol_new rt5650_if1_adc3_in_mux =
1490 SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5650_tdm_adc_slot4_5_enum);
1492 /* MX-77 [7:6][5:4][3:2] */
1493 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
1494 RT5645_TDM_CTRL_1, 6, rt5645_tdm_adc_swap_select);
1496 static const struct snd_kcontrol_new rt5645_if1_adc1_in_mux =
1497 SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5645_tdm_adc_slot0_1_enum);
1499 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
1500 RT5645_TDM_CTRL_1, 4, rt5645_tdm_adc_swap_select);
1502 static const struct snd_kcontrol_new rt5645_if1_adc2_in_mux =
1503 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5645_tdm_adc_slot2_3_enum);
1505 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
1506 RT5645_TDM_CTRL_1, 2, rt5645_tdm_adc_swap_select);
1508 static const struct snd_kcontrol_new rt5645_if1_adc3_in_mux =
1509 SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5645_tdm_adc_slot4_5_enum);
1511 /* MX-79 [14:12][10:8][6:4][2:0] */
1512 static const char * const rt5645_tdm_dac_swap_select[] = {
1513 "Slot0", "Slot1", "Slot2", "Slot3"
1516 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac0_enum,
1517 RT5645_TDM_CTRL_3, 12, rt5645_tdm_dac_swap_select);
1519 static const struct snd_kcontrol_new rt5645_if1_dac0_tdm_sel_mux =
1520 SOC_DAPM_ENUM("IF1 DAC0 source", rt5645_tdm_dac0_enum);
1522 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac1_enum,
1523 RT5645_TDM_CTRL_3, 8, rt5645_tdm_dac_swap_select);
1525 static const struct snd_kcontrol_new rt5645_if1_dac1_tdm_sel_mux =
1526 SOC_DAPM_ENUM("IF1 DAC1 source", rt5645_tdm_dac1_enum);
1528 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac2_enum,
1529 RT5645_TDM_CTRL_3, 4, rt5645_tdm_dac_swap_select);
1531 static const struct snd_kcontrol_new rt5645_if1_dac2_tdm_sel_mux =
1532 SOC_DAPM_ENUM("IF1 DAC2 source", rt5645_tdm_dac2_enum);
1534 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac3_enum,
1535 RT5645_TDM_CTRL_3, 0, rt5645_tdm_dac_swap_select);
1537 static const struct snd_kcontrol_new rt5645_if1_dac3_tdm_sel_mux =
1538 SOC_DAPM_ENUM("IF1 DAC3 source", rt5645_tdm_dac3_enum);
1540 /* MX-7a [14:12][10:8][6:4][2:0] */
1541 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac0_enum,
1542 RT5650_TDM_CTRL_4, 12, rt5645_tdm_dac_swap_select);
1544 static const struct snd_kcontrol_new rt5650_if1_dac0_tdm_sel_mux =
1545 SOC_DAPM_ENUM("IF1 DAC0 source", rt5650_tdm_dac0_enum);
1547 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac1_enum,
1548 RT5650_TDM_CTRL_4, 8, rt5645_tdm_dac_swap_select);
1550 static const struct snd_kcontrol_new rt5650_if1_dac1_tdm_sel_mux =
1551 SOC_DAPM_ENUM("IF1 DAC1 source", rt5650_tdm_dac1_enum);
1553 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac2_enum,
1554 RT5650_TDM_CTRL_4, 4, rt5645_tdm_dac_swap_select);
1556 static const struct snd_kcontrol_new rt5650_if1_dac2_tdm_sel_mux =
1557 SOC_DAPM_ENUM("IF1 DAC2 source", rt5650_tdm_dac2_enum);
1559 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac3_enum,
1560 RT5650_TDM_CTRL_4, 0, rt5645_tdm_dac_swap_select);
1562 static const struct snd_kcontrol_new rt5650_if1_dac3_tdm_sel_mux =
1563 SOC_DAPM_ENUM("IF1 DAC3 source", rt5650_tdm_dac3_enum);
1566 static const char * const rt5650_a_dac1_src[] = {
1567 "DAC1", "Stereo DAC Mixer"
1570 static SOC_ENUM_SINGLE_DECL(
1571 rt5650_a_dac1_l_enum, RT5650_A_DAC_SOUR,
1572 RT5650_A_DAC1_L_IN_SFT, rt5650_a_dac1_src);
1574 static const struct snd_kcontrol_new rt5650_a_dac1_l_mux =
1575 SOC_DAPM_ENUM("A DAC1 L source", rt5650_a_dac1_l_enum);
1577 static SOC_ENUM_SINGLE_DECL(
1578 rt5650_a_dac1_r_enum, RT5650_A_DAC_SOUR,
1579 RT5650_A_DAC1_R_IN_SFT, rt5650_a_dac1_src);
1581 static const struct snd_kcontrol_new rt5650_a_dac1_r_mux =
1582 SOC_DAPM_ENUM("A DAC1 R source", rt5650_a_dac1_r_enum);
1585 static const char * const rt5650_a_dac2_src[] = {
1586 "Stereo DAC Mixer", "Mono DAC Mixer"
1589 static SOC_ENUM_SINGLE_DECL(
1590 rt5650_a_dac2_l_enum, RT5650_A_DAC_SOUR,
1591 RT5650_A_DAC2_L_IN_SFT, rt5650_a_dac2_src);
1593 static const struct snd_kcontrol_new rt5650_a_dac2_l_mux =
1594 SOC_DAPM_ENUM("A DAC2 L source", rt5650_a_dac2_l_enum);
1596 static SOC_ENUM_SINGLE_DECL(
1597 rt5650_a_dac2_r_enum, RT5650_A_DAC_SOUR,
1598 RT5650_A_DAC2_R_IN_SFT, rt5650_a_dac2_src);
1600 static const struct snd_kcontrol_new rt5650_a_dac2_r_mux =
1601 SOC_DAPM_ENUM("A DAC2 R source", rt5650_a_dac2_r_enum);
1604 static const char * const rt5645_if2_adc_in_src[] = {
1605 "IF_ADC1", "IF_ADC2", "VAD_ADC"
1608 static SOC_ENUM_SINGLE_DECL(
1609 rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
1610 RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
1612 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
1613 SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
1615 /* MX-31 [15] [13] [11] [9] */
1616 static const char * const rt5645_pdm_src[] = {
1617 "Mono DAC", "Stereo DAC"
1620 static SOC_ENUM_SINGLE_DECL(
1621 rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
1622 RT5645_PDM1_L_SFT, rt5645_pdm_src);
1624 static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
1625 SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
1627 static SOC_ENUM_SINGLE_DECL(
1628 rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
1629 RT5645_PDM1_R_SFT, rt5645_pdm_src);
1631 static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1632 SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1635 static const char * const rt5645_vad_adc_src[] = {
1636 "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1639 static SOC_ENUM_SINGLE_DECL(
1640 rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1641 RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1643 static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1644 SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1646 static const struct snd_kcontrol_new spk_l_vol_control =
1647 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1648 RT5645_L_MUTE_SFT, 1, 1);
1650 static const struct snd_kcontrol_new spk_r_vol_control =
1651 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1652 RT5645_R_MUTE_SFT, 1, 1);
1654 static const struct snd_kcontrol_new hp_l_vol_control =
1655 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1656 RT5645_L_MUTE_SFT, 1, 1);
1658 static const struct snd_kcontrol_new hp_r_vol_control =
1659 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1660 RT5645_R_MUTE_SFT, 1, 1);
1662 static const struct snd_kcontrol_new pdm1_l_vol_control =
1663 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1664 RT5645_M_PDM1_L, 1, 1);
1666 static const struct snd_kcontrol_new pdm1_r_vol_control =
1667 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1668 RT5645_M_PDM1_R, 1, 1);
1670 static void hp_amp_power(struct snd_soc_component *component, int on)
1672 static int hp_amp_power_count;
1673 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
1677 if (hp_amp_power_count <= 0) {
1678 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1679 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x3100);
1680 snd_soc_component_write(component, RT5645_CHARGE_PUMP,
1682 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x000d);
1683 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1684 RT5645_HP_DCC_INT1, 0x9f01);
1685 for (i = 0; i < 20; i++) {
1686 usleep_range(1000, 1500);
1687 regmap_read(rt5645->regmap, RT5645_PR_BASE +
1688 RT5645_HP_DCC_INT1, &val);
1689 if (!(val & 0x8000))
1692 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1693 RT5645_HP_CO_MASK, RT5645_HP_CO_EN);
1694 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1696 snd_soc_component_write(component, RT5645_DEPOP_M3, 0x0737);
1697 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1698 RT5645_MAMP_INT_REG2, 0xfc00);
1699 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
1702 /* depop parameters */
1703 snd_soc_component_update_bits(component, RT5645_DEPOP_M2,
1704 RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1705 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x000d);
1706 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1707 RT5645_HP_DCC_INT1, 0x9f01);
1709 /* headphone amp power on */
1710 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1711 RT5645_PWR_FV1 | RT5645_PWR_FV2, 0);
1712 snd_soc_component_update_bits(component, RT5645_PWR_VOL,
1713 RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1714 RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1715 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1716 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1718 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1721 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1722 RT5645_PWR_FV1 | RT5645_PWR_FV2,
1723 RT5645_PWR_FV1 | RT5645_PWR_FV2);
1725 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1726 RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1727 RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1728 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1730 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1734 hp_amp_power_count++;
1736 hp_amp_power_count--;
1737 if (hp_amp_power_count <= 0) {
1738 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1739 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1741 snd_soc_component_write(component, RT5645_DEPOP_M3, 0x0737);
1742 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1743 RT5645_MAMP_INT_REG2, 0xfc00);
1744 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
1746 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x0001);
1749 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1751 RT5645_HP_L_SMT_MASK |
1752 RT5645_HP_R_SMT_MASK,
1754 RT5645_HP_L_SMT_DIS |
1755 RT5645_HP_R_SMT_DIS);
1756 /* headphone amp power down */
1757 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x0000);
1758 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1759 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1761 snd_soc_component_update_bits(component, RT5645_DEPOP_M2,
1762 RT5645_DEPOP_MASK, 0);
1768 static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1769 struct snd_kcontrol *kcontrol, int event)
1771 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1772 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
1775 case SND_SOC_DAPM_POST_PMU:
1776 hp_amp_power(component, 1);
1777 /* headphone unmute sequence */
1778 if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1779 snd_soc_component_update_bits(component, RT5645_DEPOP_M3,
1780 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1782 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1783 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1784 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1785 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1786 RT5645_MAMP_INT_REG2, 0xfc00);
1787 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1788 RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1789 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1790 RT5645_RSTN_MASK, RT5645_RSTN_EN);
1791 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1792 RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1793 RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1794 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1796 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1797 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1798 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1799 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1803 case SND_SOC_DAPM_PRE_PMD:
1804 /* headphone mute sequence */
1805 if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1806 snd_soc_component_update_bits(component, RT5645_DEPOP_M3,
1807 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1809 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1810 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1811 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1812 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1813 RT5645_MAMP_INT_REG2, 0xfc00);
1814 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1815 RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1816 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1817 RT5645_RSTP_MASK, RT5645_RSTP_EN);
1818 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1819 RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1820 RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1821 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1824 hp_amp_power(component, 0);
1834 static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1835 struct snd_kcontrol *kcontrol, int event)
1837 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1840 case SND_SOC_DAPM_POST_PMU:
1841 rt5645_enable_hweq(component);
1842 snd_soc_component_update_bits(component, RT5645_PWR_DIG1,
1843 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1845 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1846 RT5645_PWR_CLS_D_L);
1847 snd_soc_component_update_bits(component, RT5645_GEN_CTRL3,
1848 RT5645_DET_CLK_MASK, RT5645_DET_CLK_MODE1);
1851 case SND_SOC_DAPM_PRE_PMD:
1852 snd_soc_component_update_bits(component, RT5645_GEN_CTRL3,
1853 RT5645_DET_CLK_MASK, RT5645_DET_CLK_DIS);
1854 snd_soc_component_write(component, RT5645_EQ_CTRL2, 0);
1855 snd_soc_component_update_bits(component, RT5645_PWR_DIG1,
1856 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1857 RT5645_PWR_CLS_D_L, 0);
1867 static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1868 struct snd_kcontrol *kcontrol, int event)
1870 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1873 case SND_SOC_DAPM_POST_PMU:
1874 hp_amp_power(component, 1);
1875 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1876 RT5645_PWR_LM, RT5645_PWR_LM);
1877 snd_soc_component_update_bits(component, RT5645_LOUT1,
1878 RT5645_L_MUTE | RT5645_R_MUTE, 0);
1881 case SND_SOC_DAPM_PRE_PMD:
1882 snd_soc_component_update_bits(component, RT5645_LOUT1,
1883 RT5645_L_MUTE | RT5645_R_MUTE,
1884 RT5645_L_MUTE | RT5645_R_MUTE);
1885 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1887 hp_amp_power(component, 0);
1897 static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1898 struct snd_kcontrol *kcontrol, int event)
1900 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1903 case SND_SOC_DAPM_POST_PMU:
1904 snd_soc_component_update_bits(component, RT5645_PWR_ANLG2,
1905 RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1908 case SND_SOC_DAPM_PRE_PMD:
1909 snd_soc_component_update_bits(component, RT5645_PWR_ANLG2,
1910 RT5645_PWR_BST2_P, 0);
1920 static int rt5645_set_micbias1_event(struct snd_soc_dapm_widget *w,
1921 struct snd_kcontrol *k, int event)
1923 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1926 case SND_SOC_DAPM_PRE_PMU:
1927 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1928 RT5645_MICBIAS1_POW_CTRL_SEL_MASK,
1929 RT5645_MICBIAS1_POW_CTRL_SEL_M);
1932 case SND_SOC_DAPM_POST_PMD:
1933 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1934 RT5645_MICBIAS1_POW_CTRL_SEL_MASK,
1935 RT5645_MICBIAS1_POW_CTRL_SEL_A);
1945 static int rt5645_set_micbias2_event(struct snd_soc_dapm_widget *w,
1946 struct snd_kcontrol *k, int event)
1948 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1951 case SND_SOC_DAPM_PRE_PMU:
1952 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1953 RT5645_MICBIAS2_POW_CTRL_SEL_MASK,
1954 RT5645_MICBIAS2_POW_CTRL_SEL_M);
1957 case SND_SOC_DAPM_POST_PMD:
1958 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1959 RT5645_MICBIAS2_POW_CTRL_SEL_MASK,
1960 RT5645_MICBIAS2_POW_CTRL_SEL_A);
1970 static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1971 SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1972 RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1973 SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1974 RT5645_PWR_PLL_BIT, 0, NULL, 0),
1976 SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1977 RT5645_PWR_JD1_BIT, 0, NULL, 0),
1978 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1979 RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1982 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1,
1984 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1,
1986 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1,
1988 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1,
1990 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1,
1992 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1,
1994 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1,
1996 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1,
1998 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1,
2000 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1,
2002 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1,
2007 SND_SOC_DAPM_SUPPLY("micbias1", RT5645_PWR_ANLG2,
2008 RT5645_PWR_MB1_BIT, 0, rt5645_set_micbias1_event,
2009 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
2010 SND_SOC_DAPM_SUPPLY("micbias2", RT5645_PWR_ANLG2,
2011 RT5645_PWR_MB2_BIT, 0, rt5645_set_micbias2_event,
2012 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
2014 SND_SOC_DAPM_INPUT("DMIC L1"),
2015 SND_SOC_DAPM_INPUT("DMIC R1"),
2016 SND_SOC_DAPM_INPUT("DMIC L2"),
2017 SND_SOC_DAPM_INPUT("DMIC R2"),
2019 SND_SOC_DAPM_INPUT("IN1P"),
2020 SND_SOC_DAPM_INPUT("IN1N"),
2021 SND_SOC_DAPM_INPUT("IN2P"),
2022 SND_SOC_DAPM_INPUT("IN2N"),
2024 SND_SOC_DAPM_INPUT("Haptic Generator"),
2026 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2027 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2028 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
2029 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
2030 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
2031 RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
2032 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
2033 RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
2035 SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
2036 RT5645_PWR_BST1_BIT, 0, NULL, 0),
2037 SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
2038 RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
2039 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2041 SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
2042 RT5645_PWR_IN_L_BIT, 0, NULL, 0),
2043 SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
2044 RT5645_PWR_IN_R_BIT, 0, NULL, 0),
2046 SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
2047 0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
2048 SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
2049 0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
2051 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
2052 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
2054 SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
2055 RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
2056 SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
2057 RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
2060 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
2061 &rt5645_sto1_dmic_mux),
2062 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2063 &rt5645_sto_adc2_mux),
2064 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2065 &rt5645_sto_adc2_mux),
2066 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2067 &rt5645_sto_adc1_mux),
2068 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2069 &rt5645_sto_adc1_mux),
2070 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
2071 &rt5645_mono_dmic_l_mux),
2072 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
2073 &rt5645_mono_dmic_r_mux),
2074 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2075 &rt5645_mono_adc_l2_mux),
2076 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2077 &rt5645_mono_adc_l1_mux),
2078 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2079 &rt5645_mono_adc_r1_mux),
2080 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2081 &rt5645_mono_adc_r2_mux),
2084 SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
2085 RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
2086 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
2087 rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
2089 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
2090 rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
2092 SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
2093 RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
2094 SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
2095 rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
2097 SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
2098 RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
2099 SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
2100 rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
2104 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
2105 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
2106 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2107 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2108 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2109 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2110 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2111 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2112 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2113 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
2116 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
2117 0, 0, &rt5645_if2_adc_in_mux),
2119 /* Digital Interface */
2120 SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
2121 RT5645_PWR_I2S1_BIT, 0, NULL, 0),
2122 SND_SOC_DAPM_PGA("IF1 DAC0", SND_SOC_NOPM, 0, 0, NULL, 0),
2123 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2124 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2125 SND_SOC_DAPM_PGA("IF1 DAC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2126 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2127 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2128 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2129 SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
2130 RT5645_PWR_I2S2_BIT, 0, NULL, 0),
2131 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2132 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2133 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2134 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2136 /* Digital Interface Select */
2137 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
2138 0, 0, &rt5645_vad_adc_mux),
2140 /* Audio Interface */
2141 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
2142 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
2143 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
2144 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
2147 /* DAC mixer before sound effect */
2148 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
2149 rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
2150 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
2151 rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
2153 /* DAC2 channel Mux */
2154 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
2155 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
2156 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
2157 RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
2158 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
2159 RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
2161 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
2162 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
2165 SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
2166 RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
2167 SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
2168 RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
2169 SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
2170 RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
2171 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
2172 rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
2173 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
2174 rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
2175 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
2176 rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
2177 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
2178 rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
2179 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
2180 rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
2181 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
2182 rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
2185 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
2187 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
2189 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
2191 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
2194 SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
2195 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
2196 SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
2197 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
2198 SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
2199 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
2200 SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
2201 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
2203 SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
2204 &spk_l_vol_control),
2205 SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
2206 &spk_r_vol_control),
2207 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
2208 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
2209 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
2210 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
2211 SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
2212 RT5645_PWR_HM_L_BIT, 0, NULL, 0),
2213 SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
2214 RT5645_PWR_HM_R_BIT, 0, NULL, 0),
2215 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
2216 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
2217 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
2218 SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
2219 SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
2221 /* HPO/LOUT/Mono Mixer */
2222 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
2223 ARRAY_SIZE(rt5645_spo_l_mix)),
2224 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
2225 ARRAY_SIZE(rt5645_spo_r_mix)),
2226 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
2227 ARRAY_SIZE(rt5645_hpo_mix)),
2228 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
2229 ARRAY_SIZE(rt5645_lout_mix)),
2231 SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
2232 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2233 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
2234 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2235 SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
2236 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2239 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
2241 SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
2242 SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
2244 SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
2245 SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
2248 SND_SOC_DAPM_OUTPUT("HPOL"),
2249 SND_SOC_DAPM_OUTPUT("HPOR"),
2250 SND_SOC_DAPM_OUTPUT("LOUTL"),
2251 SND_SOC_DAPM_OUTPUT("LOUTR"),
2252 SND_SOC_DAPM_OUTPUT("PDM1L"),
2253 SND_SOC_DAPM_OUTPUT("PDM1R"),
2254 SND_SOC_DAPM_OUTPUT("SPOL"),
2255 SND_SOC_DAPM_OUTPUT("SPOR"),
2258 static const struct snd_soc_dapm_widget rt5645_specific_dapm_widgets[] = {
2259 SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
2260 &rt5645_if1_dac0_tdm_sel_mux),
2261 SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
2262 &rt5645_if1_dac1_tdm_sel_mux),
2263 SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
2264 &rt5645_if1_dac2_tdm_sel_mux),
2265 SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
2266 &rt5645_if1_dac3_tdm_sel_mux),
2267 SND_SOC_DAPM_MUX("RT5645 IF1 ADC Mux", SND_SOC_NOPM,
2268 0, 0, &rt5645_if1_adc_in_mux),
2269 SND_SOC_DAPM_MUX("RT5645 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
2270 0, 0, &rt5645_if1_adc1_in_mux),
2271 SND_SOC_DAPM_MUX("RT5645 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
2272 0, 0, &rt5645_if1_adc2_in_mux),
2273 SND_SOC_DAPM_MUX("RT5645 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
2274 0, 0, &rt5645_if1_adc3_in_mux),
2277 static const struct snd_soc_dapm_widget rt5650_specific_dapm_widgets[] = {
2278 SND_SOC_DAPM_MUX("A DAC1 L Mux", SND_SOC_NOPM,
2279 0, 0, &rt5650_a_dac1_l_mux),
2280 SND_SOC_DAPM_MUX("A DAC1 R Mux", SND_SOC_NOPM,
2281 0, 0, &rt5650_a_dac1_r_mux),
2282 SND_SOC_DAPM_MUX("A DAC2 L Mux", SND_SOC_NOPM,
2283 0, 0, &rt5650_a_dac2_l_mux),
2284 SND_SOC_DAPM_MUX("A DAC2 R Mux", SND_SOC_NOPM,
2285 0, 0, &rt5650_a_dac2_r_mux),
2287 SND_SOC_DAPM_MUX("RT5650 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
2288 0, 0, &rt5650_if1_adc1_in_mux),
2289 SND_SOC_DAPM_MUX("RT5650 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
2290 0, 0, &rt5650_if1_adc2_in_mux),
2291 SND_SOC_DAPM_MUX("RT5650 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
2292 0, 0, &rt5650_if1_adc3_in_mux),
2293 SND_SOC_DAPM_MUX("RT5650 IF1 ADC Mux", SND_SOC_NOPM,
2294 0, 0, &rt5650_if1_adc_in_mux),
2296 SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
2297 &rt5650_if1_dac0_tdm_sel_mux),
2298 SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
2299 &rt5650_if1_dac1_tdm_sel_mux),
2300 SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
2301 &rt5650_if1_dac2_tdm_sel_mux),
2302 SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
2303 &rt5650_if1_dac3_tdm_sel_mux),
2306 static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
2307 { "adc stereo1 filter", NULL, "ADC STO1 ASRC", is_using_asrc },
2308 { "adc mono left filter", NULL, "ADC MONO L ASRC", is_using_asrc },
2309 { "adc mono right filter", NULL, "ADC MONO R ASRC", is_using_asrc },
2310 { "dac mono left filter", NULL, "DAC MONO L ASRC", is_using_asrc },
2311 { "dac mono right filter", NULL, "DAC MONO R ASRC", is_using_asrc },
2312 { "dac stereo1 filter", NULL, "DAC STO ASRC", is_using_asrc },
2314 { "I2S1", NULL, "I2S1 ASRC" },
2315 { "I2S2", NULL, "I2S2 ASRC" },
2317 { "IN1P", NULL, "LDO2" },
2318 { "IN2P", NULL, "LDO2" },
2320 { "DMIC1", NULL, "DMIC L1" },
2321 { "DMIC1", NULL, "DMIC R1" },
2322 { "DMIC2", NULL, "DMIC L2" },
2323 { "DMIC2", NULL, "DMIC R2" },
2325 { "BST1", NULL, "IN1P" },
2326 { "BST1", NULL, "IN1N" },
2327 { "BST1", NULL, "JD Power" },
2328 { "BST1", NULL, "Mic Det Power" },
2329 { "BST2", NULL, "IN2P" },
2330 { "BST2", NULL, "IN2N" },
2332 { "INL VOL", NULL, "IN2P" },
2333 { "INR VOL", NULL, "IN2N" },
2335 { "RECMIXL", "HPOL Switch", "HPOL" },
2336 { "RECMIXL", "INL Switch", "INL VOL" },
2337 { "RECMIXL", "BST2 Switch", "BST2" },
2338 { "RECMIXL", "BST1 Switch", "BST1" },
2339 { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
2341 { "RECMIXR", "HPOR Switch", "HPOR" },
2342 { "RECMIXR", "INR Switch", "INR VOL" },
2343 { "RECMIXR", "BST2 Switch", "BST2" },
2344 { "RECMIXR", "BST1 Switch", "BST1" },
2345 { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
2347 { "ADC L", NULL, "RECMIXL" },
2348 { "ADC L", NULL, "ADC L power" },
2349 { "ADC R", NULL, "RECMIXR" },
2350 { "ADC R", NULL, "ADC R power" },
2352 {"DMIC L1", NULL, "DMIC CLK"},
2353 {"DMIC L1", NULL, "DMIC1 Power"},
2354 {"DMIC R1", NULL, "DMIC CLK"},
2355 {"DMIC R1", NULL, "DMIC1 Power"},
2356 {"DMIC L2", NULL, "DMIC CLK"},
2357 {"DMIC L2", NULL, "DMIC2 Power"},
2358 {"DMIC R2", NULL, "DMIC CLK"},
2359 {"DMIC R2", NULL, "DMIC2 Power"},
2361 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
2362 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
2363 { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC" },
2365 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
2366 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
2367 { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC" },
2369 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
2370 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
2371 { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC" },
2373 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2374 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2375 { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
2376 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2378 { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
2379 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2380 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2381 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2383 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2384 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2385 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2386 { "Mono ADC L1 Mux", "ADC", "ADC L" },
2388 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2389 { "Mono ADC R1 Mux", "ADC", "ADC R" },
2390 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2391 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2393 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2394 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2395 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2396 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2398 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
2399 { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
2400 { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2402 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
2403 { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
2404 { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2406 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2407 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2408 { "Mono ADC MIXL", NULL, "adc mono left filter" },
2409 { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
2411 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2412 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2413 { "Mono ADC MIXR", NULL, "adc mono right filter" },
2414 { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
2416 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
2417 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
2418 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
2420 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
2421 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
2422 { "IF_ADC2", NULL, "Mono ADC MIXL" },
2423 { "IF_ADC2", NULL, "Mono ADC MIXR" },
2424 { "VAD_ADC", NULL, "VAD ADC Mux" },
2426 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
2427 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
2428 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
2430 { "IF1 ADC", NULL, "I2S1" },
2431 { "IF2 ADC", NULL, "I2S2" },
2432 { "IF2 ADC", NULL, "IF2 ADC Mux" },
2434 { "AIF2TX", NULL, "IF2 ADC" },
2436 { "IF1 DAC0", NULL, "AIF1RX" },
2437 { "IF1 DAC1", NULL, "AIF1RX" },
2438 { "IF1 DAC2", NULL, "AIF1RX" },
2439 { "IF1 DAC3", NULL, "AIF1RX" },
2440 { "IF2 DAC", NULL, "AIF2RX" },
2442 { "IF1 DAC0", NULL, "I2S1" },
2443 { "IF1 DAC1", NULL, "I2S1" },
2444 { "IF1 DAC2", NULL, "I2S1" },
2445 { "IF1 DAC3", NULL, "I2S1" },
2446 { "IF2 DAC", NULL, "I2S2" },
2448 { "IF2 DAC L", NULL, "IF2 DAC" },
2449 { "IF2 DAC R", NULL, "IF2 DAC" },
2451 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
2452 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
2454 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
2455 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
2456 { "DAC1 MIXL", NULL, "dac stereo1 filter" },
2457 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
2458 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2459 { "DAC1 MIXR", NULL, "dac stereo1 filter" },
2461 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2462 { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
2463 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2464 { "DAC L2 Volume", NULL, "DAC L2 Mux" },
2465 { "DAC L2 Volume", NULL, "dac mono left filter" },
2467 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2468 { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
2469 { "DAC R2 Mux", "Haptic", "Haptic Generator" },
2470 { "DAC R2 Volume", NULL, "DAC R2 Mux" },
2471 { "DAC R2 Volume", NULL, "dac mono right filter" },
2473 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2474 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2475 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2476 { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
2477 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2478 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2479 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2480 { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
2482 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2483 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2484 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2485 { "Mono DAC MIXL", NULL, "dac mono left filter" },
2486 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2487 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2488 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2489 { "Mono DAC MIXR", NULL, "dac mono right filter" },
2491 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2492 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2493 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2494 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2495 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2496 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2498 { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
2499 { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
2500 { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
2501 { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
2503 { "SPK MIXL", "BST1 Switch", "BST1" },
2504 { "SPK MIXL", "INL Switch", "INL VOL" },
2505 { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
2506 { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
2507 { "SPK MIXR", "BST2 Switch", "BST2" },
2508 { "SPK MIXR", "INR Switch", "INR VOL" },
2509 { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
2510 { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
2512 { "OUT MIXL", "BST1 Switch", "BST1" },
2513 { "OUT MIXL", "INL Switch", "INL VOL" },
2514 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2515 { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2517 { "OUT MIXR", "BST2 Switch", "BST2" },
2518 { "OUT MIXR", "INR Switch", "INR VOL" },
2519 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2520 { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2522 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2523 { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
2524 { "HPOVOL MIXL", "INL Switch", "INL VOL" },
2525 { "HPOVOL MIXL", "BST1 Switch", "BST1" },
2526 { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
2527 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2528 { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
2529 { "HPOVOL MIXR", "INR Switch", "INR VOL" },
2530 { "HPOVOL MIXR", "BST2 Switch", "BST2" },
2531 { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
2533 { "DAC 2", NULL, "DAC L2" },
2534 { "DAC 2", NULL, "DAC R2" },
2535 { "DAC 1", NULL, "DAC L1" },
2536 { "DAC 1", NULL, "DAC R1" },
2537 { "HPOVOL L", "Switch", "HPOVOL MIXL" },
2538 { "HPOVOL R", "Switch", "HPOVOL MIXR" },
2539 { "HPOVOL", NULL, "HPOVOL L" },
2540 { "HPOVOL", NULL, "HPOVOL R" },
2541 { "HPO MIX", "DAC1 Switch", "DAC 1" },
2542 { "HPO MIX", "HPVOL Switch", "HPOVOL" },
2544 { "SPKVOL L", "Switch", "SPK MIXL" },
2545 { "SPKVOL R", "Switch", "SPK MIXR" },
2547 { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
2548 { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
2549 { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
2550 { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
2552 { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2553 { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2554 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2555 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2557 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2558 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2559 { "PDM1 L Mux", NULL, "PDM1 Power" },
2560 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2561 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2562 { "PDM1 R Mux", NULL, "PDM1 Power" },
2564 { "HP amp", NULL, "HPO MIX" },
2565 { "HP amp", NULL, "JD Power" },
2566 { "HP amp", NULL, "Mic Det Power" },
2567 { "HP amp", NULL, "LDO2" },
2568 { "HPOL", NULL, "HP amp" },
2569 { "HPOR", NULL, "HP amp" },
2571 { "LOUT amp", NULL, "LOUT MIX" },
2572 { "LOUTL", NULL, "LOUT amp" },
2573 { "LOUTR", NULL, "LOUT amp" },
2575 { "PDM1 L", "Switch", "PDM1 L Mux" },
2576 { "PDM1 R", "Switch", "PDM1 R Mux" },
2578 { "PDM1L", NULL, "PDM1 L" },
2579 { "PDM1R", NULL, "PDM1 R" },
2581 { "SPK amp", NULL, "SPOL MIX" },
2582 { "SPK amp", NULL, "SPOR MIX" },
2583 { "SPOL", NULL, "SPK amp" },
2584 { "SPOR", NULL, "SPK amp" },
2587 static const struct snd_soc_dapm_route rt5650_specific_dapm_routes[] = {
2588 { "A DAC1 L Mux", "DAC1", "DAC1 MIXL"},
2589 { "A DAC1 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2590 { "A DAC1 R Mux", "DAC1", "DAC1 MIXR"},
2591 { "A DAC1 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2593 { "A DAC2 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2594 { "A DAC2 L Mux", "Mono DAC Mixer", "Mono DAC MIXL"},
2595 { "A DAC2 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2596 { "A DAC2 R Mux", "Mono DAC Mixer", "Mono DAC MIXR"},
2598 { "DAC L1", NULL, "A DAC1 L Mux" },
2599 { "DAC R1", NULL, "A DAC1 R Mux" },
2600 { "DAC L2", NULL, "A DAC2 L Mux" },
2601 { "DAC R2", NULL, "A DAC2 R Mux" },
2603 { "RT5650 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2604 { "RT5650 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2605 { "RT5650 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2606 { "RT5650 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2608 { "RT5650 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2609 { "RT5650 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2610 { "RT5650 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2611 { "RT5650 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2613 { "RT5650 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2614 { "RT5650 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2615 { "RT5650 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2616 { "RT5650 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2618 { "IF1 ADC", NULL, "RT5650 IF1 ADC1 Swap Mux" },
2619 { "IF1 ADC", NULL, "RT5650 IF1 ADC2 Swap Mux" },
2620 { "IF1 ADC", NULL, "RT5650 IF1 ADC3 Swap Mux" },
2622 { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/DAC_REF/Null", "IF1 ADC" },
2623 { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/Null/DAC_REF", "IF1 ADC" },
2624 { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/IF_ADC2/Null", "IF1 ADC" },
2625 { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/Null/IF_ADC2", "IF1 ADC" },
2626 { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/DAC_REF/IF_ADC2", "IF1 ADC" },
2627 { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/IF_ADC2/DAC_REF", "IF1 ADC" },
2629 { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/DAC_REF/Null", "IF1 ADC" },
2630 { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/Null/DAC_REF", "IF1 ADC" },
2631 { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/IF_ADC1/Null", "IF1 ADC" },
2632 { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/Null/IF_ADC1", "IF1 ADC" },
2633 { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/DAC_REF/IF_ADC1", "IF1 ADC" },
2634 { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/IF_ADC1/DAC_REF", "IF1 ADC" },
2636 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/IF_ADC2/Null", "IF1 ADC" },
2637 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/Null/IF_ADC2", "IF1 ADC" },
2638 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/IF_ADC1/Null", "IF1 ADC" },
2639 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/Null/IF_ADC1", "IF1 ADC" },
2640 { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC1/IF_ADC2", "IF1 ADC" },
2641 { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC2/IF_ADC1", "IF1 ADC" },
2643 { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/IF_ADC2/DAC_REF", "IF1 ADC" },
2644 { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/DAC_REF/IF_ADC2", "IF1 ADC" },
2645 { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/IF_ADC1/DAC_REF", "IF1 ADC" },
2646 { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/DAC_REF/IF_ADC1", "IF1 ADC" },
2647 { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC1/IF_ADC2", "IF1 ADC" },
2648 { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC2/IF_ADC1", "IF1 ADC" },
2649 { "AIF1TX", NULL, "RT5650 IF1 ADC Mux" },
2651 { "RT5650 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2652 { "RT5650 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2653 { "RT5650 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2654 { "RT5650 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2656 { "RT5650 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2657 { "RT5650 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2658 { "RT5650 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2659 { "RT5650 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2661 { "RT5650 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2662 { "RT5650 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2663 { "RT5650 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2664 { "RT5650 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2666 { "RT5650 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2667 { "RT5650 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2668 { "RT5650 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2669 { "RT5650 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2671 { "DAC1 L Mux", "IF1 DAC", "RT5650 IF1 DAC1 L Mux" },
2672 { "DAC1 R Mux", "IF1 DAC", "RT5650 IF1 DAC1 R Mux" },
2674 { "DAC L2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 L Mux" },
2675 { "DAC R2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 R Mux" },
2678 static const struct snd_soc_dapm_route rt5645_specific_dapm_routes[] = {
2679 { "DAC L1", NULL, "Stereo DAC MIXL" },
2680 { "DAC R1", NULL, "Stereo DAC MIXR" },
2681 { "DAC L2", NULL, "Mono DAC MIXL" },
2682 { "DAC R2", NULL, "Mono DAC MIXR" },
2684 { "RT5645 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2685 { "RT5645 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2686 { "RT5645 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2687 { "RT5645 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2689 { "RT5645 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2690 { "RT5645 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2691 { "RT5645 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2692 { "RT5645 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2694 { "RT5645 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2695 { "RT5645 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2696 { "RT5645 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2697 { "RT5645 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2699 { "IF1 ADC", NULL, "RT5645 IF1 ADC1 Swap Mux" },
2700 { "IF1 ADC", NULL, "RT5645 IF1 ADC2 Swap Mux" },
2701 { "IF1 ADC", NULL, "RT5645 IF1 ADC3 Swap Mux" },
2703 { "RT5645 IF1 ADC Mux", "IF_ADC1/IF_ADC2/VAD_ADC", "IF1 ADC" },
2704 { "RT5645 IF1 ADC Mux", "IF_ADC2/IF_ADC1/VAD_ADC", "IF1 ADC" },
2705 { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC1/IF_ADC2", "IF1 ADC" },
2706 { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC2/IF_ADC1", "IF1 ADC" },
2707 { "AIF1TX", NULL, "RT5645 IF1 ADC Mux" },
2709 { "RT5645 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2710 { "RT5645 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2711 { "RT5645 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2712 { "RT5645 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2714 { "RT5645 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2715 { "RT5645 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2716 { "RT5645 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2717 { "RT5645 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2719 { "RT5645 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2720 { "RT5645 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2721 { "RT5645 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2722 { "RT5645 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2724 { "RT5645 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2725 { "RT5645 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2726 { "RT5645 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2727 { "RT5645 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2729 { "DAC1 L Mux", "IF1 DAC", "RT5645 IF1 DAC1 L Mux" },
2730 { "DAC1 R Mux", "IF1 DAC", "RT5645 IF1 DAC1 R Mux" },
2732 { "DAC L2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 L Mux" },
2733 { "DAC R2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 R Mux" },
2736 static const struct snd_soc_dapm_route rt5645_old_dapm_routes[] = {
2737 { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
2738 { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
2741 static int rt5645_hw_params(struct snd_pcm_substream *substream,
2742 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2744 struct snd_soc_component *component = dai->component;
2745 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2746 unsigned int val_len = 0, val_clk, mask_clk, dl_sft;
2747 int pre_div, bclk_ms, frame_size;
2749 rt5645->lrck[dai->id] = params_rate(params);
2750 pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
2752 dev_err(component->dev, "Unsupported clock setting\n");
2755 frame_size = snd_soc_params_to_frame_size(params);
2756 if (frame_size < 0) {
2757 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
2761 switch (rt5645->codec_type) {
2762 case CODEC_TYPE_RT5650:
2770 bclk_ms = frame_size > 32;
2771 rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
2773 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2774 rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
2775 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2776 bclk_ms, pre_div, dai->id);
2778 switch (params_width(params)) {
2796 mask_clk = RT5645_I2S_PD1_MASK;
2797 val_clk = pre_div << RT5645_I2S_PD1_SFT;
2798 snd_soc_component_update_bits(component, RT5645_I2S1_SDP,
2799 (0x3 << dl_sft), (val_len << dl_sft));
2800 snd_soc_component_update_bits(component, RT5645_ADDA_CLK1, mask_clk, val_clk);
2803 mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
2804 val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
2805 pre_div << RT5645_I2S_PD2_SFT;
2806 snd_soc_component_update_bits(component, RT5645_I2S2_SDP,
2807 (0x3 << dl_sft), (val_len << dl_sft));
2808 snd_soc_component_update_bits(component, RT5645_ADDA_CLK1, mask_clk, val_clk);
2811 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2818 static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2820 struct snd_soc_component *component = dai->component;
2821 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2822 unsigned int reg_val = 0, pol_sft;
2824 switch (rt5645->codec_type) {
2825 case CODEC_TYPE_RT5650:
2833 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2834 case SND_SOC_DAIFMT_CBM_CFM:
2835 rt5645->master[dai->id] = 1;
2837 case SND_SOC_DAIFMT_CBS_CFS:
2838 reg_val |= RT5645_I2S_MS_S;
2839 rt5645->master[dai->id] = 0;
2845 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2846 case SND_SOC_DAIFMT_NB_NF:
2848 case SND_SOC_DAIFMT_IB_NF:
2849 reg_val |= (1 << pol_sft);
2855 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2856 case SND_SOC_DAIFMT_I2S:
2858 case SND_SOC_DAIFMT_LEFT_J:
2859 reg_val |= RT5645_I2S_DF_LEFT;
2861 case SND_SOC_DAIFMT_DSP_A:
2862 reg_val |= RT5645_I2S_DF_PCM_A;
2864 case SND_SOC_DAIFMT_DSP_B:
2865 reg_val |= RT5645_I2S_DF_PCM_B;
2872 snd_soc_component_update_bits(component, RT5645_I2S1_SDP,
2873 RT5645_I2S_MS_MASK | (1 << pol_sft) |
2874 RT5645_I2S_DF_MASK, reg_val);
2877 snd_soc_component_update_bits(component, RT5645_I2S2_SDP,
2878 RT5645_I2S_MS_MASK | (1 << pol_sft) |
2879 RT5645_I2S_DF_MASK, reg_val);
2882 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2888 static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
2889 int clk_id, unsigned int freq, int dir)
2891 struct snd_soc_component *component = dai->component;
2892 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2893 unsigned int reg_val = 0;
2895 if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
2899 case RT5645_SCLK_S_MCLK:
2900 reg_val |= RT5645_SCLK_SRC_MCLK;
2902 case RT5645_SCLK_S_PLL1:
2903 reg_val |= RT5645_SCLK_SRC_PLL1;
2905 case RT5645_SCLK_S_RCCLK:
2906 reg_val |= RT5645_SCLK_SRC_RCCLK;
2909 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
2912 snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2913 RT5645_SCLK_SRC_MASK, reg_val);
2914 rt5645->sysclk = freq;
2915 rt5645->sysclk_src = clk_id;
2917 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2922 static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2923 unsigned int freq_in, unsigned int freq_out)
2925 struct snd_soc_component *component = dai->component;
2926 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2927 struct rl6231_pll_code pll_code;
2930 if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
2931 freq_out == rt5645->pll_out)
2934 if (!freq_in || !freq_out) {
2935 dev_dbg(component->dev, "PLL disabled\n");
2938 rt5645->pll_out = 0;
2939 snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2940 RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
2945 case RT5645_PLL1_S_MCLK:
2946 snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2947 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
2949 case RT5645_PLL1_S_BCLK1:
2950 case RT5645_PLL1_S_BCLK2:
2953 snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2954 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
2957 snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2958 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
2961 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2966 dev_err(component->dev, "Unknown PLL source %d\n", source);
2970 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2972 dev_err(component->dev, "Unsupported input clock %d\n", freq_in);
2976 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
2977 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2978 pll_code.n_code, pll_code.k_code);
2980 snd_soc_component_write(component, RT5645_PLL_CTRL1,
2981 pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2982 snd_soc_component_write(component, RT5645_PLL_CTRL2,
2983 ((pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT) |
2984 (pll_code.m_bp << RT5645_PLL_M_BP_SFT));
2986 rt5645->pll_in = freq_in;
2987 rt5645->pll_out = freq_out;
2988 rt5645->pll_src = source;
2993 static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2994 unsigned int rx_mask, int slots, int slot_width)
2996 struct snd_soc_component *component = dai->component;
2997 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2998 unsigned int i_slot_sft, o_slot_sft, i_width_sht, o_width_sht, en_sft;
2999 unsigned int mask, val = 0;
3001 switch (rt5645->codec_type) {
3002 case CODEC_TYPE_RT5650:
3012 i_slot_sft = o_slot_sft = 12;
3013 i_width_sht = o_width_sht = 10;
3017 if (rx_mask || tx_mask) {
3018 val |= (1 << en_sft);
3019 if (rt5645->codec_type == CODEC_TYPE_RT5645)
3020 snd_soc_component_update_bits(component, RT5645_BASS_BACK,
3021 RT5645_G_BB_BST_MASK, RT5645_G_BB_BST_25DB);
3026 val |= (1 << i_slot_sft) | (1 << o_slot_sft);
3029 val |= (2 << i_slot_sft) | (2 << o_slot_sft);
3032 val |= (3 << i_slot_sft) | (3 << o_slot_sft);
3039 switch (slot_width) {
3041 val |= (1 << i_width_sht) | (1 << o_width_sht);
3044 val |= (2 << i_width_sht) | (2 << o_width_sht);
3047 val |= (3 << i_width_sht) | (3 << o_width_sht);
3054 snd_soc_component_update_bits(component, RT5645_TDM_CTRL_1, mask, val);
3059 static int rt5645_set_bias_level(struct snd_soc_component *component,
3060 enum snd_soc_bias_level level)
3062 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3065 case SND_SOC_BIAS_PREPARE:
3066 if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) {
3067 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3068 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3069 RT5645_PWR_BG | RT5645_PWR_VREF2,
3070 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3071 RT5645_PWR_BG | RT5645_PWR_VREF2);
3073 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3074 RT5645_PWR_FV1 | RT5645_PWR_FV2,
3075 RT5645_PWR_FV1 | RT5645_PWR_FV2);
3076 snd_soc_component_update_bits(component, RT5645_GEN_CTRL1,
3077 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
3081 case SND_SOC_BIAS_STANDBY:
3082 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3083 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3084 RT5645_PWR_BG | RT5645_PWR_VREF2,
3085 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3086 RT5645_PWR_BG | RT5645_PWR_VREF2);
3088 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3089 RT5645_PWR_FV1 | RT5645_PWR_FV2,
3090 RT5645_PWR_FV1 | RT5645_PWR_FV2);
3091 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
3092 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
3094 if (rt5645->en_button_func)
3095 queue_delayed_work(system_power_efficient_wq,
3096 &rt5645->jack_detect_work,
3097 msecs_to_jiffies(0));
3101 case SND_SOC_BIAS_OFF:
3102 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1100);
3103 if (!rt5645->en_button_func)
3104 snd_soc_component_update_bits(component, RT5645_GEN_CTRL1,
3105 RT5645_DIG_GATE_CTRL, 0);
3106 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3107 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3108 RT5645_PWR_BG | RT5645_PWR_VREF2 |
3109 RT5645_PWR_FV1 | RT5645_PWR_FV2, 0x0);
3119 static void rt5645_enable_push_button_irq(struct snd_soc_component *component,
3122 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3125 snd_soc_dapm_force_enable_pin(dapm, "ADC L power");
3126 snd_soc_dapm_force_enable_pin(dapm, "ADC R power");
3127 snd_soc_dapm_sync(dapm);
3129 snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD1, 0x3, 0x3);
3130 snd_soc_component_update_bits(component,
3131 RT5645_INT_IRQ_ST, 0x8, 0x8);
3132 snd_soc_component_update_bits(component,
3133 RT5650_4BTN_IL_CMD2, 0x8000, 0x8000);
3134 snd_soc_component_read(component, RT5650_4BTN_IL_CMD1);
3135 pr_debug("%s read %x = %x\n", __func__, RT5650_4BTN_IL_CMD1,
3136 snd_soc_component_read(component, RT5650_4BTN_IL_CMD1));
3138 snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD2, 0x8000, 0x0);
3139 snd_soc_component_update_bits(component, RT5645_INT_IRQ_ST, 0x8, 0x0);
3141 snd_soc_dapm_disable_pin(dapm, "ADC L power");
3142 snd_soc_dapm_disable_pin(dapm, "ADC R power");
3143 snd_soc_dapm_sync(dapm);
3147 static int rt5645_jack_detect(struct snd_soc_component *component, int jack_insert)
3149 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3150 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3154 regmap_write(rt5645->regmap, RT5645_CHARGE_PUMP, 0x0e06);
3156 /* for jack type detect */
3157 snd_soc_dapm_force_enable_pin(dapm, "LDO2");
3158 snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power");
3159 snd_soc_dapm_sync(dapm);
3160 if (!snd_soc_card_is_instantiated(dapm->card)) {
3161 /* Power up necessary bits for JD if dapm is
3163 regmap_update_bits(rt5645->regmap, RT5645_PWR_ANLG1,
3164 RT5645_PWR_MB | RT5645_PWR_VREF2,
3165 RT5645_PWR_MB | RT5645_PWR_VREF2);
3166 regmap_update_bits(rt5645->regmap, RT5645_PWR_MIXER,
3167 RT5645_PWR_LDO2, RT5645_PWR_LDO2);
3168 regmap_update_bits(rt5645->regmap, RT5645_PWR_VOL,
3169 RT5645_PWR_MIC_DET, RT5645_PWR_MIC_DET);
3172 regmap_write(rt5645->regmap, RT5645_JD_CTRL3, 0x00f0);
3173 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3174 RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
3175 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
3176 RT5645_CBJ_BST1_EN, RT5645_CBJ_BST1_EN);
3178 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3179 RT5645_CBJ_MN_JD, 0);
3182 regmap_read(rt5645->regmap, RT5645_IN1_CTRL3, &val);
3184 dev_dbg(component->dev, "val = %d\n", val);
3186 if ((val == 1 || val == 2) && !rt5645->pdata.no_headset_mic) {
3187 rt5645->jack_type = SND_JACK_HEADSET;
3188 if (rt5645->en_button_func) {
3189 rt5645_enable_push_button_irq(component, true);
3192 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
3193 snd_soc_dapm_sync(dapm);
3194 rt5645->jack_type = SND_JACK_HEADPHONE;
3196 if (rt5645->pdata.level_trigger_irq)
3197 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3198 RT5645_JD_1_1_MASK, RT5645_JD_1_1_NOR);
3199 } else { /* jack out */
3200 rt5645->jack_type = 0;
3202 regmap_update_bits(rt5645->regmap, RT5645_HP_VOL,
3203 RT5645_L_MUTE | RT5645_R_MUTE,
3204 RT5645_L_MUTE | RT5645_R_MUTE);
3205 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3206 RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
3207 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
3208 RT5645_CBJ_BST1_EN, 0);
3210 if (rt5645->en_button_func)
3211 rt5645_enable_push_button_irq(component, false);
3213 if (rt5645->pdata.jd_mode == 0)
3214 snd_soc_dapm_disable_pin(dapm, "LDO2");
3215 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
3216 snd_soc_dapm_sync(dapm);
3217 if (rt5645->pdata.level_trigger_irq)
3218 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3219 RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
3222 return rt5645->jack_type;
3225 static int rt5645_button_detect(struct snd_soc_component *component)
3229 val = snd_soc_component_read(component, RT5650_4BTN_IL_CMD1);
3230 pr_debug("val=0x%x\n", val);
3231 btn_type = val & 0xfff0;
3232 snd_soc_component_write(component, RT5650_4BTN_IL_CMD1, val);
3237 static irqreturn_t rt5645_irq(int irq, void *data);
3239 int rt5645_set_jack_detect(struct snd_soc_component *component,
3240 struct snd_soc_jack *hp_jack, struct snd_soc_jack *mic_jack,
3241 struct snd_soc_jack *btn_jack)
3243 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3245 rt5645->hp_jack = hp_jack;
3246 rt5645->mic_jack = mic_jack;
3247 rt5645->btn_jack = btn_jack;
3248 if (rt5645->btn_jack && rt5645->codec_type == CODEC_TYPE_RT5650) {
3249 rt5645->en_button_func = true;
3250 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3251 RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
3252 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL1,
3253 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
3255 rt5645_irq(0, rt5645);
3259 EXPORT_SYMBOL_GPL(rt5645_set_jack_detect);
3261 static void rt5645_jack_detect_work(struct work_struct *work)
3263 struct rt5645_priv *rt5645 =
3264 container_of(work, struct rt5645_priv, jack_detect_work.work);
3265 int val, btn_type, gpio_state = 0, report = 0;
3267 if (!rt5645->component)
3270 switch (rt5645->pdata.jd_mode) {
3271 case 0: /* Not using rt5645 JD */
3272 if (rt5645->gpiod_hp_det) {
3273 gpio_state = gpiod_get_value(rt5645->gpiod_hp_det);
3274 if (rt5645->pdata.inv_hp_pol)
3276 dev_dbg(rt5645->component->dev, "gpio_state = %d\n",
3278 report = rt5645_jack_detect(rt5645->component, gpio_state);
3280 snd_soc_jack_report(rt5645->hp_jack,
3281 report, SND_JACK_HEADPHONE);
3282 snd_soc_jack_report(rt5645->mic_jack,
3283 report, SND_JACK_MICROPHONE);
3286 val = snd_soc_component_read(rt5645->component, RT5645_A_JD_CTRL1) & 0x0020;
3288 default: /* read rt5645 jd1_1 status */
3289 val = snd_soc_component_read(rt5645->component, RT5645_INT_IRQ_ST) & 0x1000;
3294 if (!val && (rt5645->jack_type == 0)) { /* jack in */
3295 report = rt5645_jack_detect(rt5645->component, 1);
3296 } else if (!val && rt5645->jack_type != 0) {
3297 /* for push button and jack out */
3299 if (snd_soc_component_read(rt5645->component, RT5645_INT_IRQ_ST) & 0x4) {
3300 /* button pressed */
3301 report = SND_JACK_HEADSET;
3302 btn_type = rt5645_button_detect(rt5645->component);
3303 /* rt5650 can report three kinds of button behavior,
3304 one click, double click and hold. However,
3305 currently we will report button pressed/released
3306 event. So all the three button behaviors are
3307 treated as button pressed. */
3312 report |= SND_JACK_BTN_0;
3317 report |= SND_JACK_BTN_1;
3322 report |= SND_JACK_BTN_2;
3327 report |= SND_JACK_BTN_3;
3329 case 0x0000: /* unpressed */
3332 dev_err(rt5645->component->dev,
3333 "Unexpected button code 0x%04x\n",
3338 if (btn_type == 0)/* button release */
3339 report = rt5645->jack_type;
3341 mod_timer(&rt5645->btn_check_timer,
3342 msecs_to_jiffies(100));
3347 snd_soc_component_update_bits(rt5645->component,
3348 RT5645_INT_IRQ_ST, 0x1, 0x0);
3349 rt5645_jack_detect(rt5645->component, 0);
3352 snd_soc_jack_report(rt5645->hp_jack, report, SND_JACK_HEADPHONE);
3353 snd_soc_jack_report(rt5645->mic_jack, report, SND_JACK_MICROPHONE);
3354 if (rt5645->en_button_func)
3355 snd_soc_jack_report(rt5645->btn_jack,
3356 report, SND_JACK_BTN_0 | SND_JACK_BTN_1 |
3357 SND_JACK_BTN_2 | SND_JACK_BTN_3);
3360 static void rt5645_rcclock_work(struct work_struct *work)
3362 struct rt5645_priv *rt5645 =
3363 container_of(work, struct rt5645_priv, rcclock_work.work);
3365 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3366 RT5645_PWR_CLK25M_MASK, RT5645_PWR_CLK25M_PD);
3369 static irqreturn_t rt5645_irq(int irq, void *data)
3371 struct rt5645_priv *rt5645 = data;
3373 queue_delayed_work(system_power_efficient_wq,
3374 &rt5645->jack_detect_work, msecs_to_jiffies(250));
3379 static void rt5645_btn_check_callback(struct timer_list *t)
3381 struct rt5645_priv *rt5645 = from_timer(rt5645, t, btn_check_timer);
3383 queue_delayed_work(system_power_efficient_wq,
3384 &rt5645->jack_detect_work, msecs_to_jiffies(5));
3387 static int rt5645_probe(struct snd_soc_component *component)
3389 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3390 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3392 rt5645->component = component;
3394 switch (rt5645->codec_type) {
3395 case CODEC_TYPE_RT5645:
3396 snd_soc_dapm_new_controls(dapm,
3397 rt5645_specific_dapm_widgets,
3398 ARRAY_SIZE(rt5645_specific_dapm_widgets));
3399 snd_soc_dapm_add_routes(dapm,
3400 rt5645_specific_dapm_routes,
3401 ARRAY_SIZE(rt5645_specific_dapm_routes));
3402 if (rt5645->v_id < 3) {
3403 snd_soc_dapm_add_routes(dapm,
3404 rt5645_old_dapm_routes,
3405 ARRAY_SIZE(rt5645_old_dapm_routes));
3408 case CODEC_TYPE_RT5650:
3409 snd_soc_dapm_new_controls(dapm,
3410 rt5650_specific_dapm_widgets,
3411 ARRAY_SIZE(rt5650_specific_dapm_widgets));
3412 snd_soc_dapm_add_routes(dapm,
3413 rt5650_specific_dapm_routes,
3414 ARRAY_SIZE(rt5650_specific_dapm_routes));
3418 snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
3420 /* for JD function */
3421 if (rt5645->pdata.jd_mode) {
3422 snd_soc_dapm_force_enable_pin(dapm, "JD Power");
3423 snd_soc_dapm_force_enable_pin(dapm, "LDO2");
3424 snd_soc_dapm_sync(dapm);
3427 if (rt5645->pdata.long_name)
3428 component->card->long_name = rt5645->pdata.long_name;
3430 rt5645->eq_param = devm_kcalloc(component->dev,
3431 RT5645_HWEQ_NUM, sizeof(struct rt5645_eq_param_s),
3434 if (!rt5645->eq_param)
3440 static void rt5645_remove(struct snd_soc_component *component)
3442 rt5645_reset(component);
3446 static int rt5645_suspend(struct snd_soc_component *component)
3448 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3450 regcache_cache_only(rt5645->regmap, true);
3451 regcache_mark_dirty(rt5645->regmap);
3456 static int rt5645_resume(struct snd_soc_component *component)
3458 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3460 regcache_cache_only(rt5645->regmap, false);
3461 regcache_sync(rt5645->regmap);
3466 #define rt5645_suspend NULL
3467 #define rt5645_resume NULL
3470 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
3471 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3472 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3474 static const struct snd_soc_dai_ops rt5645_aif_dai_ops = {
3475 .hw_params = rt5645_hw_params,
3476 .set_fmt = rt5645_set_dai_fmt,
3477 .set_sysclk = rt5645_set_dai_sysclk,
3478 .set_tdm_slot = rt5645_set_tdm_slot,
3479 .set_pll = rt5645_set_dai_pll,
3482 static struct snd_soc_dai_driver rt5645_dai[] = {
3484 .name = "rt5645-aif1",
3487 .stream_name = "AIF1 Playback",
3490 .rates = RT5645_STEREO_RATES,
3491 .formats = RT5645_FORMATS,
3494 .stream_name = "AIF1 Capture",
3497 .rates = RT5645_STEREO_RATES,
3498 .formats = RT5645_FORMATS,
3500 .ops = &rt5645_aif_dai_ops,
3503 .name = "rt5645-aif2",
3506 .stream_name = "AIF2 Playback",
3509 .rates = RT5645_STEREO_RATES,
3510 .formats = RT5645_FORMATS,
3513 .stream_name = "AIF2 Capture",
3516 .rates = RT5645_STEREO_RATES,
3517 .formats = RT5645_FORMATS,
3519 .ops = &rt5645_aif_dai_ops,
3523 static const struct snd_soc_component_driver soc_component_dev_rt5645 = {
3524 .probe = rt5645_probe,
3525 .remove = rt5645_remove,
3526 .suspend = rt5645_suspend,
3527 .resume = rt5645_resume,
3528 .set_bias_level = rt5645_set_bias_level,
3529 .controls = rt5645_snd_controls,
3530 .num_controls = ARRAY_SIZE(rt5645_snd_controls),
3531 .dapm_widgets = rt5645_dapm_widgets,
3532 .num_dapm_widgets = ARRAY_SIZE(rt5645_dapm_widgets),
3533 .dapm_routes = rt5645_dapm_routes,
3534 .num_dapm_routes = ARRAY_SIZE(rt5645_dapm_routes),
3535 .use_pmdown_time = 1,
3539 static const struct regmap_config rt5645_regmap = {
3542 .use_single_read = true,
3543 .use_single_write = true,
3544 .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
3546 .volatile_reg = rt5645_volatile_register,
3547 .readable_reg = rt5645_readable_register,
3549 .cache_type = REGCACHE_MAPLE,
3550 .reg_defaults = rt5645_reg,
3551 .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
3552 .ranges = rt5645_ranges,
3553 .num_ranges = ARRAY_SIZE(rt5645_ranges),
3556 static const struct regmap_config rt5650_regmap = {
3559 .use_single_read = true,
3560 .use_single_write = true,
3561 .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
3563 .volatile_reg = rt5645_volatile_register,
3564 .readable_reg = rt5645_readable_register,
3566 .cache_type = REGCACHE_MAPLE,
3567 .reg_defaults = rt5650_reg,
3568 .num_reg_defaults = ARRAY_SIZE(rt5650_reg),
3569 .ranges = rt5645_ranges,
3570 .num_ranges = ARRAY_SIZE(rt5645_ranges),
3573 static const struct regmap_config temp_regmap = {
3577 .use_single_read = true,
3578 .use_single_write = true,
3579 .max_register = RT5645_VENDOR_ID2 + 1,
3580 .cache_type = REGCACHE_NONE,
3583 static const struct i2c_device_id rt5645_i2c_id[] = {
3588 MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
3591 static const struct of_device_id rt5645_of_match[] = {
3592 { .compatible = "realtek,rt5645", },
3593 { .compatible = "realtek,rt5650", },
3596 MODULE_DEVICE_TABLE(of, rt5645_of_match);
3600 static const struct acpi_device_id rt5645_acpi_match[] = {
3608 MODULE_DEVICE_TABLE(acpi, rt5645_acpi_match);
3611 static const struct rt5645_platform_data intel_braswell_platform_data = {
3612 .dmic1_data_pin = RT5645_DMIC1_DISABLE,
3613 .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3617 static const struct rt5645_platform_data buddy_platform_data = {
3618 .dmic1_data_pin = RT5645_DMIC_DATA_GPIO5,
3619 .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3621 .level_trigger_irq = true,
3624 static const struct rt5645_platform_data gpd_win_platform_data = {
3627 .long_name = "gpd-win-pocket-rt5645",
3628 /* The GPD pocket has a diff. mic, for the win this does not matter. */
3632 static const struct rt5645_platform_data asus_t100ha_platform_data = {
3633 .dmic1_data_pin = RT5645_DMIC_DATA_IN2N,
3634 .dmic2_data_pin = RT5645_DMIC2_DISABLE,
3639 static const struct rt5645_platform_data asus_t101ha_platform_data = {
3640 .dmic1_data_pin = RT5645_DMIC_DATA_IN2N,
3641 .dmic2_data_pin = RT5645_DMIC2_DISABLE,
3645 static const struct rt5645_platform_data lenovo_ideapad_miix_310_pdata = {
3650 static const struct rt5645_platform_data jd_mode3_platform_data = {
3654 static const struct rt5645_platform_data lattepanda_board_platform_data = {
3659 static const struct rt5645_platform_data kahlee_platform_data = {
3660 .dmic1_data_pin = RT5645_DMIC_DATA_GPIO5,
3661 .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3665 static const struct rt5645_platform_data ecs_ef20_platform_data = {
3666 .dmic1_data_pin = RT5645_DMIC1_DISABLE,
3667 .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3671 static const struct acpi_gpio_params ef20_hp_detect = { 1, 0, false };
3673 static const struct acpi_gpio_mapping cht_rt5645_ef20_gpios[] = {
3674 { "hp-detect-gpios", &ef20_hp_detect, 1 },
3678 static int cht_rt5645_ef20_quirk_cb(const struct dmi_system_id *id)
3680 cht_rt5645_gpios = cht_rt5645_ef20_gpios;
3684 static const struct dmi_system_id dmi_platform_data[] = {
3686 .ident = "Chrome Buddy",
3688 DMI_MATCH(DMI_PRODUCT_NAME, "Buddy"),
3690 .driver_data = (void *)&buddy_platform_data,
3693 .ident = "Intel Strago",
3695 DMI_MATCH(DMI_PRODUCT_NAME, "Strago"),
3697 .driver_data = (void *)&intel_braswell_platform_data,
3700 .ident = "Google Chrome",
3702 DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
3704 .driver_data = (void *)&intel_braswell_platform_data,
3707 .ident = "Google Setzer",
3709 DMI_MATCH(DMI_PRODUCT_NAME, "Setzer"),
3711 .driver_data = (void *)&intel_braswell_platform_data,
3714 .ident = "Microsoft Surface 3",
3716 DMI_MATCH(DMI_PRODUCT_NAME, "Surface 3"),
3718 .driver_data = (void *)&intel_braswell_platform_data,
3722 * Match for the GPDwin which unfortunately uses somewhat
3723 * generic dmi strings, which is why we test for 4 strings.
3724 * Comparing against 23 other byt/cht boards, board_vendor
3725 * and board_name are unique to the GPDwin, where as only one
3726 * other board has the same board_serial and 3 others have
3727 * the same default product_name. Also the GPDwin is the
3728 * only device to have both board_ and product_name not set.
3730 .ident = "GPD Win / Pocket",
3732 DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
3733 DMI_MATCH(DMI_BOARD_NAME, "Default string"),
3734 DMI_MATCH(DMI_BOARD_SERIAL, "Default string"),
3735 DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
3737 .driver_data = (void *)&gpd_win_platform_data,
3740 .ident = "ASUS T100HAN",
3742 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
3743 DMI_MATCH(DMI_PRODUCT_NAME, "T100HAN"),
3745 .driver_data = (void *)&asus_t100ha_platform_data,
3748 .ident = "ASUS T101HA",
3750 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
3751 DMI_MATCH(DMI_PRODUCT_NAME, "T101HA"),
3753 .driver_data = (void *)&asus_t101ha_platform_data,
3756 .ident = "MINIX Z83-4",
3758 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "MINIX"),
3759 DMI_MATCH(DMI_PRODUCT_NAME, "Z83-4"),
3761 .driver_data = (void *)&jd_mode3_platform_data,
3764 .ident = "Teclast X80 Pro",
3766 DMI_MATCH(DMI_SYS_VENDOR, "TECLAST"),
3767 DMI_MATCH(DMI_PRODUCT_NAME, "X80 Pro"),
3769 .driver_data = (void *)&jd_mode3_platform_data,
3772 .ident = "Lenovo Ideapad Miix 310",
3774 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "LENOVO"),
3775 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "80SG"),
3776 DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "MIIX 310-10ICR"),
3778 .driver_data = (void *)&lenovo_ideapad_miix_310_pdata,
3781 .ident = "Lenovo Ideapad Miix 320",
3783 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "LENOVO"),
3784 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "80XF"),
3785 DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "Lenovo MIIX 320-10ICR"),
3787 .driver_data = (void *)&intel_braswell_platform_data,
3790 .ident = "LattePanda board",
3792 DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
3793 DMI_EXACT_MATCH(DMI_BOARD_NAME, "Cherry Trail CR"),
3794 DMI_EXACT_MATCH(DMI_BOARD_VERSION, "Default string"),
3796 .driver_data = (void *)&lattepanda_board_platform_data,
3799 .ident = "Chrome Kahlee",
3801 DMI_MATCH(DMI_PRODUCT_NAME, "Kahlee"),
3803 .driver_data = (void *)&kahlee_platform_data,
3806 .ident = "Medion E1239T",
3808 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "MEDION"),
3809 DMI_MATCH(DMI_PRODUCT_NAME, "E1239T MD60568"),
3811 .driver_data = (void *)&intel_braswell_platform_data,
3815 .callback = cht_rt5645_ef20_quirk_cb,
3817 DMI_MATCH(DMI_PRODUCT_NAME, "EF20"),
3819 .driver_data = (void *)&ecs_ef20_platform_data,
3823 .callback = cht_rt5645_ef20_quirk_cb,
3825 DMI_MATCH(DMI_PRODUCT_NAME, "EF20EA"),
3827 .driver_data = (void *)&ecs_ef20_platform_data,
3832 static bool rt5645_check_dp(struct device *dev)
3834 if (device_property_present(dev, "realtek,in2-differential") ||
3835 device_property_present(dev, "realtek,dmic1-data-pin") ||
3836 device_property_present(dev, "realtek,dmic2-data-pin") ||
3837 device_property_present(dev, "realtek,jd-mode"))
3843 static int rt5645_parse_dt(struct rt5645_priv *rt5645, struct device *dev)
3845 rt5645->pdata.in2_diff = device_property_read_bool(dev,
3846 "realtek,in2-differential");
3847 device_property_read_u32(dev,
3848 "realtek,dmic1-data-pin", &rt5645->pdata.dmic1_data_pin);
3849 device_property_read_u32(dev,
3850 "realtek,dmic2-data-pin", &rt5645->pdata.dmic2_data_pin);
3851 device_property_read_u32(dev,
3852 "realtek,jd-mode", &rt5645->pdata.jd_mode);
3857 static int rt5645_i2c_probe(struct i2c_client *i2c)
3859 struct rt5645_platform_data *pdata = NULL;
3860 const struct dmi_system_id *dmi_data;
3861 struct rt5645_priv *rt5645;
3864 struct regmap *regmap;
3866 rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
3872 i2c_set_clientdata(i2c, rt5645);
3874 dmi_data = dmi_first_match(dmi_platform_data);
3876 dev_info(&i2c->dev, "Detected %s platform\n", dmi_data->ident);
3877 pdata = dmi_data->driver_data;
3881 rt5645->pdata = *pdata;
3882 else if (rt5645_check_dp(&i2c->dev))
3883 rt5645_parse_dt(rt5645, &i2c->dev);
3885 rt5645->pdata = jd_mode3_platform_data;
3888 rt5645->pdata.in2_diff = QUIRK_IN2_DIFF(quirk);
3889 rt5645->pdata.level_trigger_irq = QUIRK_LEVEL_IRQ(quirk);
3890 rt5645->pdata.inv_jd1_1 = QUIRK_INV_JD1_1(quirk);
3891 rt5645->pdata.inv_hp_pol = QUIRK_INV_HP_POL(quirk);
3892 rt5645->pdata.jd_mode = QUIRK_JD_MODE(quirk);
3893 rt5645->pdata.dmic1_data_pin = QUIRK_DMIC1_DATA_PIN(quirk);
3894 rt5645->pdata.dmic2_data_pin = QUIRK_DMIC2_DATA_PIN(quirk);
3897 if (has_acpi_companion(&i2c->dev)) {
3898 if (cht_rt5645_gpios) {
3899 if (devm_acpi_dev_add_driver_gpios(&i2c->dev, cht_rt5645_gpios))
3900 dev_dbg(&i2c->dev, "Failed to add driver gpios\n");
3903 /* The ALC3270 package has the headset-mic pin not-connected */
3904 if (acpi_dev_hid_uid_match(ACPI_COMPANION(&i2c->dev), "10EC3270", NULL))
3905 rt5645->pdata.no_headset_mic = true;
3908 rt5645->gpiod_hp_det = devm_gpiod_get_optional(&i2c->dev, "hp-detect",
3911 if (IS_ERR(rt5645->gpiod_hp_det)) {
3912 dev_info(&i2c->dev, "failed to initialize gpiod\n");
3913 ret = PTR_ERR(rt5645->gpiod_hp_det);
3915 * Continue if optional gpiod is missing, bail for all other
3916 * errors, including -EPROBE_DEFER
3922 for (i = 0; i < ARRAY_SIZE(rt5645->supplies); i++)
3923 rt5645->supplies[i].supply = rt5645_supply_names[i];
3925 ret = devm_regulator_bulk_get(&i2c->dev,
3926 ARRAY_SIZE(rt5645->supplies),
3929 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
3933 ret = regulator_bulk_enable(ARRAY_SIZE(rt5645->supplies),
3936 dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
3940 regmap = devm_regmap_init_i2c(i2c, &temp_regmap);
3941 if (IS_ERR(regmap)) {
3942 ret = PTR_ERR(regmap);
3943 dev_err(&i2c->dev, "Failed to allocate temp register map: %d\n",
3949 * Read after 400msec, as it is the interval required between
3950 * read and power On.
3952 msleep(TIME_TO_POWER_MS);
3953 ret = regmap_read(regmap, RT5645_VENDOR_ID2, &val);
3955 dev_err(&i2c->dev, "Failed to read: 0x%02X\n, ret = %d", RT5645_VENDOR_ID2, ret);
3960 case RT5645_DEVICE_ID:
3961 rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
3962 rt5645->codec_type = CODEC_TYPE_RT5645;
3964 case RT5650_DEVICE_ID:
3965 rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5650_regmap);
3966 rt5645->codec_type = CODEC_TYPE_RT5650;
3970 "Device with ID register %#x is not rt5645 or rt5650\n",
3976 if (IS_ERR(rt5645->regmap)) {
3977 ret = PTR_ERR(rt5645->regmap);
3978 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
3983 regmap_write(rt5645->regmap, RT5645_RESET, 0);
3985 regmap_read(regmap, RT5645_VENDOR_ID, &val);
3986 rt5645->v_id = val & 0xff;
3988 regmap_write(rt5645->regmap, RT5645_AD_DA_MIXER, 0x8080);
3990 ret = regmap_register_patch(rt5645->regmap, init_list,
3991 ARRAY_SIZE(init_list));
3993 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
3995 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
3996 ret = regmap_register_patch(rt5645->regmap, rt5650_init_list,
3997 ARRAY_SIZE(rt5650_init_list));
3999 dev_warn(&i2c->dev, "Apply rt5650 patch failed: %d\n",
4003 regmap_update_bits(rt5645->regmap, RT5645_CLSD_OUT_CTRL, 0xc0, 0xc0);
4005 if (rt5645->pdata.in2_diff)
4006 regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
4007 RT5645_IN_DF2, RT5645_IN_DF2);
4009 if (rt5645->pdata.dmic1_data_pin || rt5645->pdata.dmic2_data_pin) {
4010 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4011 RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
4013 switch (rt5645->pdata.dmic1_data_pin) {
4014 case RT5645_DMIC_DATA_IN2N:
4015 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4016 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
4019 case RT5645_DMIC_DATA_GPIO5:
4020 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4021 RT5645_I2S2_DAC_PIN_MASK, RT5645_I2S2_DAC_PIN_GPIO);
4022 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4023 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
4024 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4025 RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
4028 case RT5645_DMIC_DATA_GPIO11:
4029 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4030 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
4031 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4032 RT5645_GP11_PIN_MASK,
4033 RT5645_GP11_PIN_DMIC1_SDA);
4040 switch (rt5645->pdata.dmic2_data_pin) {
4041 case RT5645_DMIC_DATA_IN2P:
4042 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4043 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
4046 case RT5645_DMIC_DATA_GPIO6:
4047 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4048 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
4049 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4050 RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
4053 case RT5645_DMIC_DATA_GPIO10:
4054 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4055 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
4056 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4057 RT5645_GP10_PIN_MASK,
4058 RT5645_GP10_PIN_DMIC2_SDA);
4061 case RT5645_DMIC_DATA_GPIO12:
4062 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4063 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
4064 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4065 RT5645_GP12_PIN_MASK,
4066 RT5645_GP12_PIN_DMIC2_SDA);
4073 if (rt5645->pdata.jd_mode) {
4074 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
4075 RT5645_IRQ_CLK_GATE_CTRL,
4076 RT5645_IRQ_CLK_GATE_CTRL);
4077 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
4078 RT5645_IRQ_CLK_INT, RT5645_IRQ_CLK_INT);
4079 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
4080 RT5645_IRQ_JD_1_1_EN, RT5645_IRQ_JD_1_1_EN);
4081 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
4082 RT5645_JD_PSV_MODE, RT5645_JD_PSV_MODE);
4083 regmap_update_bits(rt5645->regmap, RT5645_HPO_MIXER,
4084 RT5645_IRQ_PSV_MODE, RT5645_IRQ_PSV_MODE);
4085 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
4086 RT5645_MIC2_OVCD_EN, RT5645_MIC2_OVCD_EN);
4087 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4088 RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
4089 switch (rt5645->pdata.jd_mode) {
4091 regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
4092 RT5645_JD1_MODE_MASK,
4096 regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
4097 RT5645_JD1_MODE_MASK,
4102 regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
4103 RT5645_JD1_MODE_MASK,
4109 if (rt5645->pdata.inv_jd1_1) {
4110 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
4111 RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
4115 regmap_update_bits(rt5645->regmap, RT5645_ADDA_CLK1,
4116 RT5645_I2S_PD1_MASK, RT5645_I2S_PD1_2);
4118 if (rt5645->pdata.level_trigger_irq) {
4119 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
4120 RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
4122 timer_setup(&rt5645->btn_check_timer, rt5645_btn_check_callback, 0);
4124 INIT_DELAYED_WORK(&rt5645->jack_detect_work, rt5645_jack_detect_work);
4125 INIT_DELAYED_WORK(&rt5645->rcclock_work, rt5645_rcclock_work);
4127 if (rt5645->i2c->irq) {
4128 ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq,
4129 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
4130 | IRQF_ONESHOT, "rt5645", rt5645);
4132 dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
4137 ret = devm_snd_soc_register_component(&i2c->dev, &soc_component_dev_rt5645,
4138 rt5645_dai, ARRAY_SIZE(rt5645_dai));
4145 if (rt5645->i2c->irq)
4146 free_irq(rt5645->i2c->irq, rt5645);
4148 regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
4152 static void rt5645_i2c_remove(struct i2c_client *i2c)
4154 struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
4157 free_irq(i2c->irq, rt5645);
4160 * Since the rt5645_btn_check_callback() can queue jack_detect_work,
4161 * the timer need to be delted first
4163 del_timer_sync(&rt5645->btn_check_timer);
4165 cancel_delayed_work_sync(&rt5645->jack_detect_work);
4166 cancel_delayed_work_sync(&rt5645->rcclock_work);
4168 regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
4171 static void rt5645_i2c_shutdown(struct i2c_client *i2c)
4173 struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
4175 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
4176 RT5645_RING2_SLEEVE_GND, RT5645_RING2_SLEEVE_GND);
4177 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2, RT5645_CBJ_MN_JD,
4179 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1, RT5645_CBJ_BST1_EN,
4182 regmap_write(rt5645->regmap, RT5645_RESET, 0);
4185 static struct i2c_driver rt5645_i2c_driver = {
4188 .of_match_table = of_match_ptr(rt5645_of_match),
4189 .acpi_match_table = ACPI_PTR(rt5645_acpi_match),
4191 .probe = rt5645_i2c_probe,
4192 .remove = rt5645_i2c_remove,
4193 .shutdown = rt5645_i2c_shutdown,
4194 .id_table = rt5645_i2c_id,
4196 module_i2c_driver(rt5645_i2c_driver);
4198 MODULE_DESCRIPTION("ASoC RT5645 driver");
4199 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
4200 MODULE_LICENSE("GPL v2");