2 * PCM3168A codec driver
4 * Copyright (C) 2015 Imagination Technologies Ltd.
6 * Author: Damien Horsley <Damien.Horsley@imgtec.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
13 #include <linux/clk.h>
14 #include <linux/delay.h>
15 #include <linux/module.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/regulator/consumer.h>
19 #include <sound/pcm_params.h>
20 #include <sound/soc.h>
21 #include <sound/tlv.h>
25 #define PCM3168A_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
26 SNDRV_PCM_FMTBIT_S24_3LE | \
27 SNDRV_PCM_FMTBIT_S24_LE | \
28 SNDRV_PCM_FMTBIT_S32_LE)
30 #define PCM3168A_FMT_I2S 0x0
31 #define PCM3168A_FMT_LEFT_J 0x1
32 #define PCM3168A_FMT_RIGHT_J 0x2
33 #define PCM3168A_FMT_RIGHT_J_16 0x3
34 #define PCM3168A_FMT_DSP_A 0x4
35 #define PCM3168A_FMT_DSP_B 0x5
36 #define PCM3168A_FMT_I2S_TDM 0x6
37 #define PCM3168A_FMT_LEFT_J_TDM 0x7
38 #define PCM3168A_FMT_DSP_MASK 0x4
40 #define PCM3168A_NUM_SUPPLIES 6
41 static const char *const pcm3168a_supply_names[PCM3168A_NUM_SUPPLIES] = {
50 struct pcm3168a_priv {
51 struct regulator_bulk_data supplies[PCM3168A_NUM_SUPPLIES];
52 struct regmap *regmap;
64 static const char *const pcm3168a_roll_off[] = { "Sharp", "Slow" };
66 static SOC_ENUM_SINGLE_DECL(pcm3168a_d1_roll_off, PCM3168A_DAC_OP_FLT,
67 PCM3168A_DAC_FLT_SHIFT, pcm3168a_roll_off);
68 static SOC_ENUM_SINGLE_DECL(pcm3168a_d2_roll_off, PCM3168A_DAC_OP_FLT,
69 PCM3168A_DAC_FLT_SHIFT + 1, pcm3168a_roll_off);
70 static SOC_ENUM_SINGLE_DECL(pcm3168a_d3_roll_off, PCM3168A_DAC_OP_FLT,
71 PCM3168A_DAC_FLT_SHIFT + 2, pcm3168a_roll_off);
72 static SOC_ENUM_SINGLE_DECL(pcm3168a_d4_roll_off, PCM3168A_DAC_OP_FLT,
73 PCM3168A_DAC_FLT_SHIFT + 3, pcm3168a_roll_off);
75 static const char *const pcm3168a_volume_type[] = {
76 "Individual", "Master + Individual" };
78 static SOC_ENUM_SINGLE_DECL(pcm3168a_dac_volume_type, PCM3168A_DAC_ATT_DEMP_ZF,
79 PCM3168A_DAC_ATMDDA_SHIFT, pcm3168a_volume_type);
81 static const char *const pcm3168a_att_speed_mult[] = { "2048", "4096" };
83 static SOC_ENUM_SINGLE_DECL(pcm3168a_dac_att_mult, PCM3168A_DAC_ATT_DEMP_ZF,
84 PCM3168A_DAC_ATSPDA_SHIFT, pcm3168a_att_speed_mult);
86 static const char *const pcm3168a_demp[] = {
87 "Disabled", "48khz", "44.1khz", "32khz" };
89 static SOC_ENUM_SINGLE_DECL(pcm3168a_dac_demp, PCM3168A_DAC_ATT_DEMP_ZF,
90 PCM3168A_DAC_DEMP_SHIFT, pcm3168a_demp);
92 static const char *const pcm3168a_zf_func[] = {
93 "DAC 1/2/3/4 AND", "DAC 1/2/3/4 OR", "DAC 1/2/3 AND",
94 "DAC 1/2/3 OR", "DAC 4 AND", "DAC 4 OR" };
96 static SOC_ENUM_SINGLE_DECL(pcm3168a_dac_zf_func, PCM3168A_DAC_ATT_DEMP_ZF,
97 PCM3168A_DAC_AZRO_SHIFT, pcm3168a_zf_func);
99 static const char *const pcm3168a_pol[] = { "Active High", "Active Low" };
101 static SOC_ENUM_SINGLE_DECL(pcm3168a_dac_zf_pol, PCM3168A_DAC_ATT_DEMP_ZF,
102 PCM3168A_DAC_ATSPDA_SHIFT, pcm3168a_pol);
104 static const char *const pcm3168a_con[] = { "Differential", "Single-Ended" };
106 static SOC_ENUM_DOUBLE_DECL(pcm3168a_adc1_con, PCM3168A_ADC_SEAD,
108 static SOC_ENUM_DOUBLE_DECL(pcm3168a_adc2_con, PCM3168A_ADC_SEAD,
110 static SOC_ENUM_DOUBLE_DECL(pcm3168a_adc3_con, PCM3168A_ADC_SEAD,
113 static SOC_ENUM_SINGLE_DECL(pcm3168a_adc_volume_type, PCM3168A_ADC_ATT_OVF,
114 PCM3168A_ADC_ATMDAD_SHIFT, pcm3168a_volume_type);
116 static SOC_ENUM_SINGLE_DECL(pcm3168a_adc_att_mult, PCM3168A_ADC_ATT_OVF,
117 PCM3168A_ADC_ATSPAD_SHIFT, pcm3168a_att_speed_mult);
119 static SOC_ENUM_SINGLE_DECL(pcm3168a_adc_ov_pol, PCM3168A_ADC_ATT_OVF,
120 PCM3168A_ADC_OVFP_SHIFT, pcm3168a_pol);
122 /* -100db to 0db, register values 0-54 cause mute */
123 static const DECLARE_TLV_DB_SCALE(pcm3168a_dac_tlv, -10050, 50, 1);
125 /* -100db to 20db, register values 0-14 cause mute */
126 static const DECLARE_TLV_DB_SCALE(pcm3168a_adc_tlv, -10050, 50, 1);
128 static const struct snd_kcontrol_new pcm3168a_snd_controls[] = {
129 SOC_SINGLE("DAC Power-Save Switch", PCM3168A_DAC_PWR_MST_FMT,
130 PCM3168A_DAC_PSMDA_SHIFT, 1, 1),
131 SOC_ENUM("DAC1 Digital Filter roll-off", pcm3168a_d1_roll_off),
132 SOC_ENUM("DAC2 Digital Filter roll-off", pcm3168a_d2_roll_off),
133 SOC_ENUM("DAC3 Digital Filter roll-off", pcm3168a_d3_roll_off),
134 SOC_ENUM("DAC4 Digital Filter roll-off", pcm3168a_d4_roll_off),
135 SOC_DOUBLE("DAC1 Invert Switch", PCM3168A_DAC_INV, 0, 1, 1, 0),
136 SOC_DOUBLE("DAC2 Invert Switch", PCM3168A_DAC_INV, 2, 3, 1, 0),
137 SOC_DOUBLE("DAC3 Invert Switch", PCM3168A_DAC_INV, 4, 5, 1, 0),
138 SOC_DOUBLE("DAC4 Invert Switch", PCM3168A_DAC_INV, 6, 7, 1, 0),
139 SOC_ENUM("DAC Volume Control Type", pcm3168a_dac_volume_type),
140 SOC_ENUM("DAC Volume Rate Multiplier", pcm3168a_dac_att_mult),
141 SOC_ENUM("DAC De-Emphasis", pcm3168a_dac_demp),
142 SOC_ENUM("DAC Zero Flag Function", pcm3168a_dac_zf_func),
143 SOC_ENUM("DAC Zero Flag Polarity", pcm3168a_dac_zf_pol),
144 SOC_SINGLE_RANGE_TLV("Master Playback Volume",
145 PCM3168A_DAC_VOL_MASTER, 0, 54, 255, 0,
147 SOC_DOUBLE_R_RANGE_TLV("DAC1 Playback Volume",
148 PCM3168A_DAC_VOL_CHAN_START,
149 PCM3168A_DAC_VOL_CHAN_START + 1,
150 0, 54, 255, 0, pcm3168a_dac_tlv),
151 SOC_DOUBLE_R_RANGE_TLV("DAC2 Playback Volume",
152 PCM3168A_DAC_VOL_CHAN_START + 2,
153 PCM3168A_DAC_VOL_CHAN_START + 3,
154 0, 54, 255, 0, pcm3168a_dac_tlv),
155 SOC_DOUBLE_R_RANGE_TLV("DAC3 Playback Volume",
156 PCM3168A_DAC_VOL_CHAN_START + 4,
157 PCM3168A_DAC_VOL_CHAN_START + 5,
158 0, 54, 255, 0, pcm3168a_dac_tlv),
159 SOC_DOUBLE_R_RANGE_TLV("DAC4 Playback Volume",
160 PCM3168A_DAC_VOL_CHAN_START + 6,
161 PCM3168A_DAC_VOL_CHAN_START + 7,
162 0, 54, 255, 0, pcm3168a_dac_tlv),
163 SOC_SINGLE("ADC1 High-Pass Filter Switch", PCM3168A_ADC_PWR_HPFB,
164 PCM3168A_ADC_BYP_SHIFT, 1, 1),
165 SOC_SINGLE("ADC2 High-Pass Filter Switch", PCM3168A_ADC_PWR_HPFB,
166 PCM3168A_ADC_BYP_SHIFT + 1, 1, 1),
167 SOC_SINGLE("ADC3 High-Pass Filter Switch", PCM3168A_ADC_PWR_HPFB,
168 PCM3168A_ADC_BYP_SHIFT + 2, 1, 1),
169 SOC_ENUM("ADC1 Connection Type", pcm3168a_adc1_con),
170 SOC_ENUM("ADC2 Connection Type", pcm3168a_adc2_con),
171 SOC_ENUM("ADC3 Connection Type", pcm3168a_adc3_con),
172 SOC_DOUBLE("ADC1 Invert Switch", PCM3168A_ADC_INV, 0, 1, 1, 0),
173 SOC_DOUBLE("ADC2 Invert Switch", PCM3168A_ADC_INV, 2, 3, 1, 0),
174 SOC_DOUBLE("ADC3 Invert Switch", PCM3168A_ADC_INV, 4, 5, 1, 0),
175 SOC_DOUBLE("ADC1 Mute Switch", PCM3168A_ADC_MUTE, 0, 1, 1, 0),
176 SOC_DOUBLE("ADC2 Mute Switch", PCM3168A_ADC_MUTE, 2, 3, 1, 0),
177 SOC_DOUBLE("ADC3 Mute Switch", PCM3168A_ADC_MUTE, 4, 5, 1, 0),
178 SOC_ENUM("ADC Volume Control Type", pcm3168a_adc_volume_type),
179 SOC_ENUM("ADC Volume Rate Multiplier", pcm3168a_adc_att_mult),
180 SOC_ENUM("ADC Overflow Flag Polarity", pcm3168a_adc_ov_pol),
181 SOC_SINGLE_RANGE_TLV("Master Capture Volume",
182 PCM3168A_ADC_VOL_MASTER, 0, 14, 255, 0,
184 SOC_DOUBLE_R_RANGE_TLV("ADC1 Capture Volume",
185 PCM3168A_ADC_VOL_CHAN_START,
186 PCM3168A_ADC_VOL_CHAN_START + 1,
187 0, 14, 255, 0, pcm3168a_adc_tlv),
188 SOC_DOUBLE_R_RANGE_TLV("ADC2 Capture Volume",
189 PCM3168A_ADC_VOL_CHAN_START + 2,
190 PCM3168A_ADC_VOL_CHAN_START + 3,
191 0, 14, 255, 0, pcm3168a_adc_tlv),
192 SOC_DOUBLE_R_RANGE_TLV("ADC3 Capture Volume",
193 PCM3168A_ADC_VOL_CHAN_START + 4,
194 PCM3168A_ADC_VOL_CHAN_START + 5,
195 0, 14, 255, 0, pcm3168a_adc_tlv)
198 static const struct snd_soc_dapm_widget pcm3168a_dapm_widgets[] = {
199 SND_SOC_DAPM_DAC("DAC1", "Playback", PCM3168A_DAC_OP_FLT,
200 PCM3168A_DAC_OPEDA_SHIFT, 1),
201 SND_SOC_DAPM_DAC("DAC2", "Playback", PCM3168A_DAC_OP_FLT,
202 PCM3168A_DAC_OPEDA_SHIFT + 1, 1),
203 SND_SOC_DAPM_DAC("DAC3", "Playback", PCM3168A_DAC_OP_FLT,
204 PCM3168A_DAC_OPEDA_SHIFT + 2, 1),
205 SND_SOC_DAPM_DAC("DAC4", "Playback", PCM3168A_DAC_OP_FLT,
206 PCM3168A_DAC_OPEDA_SHIFT + 3, 1),
208 SND_SOC_DAPM_OUTPUT("AOUT1L"),
209 SND_SOC_DAPM_OUTPUT("AOUT1R"),
210 SND_SOC_DAPM_OUTPUT("AOUT2L"),
211 SND_SOC_DAPM_OUTPUT("AOUT2R"),
212 SND_SOC_DAPM_OUTPUT("AOUT3L"),
213 SND_SOC_DAPM_OUTPUT("AOUT3R"),
214 SND_SOC_DAPM_OUTPUT("AOUT4L"),
215 SND_SOC_DAPM_OUTPUT("AOUT4R"),
217 SND_SOC_DAPM_ADC("ADC1", "Capture", PCM3168A_ADC_PWR_HPFB,
218 PCM3168A_ADC_PSVAD_SHIFT, 1),
219 SND_SOC_DAPM_ADC("ADC2", "Capture", PCM3168A_ADC_PWR_HPFB,
220 PCM3168A_ADC_PSVAD_SHIFT + 1, 1),
221 SND_SOC_DAPM_ADC("ADC3", "Capture", PCM3168A_ADC_PWR_HPFB,
222 PCM3168A_ADC_PSVAD_SHIFT + 2, 1),
224 SND_SOC_DAPM_INPUT("AIN1L"),
225 SND_SOC_DAPM_INPUT("AIN1R"),
226 SND_SOC_DAPM_INPUT("AIN2L"),
227 SND_SOC_DAPM_INPUT("AIN2R"),
228 SND_SOC_DAPM_INPUT("AIN3L"),
229 SND_SOC_DAPM_INPUT("AIN3R")
232 static const struct snd_soc_dapm_route pcm3168a_dapm_routes[] = {
234 { "AOUT1L", NULL, "DAC1" },
235 { "AOUT1R", NULL, "DAC1" },
237 { "AOUT2L", NULL, "DAC2" },
238 { "AOUT2R", NULL, "DAC2" },
240 { "AOUT3L", NULL, "DAC3" },
241 { "AOUT3R", NULL, "DAC3" },
243 { "AOUT4L", NULL, "DAC4" },
244 { "AOUT4R", NULL, "DAC4" },
247 { "ADC1", NULL, "AIN1L" },
248 { "ADC1", NULL, "AIN1R" },
250 { "ADC2", NULL, "AIN2L" },
251 { "ADC2", NULL, "AIN2R" },
253 { "ADC3", NULL, "AIN3L" },
254 { "ADC3", NULL, "AIN3R" }
257 static unsigned int pcm3168a_scki_ratios[] = {
266 #define PCM3168A_NUM_SCKI_RATIOS_DAC ARRAY_SIZE(pcm3168a_scki_ratios)
267 #define PCM3168A_NUM_SCKI_RATIOS_ADC (ARRAY_SIZE(pcm3168a_scki_ratios) - 2)
269 #define PCM1368A_MAX_SYSCLK 36864000
271 static int pcm3168a_reset(struct pcm3168a_priv *pcm3168a)
275 ret = regmap_write(pcm3168a->regmap, PCM3168A_RST_SMODE, 0);
279 /* Internal reset is de-asserted after 3846 SCKI cycles */
280 msleep(DIV_ROUND_UP(3846 * 1000, pcm3168a->sysclk));
282 return regmap_write(pcm3168a->regmap, PCM3168A_RST_SMODE,
283 PCM3168A_MRST_MASK | PCM3168A_SRST_MASK);
286 static int pcm3168a_digital_mute(struct snd_soc_dai *dai, int mute)
288 struct snd_soc_component *component = dai->component;
289 struct pcm3168a_priv *pcm3168a = snd_soc_component_get_drvdata(component);
291 regmap_write(pcm3168a->regmap, PCM3168A_DAC_MUTE, mute ? 0xff : 0);
296 static int pcm3168a_set_dai_sysclk(struct snd_soc_dai *dai,
297 int clk_id, unsigned int freq, int dir)
299 struct pcm3168a_priv *pcm3168a = snd_soc_component_get_drvdata(dai->component);
302 if (freq > PCM1368A_MAX_SYSCLK)
305 ret = clk_set_rate(pcm3168a->scki, freq);
309 pcm3168a->sysclk = freq;
314 static int pcm3168a_set_dai_fmt(struct snd_soc_dai *dai,
315 unsigned int format, bool dac)
317 struct snd_soc_component *component = dai->component;
318 struct pcm3168a_priv *pcm3168a = snd_soc_component_get_drvdata(component);
319 u32 fmt, reg, mask, shift;
322 switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
323 case SND_SOC_DAIFMT_LEFT_J:
324 fmt = PCM3168A_FMT_LEFT_J;
326 case SND_SOC_DAIFMT_I2S:
327 fmt = PCM3168A_FMT_I2S;
329 case SND_SOC_DAIFMT_RIGHT_J:
330 fmt = PCM3168A_FMT_RIGHT_J;
332 case SND_SOC_DAIFMT_DSP_A:
333 fmt = PCM3168A_FMT_DSP_A;
335 case SND_SOC_DAIFMT_DSP_B:
336 fmt = PCM3168A_FMT_DSP_B;
339 dev_err(component->dev, "unsupported dai format\n");
343 switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
344 case SND_SOC_DAIFMT_CBS_CFS:
347 case SND_SOC_DAIFMT_CBM_CFM:
351 dev_err(component->dev, "unsupported master/slave mode\n");
355 switch (format & SND_SOC_DAIFMT_INV_MASK) {
356 case SND_SOC_DAIFMT_NB_NF:
363 reg = PCM3168A_DAC_PWR_MST_FMT;
364 mask = PCM3168A_DAC_FMT_MASK;
365 shift = PCM3168A_DAC_FMT_SHIFT;
366 pcm3168a->dac_master_mode = master_mode;
367 pcm3168a->dac_fmt = fmt;
369 reg = PCM3168A_ADC_MST_FMT;
370 mask = PCM3168A_ADC_FMTAD_MASK;
371 shift = PCM3168A_ADC_FMTAD_SHIFT;
372 pcm3168a->adc_master_mode = master_mode;
373 pcm3168a->adc_fmt = fmt;
376 regmap_update_bits(pcm3168a->regmap, reg, mask, fmt << shift);
381 static int pcm3168a_set_dai_fmt_dac(struct snd_soc_dai *dai,
384 return pcm3168a_set_dai_fmt(dai, format, true);
387 static int pcm3168a_set_dai_fmt_adc(struct snd_soc_dai *dai,
390 return pcm3168a_set_dai_fmt(dai, format, false);
393 static int pcm3168a_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
394 unsigned int rx_mask, int slots,
397 struct snd_soc_component *component = dai->component;
398 struct pcm3168a_priv *pcm3168a = snd_soc_component_get_drvdata(component);
400 if (tx_mask >= (1<<slots) || rx_mask >= (1<<slots)) {
401 dev_err(component->dev,
402 "Bad tdm mask tx: 0x%08x rx: 0x%08x slots %d\n",
403 tx_mask, rx_mask, slots);
408 (slot_width != 16 && slot_width != 24 && slot_width != 32 )) {
409 dev_err(component->dev, "Unsupported slot_width %d\n",
414 pcm3168a->tdm_slots = slots;
415 pcm3168a->tdm_mask[SNDRV_PCM_STREAM_PLAYBACK] = tx_mask;
416 pcm3168a->tdm_mask[SNDRV_PCM_STREAM_CAPTURE] = rx_mask;
418 if (pcm3168a->slot_width && pcm3168a->slot_width != slot_width) {
419 dev_err(component->dev, "Not matching slot_width %d vs %d\n",
420 pcm3168a->slot_width, slot_width);
424 pcm3168a->slot_width = slot_width;
428 static int pcm3168a_hw_params(struct snd_pcm_substream *substream,
429 struct snd_pcm_hw_params *params,
430 struct snd_soc_dai *dai)
432 struct snd_soc_component *component = dai->component;
433 struct pcm3168a_priv *pcm3168a = snd_soc_component_get_drvdata(component);
434 bool tx, master_mode;
435 u32 val, mask, shift, reg;
436 unsigned int rate, fmt, ratio, max_ratio;
440 rate = params_rate(params);
441 chan = params_channels(params);
443 ratio = pcm3168a->sysclk / rate;
445 tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
447 max_ratio = PCM3168A_NUM_SCKI_RATIOS_DAC;
448 reg = PCM3168A_DAC_PWR_MST_FMT;
449 mask = PCM3168A_DAC_MSDA_MASK;
450 shift = PCM3168A_DAC_MSDA_SHIFT;
451 master_mode = pcm3168a->dac_master_mode;
452 fmt = pcm3168a->dac_fmt;
454 max_ratio = PCM3168A_NUM_SCKI_RATIOS_ADC;
455 reg = PCM3168A_ADC_MST_FMT;
456 mask = PCM3168A_ADC_MSAD_MASK;
457 shift = PCM3168A_ADC_MSAD_SHIFT;
458 master_mode = pcm3168a->adc_master_mode;
459 fmt = pcm3168a->adc_fmt;
462 for (i = 0; i < max_ratio; i++) {
463 if (pcm3168a_scki_ratios[i] == ratio)
467 if (i == max_ratio) {
468 dev_err(component->dev, "unsupported sysclk ratio\n");
472 if (pcm3168a->slot_width)
473 slot_width = pcm3168a->slot_width;
475 slot_width = params_width(params);
477 switch (slot_width) {
479 if (master_mode || (fmt != PCM3168A_FMT_RIGHT_J)) {
480 dev_err(component->dev, "16-bit slots are supported only for slave mode using right justified\n");
483 fmt = PCM3168A_FMT_RIGHT_J_16;
486 if (master_mode || (fmt & PCM3168A_FMT_DSP_MASK)) {
487 dev_err(component->dev, "24-bit slots not supported in master mode, or slave mode using DSP\n");
494 dev_err(component->dev, "unsupported frame size: %d\n", slot_width);
501 case PCM3168A_FMT_I2S:
502 case PCM3168A_FMT_DSP_A:
503 fmt = PCM3168A_FMT_I2S_TDM;
505 case PCM3168A_FMT_LEFT_J:
506 case PCM3168A_FMT_DSP_B:
507 fmt = PCM3168A_FMT_LEFT_J_TDM;
510 dev_err(component->dev,
511 "TDM is supported under DSP/I2S/Left_J only\n");
517 val = ((i + 1) << shift);
521 regmap_update_bits(pcm3168a->regmap, reg, mask, val);
524 mask = PCM3168A_DAC_FMT_MASK;
525 shift = PCM3168A_DAC_FMT_SHIFT;
527 mask = PCM3168A_ADC_FMTAD_MASK;
528 shift = PCM3168A_ADC_FMTAD_SHIFT;
531 regmap_update_bits(pcm3168a->regmap, reg, mask, fmt << shift);
536 static int pcm3168a_startup(struct snd_pcm_substream *substream,
537 struct snd_soc_dai *dai)
539 struct snd_soc_component *component = dai->component;
540 struct pcm3168a_priv *pcm3168a = snd_soc_component_get_drvdata(component);
541 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
543 unsigned int sample_min;
544 unsigned int channel_max;
545 unsigned int channel_maxs[] = {
551 fmt = pcm3168a->dac_fmt;
553 fmt = pcm3168a->adc_fmt;
556 * Available Data Bits
568 case PCM3168A_FMT_RIGHT_J:
572 case PCM3168A_FMT_LEFT_J:
573 case PCM3168A_FMT_I2S:
574 case PCM3168A_FMT_DSP_A:
575 case PCM3168A_FMT_DSP_B:
577 channel_max = channel_maxs[tx];
584 snd_pcm_hw_constraint_minmax(substream->runtime,
585 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
588 snd_pcm_hw_constraint_minmax(substream->runtime,
589 SNDRV_PCM_HW_PARAM_CHANNELS,
594 static const struct snd_soc_dai_ops pcm3168a_dac_dai_ops = {
595 .startup = pcm3168a_startup,
596 .set_fmt = pcm3168a_set_dai_fmt_dac,
597 .set_sysclk = pcm3168a_set_dai_sysclk,
598 .hw_params = pcm3168a_hw_params,
599 .digital_mute = pcm3168a_digital_mute,
600 .set_tdm_slot = pcm3168a_set_tdm_slot,
603 static const struct snd_soc_dai_ops pcm3168a_adc_dai_ops = {
604 .startup = pcm3168a_startup,
605 .set_fmt = pcm3168a_set_dai_fmt_adc,
606 .set_sysclk = pcm3168a_set_dai_sysclk,
607 .hw_params = pcm3168a_hw_params,
608 .set_tdm_slot = pcm3168a_set_tdm_slot,
611 static struct snd_soc_dai_driver pcm3168a_dais[] = {
613 .name = "pcm3168a-dac",
615 .stream_name = "Playback",
618 .rates = SNDRV_PCM_RATE_8000_192000,
619 .formats = PCM3168A_FORMATS
621 .ops = &pcm3168a_dac_dai_ops
624 .name = "pcm3168a-adc",
626 .stream_name = "Capture",
629 .rates = SNDRV_PCM_RATE_8000_96000,
630 .formats = PCM3168A_FORMATS
632 .ops = &pcm3168a_adc_dai_ops
636 static const struct reg_default pcm3168a_reg_default[] = {
637 { PCM3168A_RST_SMODE, PCM3168A_MRST_MASK | PCM3168A_SRST_MASK },
638 { PCM3168A_DAC_PWR_MST_FMT, 0x00 },
639 { PCM3168A_DAC_OP_FLT, 0x00 },
640 { PCM3168A_DAC_INV, 0x00 },
641 { PCM3168A_DAC_MUTE, 0x00 },
642 { PCM3168A_DAC_ZERO, 0x00 },
643 { PCM3168A_DAC_ATT_DEMP_ZF, 0x00 },
644 { PCM3168A_DAC_VOL_MASTER, 0xff },
645 { PCM3168A_DAC_VOL_CHAN_START, 0xff },
646 { PCM3168A_DAC_VOL_CHAN_START + 1, 0xff },
647 { PCM3168A_DAC_VOL_CHAN_START + 2, 0xff },
648 { PCM3168A_DAC_VOL_CHAN_START + 3, 0xff },
649 { PCM3168A_DAC_VOL_CHAN_START + 4, 0xff },
650 { PCM3168A_DAC_VOL_CHAN_START + 5, 0xff },
651 { PCM3168A_DAC_VOL_CHAN_START + 6, 0xff },
652 { PCM3168A_DAC_VOL_CHAN_START + 7, 0xff },
653 { PCM3168A_ADC_SMODE, 0x00 },
654 { PCM3168A_ADC_MST_FMT, 0x00 },
655 { PCM3168A_ADC_PWR_HPFB, 0x00 },
656 { PCM3168A_ADC_SEAD, 0x00 },
657 { PCM3168A_ADC_INV, 0x00 },
658 { PCM3168A_ADC_MUTE, 0x00 },
659 { PCM3168A_ADC_OV, 0x00 },
660 { PCM3168A_ADC_ATT_OVF, 0x00 },
661 { PCM3168A_ADC_VOL_MASTER, 0xd3 },
662 { PCM3168A_ADC_VOL_CHAN_START, 0xd3 },
663 { PCM3168A_ADC_VOL_CHAN_START + 1, 0xd3 },
664 { PCM3168A_ADC_VOL_CHAN_START + 2, 0xd3 },
665 { PCM3168A_ADC_VOL_CHAN_START + 3, 0xd3 },
666 { PCM3168A_ADC_VOL_CHAN_START + 4, 0xd3 },
667 { PCM3168A_ADC_VOL_CHAN_START + 5, 0xd3 }
670 static bool pcm3168a_readable_register(struct device *dev, unsigned int reg)
672 if (reg >= PCM3168A_RST_SMODE)
678 static bool pcm3168a_volatile_register(struct device *dev, unsigned int reg)
681 case PCM3168A_DAC_ZERO:
682 case PCM3168A_ADC_OV:
689 static bool pcm3168a_writeable_register(struct device *dev, unsigned int reg)
691 if (reg < PCM3168A_RST_SMODE)
695 case PCM3168A_DAC_ZERO:
696 case PCM3168A_ADC_OV:
703 const struct regmap_config pcm3168a_regmap = {
707 .max_register = PCM3168A_ADC_VOL_CHAN_START + 5,
708 .reg_defaults = pcm3168a_reg_default,
709 .num_reg_defaults = ARRAY_SIZE(pcm3168a_reg_default),
710 .readable_reg = pcm3168a_readable_register,
711 .volatile_reg = pcm3168a_volatile_register,
712 .writeable_reg = pcm3168a_writeable_register,
713 .cache_type = REGCACHE_FLAT
715 EXPORT_SYMBOL_GPL(pcm3168a_regmap);
717 static const struct snd_soc_component_driver pcm3168a_driver = {
718 .controls = pcm3168a_snd_controls,
719 .num_controls = ARRAY_SIZE(pcm3168a_snd_controls),
720 .dapm_widgets = pcm3168a_dapm_widgets,
721 .num_dapm_widgets = ARRAY_SIZE(pcm3168a_dapm_widgets),
722 .dapm_routes = pcm3168a_dapm_routes,
723 .num_dapm_routes = ARRAY_SIZE(pcm3168a_dapm_routes),
724 .use_pmdown_time = 1,
726 .non_legacy_dai_naming = 1,
729 int pcm3168a_probe(struct device *dev, struct regmap *regmap)
731 struct pcm3168a_priv *pcm3168a;
734 pcm3168a = devm_kzalloc(dev, sizeof(*pcm3168a), GFP_KERNEL);
735 if (pcm3168a == NULL)
738 dev_set_drvdata(dev, pcm3168a);
740 pcm3168a->scki = devm_clk_get(dev, "scki");
741 if (IS_ERR(pcm3168a->scki)) {
742 ret = PTR_ERR(pcm3168a->scki);
743 if (ret != -EPROBE_DEFER)
744 dev_err(dev, "failed to acquire clock 'scki': %d\n", ret);
748 ret = clk_prepare_enable(pcm3168a->scki);
750 dev_err(dev, "Failed to enable mclk: %d\n", ret);
754 pcm3168a->sysclk = clk_get_rate(pcm3168a->scki);
756 for (i = 0; i < ARRAY_SIZE(pcm3168a->supplies); i++)
757 pcm3168a->supplies[i].supply = pcm3168a_supply_names[i];
759 ret = devm_regulator_bulk_get(dev,
760 ARRAY_SIZE(pcm3168a->supplies), pcm3168a->supplies);
762 if (ret != -EPROBE_DEFER)
763 dev_err(dev, "failed to request supplies: %d\n", ret);
767 ret = regulator_bulk_enable(ARRAY_SIZE(pcm3168a->supplies),
770 dev_err(dev, "failed to enable supplies: %d\n", ret);
774 pcm3168a->regmap = regmap;
775 if (IS_ERR(pcm3168a->regmap)) {
776 ret = PTR_ERR(pcm3168a->regmap);
777 dev_err(dev, "failed to allocate regmap: %d\n", ret);
781 ret = pcm3168a_reset(pcm3168a);
783 dev_err(dev, "Failed to reset device: %d\n", ret);
787 pm_runtime_set_active(dev);
788 pm_runtime_enable(dev);
789 pm_runtime_idle(dev);
791 ret = devm_snd_soc_register_component(dev, &pcm3168a_driver, pcm3168a_dais,
792 ARRAY_SIZE(pcm3168a_dais));
794 dev_err(dev, "failed to register component: %d\n", ret);
801 regulator_bulk_disable(ARRAY_SIZE(pcm3168a->supplies),
804 clk_disable_unprepare(pcm3168a->scki);
808 EXPORT_SYMBOL_GPL(pcm3168a_probe);
810 static void pcm3168a_disable(struct device *dev)
812 struct pcm3168a_priv *pcm3168a = dev_get_drvdata(dev);
814 regulator_bulk_disable(ARRAY_SIZE(pcm3168a->supplies),
816 clk_disable_unprepare(pcm3168a->scki);
819 void pcm3168a_remove(struct device *dev)
821 pm_runtime_disable(dev);
823 pcm3168a_disable(dev);
826 EXPORT_SYMBOL_GPL(pcm3168a_remove);
829 static int pcm3168a_rt_resume(struct device *dev)
831 struct pcm3168a_priv *pcm3168a = dev_get_drvdata(dev);
834 ret = clk_prepare_enable(pcm3168a->scki);
836 dev_err(dev, "Failed to enable mclk: %d\n", ret);
840 ret = regulator_bulk_enable(ARRAY_SIZE(pcm3168a->supplies),
843 dev_err(dev, "Failed to enable supplies: %d\n", ret);
847 ret = pcm3168a_reset(pcm3168a);
849 dev_err(dev, "Failed to reset device: %d\n", ret);
853 regcache_cache_only(pcm3168a->regmap, false);
855 regcache_mark_dirty(pcm3168a->regmap);
857 ret = regcache_sync(pcm3168a->regmap);
859 dev_err(dev, "Failed to sync regmap: %d\n", ret);
866 regulator_bulk_disable(ARRAY_SIZE(pcm3168a->supplies),
869 clk_disable_unprepare(pcm3168a->scki);
874 static int pcm3168a_rt_suspend(struct device *dev)
876 struct pcm3168a_priv *pcm3168a = dev_get_drvdata(dev);
878 regcache_cache_only(pcm3168a->regmap, true);
880 pcm3168a_disable(dev);
886 const struct dev_pm_ops pcm3168a_pm_ops = {
887 SET_RUNTIME_PM_OPS(pcm3168a_rt_suspend, pcm3168a_rt_resume, NULL)
889 EXPORT_SYMBOL_GPL(pcm3168a_pm_ops);
891 MODULE_DESCRIPTION("PCM3168A codec driver");
892 MODULE_AUTHOR("Damien Horsley <Damien.Horsley@imgtec.com>");
893 MODULE_LICENSE("GPL v2");