sound/soc/codecs/cs35l56.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 //
   3 // Driver for Cirrus Logic CS35L56 smart amp
   4 //
   5 // Copyright (C) 2023 Cirrus Logic, Inc. and
   6 //                    Cirrus Logic International Semiconductor Ltd.
   7
   8 #include <linux/completion.h>
   9 #include <linux/debugfs.h>
  10 #include <linux/delay.h>
  11 #include <linux/err.h>
  12 #include <linux/gpio/consumer.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/math.h>
  15 #include <linux/module.h>
  16 #include <linux/pm.h>
  17 #include <linux/pm_runtime.h>
  18 #include <linux/regmap.h>
  19 #include <linux/regulator/consumer.h>
  20 #include <linux/slab.h>
  21 #include <linux/soundwire/sdw.h>
  22 #include <linux/types.h>
  23 #include <linux/workqueue.h>
  24 #include <sound/pcm.h>
  25 #include <sound/pcm_params.h>
  26 #include <sound/soc.h>
  27 #include <sound/soc-dapm.h>
  28 #include <sound/tlv.h>
  29
  30 #include "wm_adsp.h"
  31 #include "cs35l56.h"
  32
  33 static int cs35l56_dsp_event(struct snd_soc_dapm_widget *w,
  34                              struct snd_kcontrol *kcontrol, int event);
  35
  36 static void cs35l56_wait_dsp_ready(struct cs35l56_private *cs35l56)
  37 {
  38         /* Wait for patching to complete */
  39         flush_work(&cs35l56->dsp_work);
  40 }
  41
  42 static int cs35l56_dspwait_get_volsw(struct snd_kcontrol *kcontrol,
  43                                      struct snd_ctl_elem_value *ucontrol)
  44 {
  45         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
  46         struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
  47
  48         cs35l56_wait_dsp_ready(cs35l56);
  49         return snd_soc_get_volsw(kcontrol, ucontrol);
  50 }
  51
  52 static int cs35l56_dspwait_put_volsw(struct snd_kcontrol *kcontrol,
  53                                      struct snd_ctl_elem_value *ucontrol)
  54 {
  55         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
  56         struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
  57
  58         cs35l56_wait_dsp_ready(cs35l56);
  59         return snd_soc_put_volsw(kcontrol, ucontrol);
  60 }
  61
  62 static DECLARE_TLV_DB_SCALE(vol_tlv, -10000, 25, 0);
  63
  64 static const struct snd_kcontrol_new cs35l56_controls[] = {
  65         SOC_SINGLE_EXT("Speaker Switch",
  66                        CS35L56_MAIN_RENDER_USER_MUTE, 0, 1, 1,
  67                        cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw),
  68         SOC_SINGLE_S_EXT_TLV("Speaker Volume",
  69                              CS35L56_MAIN_RENDER_USER_VOLUME,
  70                              6, -400, 400, 9, 0,
  71                              cs35l56_dspwait_get_volsw,
  72                              cs35l56_dspwait_put_volsw,
  73                              vol_tlv),
  74         SOC_SINGLE_EXT("Posture Number", CS35L56_MAIN_POSTURE_NUMBER,
  75                        0, 255, 0,
  76                        cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw),
  77 };
  78
  79 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx1_enum,
  80                                   CS35L56_ASP1TX1_INPUT,
  81                                   0, CS35L56_ASP_TXn_SRC_MASK,
  82                                   cs35l56_tx_input_texts,
  83                                   cs35l56_tx_input_values);
  84
  85 static const struct snd_kcontrol_new asp1_tx1_mux =
  86         SOC_DAPM_ENUM("ASP1TX1 SRC", cs35l56_asp1tx1_enum);
  87
  88 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx2_enum,
  89                                   CS35L56_ASP1TX2_INPUT,
  90                                   0, CS35L56_ASP_TXn_SRC_MASK,
  91                                   cs35l56_tx_input_texts,
  92                                   cs35l56_tx_input_values);
  93
  94 static const struct snd_kcontrol_new asp1_tx2_mux =
  95         SOC_DAPM_ENUM("ASP1TX2 SRC", cs35l56_asp1tx2_enum);
  96
  97 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx3_enum,
  98                                   CS35L56_ASP1TX3_INPUT,
  99                                   0, CS35L56_ASP_TXn_SRC_MASK,
 100                                   cs35l56_tx_input_texts,
 101                                   cs35l56_tx_input_values);
 102
 103 static const struct snd_kcontrol_new asp1_tx3_mux =
 104         SOC_DAPM_ENUM("ASP1TX3 SRC", cs35l56_asp1tx3_enum);
 105
 106 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx4_enum,
 107                                   CS35L56_ASP1TX4_INPUT,
 108                                   0, CS35L56_ASP_TXn_SRC_MASK,
 109                                   cs35l56_tx_input_texts,
 110                                   cs35l56_tx_input_values);
 111
 112 static const struct snd_kcontrol_new asp1_tx4_mux =
 113         SOC_DAPM_ENUM("ASP1TX4 SRC", cs35l56_asp1tx4_enum);
 114
 115 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx1_enum,
 116                                 CS35L56_SWIRE_DP3_CH1_INPUT,
 117                                 0, CS35L56_SWIRETXn_SRC_MASK,
 118                                 cs35l56_tx_input_texts,
 119                                 cs35l56_tx_input_values);
 120
 121 static const struct snd_kcontrol_new sdw1_tx1_mux =
 122         SOC_DAPM_ENUM("SDW1TX1 SRC", cs35l56_sdw1tx1_enum);
 123
 124 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx2_enum,
 125                                 CS35L56_SWIRE_DP3_CH2_INPUT,
 126                                 0, CS35L56_SWIRETXn_SRC_MASK,
 127                                 cs35l56_tx_input_texts,
 128                                 cs35l56_tx_input_values);
 129
 130 static const struct snd_kcontrol_new sdw1_tx2_mux =
 131         SOC_DAPM_ENUM("SDW1TX2 SRC", cs35l56_sdw1tx2_enum);
 132
 133 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx3_enum,
 134                                 CS35L56_SWIRE_DP3_CH3_INPUT,
 135                                 0, CS35L56_SWIRETXn_SRC_MASK,
 136                                 cs35l56_tx_input_texts,
 137                                 cs35l56_tx_input_values);
 138
 139 static const struct snd_kcontrol_new sdw1_tx3_mux =
 140         SOC_DAPM_ENUM("SDW1TX3 SRC", cs35l56_sdw1tx3_enum);
 141
 142 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx4_enum,
 143                                 CS35L56_SWIRE_DP3_CH4_INPUT,
 144                                 0, CS35L56_SWIRETXn_SRC_MASK,
 145                                 cs35l56_tx_input_texts,
 146                                 cs35l56_tx_input_values);
 147
 148 static const struct snd_kcontrol_new sdw1_tx4_mux =
 149         SOC_DAPM_ENUM("SDW1TX4 SRC", cs35l56_sdw1tx4_enum);
 150
 151 static int cs35l56_play_event(struct snd_soc_dapm_widget *w,
 152                               struct snd_kcontrol *kcontrol, int event)
 153 {
 154         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 155         struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
 156         unsigned int val;
 157         int ret;
 158
 159         dev_dbg(cs35l56->base.dev, "play: %d\n", event);
 160
 161         switch (event) {
 162         case SND_SOC_DAPM_PRE_PMU:
 163                 /* Don't wait for ACK, we check in POST_PMU that it completed */
 164                 return regmap_write(cs35l56->base.regmap, CS35L56_DSP_VIRTUAL1_MBOX_1,
 165                                     CS35L56_MBOX_CMD_AUDIO_PLAY);
 166         case SND_SOC_DAPM_POST_PMU:
 167                 /* Wait for firmware to enter PS0 power state */
 168                 ret = regmap_read_poll_timeout(cs35l56->base.regmap,
 169                                                CS35L56_TRANSDUCER_ACTUAL_PS,
 170                                                val, (val == CS35L56_PS0),
 171                                                CS35L56_PS0_POLL_US,
 172                                                CS35L56_PS0_TIMEOUT_US);
 173                 if (ret)
 174                         dev_err(cs35l56->base.dev, "PS0 wait failed: %d\n", ret);
 175                 return ret;
 176         case SND_SOC_DAPM_POST_PMD:
 177                 return cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_PAUSE);
 178         default:
 179                 return 0;
 180         }
 181 }
 182
 183 static const struct snd_soc_dapm_widget cs35l56_dapm_widgets[] = {
 184         SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_B", 0, 0),
 185         SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_AMP", 0, 0),
 186
 187         SND_SOC_DAPM_SUPPLY("PLAY", SND_SOC_NOPM, 0, 0, cs35l56_play_event,
 188                             SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
 189
 190         SND_SOC_DAPM_OUT_DRV("AMP", SND_SOC_NOPM, 0, 0, NULL, 0),
 191         SND_SOC_DAPM_OUTPUT("SPK"),
 192
 193         SND_SOC_DAPM_PGA_E("DSP1", SND_SOC_NOPM, 0, 0, NULL, 0, cs35l56_dsp_event,
 194                            SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
 195
 196         SND_SOC_DAPM_AIF_IN("ASP1RX1", NULL, 0, CS35L56_ASP1_ENABLES1,
 197                             CS35L56_ASP_RX1_EN_SHIFT, 0),
 198         SND_SOC_DAPM_AIF_IN("ASP1RX2", NULL, 1, CS35L56_ASP1_ENABLES1,
 199                             CS35L56_ASP_RX2_EN_SHIFT, 0),
 200         SND_SOC_DAPM_AIF_OUT("ASP1TX1", NULL, 0, CS35L56_ASP1_ENABLES1,
 201                              CS35L56_ASP_TX1_EN_SHIFT, 0),
 202         SND_SOC_DAPM_AIF_OUT("ASP1TX2", NULL, 1, CS35L56_ASP1_ENABLES1,
 203                              CS35L56_ASP_TX2_EN_SHIFT, 0),
 204         SND_SOC_DAPM_AIF_OUT("ASP1TX3", NULL, 2, CS35L56_ASP1_ENABLES1,
 205                              CS35L56_ASP_TX3_EN_SHIFT, 0),
 206         SND_SOC_DAPM_AIF_OUT("ASP1TX4", NULL, 3, CS35L56_ASP1_ENABLES1,
 207                              CS35L56_ASP_TX4_EN_SHIFT, 0),
 208
 209         SND_SOC_DAPM_MUX("ASP1 TX1 Source", SND_SOC_NOPM, 0, 0, &asp1_tx1_mux),
 210         SND_SOC_DAPM_MUX("ASP1 TX2 Source", SND_SOC_NOPM, 0, 0, &asp1_tx2_mux),
 211         SND_SOC_DAPM_MUX("ASP1 TX3 Source", SND_SOC_NOPM, 0, 0, &asp1_tx3_mux),
 212         SND_SOC_DAPM_MUX("ASP1 TX4 Source", SND_SOC_NOPM, 0, 0, &asp1_tx4_mux),
 213
 214         SND_SOC_DAPM_MUX("SDW1 TX1 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx1_mux),
 215         SND_SOC_DAPM_MUX("SDW1 TX2 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx2_mux),
 216         SND_SOC_DAPM_MUX("SDW1 TX3 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx3_mux),
 217         SND_SOC_DAPM_MUX("SDW1 TX4 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx4_mux),
 218
 219         SND_SOC_DAPM_SIGGEN("VMON ADC"),
 220         SND_SOC_DAPM_SIGGEN("IMON ADC"),
 221         SND_SOC_DAPM_SIGGEN("ERRVOL ADC"),
 222         SND_SOC_DAPM_SIGGEN("CLASSH ADC"),
 223         SND_SOC_DAPM_SIGGEN("VDDBMON ADC"),
 224         SND_SOC_DAPM_SIGGEN("VBSTMON ADC"),
 225         SND_SOC_DAPM_SIGGEN("TEMPMON ADC"),
 226 };
 227
 228 #define CS35L56_SRC_ROUTE(name) \
 229         { name" Source", "ASP1RX1", "ASP1RX1" }, \
 230         { name" Source", "ASP1RX2", "ASP1RX2" }, \
 231         { name" Source", "VMON", "VMON ADC" }, \
 232         { name" Source", "IMON", "IMON ADC" }, \
 233         { name" Source", "ERRVOL", "ERRVOL ADC" },   \
 234         { name" Source", "CLASSH", "CLASSH ADC" },   \
 235         { name" Source", "VDDBMON", "VDDBMON ADC" }, \
 236         { name" Source", "VBSTMON", "VBSTMON ADC" }, \
 237         { name" Source", "DSP1TX1", "DSP1" }, \
 238         { name" Source", "DSP1TX2", "DSP1" }, \
 239         { name" Source", "DSP1TX3", "DSP1" }, \
 240         { name" Source", "DSP1TX4", "DSP1" }, \
 241         { name" Source", "DSP1TX5", "DSP1" }, \
 242         { name" Source", "DSP1TX6", "DSP1" }, \
 243         { name" Source", "DSP1TX7", "DSP1" }, \
 244         { name" Source", "DSP1TX8", "DSP1" }, \
 245         { name" Source", "TEMPMON", "TEMPMON ADC" }, \
 246         { name" Source", "INTERPOLATOR", "AMP" }, \
 247         { name" Source", "SDW1RX1", "SDW1 Playback" }, \
 248         { name" Source", "SDW1RX2", "SDW1 Playback" },
 249
 250 static const struct snd_soc_dapm_route cs35l56_audio_map[] = {
 251         { "AMP", NULL, "VDD_B" },
 252         { "AMP", NULL, "VDD_AMP" },
 253
 254         { "ASP1 Playback", NULL, "PLAY" },
 255         { "SDW1 Playback", NULL, "PLAY" },
 256
 257         { "ASP1RX1", NULL, "ASP1 Playback" },
 258         { "ASP1RX2", NULL, "ASP1 Playback" },
 259         { "DSP1", NULL, "ASP1RX1" },
 260         { "DSP1", NULL, "ASP1RX2" },
 261         { "DSP1", NULL, "SDW1 Playback" },
 262         { "AMP", NULL, "DSP1" },
 263         { "SPK", NULL, "AMP" },
 264
 265         CS35L56_SRC_ROUTE("ASP1 TX1")
 266         CS35L56_SRC_ROUTE("ASP1 TX2")
 267         CS35L56_SRC_ROUTE("ASP1 TX3")
 268         CS35L56_SRC_ROUTE("ASP1 TX4")
 269
 270         { "ASP1TX1", NULL, "ASP1 TX1 Source" },
 271         { "ASP1TX2", NULL, "ASP1 TX2 Source" },
 272         { "ASP1TX3", NULL, "ASP1 TX3 Source" },
 273         { "ASP1TX4", NULL, "ASP1 TX4 Source" },
 274         { "ASP1 Capture", NULL, "ASP1TX1" },
 275         { "ASP1 Capture", NULL, "ASP1TX2" },
 276         { "ASP1 Capture", NULL, "ASP1TX3" },
 277         { "ASP1 Capture", NULL, "ASP1TX4" },
 278
 279         CS35L56_SRC_ROUTE("SDW1 TX1")
 280         CS35L56_SRC_ROUTE("SDW1 TX2")
 281         CS35L56_SRC_ROUTE("SDW1 TX3")
 282         CS35L56_SRC_ROUTE("SDW1 TX4")
 283         { "SDW1 Capture", NULL, "SDW1 TX1 Source" },
 284         { "SDW1 Capture", NULL, "SDW1 TX2 Source" },
 285         { "SDW1 Capture", NULL, "SDW1 TX3 Source" },
 286         { "SDW1 Capture", NULL, "SDW1 TX4 Source" },
 287 };
 288
 289 static int cs35l56_dsp_event(struct snd_soc_dapm_widget *w,
 290                              struct snd_kcontrol *kcontrol, int event)
 291 {
 292         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 293         struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
 294
 295         dev_dbg(cs35l56->base.dev, "%s: %d\n", __func__, event);
 296
 297         return wm_adsp_event(w, kcontrol, event);
 298 }
 299
 300 static int cs35l56_asp_dai_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
 301 {
 302         struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(codec_dai->component);
 303         unsigned int val;
 304
 305         dev_dbg(cs35l56->base.dev, "%s: %#x\n", __func__, fmt);
 306
 307         switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
 308         case SND_SOC_DAIFMT_CBC_CFC:
 309                 break;
 310         default:
 311                 dev_err(cs35l56->base.dev, "Unsupported clock source mode\n");
 312                 return -EINVAL;
 313         }
 314
 315         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 316         case SND_SOC_DAIFMT_DSP_A:
 317                 val = CS35L56_ASP_FMT_DSP_A << CS35L56_ASP_FMT_SHIFT;
 318                 cs35l56->tdm_mode = true;
 319                 break;
 320         case SND_SOC_DAIFMT_I2S:
 321                 val = CS35L56_ASP_FMT_I2S << CS35L56_ASP_FMT_SHIFT;
 322                 cs35l56->tdm_mode = false;
 323                 break;
 324         default:
 325                 dev_err(cs35l56->base.dev, "Unsupported DAI format\n");
 326                 return -EINVAL;
 327         }
 328
 329         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 330         case SND_SOC_DAIFMT_NB_IF:
 331                 val |= CS35L56_ASP_FSYNC_INV_MASK;
 332                 break;
 333         case SND_SOC_DAIFMT_IB_NF:
 334                 val |= CS35L56_ASP_BCLK_INV_MASK;
 335                 break;
 336         case SND_SOC_DAIFMT_IB_IF:
 337                 val |= CS35L56_ASP_BCLK_INV_MASK | CS35L56_ASP_FSYNC_INV_MASK;
 338                 break;
 339         case SND_SOC_DAIFMT_NB_NF:
 340                 break;
 341         default:
 342                 dev_err(cs35l56->base.dev, "Invalid clock invert\n");
 343                 return -EINVAL;
 344         }
 345
 346         regmap_update_bits(cs35l56->base.regmap,
 347                            CS35L56_ASP1_CONTROL2,
 348                            CS35L56_ASP_FMT_MASK |
 349                            CS35L56_ASP_BCLK_INV_MASK | CS35L56_ASP_FSYNC_INV_MASK,
 350                            val);
 351
 352         /* Hi-Z DOUT in unused slots and when all TX are disabled */
 353         regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL3,
 354                            CS35L56_ASP1_DOUT_HIZ_CTRL_MASK,
 355                            CS35L56_ASP_UNUSED_HIZ_OFF_HIZ);
 356
 357         return 0;
 358 }
 359
 360 static unsigned int cs35l56_make_tdm_config_word(unsigned int reg_val, unsigned long mask)
 361 {
 362         unsigned int channel_shift;
 363         int bit_num;
 364
 365         /* Enable consecutive TX1..TXn for each of the slots set in mask */
 366         channel_shift = 0;
 367         for_each_set_bit(bit_num, &mask, 32) {
 368                 reg_val &= ~(0x3f << channel_shift);
 369                 reg_val |= bit_num << channel_shift;
 370                 channel_shift += 8;
 371         }
 372
 373         return reg_val;
 374 }
 375
 376 static int cs35l56_asp_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
 377                                         unsigned int rx_mask, int slots, int slot_width)
 378 {
 379         struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
 380
 381         if ((slots == 0) || (slot_width == 0)) {
 382                 dev_dbg(cs35l56->base.dev, "tdm config cleared\n");
 383                 cs35l56->asp_slot_width = 0;
 384                 cs35l56->asp_slot_count = 0;
 385                 return 0;
 386         }
 387
 388         if (slot_width > (CS35L56_ASP_RX_WIDTH_MASK >> CS35L56_ASP_RX_WIDTH_SHIFT)) {
 389                 dev_err(cs35l56->base.dev, "tdm invalid slot width %d\n", slot_width);
 390                 return -EINVAL;
 391         }
 392
 393         /* More than 32 slots would give an unsupportable BCLK frequency */
 394         if (slots > 32) {
 395                 dev_err(cs35l56->base.dev, "tdm invalid slot count %d\n", slots);
 396                 return -EINVAL;
 397         }
 398
 399         cs35l56->asp_slot_width = (u8)slot_width;
 400         cs35l56->asp_slot_count = (u8)slots;
 401
 402         // Note: rx/tx is from point of view of the CPU end
 403         if (tx_mask == 0)
 404                 tx_mask = 0x3;  // ASPRX1/RX2 in slots 0 and 1
 405
 406         if (rx_mask == 0)
 407                 rx_mask = 0xf;  // ASPTX1..TX4 in slots 0..3
 408
 409         /* Default unused slots to 63 */
 410         regmap_write(cs35l56->base.regmap, CS35L56_ASP1_FRAME_CONTROL1,
 411                      cs35l56_make_tdm_config_word(0x3f3f3f3f, rx_mask));
 412         regmap_write(cs35l56->base.regmap, CS35L56_ASP1_FRAME_CONTROL5,
 413                      cs35l56_make_tdm_config_word(0x3f3f3f, tx_mask));
 414
 415         dev_dbg(cs35l56->base.dev, "tdm slot width: %u count: %u tx_mask: %#x rx_mask: %#x\n",
 416                 cs35l56->asp_slot_width, cs35l56->asp_slot_count, tx_mask, rx_mask);
 417
 418         return 0;
 419 }
 420
 421 static int cs35l56_asp_dai_hw_params(struct snd_pcm_substream *substream,
 422                                      struct snd_pcm_hw_params *params,
 423                                      struct snd_soc_dai *dai)
 424 {
 425         struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
 426         unsigned int rate = params_rate(params);
 427         u8 asp_width, asp_wl;
 428
 429         asp_wl = params_width(params);
 430         if (cs35l56->asp_slot_width)
 431                 asp_width = cs35l56->asp_slot_width;
 432         else
 433                 asp_width = asp_wl;
 434
 435         dev_dbg(cs35l56->base.dev, "%s: wl=%d, width=%d, rate=%d",
 436                 __func__, asp_wl, asp_width, rate);
 437
 438         if (!cs35l56->sysclk_set) {
 439                 unsigned int slots = cs35l56->asp_slot_count;
 440                 unsigned int bclk_freq;
 441                 int freq_id;
 442
 443                 if (slots == 0) {
 444                         slots = params_channels(params);
 445
 446                         /* I2S always has an even number of slots */
 447                         if (!cs35l56->tdm_mode)
 448                                 slots = round_up(slots, 2);
 449                 }
 450
 451                 bclk_freq = asp_width * slots * rate;
 452                 freq_id = cs35l56_get_bclk_freq_id(bclk_freq);
 453                 if (freq_id < 0) {
 454                         dev_err(cs35l56->base.dev, "%s: Invalid BCLK %u\n", __func__, bclk_freq);
 455                         return -EINVAL;
 456                 }
 457
 458                 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL1,
 459                                    CS35L56_ASP_BCLK_FREQ_MASK,
 460                                    freq_id << CS35L56_ASP_BCLK_FREQ_SHIFT);
 461         }
 462
 463         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 464                 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL2,
 465                                    CS35L56_ASP_RX_WIDTH_MASK, asp_width <<
 466                                    CS35L56_ASP_RX_WIDTH_SHIFT);
 467                 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_DATA_CONTROL5,
 468                                    CS35L56_ASP_RX_WL_MASK, asp_wl);
 469         } else {
 470                 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL2,
 471                                    CS35L56_ASP_TX_WIDTH_MASK, asp_width <<
 472                                    CS35L56_ASP_TX_WIDTH_SHIFT);
 473                 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_DATA_CONTROL1,
 474                                    CS35L56_ASP_TX_WL_MASK, asp_wl);
 475         }
 476
 477         return 0;
 478 }
 479
 480 static int cs35l56_asp_dai_set_sysclk(struct snd_soc_dai *dai,
 481                                       int clk_id, unsigned int freq, int dir)
 482 {
 483         struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
 484         int freq_id;
 485
 486         if (freq == 0) {
 487                 cs35l56->sysclk_set = false;
 488                 return 0;
 489         }
 490
 491         freq_id = cs35l56_get_bclk_freq_id(freq);
 492         if (freq_id < 0)
 493                 return freq_id;
 494
 495         regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL1,
 496                            CS35L56_ASP_BCLK_FREQ_MASK,
 497                            freq_id << CS35L56_ASP_BCLK_FREQ_SHIFT);
 498         cs35l56->sysclk_set = true;
 499
 500         return 0;
 501 }
 502
 503 static const struct snd_soc_dai_ops cs35l56_ops = {
 504         .set_fmt = cs35l56_asp_dai_set_fmt,
 505         .set_tdm_slot = cs35l56_asp_dai_set_tdm_slot,
 506         .hw_params = cs35l56_asp_dai_hw_params,
 507         .set_sysclk = cs35l56_asp_dai_set_sysclk,
 508 };
 509
 510 static void cs35l56_sdw_dai_shutdown(struct snd_pcm_substream *substream,
 511                                      struct snd_soc_dai *dai)
 512 {
 513         snd_soc_dai_set_dma_data(dai, substream, NULL);
 514 }
 515
 516 static int cs35l56_sdw_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
 517                                         unsigned int rx_mask, int slots, int slot_width)
 518 {
 519         struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
 520
 521         /* rx/tx are from point of view of the CPU end so opposite to our rx/tx */
 522         cs35l56->rx_mask = tx_mask;
 523         cs35l56->tx_mask = rx_mask;
 524
 525         return 0;
 526 }
 527
 528 static int cs35l56_sdw_dai_hw_params(struct snd_pcm_substream *substream,
 529                                      struct snd_pcm_hw_params *params,
 530                                      struct snd_soc_dai *dai)
 531 {
 532         struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
 533         struct sdw_stream_runtime *sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
 534         struct sdw_stream_config sconfig;
 535         struct sdw_port_config pconfig;
 536         int ret;
 537
 538         dev_dbg(cs35l56->base.dev, "%s: rate %d\n", __func__, params_rate(params));
 539
 540         if (!cs35l56->base.init_done)
 541                 return -ENODEV;
 542
 543         if (!sdw_stream)
 544                 return -EINVAL;
 545
 546         memset(&sconfig, 0, sizeof(sconfig));
 547         memset(&pconfig, 0, sizeof(pconfig));
 548
 549         sconfig.frame_rate = params_rate(params);
 550         sconfig.bps = snd_pcm_format_width(params_format(params));
 551
 552         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 553                 sconfig.direction = SDW_DATA_DIR_RX;
 554                 pconfig.num = CS35L56_SDW1_PLAYBACK_PORT;
 555                 pconfig.ch_mask = cs35l56->rx_mask;
 556         } else {
 557                 sconfig.direction = SDW_DATA_DIR_TX;
 558                 pconfig.num = CS35L56_SDW1_CAPTURE_PORT;
 559                 pconfig.ch_mask = cs35l56->tx_mask;
 560         }
 561
 562         if (pconfig.ch_mask == 0) {
 563                 sconfig.ch_count = params_channels(params);
 564                 pconfig.ch_mask = GENMASK(sconfig.ch_count - 1, 0);
 565         } else {
 566                 sconfig.ch_count = hweight32(pconfig.ch_mask);
 567         }
 568
 569         ret = sdw_stream_add_slave(cs35l56->sdw_peripheral, &sconfig, &pconfig,
 570                                    1, sdw_stream);
 571         if (ret) {
 572                 dev_err(dai->dev, "Failed to add sdw stream: %d\n", ret);
 573                 return ret;
 574         }
 575
 576         return 0;
 577 }
 578
 579 static int cs35l56_sdw_dai_hw_free(struct snd_pcm_substream *substream,
 580                                    struct snd_soc_dai *dai)
 581 {
 582         struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
 583         struct sdw_stream_runtime *sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
 584
 585         if (!cs35l56->sdw_peripheral)
 586                 return -EINVAL;
 587
 588         sdw_stream_remove_slave(cs35l56->sdw_peripheral, sdw_stream);
 589
 590         return 0;
 591 }
 592
 593 static int cs35l56_sdw_dai_set_stream(struct snd_soc_dai *dai,
 594                                       void *sdw_stream, int direction)
 595 {
 596         snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
 597
 598         return 0;
 599 }
 600
 601 static const struct snd_soc_dai_ops cs35l56_sdw_dai_ops = {
 602         .set_tdm_slot = cs35l56_sdw_dai_set_tdm_slot,
 603         .shutdown = cs35l56_sdw_dai_shutdown,
 604         .hw_params = cs35l56_sdw_dai_hw_params,
 605         .hw_free = cs35l56_sdw_dai_hw_free,
 606         .set_stream = cs35l56_sdw_dai_set_stream,
 607 };
 608
 609 static struct snd_soc_dai_driver cs35l56_dai[] = {
 610         {
 611                 .name = "cs35l56-asp1",
 612                 .id = 0,
 613                 .playback = {
 614                         .stream_name = "ASP1 Playback",
 615                         .channels_min = 1,
 616                         .channels_max = 2,
 617                         .rates = CS35L56_RATES,
 618                         .formats = CS35L56_RX_FORMATS,
 619                 },
 620                 .capture = {
 621                         .stream_name = "ASP1 Capture",
 622                         .channels_min = 1,
 623                         .channels_max = 4,
 624                         .rates = CS35L56_RATES,
 625                         .formats = CS35L56_TX_FORMATS,
 626                 },
 627                 .ops = &cs35l56_ops,
 628                 .symmetric_rate = 1,
 629                 .symmetric_sample_bits = 1,
 630         },
 631         {
 632                 .name = "cs35l56-sdw1",
 633                 .id = 1,
 634                 .playback = {
 635                         .stream_name = "SDW1 Playback",
 636                         .channels_min = 1,
 637                         .channels_max = 2,
 638                         .rates = CS35L56_RATES,
 639                         .formats = CS35L56_RX_FORMATS,
 640                 },
 641                 .capture = {
 642                         .stream_name = "SDW1 Capture",
 643                         .channels_min = 1,
 644                         .channels_max = 4,
 645                         .rates = CS35L56_RATES,
 646                         .formats = CS35L56_TX_FORMATS,
 647                 },
 648                 .symmetric_rate = 1,
 649                 .ops = &cs35l56_sdw_dai_ops,
 650         }
 651 };
 652
 653 static void cs35l56_secure_patch(struct cs35l56_private *cs35l56)
 654 {
 655         int ret;
 656
 657         /* Use wm_adsp to load and apply the firmware patch and coefficient files */
 658         ret = wm_adsp_power_up(&cs35l56->dsp, true);
 659         if (ret)
 660                 dev_dbg(cs35l56->base.dev, "%s: wm_adsp_power_up ret %d\n", __func__, ret);
 661         else
 662                 cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_REINIT);
 663 }
 664
 665 static void cs35l56_patch(struct cs35l56_private *cs35l56)
 666 {
 667         unsigned int firmware_missing;
 668         int ret;
 669
 670         ret = regmap_read(cs35l56->base.regmap, CS35L56_PROTECTION_STATUS, &firmware_missing);
 671         if (ret) {
 672                 dev_err(cs35l56->base.dev, "Failed to read PROTECTION_STATUS: %d\n", ret);
 673                 return;
 674         }
 675
 676         firmware_missing &= CS35L56_FIRMWARE_MISSING;
 677
 678         /*
 679          * Disable SoundWire interrupts to prevent race with IRQ work.
 680          * Setting sdw_irq_no_unmask prevents the handler re-enabling
 681          * the SoundWire interrupt.
 682          */
 683         if (cs35l56->sdw_peripheral) {
 684                 cs35l56->sdw_irq_no_unmask = true;
 685                 flush_work(&cs35l56->sdw_irq_work);
 686                 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1, 0);
 687                 sdw_read_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1);
 688                 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1, 0xFF);
 689                 flush_work(&cs35l56->sdw_irq_work);
 690         }
 691
 692         ret = cs35l56_firmware_shutdown(&cs35l56->base);
 693         if (ret)
 694                 goto err;
 695
 696         /*
 697          * Use wm_adsp to load and apply the firmware patch and coefficient files,
 698          * but only if firmware is missing. If firmware is already patched just
 699          * power-up wm_adsp without downloading firmware.
 700          */
 701         ret = wm_adsp_power_up(&cs35l56->dsp, !!firmware_missing);
 702         if (ret) {
 703                 dev_dbg(cs35l56->base.dev, "%s: wm_adsp_power_up ret %d\n", __func__, ret);
 704                 goto err;
 705         }
 706
 707         mutex_lock(&cs35l56->base.irq_lock);
 708
 709         reinit_completion(&cs35l56->init_completion);
 710
 711         cs35l56->soft_resetting = true;
 712         cs35l56_system_reset(&cs35l56->base, !!cs35l56->sdw_peripheral);
 713
 714         if (cs35l56->sdw_peripheral) {
 715                 /*
 716                  * The system-reset causes the CS35L56 to detach from the bus.
 717                  * Wait for the manager to re-enumerate the CS35L56 and
 718                  * cs35l56_init() to run again.
 719                  */
 720                 if (!wait_for_completion_timeout(&cs35l56->init_completion,
 721                                                  msecs_to_jiffies(5000))) {
 722                         dev_err(cs35l56->base.dev, "%s: init_completion timed out (SDW)\n",
 723                                 __func__);
 724                         goto err_unlock;
 725                 }
 726         } else if (cs35l56_init(cs35l56)) {
 727                 goto err_unlock;
 728         }
 729
 730         regmap_clear_bits(cs35l56->base.regmap, CS35L56_PROTECTION_STATUS,
 731                           CS35L56_FIRMWARE_MISSING);
 732         cs35l56->base.fw_patched = true;
 733
 734 err_unlock:
 735         mutex_unlock(&cs35l56->base.irq_lock);
 736 err:
 737         /* Re-enable SoundWire interrupts */
 738         if (cs35l56->sdw_peripheral) {
 739                 cs35l56->sdw_irq_no_unmask = false;
 740                 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1,
 741                                 CS35L56_SDW_INT_MASK_CODEC_IRQ);
 742         }
 743 }
 744
 745 static void cs35l56_dsp_work(struct work_struct *work)
 746 {
 747         struct cs35l56_private *cs35l56 = container_of(work,
 748                                                        struct cs35l56_private,
 749                                                        dsp_work);
 750
 751         if (!cs35l56->base.init_done)
 752                 return;
 753
 754         pm_runtime_get_sync(cs35l56->base.dev);
 755
 756         /*
 757          * When the device is running in secure mode the firmware files can
 758          * only contain insecure tunings and therefore we do not need to
 759          * shutdown the firmware to apply them and can use the lower cost
 760          * reinit sequence instead.
 761          */
 762         if (cs35l56->base.secured)
 763                 cs35l56_secure_patch(cs35l56);
 764         else
 765                 cs35l56_patch(cs35l56);
 766
 767         pm_runtime_mark_last_busy(cs35l56->base.dev);
 768         pm_runtime_put_autosuspend(cs35l56->base.dev);
 769 }
 770
 771 static int cs35l56_component_probe(struct snd_soc_component *component)
 772 {
 773         struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
 774         struct dentry *debugfs_root = component->debugfs_root;
 775
 776         BUILD_BUG_ON(ARRAY_SIZE(cs35l56_tx_input_texts) != ARRAY_SIZE(cs35l56_tx_input_values));
 777
 778         if (!wait_for_completion_timeout(&cs35l56->init_completion,
 779                                          msecs_to_jiffies(5000))) {
 780                 dev_err(cs35l56->base.dev, "%s: init_completion timed out\n", __func__);
 781                 return -ENODEV;
 782         }
 783
 784         cs35l56->component = component;
 785         wm_adsp2_component_probe(&cs35l56->dsp, component);
 786
 787         debugfs_create_bool("init_done", 0444, debugfs_root, &cs35l56->base.init_done);
 788         debugfs_create_bool("can_hibernate", 0444, debugfs_root, &cs35l56->base.can_hibernate);
 789         debugfs_create_bool("fw_patched", 0444, debugfs_root, &cs35l56->base.fw_patched);
 790
 791         queue_work(cs35l56->dsp_wq, &cs35l56->dsp_work);
 792
 793         return 0;
 794 }
 795
 796 static void cs35l56_component_remove(struct snd_soc_component *component)
 797 {
 798         struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
 799
 800         cancel_work_sync(&cs35l56->dsp_work);
 801 }
 802
 803 static int cs35l56_set_bias_level(struct snd_soc_component *component,
 804                                   enum snd_soc_bias_level level)
 805 {
 806         struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
 807
 808         switch (level) {
 809         case SND_SOC_BIAS_STANDBY:
 810                 /*
 811                  * Wait for patching to complete when transitioning from
 812                  * BIAS_OFF to BIAS_STANDBY
 813                  */
 814                 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF)
 815                         cs35l56_wait_dsp_ready(cs35l56);
 816
 817                 break;
 818         default:
 819                 break;
 820         }
 821
 822         return 0;
 823 }
 824
 825 static const struct snd_soc_component_driver soc_component_dev_cs35l56 = {
 826         .probe = cs35l56_component_probe,
 827         .remove = cs35l56_component_remove,
 828
 829         .dapm_widgets = cs35l56_dapm_widgets,
 830         .num_dapm_widgets = ARRAY_SIZE(cs35l56_dapm_widgets),
 831         .dapm_routes = cs35l56_audio_map,
 832         .num_dapm_routes = ARRAY_SIZE(cs35l56_audio_map),
 833         .controls = cs35l56_controls,
 834         .num_controls = ARRAY_SIZE(cs35l56_controls),
 835
 836         .set_bias_level = cs35l56_set_bias_level,
 837
 838         .suspend_bias_off = 1, /* see cs35l56_system_resume() */
 839 };
 840
 841 static int __maybe_unused cs35l56_runtime_suspend_i2c_spi(struct device *dev)
 842 {
 843         struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
 844
 845         return cs35l56_runtime_suspend_common(&cs35l56->base);
 846 }
 847
 848 static int __maybe_unused cs35l56_runtime_resume_i2c_spi(struct device *dev)
 849 {
 850         struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
 851
 852         return cs35l56_runtime_resume_common(&cs35l56->base, false);
 853 }
 854
 855 int cs35l56_system_suspend(struct device *dev)
 856 {
 857         struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
 858
 859         dev_dbg(dev, "system_suspend\n");
 860
 861         if (cs35l56->component)
 862                 flush_work(&cs35l56->dsp_work);
 863
 864         /*
 865          * The interrupt line is normally shared, but after we start suspending
 866          * we can't check if our device is the source of an interrupt, and can't
 867          * clear it. Prevent this race by temporarily disabling the parent irq
 868          * until we reach _no_irq.
 869          */
 870         if (cs35l56->base.irq)
 871                 disable_irq(cs35l56->base.irq);
 872
 873         return pm_runtime_force_suspend(dev);
 874 }
 875 EXPORT_SYMBOL_GPL(cs35l56_system_suspend);
 876
 877 int cs35l56_system_suspend_late(struct device *dev)
 878 {
 879         struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
 880
 881         dev_dbg(dev, "system_suspend_late\n");
 882
 883         /*
 884          * Assert RESET before removing supplies.
 885          * RESET is usually shared by all amps so it must not be asserted until
 886          * all driver instances have done their suspend() stage.
 887          */
 888         if (cs35l56->base.reset_gpio) {
 889                 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
 890                 cs35l56_wait_min_reset_pulse();
 891         }
 892
 893         regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
 894
 895         return 0;
 896 }
 897 EXPORT_SYMBOL_GPL(cs35l56_system_suspend_late);
 898
 899 int cs35l56_system_suspend_no_irq(struct device *dev)
 900 {
 901         struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
 902
 903         dev_dbg(dev, "system_suspend_no_irq\n");
 904
 905         /* Handlers are now disabled so the parent IRQ can safely be re-enabled. */
 906         if (cs35l56->base.irq)
 907                 enable_irq(cs35l56->base.irq);
 908
 909         return 0;
 910 }
 911 EXPORT_SYMBOL_GPL(cs35l56_system_suspend_no_irq);
 912
 913 int cs35l56_system_resume_no_irq(struct device *dev)
 914 {
 915         struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
 916
 917         dev_dbg(dev, "system_resume_no_irq\n");
 918
 919         /*
 920          * WAKE interrupts unmask if the CS35L56 hibernates, which can cause
 921          * spurious interrupts, and the interrupt line is normally shared.
 922          * We can't check if our device is the source of an interrupt, and can't
 923          * clear it, until it has fully resumed. Prevent this race by temporarily
 924          * disabling the parent irq until we complete resume().
 925          */
 926         if (cs35l56->base.irq)
 927                 disable_irq(cs35l56->base.irq);
 928
 929         return 0;
 930 }
 931 EXPORT_SYMBOL_GPL(cs35l56_system_resume_no_irq);
 932
 933 int cs35l56_system_resume_early(struct device *dev)
 934 {
 935         struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
 936         int ret;
 937
 938         dev_dbg(dev, "system_resume_early\n");
 939
 940         /* Ensure a spec-compliant RESET pulse. */
 941         if (cs35l56->base.reset_gpio) {
 942                 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
 943                 cs35l56_wait_min_reset_pulse();
 944         }
 945
 946         /* Enable supplies before releasing RESET. */
 947         ret = regulator_bulk_enable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
 948         if (ret) {
 949                 dev_err(dev, "system_resume_early failed to enable supplies: %d\n", ret);
 950                 return ret;
 951         }
 952
 953         /* Release shared RESET before drivers start resume(). */
 954         gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1);
 955
 956         return 0;
 957 }
 958 EXPORT_SYMBOL_GPL(cs35l56_system_resume_early);
 959
 960 int cs35l56_system_resume(struct device *dev)
 961 {
 962         struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
 963         int ret;
 964
 965         dev_dbg(dev, "system_resume\n");
 966
 967         /*
 968          * We might have done a hard reset or the CS35L56 was power-cycled
 969          * so wait for control port to be ready.
 970          */
 971         cs35l56_wait_control_port_ready();
 972
 973         /* Undo pm_runtime_force_suspend() before re-enabling the irq */
 974         ret = pm_runtime_force_resume(dev);
 975         if (cs35l56->base.irq)
 976                 enable_irq(cs35l56->base.irq);
 977
 978         if (ret)
 979                 return ret;
 980
 981         /* Firmware won't have been loaded if the component hasn't probed */
 982         if (!cs35l56->component)
 983                 return 0;
 984
 985         ret = cs35l56_is_fw_reload_needed(&cs35l56->base);
 986         dev_dbg(cs35l56->base.dev, "fw_reload_needed: %d\n", ret);
 987         if (ret < 1)
 988                 return ret;
 989
 990         cs35l56->base.fw_patched = false;
 991         wm_adsp_power_down(&cs35l56->dsp);
 992         queue_work(cs35l56->dsp_wq, &cs35l56->dsp_work);
 993
 994         /*
 995          * suspend_bias_off ensures we are now in BIAS_OFF so there will be
 996          * a BIAS_OFF->BIAS_STANDBY transition to complete dsp patching.
 997          */
 998
 999         return 0;
1000 }
1001 EXPORT_SYMBOL_GPL(cs35l56_system_resume);
1002
1003 static int cs35l56_dsp_init(struct cs35l56_private *cs35l56)
1004 {
1005         struct wm_adsp *dsp;
1006         int ret;
1007
1008         cs35l56->dsp_wq = create_singlethread_workqueue("cs35l56-dsp");
1009         if (!cs35l56->dsp_wq)
1010                 return -ENOMEM;
1011
1012         INIT_WORK(&cs35l56->dsp_work, cs35l56_dsp_work);
1013
1014         dsp = &cs35l56->dsp;
1015         cs35l56_init_cs_dsp(&cs35l56->base, &dsp->cs_dsp);
1016         dsp->part = "cs35l56";
1017         dsp->fw = 12;
1018         dsp->wmfw_optional = true;
1019
1020         dev_dbg(cs35l56->base.dev, "DSP system name: '%s'\n", dsp->system_name);
1021
1022         ret = wm_halo_init(dsp);
1023         if (ret != 0) {
1024                 dev_err(cs35l56->base.dev, "wm_halo_init failed\n");
1025                 return ret;
1026         }
1027
1028         return 0;
1029 }
1030
1031 static int cs35l56_get_firmware_uid(struct cs35l56_private *cs35l56)
1032 {
1033         struct device *dev = cs35l56->base.dev;
1034         const char *prop;
1035         int ret;
1036
1037         ret = device_property_read_string(dev, "cirrus,firmware-uid", &prop);
1038         /* If bad sw node property, return 0 and fallback to legacy firmware path */
1039         if (ret < 0)
1040                 return 0;
1041
1042         cs35l56->dsp.system_name = devm_kstrdup(dev, prop, GFP_KERNEL);
1043         if (cs35l56->dsp.system_name == NULL)
1044                 return -ENOMEM;
1045
1046         dev_dbg(dev, "Firmware UID: %s\n", cs35l56->dsp.system_name);
1047
1048         return 0;
1049 }
1050
1051 int cs35l56_common_probe(struct cs35l56_private *cs35l56)
1052 {
1053         int ret;
1054
1055         init_completion(&cs35l56->init_completion);
1056         mutex_init(&cs35l56->base.irq_lock);
1057
1058         dev_set_drvdata(cs35l56->base.dev, cs35l56);
1059
1060         cs35l56_fill_supply_names(cs35l56->supplies);
1061         ret = devm_regulator_bulk_get(cs35l56->base.dev, ARRAY_SIZE(cs35l56->supplies),
1062                                       cs35l56->supplies);
1063         if (ret != 0)
1064                 return dev_err_probe(cs35l56->base.dev, ret, "Failed to request supplies\n");
1065
1066         /* Reset could be controlled by the BIOS or shared by multiple amps */
1067         cs35l56->base.reset_gpio = devm_gpiod_get_optional(cs35l56->base.dev, "reset",
1068                                                            GPIOD_OUT_LOW);
1069         if (IS_ERR(cs35l56->base.reset_gpio)) {
1070                 ret = PTR_ERR(cs35l56->base.reset_gpio);
1071                 /*
1072                  * If RESET is shared the first amp to probe will grab the reset
1073                  * line and reset all the amps
1074                  */
1075                 if (ret != -EBUSY)
1076                         return dev_err_probe(cs35l56->base.dev, ret, "Failed to get reset GPIO\n");
1077
1078                 dev_info(cs35l56->base.dev, "Reset GPIO busy, assume shared reset\n");
1079                 cs35l56->base.reset_gpio = NULL;
1080         }
1081
1082         ret = regulator_bulk_enable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
1083         if (ret != 0)
1084                 return dev_err_probe(cs35l56->base.dev, ret, "Failed to enable supplies\n");
1085
1086         if (cs35l56->base.reset_gpio) {
1087                 /* ACPI can override GPIOD_OUT_LOW flag so force it to start low */
1088                 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
1089                 cs35l56_wait_min_reset_pulse();
1090                 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1);
1091         }
1092
1093         ret = cs35l56_get_firmware_uid(cs35l56);
1094         if (ret != 0)
1095                 goto err;
1096
1097         ret = cs35l56_dsp_init(cs35l56);
1098         if (ret < 0) {
1099                 dev_err_probe(cs35l56->base.dev, ret, "DSP init failed\n");
1100                 goto err;
1101         }
1102
1103         ret = devm_snd_soc_register_component(cs35l56->base.dev,
1104                                               &soc_component_dev_cs35l56,
1105                                               cs35l56_dai, ARRAY_SIZE(cs35l56_dai));
1106         if (ret < 0) {
1107                 dev_err_probe(cs35l56->base.dev, ret, "Register codec failed\n");
1108                 goto err;
1109         }
1110
1111         return 0;
1112
1113 err:
1114         gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
1115         regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
1116
1117         return ret;
1118 }
1119 EXPORT_SYMBOL_NS_GPL(cs35l56_common_probe, SND_SOC_CS35L56_CORE);
1120
1121 int cs35l56_init(struct cs35l56_private *cs35l56)
1122 {
1123         int ret;
1124
1125         /*
1126          * Check whether the actions associated with soft reset or one time
1127          * init need to be performed.
1128          */
1129         if (cs35l56->soft_resetting)
1130                 goto post_soft_reset;
1131
1132         if (cs35l56->base.init_done)
1133                 return 0;
1134
1135         pm_runtime_set_autosuspend_delay(cs35l56->base.dev, 100);
1136         pm_runtime_use_autosuspend(cs35l56->base.dev);
1137         pm_runtime_set_active(cs35l56->base.dev);
1138         pm_runtime_enable(cs35l56->base.dev);
1139
1140         ret = cs35l56_hw_init(&cs35l56->base);
1141         if (ret < 0)
1142                 return ret;
1143
1144         /* Populate the DSP information with the revision and security state */
1145         cs35l56->dsp.part = devm_kasprintf(cs35l56->base.dev, GFP_KERNEL, "cs35l56%s-%02x",
1146                                            cs35l56->base.secured ? "s" : "", cs35l56->base.rev);
1147         if (!cs35l56->dsp.part)
1148                 return -ENOMEM;
1149
1150         if (!cs35l56->base.reset_gpio) {
1151                 dev_dbg(cs35l56->base.dev, "No reset gpio: using soft reset\n");
1152                 cs35l56->soft_resetting = true;
1153                 cs35l56_system_reset(&cs35l56->base, !!cs35l56->sdw_peripheral);
1154                 if (cs35l56->sdw_peripheral) {
1155                         /* Keep alive while we wait for re-enumeration */
1156                         pm_runtime_get_noresume(cs35l56->base.dev);
1157                         return 0;
1158                 }
1159         }
1160
1161 post_soft_reset:
1162         if (cs35l56->soft_resetting) {
1163                 cs35l56->soft_resetting = false;
1164
1165                 /* Done re-enumerating after one-time init so release the keep-alive */
1166                 if (cs35l56->sdw_peripheral && !cs35l56->base.init_done)
1167                         pm_runtime_put_noidle(cs35l56->base.dev);
1168
1169                 regcache_mark_dirty(cs35l56->base.regmap);
1170                 ret = cs35l56_wait_for_firmware_boot(&cs35l56->base);
1171                 if (ret)
1172                         return ret;
1173
1174                 dev_dbg(cs35l56->base.dev, "Firmware rebooted after soft reset\n");
1175         }
1176
1177         /* Disable auto-hibernate so that runtime_pm has control */
1178         ret = cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_PREVENT_AUTO_HIBERNATE);
1179         if (ret)
1180                 return ret;
1181
1182         ret = cs35l56_set_patch(&cs35l56->base);
1183         if (ret)
1184                 return ret;
1185
1186         /* Registers could be dirty after soft reset or SoundWire enumeration */
1187         regcache_sync(cs35l56->base.regmap);
1188
1189         /* Set ASP1 DOUT to high-impedance when it is not transmitting audio data. */
1190         ret = regmap_set_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL3,
1191                               CS35L56_ASP1_DOUT_HIZ_CTRL_MASK);
1192         if (ret)
1193                 return dev_err_probe(cs35l56->base.dev, ret, "Failed to write ASP1_CONTROL3\n");
1194
1195         cs35l56->base.init_done = true;
1196         complete(&cs35l56->init_completion);
1197
1198         return 0;
1199 }
1200 EXPORT_SYMBOL_NS_GPL(cs35l56_init, SND_SOC_CS35L56_CORE);
1201
1202 void cs35l56_remove(struct cs35l56_private *cs35l56)
1203 {
1204         cs35l56->base.init_done = false;
1205
1206         /*
1207          * WAKE IRQs unmask if CS35L56 hibernates so free the handler to
1208          * prevent it racing with remove().
1209          */
1210         if (cs35l56->base.irq)
1211                 devm_free_irq(cs35l56->base.dev, cs35l56->base.irq, &cs35l56->base);
1212
1213         flush_workqueue(cs35l56->dsp_wq);
1214         destroy_workqueue(cs35l56->dsp_wq);
1215
1216         pm_runtime_dont_use_autosuspend(cs35l56->base.dev);
1217         pm_runtime_suspend(cs35l56->base.dev);
1218         pm_runtime_disable(cs35l56->base.dev);
1219
1220         regcache_cache_only(cs35l56->base.regmap, true);
1221
1222         gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
1223         regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
1224 }
1225 EXPORT_SYMBOL_NS_GPL(cs35l56_remove, SND_SOC_CS35L56_CORE);
1226
1227 const struct dev_pm_ops cs35l56_pm_ops_i2c_spi = {
1228         SET_RUNTIME_PM_OPS(cs35l56_runtime_suspend_i2c_spi, cs35l56_runtime_resume_i2c_spi, NULL)
1229         SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend, cs35l56_system_resume)
1230         LATE_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_late, cs35l56_system_resume_early)
1231         NOIRQ_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_no_irq, cs35l56_system_resume_no_irq)
1232 };
1233 EXPORT_SYMBOL_NS_GPL(cs35l56_pm_ops_i2c_spi, SND_SOC_CS35L56_CORE);
1234
1235 MODULE_DESCRIPTION("ASoC CS35L56 driver");
1236 MODULE_IMPORT_NS(SND_SOC_CS35L56_SHARED);
1237 MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>");
1238 MODULE_AUTHOR("Simon Trimmer <simont@opensource.cirrus.com>");
1239 MODULE_LICENSE("GPL");