2 * Driver for ADAU1701 SigmaDSP processor
4 * Copyright 2011 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 * based on an inital version by Cliff Cai <cliff.cai@analog.com>
8 * Licensed under the GPL-2 or later.
11 #include <linux/module.h>
12 #include <linux/init.h>
13 #include <linux/i2c.h>
14 #include <linux/delay.h>
15 #include <linux/slab.h>
17 #include <linux/of_gpio.h>
18 #include <linux/of_device.h>
19 #include <linux/regmap.h>
20 #include <sound/core.h>
21 #include <sound/pcm.h>
22 #include <sound/pcm_params.h>
23 #include <sound/soc.h>
28 #define ADAU1701_DSPCTRL 0x081c
29 #define ADAU1701_SEROCTL 0x081e
30 #define ADAU1701_SERICTL 0x081f
32 #define ADAU1701_AUXNPOW 0x0822
33 #define ADAU1701_PINCONF_0 0x0820
34 #define ADAU1701_PINCONF_1 0x0821
35 #define ADAU1701_AUXNPOW 0x0822
37 #define ADAU1701_OSCIPOW 0x0826
38 #define ADAU1701_DACSET 0x0827
40 #define ADAU1701_MAX_REGISTER 0x0828
42 #define ADAU1701_DSPCTRL_CR (1 << 2)
43 #define ADAU1701_DSPCTRL_DAM (1 << 3)
44 #define ADAU1701_DSPCTRL_ADM (1 << 4)
45 #define ADAU1701_DSPCTRL_SR_48 0x00
46 #define ADAU1701_DSPCTRL_SR_96 0x01
47 #define ADAU1701_DSPCTRL_SR_192 0x02
48 #define ADAU1701_DSPCTRL_SR_MASK 0x03
50 #define ADAU1701_SEROCTL_INV_LRCLK 0x2000
51 #define ADAU1701_SEROCTL_INV_BCLK 0x1000
52 #define ADAU1701_SEROCTL_MASTER 0x0800
54 #define ADAU1701_SEROCTL_OBF16 0x0000
55 #define ADAU1701_SEROCTL_OBF8 0x0200
56 #define ADAU1701_SEROCTL_OBF4 0x0400
57 #define ADAU1701_SEROCTL_OBF2 0x0600
58 #define ADAU1701_SEROCTL_OBF_MASK 0x0600
60 #define ADAU1701_SEROCTL_OLF1024 0x0000
61 #define ADAU1701_SEROCTL_OLF512 0x0080
62 #define ADAU1701_SEROCTL_OLF256 0x0100
63 #define ADAU1701_SEROCTL_OLF_MASK 0x0180
65 #define ADAU1701_SEROCTL_MSB_DEALY1 0x0000
66 #define ADAU1701_SEROCTL_MSB_DEALY0 0x0004
67 #define ADAU1701_SEROCTL_MSB_DEALY8 0x0008
68 #define ADAU1701_SEROCTL_MSB_DEALY12 0x000c
69 #define ADAU1701_SEROCTL_MSB_DEALY16 0x0010
70 #define ADAU1701_SEROCTL_MSB_DEALY_MASK 0x001c
72 #define ADAU1701_SEROCTL_WORD_LEN_24 0x0000
73 #define ADAU1701_SEROCTL_WORD_LEN_20 0x0001
74 #define ADAU1701_SEROCTL_WORD_LEN_16 0x0002
75 #define ADAU1701_SEROCTL_WORD_LEN_MASK 0x0003
77 #define ADAU1701_AUXNPOW_VBPD 0x40
78 #define ADAU1701_AUXNPOW_VRPD 0x20
80 #define ADAU1701_SERICTL_I2S 0
81 #define ADAU1701_SERICTL_LEFTJ 1
82 #define ADAU1701_SERICTL_TDM 2
83 #define ADAU1701_SERICTL_RIGHTJ_24 3
84 #define ADAU1701_SERICTL_RIGHTJ_20 4
85 #define ADAU1701_SERICTL_RIGHTJ_18 5
86 #define ADAU1701_SERICTL_RIGHTJ_16 6
87 #define ADAU1701_SERICTL_MODE_MASK 7
88 #define ADAU1701_SERICTL_INV_BCLK BIT(3)
89 #define ADAU1701_SERICTL_INV_LRCLK BIT(4)
91 #define ADAU1701_OSCIPOW_OPD 0x04
92 #define ADAU1701_DACSET_DACINIT 1
94 #define ADAU1707_CLKDIV_UNSET (-1U)
96 #define ADAU1701_FIRMWARE "adau1701.bin"
100 int gpio_pll_mode[2];
101 unsigned int dai_fmt;
102 unsigned int pll_clkdiv;
104 struct regmap *regmap;
108 static const struct snd_kcontrol_new adau1701_controls[] = {
109 SOC_SINGLE("Master Capture Switch", ADAU1701_DSPCTRL, 4, 1, 0),
112 static const struct snd_soc_dapm_widget adau1701_dapm_widgets[] = {
113 SND_SOC_DAPM_DAC("DAC0", "Playback", ADAU1701_AUXNPOW, 3, 1),
114 SND_SOC_DAPM_DAC("DAC1", "Playback", ADAU1701_AUXNPOW, 2, 1),
115 SND_SOC_DAPM_DAC("DAC2", "Playback", ADAU1701_AUXNPOW, 1, 1),
116 SND_SOC_DAPM_DAC("DAC3", "Playback", ADAU1701_AUXNPOW, 0, 1),
117 SND_SOC_DAPM_ADC("ADC", "Capture", ADAU1701_AUXNPOW, 7, 1),
119 SND_SOC_DAPM_OUTPUT("OUT0"),
120 SND_SOC_DAPM_OUTPUT("OUT1"),
121 SND_SOC_DAPM_OUTPUT("OUT2"),
122 SND_SOC_DAPM_OUTPUT("OUT3"),
123 SND_SOC_DAPM_INPUT("IN0"),
124 SND_SOC_DAPM_INPUT("IN1"),
127 static const struct snd_soc_dapm_route adau1701_dapm_routes[] = {
128 { "OUT0", NULL, "DAC0" },
129 { "OUT1", NULL, "DAC1" },
130 { "OUT2", NULL, "DAC2" },
131 { "OUT3", NULL, "DAC3" },
133 { "ADC", NULL, "IN0" },
134 { "ADC", NULL, "IN1" },
137 static unsigned int adau1701_register_size(struct device *dev,
141 case ADAU1701_PINCONF_0:
142 case ADAU1701_PINCONF_1:
144 case ADAU1701_DSPCTRL:
145 case ADAU1701_SEROCTL:
146 case ADAU1701_AUXNPOW:
147 case ADAU1701_OSCIPOW:
148 case ADAU1701_DACSET:
150 case ADAU1701_SERICTL:
154 dev_err(dev, "Unsupported register address: %d\n", reg);
158 static bool adau1701_volatile_reg(struct device *dev, unsigned int reg)
161 case ADAU1701_DACSET:
168 static int adau1701_reg_write(void *context, unsigned int reg,
171 struct i2c_client *client = context;
177 size = adau1701_register_size(&client->dev, reg);
184 for (i = size + 1; i >= 2; --i) {
189 ret = i2c_master_send(client, buf, size + 2);
198 static int adau1701_reg_read(void *context, unsigned int reg,
204 uint8_t send_buf[2], recv_buf[3];
205 struct i2c_client *client = context;
206 struct i2c_msg msgs[2];
208 size = adau1701_register_size(&client->dev, reg);
212 send_buf[0] = reg >> 8;
213 send_buf[1] = reg & 0xff;
215 msgs[0].addr = client->addr;
216 msgs[0].len = sizeof(send_buf);
217 msgs[0].buf = send_buf;
220 msgs[1].addr = client->addr;
222 msgs[1].buf = recv_buf;
223 msgs[1].flags = I2C_M_RD;
225 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
228 else if (ret != ARRAY_SIZE(msgs))
233 for (i = 0; i < size; i++)
234 *value |= recv_buf[i] << (i * 8);
239 static int adau1701_reset(struct snd_soc_codec *codec, unsigned int clkdiv)
241 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
242 struct i2c_client *client = to_i2c_client(codec->dev);
245 if (clkdiv != ADAU1707_CLKDIV_UNSET &&
246 gpio_is_valid(adau1701->gpio_pll_mode[0]) &&
247 gpio_is_valid(adau1701->gpio_pll_mode[1])) {
250 gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 0);
251 gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 0);
254 gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 0);
255 gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 1);
258 gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 1);
259 gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 0);
261 case 0: /* fallback */
263 gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 1);
264 gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 1);
269 adau1701->pll_clkdiv = clkdiv;
271 if (gpio_is_valid(adau1701->gpio_nreset)) {
272 gpio_set_value_cansleep(adau1701->gpio_nreset, 0);
273 /* minimum reset time is 20ns */
275 gpio_set_value_cansleep(adau1701->gpio_nreset, 1);
276 /* power-up time may be as long as 85ms */
281 * Postpone the firmware download to a point in time when we
282 * know the correct PLL setup
284 if (clkdiv != ADAU1707_CLKDIV_UNSET) {
285 ret = process_sigma_firmware(client, ADAU1701_FIRMWARE);
287 dev_warn(codec->dev, "Failed to load firmware\n");
292 regmap_write(adau1701->regmap, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT);
293 regmap_write(adau1701->regmap, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR);
295 regcache_mark_dirty(adau1701->regmap);
296 regcache_sync(adau1701->regmap);
301 static int adau1701_set_capture_pcm_format(struct snd_soc_codec *codec,
302 struct snd_pcm_hw_params *params)
304 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
305 unsigned int mask = ADAU1701_SEROCTL_WORD_LEN_MASK;
308 switch (params_width(params)) {
310 val = ADAU1701_SEROCTL_WORD_LEN_16;
313 val = ADAU1701_SEROCTL_WORD_LEN_20;
316 val = ADAU1701_SEROCTL_WORD_LEN_24;
322 if (adau1701->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) {
323 switch (params_width(params)) {
325 val |= ADAU1701_SEROCTL_MSB_DEALY16;
328 val |= ADAU1701_SEROCTL_MSB_DEALY12;
331 val |= ADAU1701_SEROCTL_MSB_DEALY8;
334 mask |= ADAU1701_SEROCTL_MSB_DEALY_MASK;
337 regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, mask, val);
342 static int adau1701_set_playback_pcm_format(struct snd_soc_codec *codec,
343 struct snd_pcm_hw_params *params)
345 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
348 if (adau1701->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
351 switch (params_width(params)) {
353 val = ADAU1701_SERICTL_RIGHTJ_16;
356 val = ADAU1701_SERICTL_RIGHTJ_20;
359 val = ADAU1701_SERICTL_RIGHTJ_24;
365 regmap_update_bits(adau1701->regmap, ADAU1701_SERICTL,
366 ADAU1701_SERICTL_MODE_MASK, val);
371 static int adau1701_hw_params(struct snd_pcm_substream *substream,
372 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
374 struct snd_soc_codec *codec = dai->codec;
375 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
376 unsigned int clkdiv = adau1701->sysclk / params_rate(params);
381 * If the mclk/lrclk ratio changes, the chip needs updated PLL
382 * mode GPIO settings, and a full reset cycle, including a new
385 if (clkdiv != adau1701->pll_clkdiv) {
386 ret = adau1701_reset(codec, clkdiv);
391 switch (params_rate(params)) {
393 val = ADAU1701_DSPCTRL_SR_192;
396 val = ADAU1701_DSPCTRL_SR_96;
399 val = ADAU1701_DSPCTRL_SR_48;
405 regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
406 ADAU1701_DSPCTRL_SR_MASK, val);
408 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
409 return adau1701_set_playback_pcm_format(codec, params);
411 return adau1701_set_capture_pcm_format(codec, params);
414 static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai,
417 struct snd_soc_codec *codec = codec_dai->codec;
418 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
419 unsigned int serictl = 0x00, seroctl = 0x00;
422 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
423 case SND_SOC_DAIFMT_CBM_CFM:
424 /* master, 64-bits per sample, 1 frame per sample */
425 seroctl |= ADAU1701_SEROCTL_MASTER | ADAU1701_SEROCTL_OBF16
426 | ADAU1701_SEROCTL_OLF1024;
428 case SND_SOC_DAIFMT_CBS_CFS:
434 /* clock inversion */
435 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
436 case SND_SOC_DAIFMT_NB_NF:
437 invert_lrclk = false;
439 case SND_SOC_DAIFMT_NB_IF:
442 case SND_SOC_DAIFMT_IB_NF:
443 invert_lrclk = false;
444 serictl |= ADAU1701_SERICTL_INV_BCLK;
445 seroctl |= ADAU1701_SEROCTL_INV_BCLK;
447 case SND_SOC_DAIFMT_IB_IF:
449 serictl |= ADAU1701_SERICTL_INV_BCLK;
450 seroctl |= ADAU1701_SEROCTL_INV_BCLK;
456 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
457 case SND_SOC_DAIFMT_I2S:
459 case SND_SOC_DAIFMT_LEFT_J:
460 serictl |= ADAU1701_SERICTL_LEFTJ;
461 seroctl |= ADAU1701_SEROCTL_MSB_DEALY0;
462 invert_lrclk = !invert_lrclk;
464 case SND_SOC_DAIFMT_RIGHT_J:
465 serictl |= ADAU1701_SERICTL_RIGHTJ_24;
466 seroctl |= ADAU1701_SEROCTL_MSB_DEALY8;
467 invert_lrclk = !invert_lrclk;
474 seroctl |= ADAU1701_SEROCTL_INV_LRCLK;
475 serictl |= ADAU1701_SERICTL_INV_LRCLK;
478 adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
480 regmap_write(adau1701->regmap, ADAU1701_SERICTL, serictl);
481 regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL,
482 ~ADAU1701_SEROCTL_WORD_LEN_MASK, seroctl);
487 static int adau1701_set_bias_level(struct snd_soc_codec *codec,
488 enum snd_soc_bias_level level)
490 unsigned int mask = ADAU1701_AUXNPOW_VBPD | ADAU1701_AUXNPOW_VRPD;
491 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
494 case SND_SOC_BIAS_ON:
496 case SND_SOC_BIAS_PREPARE:
498 case SND_SOC_BIAS_STANDBY:
499 /* Enable VREF and VREF buffer */
500 regmap_update_bits(adau1701->regmap,
501 ADAU1701_AUXNPOW, mask, 0x00);
503 case SND_SOC_BIAS_OFF:
504 /* Disable VREF and VREF buffer */
505 regmap_update_bits(adau1701->regmap,
506 ADAU1701_AUXNPOW, mask, mask);
510 codec->dapm.bias_level = level;
514 static int adau1701_digital_mute(struct snd_soc_dai *dai, int mute)
516 struct snd_soc_codec *codec = dai->codec;
517 unsigned int mask = ADAU1701_DSPCTRL_DAM;
518 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
526 regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, mask, val);
531 static int adau1701_set_sysclk(struct snd_soc_codec *codec, int clk_id,
532 int source, unsigned int freq, int dir)
535 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
538 case ADAU1701_CLK_SRC_OSC:
541 case ADAU1701_CLK_SRC_MCLK:
542 val = ADAU1701_OSCIPOW_OPD;
548 regmap_update_bits(adau1701->regmap, ADAU1701_OSCIPOW,
549 ADAU1701_OSCIPOW_OPD, val);
550 adau1701->sysclk = freq;
555 #define ADAU1701_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | \
556 SNDRV_PCM_RATE_192000)
558 #define ADAU1701_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
559 SNDRV_PCM_FMTBIT_S24_LE)
561 static const struct snd_soc_dai_ops adau1701_dai_ops = {
562 .set_fmt = adau1701_set_dai_fmt,
563 .hw_params = adau1701_hw_params,
564 .digital_mute = adau1701_digital_mute,
567 static struct snd_soc_dai_driver adau1701_dai = {
570 .stream_name = "Playback",
573 .rates = ADAU1701_RATES,
574 .formats = ADAU1701_FORMATS,
577 .stream_name = "Capture",
580 .rates = ADAU1701_RATES,
581 .formats = ADAU1701_FORMATS,
583 .ops = &adau1701_dai_ops,
584 .symmetric_rates = 1,
588 static const struct of_device_id adau1701_dt_ids[] = {
589 { .compatible = "adi,adau1701", },
592 MODULE_DEVICE_TABLE(of, adau1701_dt_ids);
595 static int adau1701_probe(struct snd_soc_codec *codec)
599 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
602 * Let the pll_clkdiv variable default to something that won't happen
603 * at runtime. That way, we can postpone the firmware download from
604 * adau1701_reset() to a point in time when we know the correct PLL
607 adau1701->pll_clkdiv = ADAU1707_CLKDIV_UNSET;
609 /* initalize with pre-configured pll mode settings */
610 ret = adau1701_reset(codec, adau1701->pll_clkdiv);
614 /* set up pin config */
616 for (i = 0; i < 6; i++)
617 val |= adau1701->pin_config[i] << (i * 4);
619 regmap_write(adau1701->regmap, ADAU1701_PINCONF_0, val);
622 for (i = 0; i < 6; i++)
623 val |= adau1701->pin_config[i + 6] << (i * 4);
625 regmap_write(adau1701->regmap, ADAU1701_PINCONF_1, val);
630 static struct snd_soc_codec_driver adau1701_codec_drv = {
631 .probe = adau1701_probe,
632 .set_bias_level = adau1701_set_bias_level,
633 .idle_bias_off = true,
635 .controls = adau1701_controls,
636 .num_controls = ARRAY_SIZE(adau1701_controls),
637 .dapm_widgets = adau1701_dapm_widgets,
638 .num_dapm_widgets = ARRAY_SIZE(adau1701_dapm_widgets),
639 .dapm_routes = adau1701_dapm_routes,
640 .num_dapm_routes = ARRAY_SIZE(adau1701_dapm_routes),
642 .set_sysclk = adau1701_set_sysclk,
645 static const struct regmap_config adau1701_regmap = {
648 .max_register = ADAU1701_MAX_REGISTER,
649 .cache_type = REGCACHE_RBTREE,
650 .volatile_reg = adau1701_volatile_reg,
651 .reg_write = adau1701_reg_write,
652 .reg_read = adau1701_reg_read,
655 static int adau1701_i2c_probe(struct i2c_client *client,
656 const struct i2c_device_id *id)
658 struct adau1701 *adau1701;
659 struct device *dev = &client->dev;
660 int gpio_nreset = -EINVAL;
661 int gpio_pll_mode[2] = { -EINVAL, -EINVAL };
664 adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL);
668 adau1701->regmap = devm_regmap_init(dev, NULL, client,
670 if (IS_ERR(adau1701->regmap))
671 return PTR_ERR(adau1701->regmap);
674 gpio_nreset = of_get_named_gpio(dev->of_node, "reset-gpio", 0);
675 if (gpio_nreset < 0 && gpio_nreset != -ENOENT)
678 gpio_pll_mode[0] = of_get_named_gpio(dev->of_node,
679 "adi,pll-mode-gpios", 0);
680 if (gpio_pll_mode[0] < 0 && gpio_pll_mode[0] != -ENOENT)
681 return gpio_pll_mode[0];
683 gpio_pll_mode[1] = of_get_named_gpio(dev->of_node,
684 "adi,pll-mode-gpios", 1);
685 if (gpio_pll_mode[1] < 0 && gpio_pll_mode[1] != -ENOENT)
686 return gpio_pll_mode[1];
688 of_property_read_u32(dev->of_node, "adi,pll-clkdiv",
689 &adau1701->pll_clkdiv);
691 of_property_read_u8_array(dev->of_node, "adi,pin-config",
692 adau1701->pin_config,
693 ARRAY_SIZE(adau1701->pin_config));
696 if (gpio_is_valid(gpio_nreset)) {
697 ret = devm_gpio_request_one(dev, gpio_nreset, GPIOF_OUT_INIT_LOW,
703 if (gpio_is_valid(gpio_pll_mode[0]) &&
704 gpio_is_valid(gpio_pll_mode[1])) {
705 ret = devm_gpio_request_one(dev, gpio_pll_mode[0],
707 "ADAU1701 PLL mode 0");
711 ret = devm_gpio_request_one(dev, gpio_pll_mode[1],
713 "ADAU1701 PLL mode 1");
718 adau1701->gpio_nreset = gpio_nreset;
719 adau1701->gpio_pll_mode[0] = gpio_pll_mode[0];
720 adau1701->gpio_pll_mode[1] = gpio_pll_mode[1];
722 i2c_set_clientdata(client, adau1701);
723 ret = snd_soc_register_codec(&client->dev, &adau1701_codec_drv,
728 static int adau1701_i2c_remove(struct i2c_client *client)
730 snd_soc_unregister_codec(&client->dev);
734 static const struct i2c_device_id adau1701_i2c_id[] = {
741 MODULE_DEVICE_TABLE(i2c, adau1701_i2c_id);
743 static struct i2c_driver adau1701_i2c_driver = {
746 .owner = THIS_MODULE,
747 .of_match_table = of_match_ptr(adau1701_dt_ids),
749 .probe = adau1701_i2c_probe,
750 .remove = adau1701_i2c_remove,
751 .id_table = adau1701_i2c_id,
754 module_i2c_driver(adau1701_i2c_driver);
756 MODULE_DESCRIPTION("ASoC ADAU1701 SigmaDSP driver");
757 MODULE_AUTHOR("Cliff Cai <cliff.cai@analog.com>");
758 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
759 MODULE_LICENSE("GPL");