1 /* sound/soc/at32/playpaq_wm8510.c
2 * ASoC machine driver for PlayPaq using WM8510 codec
4 * Copyright (C) 2008 Long Range Systems
5 * Geoffrey Wossum <gwossum@acm.org>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This code is largely inspired by sound/soc/at91/eti_b1_wm8731.c
13 * NOTE: If you don't have the AT32 enhanced portmux configured (which
14 * isn't currently in the mainline or Atmel patched kernel), you will
15 * need to set the MCLK pin (PA30) to peripheral A in your board initialization
16 * code. Something like:
17 * at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/version.h>
26 #include <linux/kernel.h>
27 #include <linux/errno.h>
28 #include <linux/clk.h>
29 #include <linux/timer.h>
30 #include <linux/interrupt.h>
31 #include <linux/platform_device.h>
33 #include <sound/core.h>
34 #include <sound/pcm.h>
35 #include <sound/pcm_params.h>
36 #include <sound/soc.h>
37 #include <sound/soc-dapm.h>
39 #include <asm/arch/at32ap700x.h>
40 #include <asm/arch/portmux.h>
42 #include "../codecs/wm8510.h"
47 /*-------------------------------------------------------------------------*\
49 \*-------------------------------------------------------------------------*/
50 #define MCLK_PIN GPIO_PIN_PA(30)
51 #define MCLK_PERIPH GPIO_PERIPH_A
54 /*-------------------------------------------------------------------------*\
56 \*-------------------------------------------------------------------------*/
57 /* SSC clocking data */
58 struct ssc_clock_data {
62 /* Frame period (as needed by xCMR.PERIOD) */
65 /* The SSC clock rate these settings where calculated for */
66 unsigned long ssc_rate;
70 /*-------------------------------------------------------------------------*\
72 \*-------------------------------------------------------------------------*/
73 static struct clk *_gclk0;
74 static struct clk *_pll0;
76 #define CODEC_CLK (_gclk0)
79 /*-------------------------------------------------------------------------*\
80 * Sound SOC operations
81 \*-------------------------------------------------------------------------*/
82 #if defined CONFIG_SND_AT32_SOC_PLAYPAQ_SLAVE
83 static struct ssc_clock_data playpaq_wm8510_calc_ssc_clock(
84 struct snd_pcm_hw_params *params,
85 struct snd_soc_dai *cpu_dai)
87 struct at32_ssc_info *ssc_p = cpu_dai->private_data;
88 struct ssc_device *ssc = ssc_p->ssc;
89 struct ssc_clock_data cd;
90 unsigned int rate, width_bits, channels;
91 unsigned int bitrate, ssc_div;
96 * Figure out required bitrate
98 rate = params_rate(params);
99 channels = params_channels(params);
100 width_bits = snd_pcm_format_physical_width(params_format(params));
101 bitrate = rate * width_bits * channels;
105 * Figure out required SSC divider and period for required bitrate
107 cd.ssc_rate = clk_get_rate(ssc->clk);
108 ssc_div = cd.ssc_rate / bitrate;
109 cd.cmr_div = ssc_div / 2;
111 /* round cmr_div up */
114 cd.period = width_bits - 1;
118 * Find actual rate, compare to requested rate
120 actual_rate = (cd.ssc_rate / (cd.cmr_div * 2)) / (2 * (cd.period + 1));
121 pr_debug("playpaq_wm8510: Request rate = %d, actual rate = %d\n",
127 #endif /* CONFIG_SND_AT32_SOC_PLAYPAQ_SLAVE */
131 static int playpaq_wm8510_hw_params(struct snd_pcm_substream *substream,
132 struct snd_pcm_hw_params *params)
134 struct snd_soc_pcm_runtime *rtd = substream->private_data;
135 struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
136 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
137 struct at32_ssc_info *ssc_p = cpu_dai->private_data;
138 struct ssc_device *ssc = ssc_p->ssc;
139 unsigned int pll_out = 0, bclk = 0, mclk_div = 0;
143 /* Due to difficulties with getting the correct clocks from the AT32's
144 * PLL0, we're going to let the CODEC be in charge of all the clocks
146 #if !defined CONFIG_SND_AT32_SOC_PLAYPAQ_SLAVE
147 const unsigned int fmt = (SND_SOC_DAIFMT_I2S |
148 SND_SOC_DAIFMT_NB_NF |
149 SND_SOC_DAIFMT_CBM_CFM);
151 struct ssc_clock_data cd;
152 const unsigned int fmt = (SND_SOC_DAIFMT_I2S |
153 SND_SOC_DAIFMT_NB_NF |
154 SND_SOC_DAIFMT_CBS_CFS);
158 pr_warning("playpaq_wm8510_hw_params: ssc is NULL!\n");
164 * Figure out PLL and BCLK dividers for WM8510
166 switch (params_rate(params)) {
169 mclk_div = WM8510_MCLKDIV_1;
170 bclk = WM8510_BCLKDIV_8;
175 mclk_div = WM8510_MCLKDIV_1;
176 bclk = WM8510_BCLKDIV_8;
181 mclk_div = WM8510_MCLKDIV_2;
182 bclk = WM8510_BCLKDIV_8;
187 mclk_div = WM8510_MCLKDIV_3;
188 bclk = WM8510_BCLKDIV_8;
193 mclk_div = WM8510_MCLKDIV_4;
194 bclk = WM8510_BCLKDIV_8;
199 mclk_div = WM8510_MCLKDIV_6;
200 bclk = WM8510_BCLKDIV_8;
204 pr_warning("playpaq_wm8510: Unsupported sample rate %d\n",
205 params_rate(params));
211 * set CPU and CODEC DAI configuration
213 ret = snd_soc_dai_set_fmt(codec_dai, fmt);
215 pr_warning("playpaq_wm8510: "
216 "Failed to set CODEC DAI format (%d)\n",
220 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
222 pr_warning("playpaq_wm8510: "
223 "Failed to set CPU DAI format (%d)\n",
230 * Set CPU clock configuration
232 #if defined CONFIG_SND_AT32_SOC_PLAYPAQ_SLAVE
233 cd = playpaq_wm8510_calc_ssc_clock(params, cpu_dai);
234 pr_debug("playpaq_wm8510: cmr_div = %d, period = %d\n",
235 cd.cmr_div, cd.period);
236 ret = snd_soc_dai_set_clkdiv(cpu_dai, AT32_SSC_CMR_DIV, cd.cmr_div);
238 pr_warning("playpaq_wm8510: Failed to set CPU CMR_DIV (%d)\n",
242 ret = snd_soc_dai_set_clkdiv(cpu_dai, AT32_SSC_TCMR_PERIOD,
245 pr_warning("playpaq_wm8510: "
246 "Failed to set CPU transmit period (%d)\n",
250 #endif /* CONFIG_SND_AT32_SOC_PLAYPAQ_SLAVE */
254 * Set CODEC clock configuration
256 pr_debug("playpaq_wm8510: "
257 "pll_in = %ld, pll_out = %u, bclk = %x, mclk = %x\n",
258 clk_get_rate(CODEC_CLK), pll_out, bclk, mclk_div);
261 #if !defined CONFIG_SND_AT32_SOC_PLAYPAQ_SLAVE
262 ret = snd_soc_dai_set_clkdiv(codec_dai, WM8510_BCLKDIV, bclk);
265 ("playpaq_wm8510: Failed to set CODEC DAI BCLKDIV (%d)\n",
269 #endif /* CONFIG_SND_AT32_SOC_PLAYPAQ_SLAVE */
272 ret = snd_soc_dai_set_pll(codec_dai, 0,
273 clk_get_rate(CODEC_CLK), pll_out);
275 pr_warning("playpaq_wm8510: Failed to set CODEC DAI PLL (%d)\n",
281 ret = snd_soc_dai_set_clkdiv(codec_dai, WM8510_MCLKDIV, mclk_div);
283 pr_warning("playpaq_wm8510: Failed to set CODEC MCLKDIV (%d)\n",
294 static struct snd_soc_ops playpaq_wm8510_ops = {
295 .hw_params = playpaq_wm8510_hw_params,
300 static const struct snd_soc_dapm_widget playpaq_dapm_widgets[] = {
301 SND_SOC_DAPM_MIC("Int Mic", NULL),
302 SND_SOC_DAPM_SPK("Ext Spk", NULL),
307 static const char *intercon[][3] = {
308 /* speaker connected to SPKOUT */
309 {"Ext Spk", NULL, "SPKOUTP"},
310 {"Ext Spk", NULL, "SPKOUTN"},
312 {"Mic Bias", NULL, "Int Mic"},
313 {"MICN", NULL, "Mic Bias"},
314 {"MICP", NULL, "Mic Bias"},
322 static int playpaq_wm8510_init(struct snd_soc_codec *codec)
329 for (i = 0; i < ARRAY_SIZE(playpaq_dapm_widgets); i++)
330 snd_soc_dapm_new_control(codec, &playpaq_dapm_widgets[i]);
335 * Setup audio path interconnects
337 for (i = 0; intercon[i][0] != NULL; i++) {
338 snd_soc_dapm_connect_input(codec,
340 intercon[i][1], intercon[i][2]);
344 /* always connected endpoints */
345 snd_soc_dapm_set_endpoint(codec, "Int Mic", 1);
346 snd_soc_dapm_set_endpoint(codec, "Ext Spk", 1);
347 snd_soc_dapm_sync_endpoints(codec);
351 /* Make CSB show PLL rate */
352 codec->dai->dai_ops.set_clkdiv(codec->dai, WM8510_OPCLKDIV,
353 WM8510_OPCLKDIV_1 | 4);
360 static struct snd_soc_dai_link playpaq_wm8510_dai = {
362 .stream_name = "WM8510 PCM",
363 .cpu_dai = &at32_ssc_dai[0],
364 .codec_dai = &wm8510_dai,
365 .init = playpaq_wm8510_init,
366 .ops = &playpaq_wm8510_ops,
371 static struct snd_soc_machine snd_soc_machine_playpaq = {
372 .name = "LRS_PlayPaq_WM8510",
373 .dai_link = &playpaq_wm8510_dai,
379 static struct wm8510_setup_data playpaq_wm8510_setup = {
385 static struct snd_soc_device playpaq_wm8510_snd_devdata = {
386 .machine = &snd_soc_machine_playpaq,
387 .platform = &at32_soc_platform,
388 .codec_dev = &soc_codec_dev_wm8510,
389 .codec_data = &playpaq_wm8510_setup,
392 static struct platform_device *playpaq_snd_device;
395 static int __init playpaq_asoc_init(void)
398 struct at32_ssc_info *ssc_p = playpaq_wm8510_dai.cpu_dai->private_data;
399 struct ssc_device *ssc = NULL;
405 ssc = ssc_request(0);
415 * Configure MCLK for WM8510
417 _gclk0 = clk_get(NULL, "gclk0");
418 if (IS_ERR(_gclk0)) {
422 _pll0 = clk_get(NULL, "pll0");
427 if (clk_set_parent(_gclk0, _pll0)) {
428 pr_warning("snd-soc-playpaq: "
429 "Failed to set PLL0 as parent for DAC clock\n");
432 clk_set_rate(CODEC_CLK, 12000000);
433 clk_enable(CODEC_CLK);
435 #if defined CONFIG_AT32_ENHANCED_PORTMUX
436 at32_select_periph(MCLK_PIN, MCLK_PERIPH, 0);
441 * Create and register platform device
443 playpaq_snd_device = platform_device_alloc("soc-audio", 0);
444 if (playpaq_snd_device == NULL) {
446 goto err_device_alloc;
449 platform_set_drvdata(playpaq_snd_device, &playpaq_wm8510_snd_devdata);
450 playpaq_wm8510_snd_devdata.dev = &playpaq_snd_device->dev;
452 ret = platform_device_add(playpaq_snd_device);
454 pr_warning("playpaq_wm8510: platform_device_add failed (%d)\n",
463 if (playpaq_snd_device != NULL) {
464 platform_device_put(playpaq_snd_device);
465 playpaq_snd_device = NULL;
474 if (_gclk0 != NULL) {
488 static void __exit playpaq_asoc_exit(void)
490 struct at32_ssc_info *ssc_p = playpaq_wm8510_dai.cpu_dai->private_data;
491 struct ssc_device *ssc;
500 if (_gclk0 != NULL) {
509 #if defined CONFIG_AT32_ENHANCED_PORTMUX
510 at32_free_pin(MCLK_PIN);
513 platform_device_unregister(playpaq_snd_device);
514 playpaq_snd_device = NULL;
517 module_init(playpaq_asoc_init);
518 module_exit(playpaq_asoc_exit);
520 MODULE_AUTHOR("Geoffrey Wossum <gwossum@acm.org>");
521 MODULE_DESCRIPTION("ASoC machine driver for LRS PlayPaq");
522 MODULE_LICENSE("GPL");