sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  10  *
  11  *  Authors:
  12  *                      Wu Fengguang <wfg@linux.intel.com>
  13  *
  14  *  Maintained by:
  15  *                      Wu Fengguang <wfg@linux.intel.com>
  16  *
  17  *  This program is free software; you can redistribute it and/or modify it
  18  *  under the terms of the GNU General Public License as published by the Free
  19  *  Software Foundation; either version 2 of the License, or (at your option)
  20  *  any later version.
  21  *
  22  *  This program is distributed in the hope that it will be useful, but
  23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  25  *  for more details.
  26  *
  27  *  You should have received a copy of the GNU General Public License
  28  *  along with this program; if not, write to the Free Software Foundation,
  29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  30  */
  31
  32 #include <linux/init.h>
  33 #include <linux/delay.h>
  34 #include <linux/slab.h>
  35 #include <linux/module.h>
  36 #include <sound/core.h>
  37 #include <sound/jack.h>
  38 #include <sound/asoundef.h>
  39 #include <sound/tlv.h>
  40 #include "hda_codec.h"
  41 #include "hda_local.h"
  42 #include "hda_jack.h"
  43
  44 static bool static_hdmi_pcm;
  45 module_param(static_hdmi_pcm, bool, 0644);
  46 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  47
  48 #define is_haswell(codec)  ((codec)->vendor_id == 0x80862807)
  49 #define is_broadwell(codec)    ((codec)->vendor_id == 0x80862808)
  50 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec))
  51
  52 #define is_valleyview(codec) ((codec)->vendor_id == 0x80862882)
  53
  54 struct hdmi_spec_per_cvt {
  55         hda_nid_t cvt_nid;
  56         int assigned;
  57         unsigned int channels_min;
  58         unsigned int channels_max;
  59         u32 rates;
  60         u64 formats;
  61         unsigned int maxbps;
  62 };
  63
  64 /* max. connections to a widget */
  65 #define HDA_MAX_CONNECTIONS     32
  66
  67 struct hdmi_spec_per_pin {
  68         hda_nid_t pin_nid;
  69         int num_mux_nids;
  70         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  71         hda_nid_t cvt_nid;
  72
  73         struct hda_codec *codec;
  74         struct hdmi_eld sink_eld;
  75         struct mutex lock;
  76         struct delayed_work work;
  77         struct snd_kcontrol *eld_ctl;
  78         int repoll_count;
  79         bool setup; /* the stream has been set up by prepare callback */
  80         int channels; /* current number of channels */
  81         bool non_pcm;
  82         bool chmap_set;         /* channel-map override by ALSA API? */
  83         unsigned char chmap[8]; /* ALSA API channel-map */
  84         char pcm_name[8];       /* filled in build_pcm callbacks */
  85 #ifdef CONFIG_PROC_FS
  86         struct snd_info_entry *proc_entry;
  87 #endif
  88 };
  89
  90 struct cea_channel_speaker_allocation;
  91
  92 /* operations used by generic code that can be overridden by patches */
  93 struct hdmi_ops {
  94         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
  95                            unsigned char *buf, int *eld_size);
  96
  97         /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
  98         int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
  99                                     int asp_slot);
 100         int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 101                                     int asp_slot, int channel);
 102
 103         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 104                                     int ca, int active_channels, int conn_type);
 105
 106         /* enable/disable HBR (HD passthrough) */
 107         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 108
 109         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 110                             hda_nid_t pin_nid, u32 stream_tag, int format);
 111
 112         /* Helpers for producing the channel map TLVs. These can be overridden
 113          * for devices that have non-standard mapping requirements. */
 114         int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
 115                                                  int channels);
 116         void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
 117                                        unsigned int *chmap, int channels);
 118
 119         /* check that the user-given chmap is supported */
 120         int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
 121 };
 122
 123 struct hdmi_spec {
 124         int num_cvts;
 125         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 126         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 127
 128         int num_pins;
 129         struct snd_array pins; /* struct hdmi_spec_per_pin */
 130         struct snd_array pcm_rec; /* struct hda_pcm */
 131         unsigned int channels_max; /* max over all cvts */
 132
 133         struct hdmi_eld temp_eld;
 134         struct hdmi_ops ops;
 135
 136         bool dyn_pin_out;
 137
 138         /*
 139          * Non-generic VIA/NVIDIA specific
 140          */
 141         struct hda_multi_out multiout;
 142         struct hda_pcm_stream pcm_playback;
 143 };
 144
 145
 146 struct hdmi_audio_infoframe {
 147         u8 type; /* 0x84 */
 148         u8 ver;  /* 0x01 */
 149         u8 len;  /* 0x0a */
 150
 151         u8 checksum;
 152
 153         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 154         u8 SS01_SF24;
 155         u8 CXT04;
 156         u8 CA;
 157         u8 LFEPBL01_LSV36_DM_INH7;
 158 };
 159
 160 struct dp_audio_infoframe {
 161         u8 type; /* 0x84 */
 162         u8 len;  /* 0x1b */
 163         u8 ver;  /* 0x11 << 2 */
 164
 165         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 166         u8 SS01_SF24;
 167         u8 CXT04;
 168         u8 CA;
 169         u8 LFEPBL01_LSV36_DM_INH7;
 170 };
 171
 172 union audio_infoframe {
 173         struct hdmi_audio_infoframe hdmi;
 174         struct dp_audio_infoframe dp;
 175         u8 bytes[0];
 176 };
 177
 178 /*
 179  * CEA speaker placement:
 180  *
 181  *        FLH       FCH        FRH
 182  *  FLW    FL  FLC   FC   FRC   FR   FRW
 183  *
 184  *                                  LFE
 185  *                     TC
 186  *
 187  *          RL  RLC   RC   RRC   RR
 188  *
 189  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 190  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 191  */
 192 enum cea_speaker_placement {
 193         FL  = (1 <<  0),        /* Front Left           */
 194         FC  = (1 <<  1),        /* Front Center         */
 195         FR  = (1 <<  2),        /* Front Right          */
 196         FLC = (1 <<  3),        /* Front Left Center    */
 197         FRC = (1 <<  4),        /* Front Right Center   */
 198         RL  = (1 <<  5),        /* Rear Left            */
 199         RC  = (1 <<  6),        /* Rear Center          */
 200         RR  = (1 <<  7),        /* Rear Right           */
 201         RLC = (1 <<  8),        /* Rear Left Center     */
 202         RRC = (1 <<  9),        /* Rear Right Center    */
 203         LFE = (1 << 10),        /* Low Frequency Effect */
 204         FLW = (1 << 11),        /* Front Left Wide      */
 205         FRW = (1 << 12),        /* Front Right Wide     */
 206         FLH = (1 << 13),        /* Front Left High      */
 207         FCH = (1 << 14),        /* Front Center High    */
 208         FRH = (1 << 15),        /* Front Right High     */
 209         TC  = (1 << 16),        /* Top Center           */
 210 };
 211
 212 /*
 213  * ELD SA bits in the CEA Speaker Allocation data block
 214  */
 215 static int eld_speaker_allocation_bits[] = {
 216         [0] = FL | FR,
 217         [1] = LFE,
 218         [2] = FC,
 219         [3] = RL | RR,
 220         [4] = RC,
 221         [5] = FLC | FRC,
 222         [6] = RLC | RRC,
 223         /* the following are not defined in ELD yet */
 224         [7] = FLW | FRW,
 225         [8] = FLH | FRH,
 226         [9] = TC,
 227         [10] = FCH,
 228 };
 229
 230 struct cea_channel_speaker_allocation {
 231         int ca_index;
 232         int speakers[8];
 233
 234         /* derived values, just for convenience */
 235         int channels;
 236         int spk_mask;
 237 };
 238
 239 /*
 240  * ALSA sequence is:
 241  *
 242  *       surround40   surround41   surround50   surround51   surround71
 243  * ch0   front left   =            =            =            =
 244  * ch1   front right  =            =            =            =
 245  * ch2   rear left    =            =            =            =
 246  * ch3   rear right   =            =            =            =
 247  * ch4                LFE          center       center       center
 248  * ch5                                          LFE          LFE
 249  * ch6                                                       side left
 250  * ch7                                                       side right
 251  *
 252  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 253  */
 254 static int hdmi_channel_mapping[0x32][8] = {
 255         /* stereo */
 256         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 257         /* 2.1 */
 258         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 259         /* Dolby Surround */
 260         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 261         /* surround40 */
 262         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 263         /* 4ch */
 264         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 265         /* surround41 */
 266         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 267         /* surround50 */
 268         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 269         /* surround51 */
 270         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 271         /* 7.1 */
 272         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 273 };
 274
 275 /*
 276  * This is an ordered list!
 277  *
 278  * The preceding ones have better chances to be selected by
 279  * hdmi_channel_allocation().
 280  */
 281 static struct cea_channel_speaker_allocation channel_allocations[] = {
 282 /*                        channel:   7     6    5    4    3     2    1    0  */
 283 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 284                                  /* 2.1 */
 285 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 286                                  /* Dolby Surround */
 287 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 288                                  /* surround40 */
 289 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 290                                  /* surround41 */
 291 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 292                                  /* surround50 */
 293 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 294                                  /* surround51 */
 295 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 296                                  /* 6.1 */
 297 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 298                                  /* surround71 */
 299 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 300
 301 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 302 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 303 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 304 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 305 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 306 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 307 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 308 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 309 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 310 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 311 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 312 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 313 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 314 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 315 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 316 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 317 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 318 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 319 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 320 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 321 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 322 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 323 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 324 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 325 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 326 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 327 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 328 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 329 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 330 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 331 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 332 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 333 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 334 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 335 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 336 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 337 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 338 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 339 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 340 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 341 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 342 };
 343
 344
 345 /*
 346  * HDMI routines
 347  */
 348
 349 #define get_pin(spec, idx) \
 350         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 351 #define get_cvt(spec, idx) \
 352         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 353 #define get_pcm_rec(spec, idx) \
 354         ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
 355
 356 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
 357 {
 358         int pin_idx;
 359
 360         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 361                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
 362                         return pin_idx;
 363
 364         snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
 365         return -EINVAL;
 366 }
 367
 368 static int hinfo_to_pin_index(struct hdmi_spec *spec,
 369                               struct hda_pcm_stream *hinfo)
 370 {
 371         int pin_idx;
 372
 373         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 374                 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
 375                         return pin_idx;
 376
 377         snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
 378         return -EINVAL;
 379 }
 380
 381 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
 382 {
 383         int cvt_idx;
 384
 385         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 386                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 387                         return cvt_idx;
 388
 389         snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
 390         return -EINVAL;
 391 }
 392
 393 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 394                         struct snd_ctl_elem_info *uinfo)
 395 {
 396         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 397         struct hdmi_spec *spec = codec->spec;
 398         struct hdmi_spec_per_pin *per_pin;
 399         struct hdmi_eld *eld;
 400         int pin_idx;
 401
 402         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 403
 404         pin_idx = kcontrol->private_value;
 405         per_pin = get_pin(spec, pin_idx);
 406         eld = &per_pin->sink_eld;
 407
 408         mutex_lock(&per_pin->lock);
 409         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 410         mutex_unlock(&per_pin->lock);
 411
 412         return 0;
 413 }
 414
 415 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 416                         struct snd_ctl_elem_value *ucontrol)
 417 {
 418         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 419         struct hdmi_spec *spec = codec->spec;
 420         struct hdmi_spec_per_pin *per_pin;
 421         struct hdmi_eld *eld;
 422         int pin_idx;
 423
 424         pin_idx = kcontrol->private_value;
 425         per_pin = get_pin(spec, pin_idx);
 426         eld = &per_pin->sink_eld;
 427
 428         mutex_lock(&per_pin->lock);
 429         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
 430                 mutex_unlock(&per_pin->lock);
 431                 snd_BUG();
 432                 return -EINVAL;
 433         }
 434
 435         memset(ucontrol->value.bytes.data, 0,
 436                ARRAY_SIZE(ucontrol->value.bytes.data));
 437         if (eld->eld_valid)
 438                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 439                        eld->eld_size);
 440         mutex_unlock(&per_pin->lock);
 441
 442         return 0;
 443 }
 444
 445 static struct snd_kcontrol_new eld_bytes_ctl = {
 446         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 447         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 448         .name = "ELD",
 449         .info = hdmi_eld_ctl_info,
 450         .get = hdmi_eld_ctl_get,
 451 };
 452
 453 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
 454                         int device)
 455 {
 456         struct snd_kcontrol *kctl;
 457         struct hdmi_spec *spec = codec->spec;
 458         int err;
 459
 460         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 461         if (!kctl)
 462                 return -ENOMEM;
 463         kctl->private_value = pin_idx;
 464         kctl->id.device = device;
 465
 466         err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
 467         if (err < 0)
 468                 return err;
 469
 470         get_pin(spec, pin_idx)->eld_ctl = kctl;
 471         return 0;
 472 }
 473
 474 #ifdef BE_PARANOID
 475 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 476                                 int *packet_index, int *byte_index)
 477 {
 478         int val;
 479
 480         val = snd_hda_codec_read(codec, pin_nid, 0,
 481                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 482
 483         *packet_index = val >> 5;
 484         *byte_index = val & 0x1f;
 485 }
 486 #endif
 487
 488 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 489                                 int packet_index, int byte_index)
 490 {
 491         int val;
 492
 493         val = (packet_index << 5) | (byte_index & 0x1f);
 494
 495         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 496 }
 497
 498 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 499                                 unsigned char val)
 500 {
 501         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 502 }
 503
 504 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 505 {
 506         struct hdmi_spec *spec = codec->spec;
 507         int pin_out;
 508
 509         /* Unmute */
 510         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 511                 snd_hda_codec_write(codec, pin_nid, 0,
 512                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 513
 514         if (spec->dyn_pin_out)
 515                 /* Disable pin out until stream is active */
 516                 pin_out = 0;
 517         else
 518                 /* Enable pin out: some machines with GM965 gets broken output
 519                  * when the pin is disabled or changed while using with HDMI
 520                  */
 521                 pin_out = PIN_OUT;
 522
 523         snd_hda_codec_write(codec, pin_nid, 0,
 524                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 525 }
 526
 527 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
 528 {
 529         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
 530                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 531 }
 532
 533 static void hdmi_set_channel_count(struct hda_codec *codec,
 534                                    hda_nid_t cvt_nid, int chs)
 535 {
 536         if (chs != hdmi_get_channel_count(codec, cvt_nid))
 537                 snd_hda_codec_write(codec, cvt_nid, 0,
 538                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 539 }
 540
 541 /*
 542  * ELD proc files
 543  */
 544
 545 #ifdef CONFIG_PROC_FS
 546 static void print_eld_info(struct snd_info_entry *entry,
 547                            struct snd_info_buffer *buffer)
 548 {
 549         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 550
 551         mutex_lock(&per_pin->lock);
 552         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 553         mutex_unlock(&per_pin->lock);
 554 }
 555
 556 static void write_eld_info(struct snd_info_entry *entry,
 557                            struct snd_info_buffer *buffer)
 558 {
 559         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 560
 561         mutex_lock(&per_pin->lock);
 562         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 563         mutex_unlock(&per_pin->lock);
 564 }
 565
 566 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 567 {
 568         char name[32];
 569         struct hda_codec *codec = per_pin->codec;
 570         struct snd_info_entry *entry;
 571         int err;
 572
 573         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 574         err = snd_card_proc_new(codec->bus->card, name, &entry);
 575         if (err < 0)
 576                 return err;
 577
 578         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 579         entry->c.text.write = write_eld_info;
 580         entry->mode |= S_IWUSR;
 581         per_pin->proc_entry = entry;
 582
 583         return 0;
 584 }
 585
 586 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 587 {
 588         if (!per_pin->codec->bus->shutdown && per_pin->proc_entry) {
 589                 snd_device_free(per_pin->codec->bus->card, per_pin->proc_entry);
 590                 per_pin->proc_entry = NULL;
 591         }
 592 }
 593 #else
 594 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 595                                int index)
 596 {
 597         return 0;
 598 }
 599 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 600 {
 601 }
 602 #endif
 603
 604 /*
 605  * Channel mapping routines
 606  */
 607
 608 /*
 609  * Compute derived values in channel_allocations[].
 610  */
 611 static void init_channel_allocations(void)
 612 {
 613         int i, j;
 614         struct cea_channel_speaker_allocation *p;
 615
 616         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 617                 p = channel_allocations + i;
 618                 p->channels = 0;
 619                 p->spk_mask = 0;
 620                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 621                         if (p->speakers[j]) {
 622                                 p->channels++;
 623                                 p->spk_mask |= p->speakers[j];
 624                         }
 625         }
 626 }
 627
 628 static int get_channel_allocation_order(int ca)
 629 {
 630         int i;
 631
 632         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 633                 if (channel_allocations[i].ca_index == ca)
 634                         break;
 635         }
 636         return i;
 637 }
 638
 639 /*
 640  * The transformation takes two steps:
 641  *
 642  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 643  *            spk_mask => (channel_allocations[])         => ai->CA
 644  *
 645  * TODO: it could select the wrong CA from multiple candidates.
 646 */
 647 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
 648 {
 649         int i;
 650         int ca = 0;
 651         int spk_mask = 0;
 652         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 653
 654         /*
 655          * CA defaults to 0 for basic stereo audio
 656          */
 657         if (channels <= 2)
 658                 return 0;
 659
 660         /*
 661          * expand ELD's speaker allocation mask
 662          *
 663          * ELD tells the speaker mask in a compact(paired) form,
 664          * expand ELD's notions to match the ones used by Audio InfoFrame.
 665          */
 666         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 667                 if (eld->info.spk_alloc & (1 << i))
 668                         spk_mask |= eld_speaker_allocation_bits[i];
 669         }
 670
 671         /* search for the first working match in the CA table */
 672         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 673                 if (channels == channel_allocations[i].channels &&
 674                     (spk_mask & channel_allocations[i].spk_mask) ==
 675                                 channel_allocations[i].spk_mask) {
 676                         ca = channel_allocations[i].ca_index;
 677                         break;
 678                 }
 679         }
 680
 681         if (!ca) {
 682                 /* if there was no match, select the regular ALSA channel
 683                  * allocation with the matching number of channels */
 684                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 685                         if (channels == channel_allocations[i].channels) {
 686                                 ca = channel_allocations[i].ca_index;
 687                                 break;
 688                         }
 689                 }
 690         }
 691
 692         snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
 693         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 694                     ca, channels, buf);
 695
 696         return ca;
 697 }
 698
 699 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 700                                        hda_nid_t pin_nid)
 701 {
 702 #ifdef CONFIG_SND_DEBUG_VERBOSE
 703         struct hdmi_spec *spec = codec->spec;
 704         int i;
 705         int channel;
 706
 707         for (i = 0; i < 8; i++) {
 708                 channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
 709                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
 710                                                 channel, i);
 711         }
 712 #endif
 713 }
 714
 715 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
 716                                        hda_nid_t pin_nid,
 717                                        bool non_pcm,
 718                                        int ca)
 719 {
 720         struct hdmi_spec *spec = codec->spec;
 721         struct cea_channel_speaker_allocation *ch_alloc;
 722         int i;
 723         int err;
 724         int order;
 725         int non_pcm_mapping[8];
 726
 727         order = get_channel_allocation_order(ca);
 728         ch_alloc = &channel_allocations[order];
 729
 730         if (hdmi_channel_mapping[ca][1] == 0) {
 731                 int hdmi_slot = 0;
 732                 /* fill actual channel mappings in ALSA channel (i) order */
 733                 for (i = 0; i < ch_alloc->channels; i++) {
 734                         while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
 735                                 hdmi_slot++; /* skip zero slots */
 736
 737                         hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
 738                 }
 739                 /* fill the rest of the slots with ALSA channel 0xf */
 740                 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
 741                         if (!ch_alloc->speakers[7 - hdmi_slot])
 742                                 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
 743         }
 744
 745         if (non_pcm) {
 746                 for (i = 0; i < ch_alloc->channels; i++)
 747                         non_pcm_mapping[i] = (i << 4) | i;
 748                 for (; i < 8; i++)
 749                         non_pcm_mapping[i] = (0xf << 4) | i;
 750         }
 751
 752         for (i = 0; i < 8; i++) {
 753                 int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
 754                 int hdmi_slot = slotsetup & 0x0f;
 755                 int channel = (slotsetup & 0xf0) >> 4;
 756                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
 757                 if (err) {
 758                         snd_printdd(KERN_NOTICE
 759                                     "HDMI: channel mapping failed\n");
 760                         break;
 761                 }
 762         }
 763 }
 764
 765 struct channel_map_table {
 766         unsigned char map;              /* ALSA API channel map position */
 767         int spk_mask;                   /* speaker position bit mask */
 768 };
 769
 770 static struct channel_map_table map_tables[] = {
 771         { SNDRV_CHMAP_FL,       FL },
 772         { SNDRV_CHMAP_FR,       FR },
 773         { SNDRV_CHMAP_RL,       RL },
 774         { SNDRV_CHMAP_RR,       RR },
 775         { SNDRV_CHMAP_LFE,      LFE },
 776         { SNDRV_CHMAP_FC,       FC },
 777         { SNDRV_CHMAP_RLC,      RLC },
 778         { SNDRV_CHMAP_RRC,      RRC },
 779         { SNDRV_CHMAP_RC,       RC },
 780         { SNDRV_CHMAP_FLC,      FLC },
 781         { SNDRV_CHMAP_FRC,      FRC },
 782         { SNDRV_CHMAP_TFL,      FLH },
 783         { SNDRV_CHMAP_TFR,      FRH },
 784         { SNDRV_CHMAP_FLW,      FLW },
 785         { SNDRV_CHMAP_FRW,      FRW },
 786         { SNDRV_CHMAP_TC,       TC },
 787         { SNDRV_CHMAP_TFC,      FCH },
 788         {} /* terminator */
 789 };
 790
 791 /* from ALSA API channel position to speaker bit mask */
 792 static int to_spk_mask(unsigned char c)
 793 {
 794         struct channel_map_table *t = map_tables;
 795         for (; t->map; t++) {
 796                 if (t->map == c)
 797                         return t->spk_mask;
 798         }
 799         return 0;
 800 }
 801
 802 /* from ALSA API channel position to CEA slot */
 803 static int to_cea_slot(int ordered_ca, unsigned char pos)
 804 {
 805         int mask = to_spk_mask(pos);
 806         int i;
 807
 808         if (mask) {
 809                 for (i = 0; i < 8; i++) {
 810                         if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
 811                                 return i;
 812                 }
 813         }
 814
 815         return -1;
 816 }
 817
 818 /* from speaker bit mask to ALSA API channel position */
 819 static int spk_to_chmap(int spk)
 820 {
 821         struct channel_map_table *t = map_tables;
 822         for (; t->map; t++) {
 823                 if (t->spk_mask == spk)
 824                         return t->map;
 825         }
 826         return 0;
 827 }
 828
 829 /* from CEA slot to ALSA API channel position */
 830 static int from_cea_slot(int ordered_ca, unsigned char slot)
 831 {
 832         int mask = channel_allocations[ordered_ca].speakers[7 - slot];
 833
 834         return spk_to_chmap(mask);
 835 }
 836
 837 /* get the CA index corresponding to the given ALSA API channel map */
 838 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
 839 {
 840         int i, spks = 0, spk_mask = 0;
 841
 842         for (i = 0; i < chs; i++) {
 843                 int mask = to_spk_mask(map[i]);
 844                 if (mask) {
 845                         spk_mask |= mask;
 846                         spks++;
 847                 }
 848         }
 849
 850         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 851                 if ((chs == channel_allocations[i].channels ||
 852                      spks == channel_allocations[i].channels) &&
 853                     (spk_mask & channel_allocations[i].spk_mask) ==
 854                                 channel_allocations[i].spk_mask)
 855                         return channel_allocations[i].ca_index;
 856         }
 857         return -1;
 858 }
 859
 860 /* set up the channel slots for the given ALSA API channel map */
 861 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
 862                                              hda_nid_t pin_nid,
 863                                              int chs, unsigned char *map,
 864                                              int ca)
 865 {
 866         struct hdmi_spec *spec = codec->spec;
 867         int ordered_ca = get_channel_allocation_order(ca);
 868         int alsa_pos, hdmi_slot;
 869         int assignments[8] = {[0 ... 7] = 0xf};
 870
 871         for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
 872
 873                 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
 874
 875                 if (hdmi_slot < 0)
 876                         continue; /* unassigned channel */
 877
 878                 assignments[hdmi_slot] = alsa_pos;
 879         }
 880
 881         for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
 882                 int err;
 883
 884                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
 885                                                      assignments[hdmi_slot]);
 886                 if (err)
 887                         return -EINVAL;
 888         }
 889         return 0;
 890 }
 891
 892 /* store ALSA API channel map from the current default map */
 893 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
 894 {
 895         int i;
 896         int ordered_ca = get_channel_allocation_order(ca);
 897         for (i = 0; i < 8; i++) {
 898                 if (i < channel_allocations[ordered_ca].channels)
 899                         map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
 900                 else
 901                         map[i] = 0;
 902         }
 903 }
 904
 905 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 906                                        hda_nid_t pin_nid, bool non_pcm, int ca,
 907                                        int channels, unsigned char *map,
 908                                        bool chmap_set)
 909 {
 910         if (!non_pcm && chmap_set) {
 911                 hdmi_manual_setup_channel_mapping(codec, pin_nid,
 912                                                   channels, map, ca);
 913         } else {
 914                 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
 915                 hdmi_setup_fake_chmap(map, ca);
 916         }
 917
 918         hdmi_debug_channel_mapping(codec, pin_nid);
 919 }
 920
 921 static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 922                                      int asp_slot, int channel)
 923 {
 924         return snd_hda_codec_write(codec, pin_nid, 0,
 925                                    AC_VERB_SET_HDMI_CHAN_SLOT,
 926                                    (channel << 4) | asp_slot);
 927 }
 928
 929 static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 930                                      int asp_slot)
 931 {
 932         return (snd_hda_codec_read(codec, pin_nid, 0,
 933                                    AC_VERB_GET_HDMI_CHAN_SLOT,
 934                                    asp_slot) & 0xf0) >> 4;
 935 }
 936
 937 /*
 938  * Audio InfoFrame routines
 939  */
 940
 941 /*
 942  * Enable Audio InfoFrame Transmission
 943  */
 944 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 945                                        hda_nid_t pin_nid)
 946 {
 947         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 948         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 949                                                 AC_DIPXMIT_BEST);
 950 }
 951
 952 /*
 953  * Disable Audio InfoFrame Transmission
 954  */
 955 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 956                                       hda_nid_t pin_nid)
 957 {
 958         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 959         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 960                                                 AC_DIPXMIT_DISABLE);
 961 }
 962
 963 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 964 {
 965 #ifdef CONFIG_SND_DEBUG_VERBOSE
 966         int i;
 967         int size;
 968
 969         size = snd_hdmi_get_eld_size(codec, pin_nid);
 970         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
 971
 972         for (i = 0; i < 8; i++) {
 973                 size = snd_hda_codec_read(codec, pin_nid, 0,
 974                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 975                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 976         }
 977 #endif
 978 }
 979
 980 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 981 {
 982 #ifdef BE_PARANOID
 983         int i, j;
 984         int size;
 985         int pi, bi;
 986         for (i = 0; i < 8; i++) {
 987                 size = snd_hda_codec_read(codec, pin_nid, 0,
 988                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 989                 if (size == 0)
 990                         continue;
 991
 992                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 993                 for (j = 1; j < 1000; j++) {
 994                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 995                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 996                         if (pi != i)
 997                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
 998                                                 bi, pi, i);
 999                         if (bi == 0) /* byte index wrapped around */
1000                                 break;
1001                 }
1002                 snd_printd(KERN_INFO
1003                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
1004                         i, size, j);
1005         }
1006 #endif
1007 }
1008
1009 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
1010 {
1011         u8 *bytes = (u8 *)hdmi_ai;
1012         u8 sum = 0;
1013         int i;
1014
1015         hdmi_ai->checksum = 0;
1016
1017         for (i = 0; i < sizeof(*hdmi_ai); i++)
1018                 sum += bytes[i];
1019
1020         hdmi_ai->checksum = -sum;
1021 }
1022
1023 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
1024                                       hda_nid_t pin_nid,
1025                                       u8 *dip, int size)
1026 {
1027         int i;
1028
1029         hdmi_debug_dip_size(codec, pin_nid);
1030         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
1031
1032         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1033         for (i = 0; i < size; i++)
1034                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
1035 }
1036
1037 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
1038                                     u8 *dip, int size)
1039 {
1040         u8 val;
1041         int i;
1042
1043         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
1044                                                             != AC_DIPXMIT_BEST)
1045                 return false;
1046
1047         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1048         for (i = 0; i < size; i++) {
1049                 val = snd_hda_codec_read(codec, pin_nid, 0,
1050                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
1051                 if (val != dip[i])
1052                         return false;
1053         }
1054
1055         return true;
1056 }
1057
1058 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
1059                                      hda_nid_t pin_nid,
1060                                      int ca, int active_channels,
1061                                      int conn_type)
1062 {
1063         union audio_infoframe ai;
1064
1065         memset(&ai, 0, sizeof(ai));
1066         if (conn_type == 0) { /* HDMI */
1067                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1068
1069                 hdmi_ai->type           = 0x84;
1070                 hdmi_ai->ver            = 0x01;
1071                 hdmi_ai->len            = 0x0a;
1072                 hdmi_ai->CC02_CT47      = active_channels - 1;
1073                 hdmi_ai->CA             = ca;
1074                 hdmi_checksum_audio_infoframe(hdmi_ai);
1075         } else if (conn_type == 1) { /* DisplayPort */
1076                 struct dp_audio_infoframe *dp_ai = &ai.dp;
1077
1078                 dp_ai->type             = 0x84;
1079                 dp_ai->len              = 0x1b;
1080                 dp_ai->ver              = 0x11 << 2;
1081                 dp_ai->CC02_CT47        = active_channels - 1;
1082                 dp_ai->CA               = ca;
1083         } else {
1084                 snd_printd("HDMI: unknown connection type at pin %d\n",
1085                             pin_nid);
1086                 return;
1087         }
1088
1089         /*
1090          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1091          * sizeof(*dp_ai) to avoid partial match/update problems when
1092          * the user switches between HDMI/DP monitors.
1093          */
1094         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1095                                         sizeof(ai))) {
1096                 snd_printdd("hdmi_pin_setup_infoframe: "
1097                             "pin=%d channels=%d ca=0x%02x\n",
1098                             pin_nid,
1099                             active_channels, ca);
1100                 hdmi_stop_infoframe_trans(codec, pin_nid);
1101                 hdmi_fill_audio_infoframe(codec, pin_nid,
1102                                             ai.bytes, sizeof(ai));
1103                 hdmi_start_infoframe_trans(codec, pin_nid);
1104         }
1105 }
1106
1107 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1108                                        struct hdmi_spec_per_pin *per_pin,
1109                                        bool non_pcm)
1110 {
1111         struct hdmi_spec *spec = codec->spec;
1112         hda_nid_t pin_nid = per_pin->pin_nid;
1113         int channels = per_pin->channels;
1114         int active_channels;
1115         struct hdmi_eld *eld;
1116         int ca, ordered_ca;
1117
1118         if (!channels)
1119                 return;
1120
1121         if (is_haswell_plus(codec))
1122                 snd_hda_codec_write(codec, pin_nid, 0,
1123                                             AC_VERB_SET_AMP_GAIN_MUTE,
1124                                             AMP_OUT_UNMUTE);
1125
1126         eld = &per_pin->sink_eld;
1127         if (!eld->monitor_present) {
1128                 hdmi_set_channel_count(codec, per_pin->cvt_nid, channels);
1129                 return;
1130         }
1131
1132         if (!non_pcm && per_pin->chmap_set)
1133                 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1134         else
1135                 ca = hdmi_channel_allocation(eld, channels);
1136         if (ca < 0)
1137                 ca = 0;
1138
1139         ordered_ca = get_channel_allocation_order(ca);
1140         active_channels = channel_allocations[ordered_ca].channels;
1141
1142         hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1143
1144         /*
1145          * always configure channel mapping, it may have been changed by the
1146          * user in the meantime
1147          */
1148         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1149                                    channels, per_pin->chmap,
1150                                    per_pin->chmap_set);
1151
1152         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
1153                                       eld->info.conn_type);
1154
1155         per_pin->non_pcm = non_pcm;
1156 }
1157
1158 /*
1159  * Unsolicited events
1160  */
1161
1162 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1163
1164 static void jack_callback(struct hda_codec *codec, struct hda_jack_tbl *jack)
1165 {
1166         struct hdmi_spec *spec = codec->spec;
1167         int pin_idx = pin_nid_to_pin_index(spec, jack->nid);
1168         if (pin_idx < 0)
1169                 return;
1170
1171         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
1172                 snd_hda_jack_report_sync(codec);
1173 }
1174
1175 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1176 {
1177         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1178         struct hda_jack_tbl *jack;
1179         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1180
1181         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1182         if (!jack)
1183                 return;
1184         jack->jack_dirty = 1;
1185
1186         _snd_printd(SND_PR_VERBOSE,
1187                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1188                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1189                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1190
1191         jack_callback(codec, jack);
1192 }
1193
1194 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1195 {
1196         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1197         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1198         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1199         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1200
1201         printk(KERN_INFO
1202                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1203                 codec->addr,
1204                 tag,
1205                 subtag,
1206                 cp_state,
1207                 cp_ready);
1208
1209         /* TODO */
1210         if (cp_state)
1211                 ;
1212         if (cp_ready)
1213                 ;
1214 }
1215
1216
1217 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1218 {
1219         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1220         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1221
1222         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1223                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
1224                 return;
1225         }
1226
1227         if (subtag == 0)
1228                 hdmi_intrinsic_event(codec, res);
1229         else
1230                 hdmi_non_intrinsic_event(codec, res);
1231 }
1232
1233 static void haswell_verify_D0(struct hda_codec *codec,
1234                 hda_nid_t cvt_nid, hda_nid_t nid)
1235 {
1236         int pwr;
1237
1238         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1239          * thus pins could only choose converter 0 for use. Make sure the
1240          * converters are in correct power state */
1241         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1242                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1243
1244         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1245                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1246                                     AC_PWRST_D0);
1247                 msleep(40);
1248                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1249                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1250                 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1251         }
1252 }
1253
1254 /*
1255  * Callbacks
1256  */
1257
1258 /* HBR should be Non-PCM, 8 channels */
1259 #define is_hbr_format(format) \
1260         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1261
1262 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
1263                               bool hbr)
1264 {
1265         int pinctl, new_pinctl;
1266
1267         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1268                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1269                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1270
1271                 if (pinctl < 0)
1272                         return hbr ? -EINVAL : 0;
1273
1274                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1275                 if (hbr)
1276                         new_pinctl |= AC_PINCTL_EPT_HBR;
1277                 else
1278                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
1279
1280                 snd_printdd("hdmi_pin_hbr_setup: "
1281                             "NID=0x%x, %spinctl=0x%x\n",
1282                             pin_nid,
1283                             pinctl == new_pinctl ? "" : "new-",
1284                             new_pinctl);
1285
1286                 if (pinctl != new_pinctl)
1287                         snd_hda_codec_write(codec, pin_nid, 0,
1288                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1289                                             new_pinctl);
1290         } else if (hbr)
1291                 return -EINVAL;
1292
1293         return 0;
1294 }
1295
1296 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1297                               hda_nid_t pin_nid, u32 stream_tag, int format)
1298 {
1299         struct hdmi_spec *spec = codec->spec;
1300         int err;
1301
1302         if (is_haswell_plus(codec))
1303                 haswell_verify_D0(codec, cvt_nid, pin_nid);
1304
1305         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
1306
1307         if (err) {
1308                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1309                 return err;
1310         }
1311
1312         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1313         return 0;
1314 }
1315
1316 static int hdmi_choose_cvt(struct hda_codec *codec,
1317                         int pin_idx, int *cvt_id, int *mux_id)
1318 {
1319         struct hdmi_spec *spec = codec->spec;
1320         struct hdmi_spec_per_pin *per_pin;
1321         struct hdmi_spec_per_cvt *per_cvt = NULL;
1322         int cvt_idx, mux_idx = 0;
1323
1324         per_pin = get_pin(spec, pin_idx);
1325
1326         /* Dynamically assign converter to stream */
1327         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1328                 per_cvt = get_cvt(spec, cvt_idx);
1329
1330                 /* Must not already be assigned */
1331                 if (per_cvt->assigned)
1332                         continue;
1333                 /* Must be in pin's mux's list of converters */
1334                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1335                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1336                                 break;
1337                 /* Not in mux list */
1338                 if (mux_idx == per_pin->num_mux_nids)
1339                         continue;
1340                 break;
1341         }
1342
1343         /* No free converters */
1344         if (cvt_idx == spec->num_cvts)
1345                 return -ENODEV;
1346
1347         if (cvt_id)
1348                 *cvt_id = cvt_idx;
1349         if (mux_id)
1350                 *mux_id = mux_idx;
1351
1352         return 0;
1353 }
1354
1355 /* Intel HDMI workaround to fix audio routing issue:
1356  * For some Intel display codecs, pins share the same connection list.
1357  * So a conveter can be selected by multiple pins and playback on any of these
1358  * pins will generate sound on the external display, because audio flows from
1359  * the same converter to the display pipeline. Also muting one pin may make
1360  * other pins have no sound output.
1361  * So this function assures that an assigned converter for a pin is not selected
1362  * by any other pins.
1363  */
1364 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1365                         hda_nid_t pin_nid, int mux_idx)
1366 {
1367         struct hdmi_spec *spec = codec->spec;
1368         hda_nid_t nid, end_nid;
1369         int cvt_idx, curr;
1370         struct hdmi_spec_per_cvt *per_cvt;
1371
1372         /* configure all pins, including "no physical connection" ones */
1373         end_nid = codec->start_nid + codec->num_nodes;
1374         for (nid = codec->start_nid; nid < end_nid; nid++) {
1375                 unsigned int wid_caps = get_wcaps(codec, nid);
1376                 unsigned int wid_type = get_wcaps_type(wid_caps);
1377
1378                 if (wid_type != AC_WID_PIN)
1379                         continue;
1380
1381                 if (nid == pin_nid)
1382                         continue;
1383
1384                 curr = snd_hda_codec_read(codec, nid, 0,
1385                                           AC_VERB_GET_CONNECT_SEL, 0);
1386                 if (curr != mux_idx)
1387                         continue;
1388
1389                 /* choose an unassigned converter. The conveters in the
1390                  * connection list are in the same order as in the codec.
1391                  */
1392                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1393                         per_cvt = get_cvt(spec, cvt_idx);
1394                         if (!per_cvt->assigned) {
1395                                 snd_printdd("choose cvt %d for pin nid %d\n",
1396                                         cvt_idx, nid);
1397                                 snd_hda_codec_write_cache(codec, nid, 0,
1398                                             AC_VERB_SET_CONNECT_SEL,
1399                                             cvt_idx);
1400                                 break;
1401                         }
1402                 }
1403         }
1404 }
1405
1406 /*
1407  * HDA PCM callbacks
1408  */
1409 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1410                          struct hda_codec *codec,
1411                          struct snd_pcm_substream *substream)
1412 {
1413         struct hdmi_spec *spec = codec->spec;
1414         struct snd_pcm_runtime *runtime = substream->runtime;
1415         int pin_idx, cvt_idx, mux_idx = 0;
1416         struct hdmi_spec_per_pin *per_pin;
1417         struct hdmi_eld *eld;
1418         struct hdmi_spec_per_cvt *per_cvt = NULL;
1419         int err;
1420
1421         /* Validate hinfo */
1422         pin_idx = hinfo_to_pin_index(spec, hinfo);
1423         if (snd_BUG_ON(pin_idx < 0))
1424                 return -EINVAL;
1425         per_pin = get_pin(spec, pin_idx);
1426         eld = &per_pin->sink_eld;
1427
1428         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1429         if (err < 0)
1430                 return err;
1431
1432         per_cvt = get_cvt(spec, cvt_idx);
1433         /* Claim converter */
1434         per_cvt->assigned = 1;
1435         per_pin->cvt_nid = per_cvt->cvt_nid;
1436         hinfo->nid = per_cvt->cvt_nid;
1437
1438         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1439                             AC_VERB_SET_CONNECT_SEL,
1440                             mux_idx);
1441
1442         /* configure unused pins to choose other converters */
1443         if (is_haswell_plus(codec) || is_valleyview(codec))
1444                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1445
1446         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1447
1448         /* Initially set the converter's capabilities */
1449         hinfo->channels_min = per_cvt->channels_min;
1450         hinfo->channels_max = per_cvt->channels_max;
1451         hinfo->rates = per_cvt->rates;
1452         hinfo->formats = per_cvt->formats;
1453         hinfo->maxbps = per_cvt->maxbps;
1454
1455         /* Restrict capabilities by ELD if this isn't disabled */
1456         if (!static_hdmi_pcm && eld->eld_valid) {
1457                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1458                 if (hinfo->channels_min > hinfo->channels_max ||
1459                     !hinfo->rates || !hinfo->formats) {
1460                         per_cvt->assigned = 0;
1461                         hinfo->nid = 0;
1462                         snd_hda_spdif_ctls_unassign(codec, pin_idx);
1463                         return -ENODEV;
1464                 }
1465         }
1466
1467         /* Store the updated parameters */
1468         runtime->hw.channels_min = hinfo->channels_min;
1469         runtime->hw.channels_max = hinfo->channels_max;
1470         runtime->hw.formats = hinfo->formats;
1471         runtime->hw.rates = hinfo->rates;
1472
1473         snd_pcm_hw_constraint_step(substream->runtime, 0,
1474                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1475         return 0;
1476 }
1477
1478 /*
1479  * HDA/HDMI auto parsing
1480  */
1481 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1482 {
1483         struct hdmi_spec *spec = codec->spec;
1484         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1485         hda_nid_t pin_nid = per_pin->pin_nid;
1486
1487         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1488                 snd_printk(KERN_WARNING
1489                            "HDMI: pin %d wcaps %#x "
1490                            "does not support connection list\n",
1491                            pin_nid, get_wcaps(codec, pin_nid));
1492                 return -EINVAL;
1493         }
1494
1495         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1496                                                         per_pin->mux_nids,
1497                                                         HDA_MAX_CONNECTIONS);
1498
1499         return 0;
1500 }
1501
1502 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1503 {
1504         struct hda_jack_tbl *jack;
1505         struct hda_codec *codec = per_pin->codec;
1506         struct hdmi_spec *spec = codec->spec;
1507         struct hdmi_eld *eld = &spec->temp_eld;
1508         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1509         hda_nid_t pin_nid = per_pin->pin_nid;
1510         /*
1511          * Always execute a GetPinSense verb here, even when called from
1512          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1513          * response's PD bit is not the real PD value, but indicates that
1514          * the real PD value changed. An older version of the HD-audio
1515          * specification worked this way. Hence, we just ignore the data in
1516          * the unsolicited response to avoid custom WARs.
1517          */
1518         int present;
1519         bool update_eld = false;
1520         bool eld_changed = false;
1521         bool ret;
1522
1523         snd_hda_power_up(codec);
1524         present = snd_hda_pin_sense(codec, pin_nid);
1525
1526         mutex_lock(&per_pin->lock);
1527         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1528         if (pin_eld->monitor_present)
1529                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1530         else
1531                 eld->eld_valid = false;
1532
1533         _snd_printd(SND_PR_VERBOSE,
1534                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1535                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1536
1537         if (eld->eld_valid) {
1538                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1539                                                      &eld->eld_size) < 0)
1540                         eld->eld_valid = false;
1541                 else {
1542                         memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1543                         if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1544                                                     eld->eld_size) < 0)
1545                                 eld->eld_valid = false;
1546                 }
1547
1548                 if (eld->eld_valid) {
1549                         snd_hdmi_show_eld(&eld->info);
1550                         update_eld = true;
1551                 }
1552                 else if (repoll) {
1553                         queue_delayed_work(codec->bus->workq,
1554                                            &per_pin->work,
1555                                            msecs_to_jiffies(300));
1556                         goto unlock;
1557                 }
1558         }
1559
1560         if (pin_eld->eld_valid != eld->eld_valid)
1561                 eld_changed = true;
1562
1563         if (pin_eld->eld_valid && !eld->eld_valid)
1564                 update_eld = true;
1565
1566         if (update_eld) {
1567                 bool old_eld_valid = pin_eld->eld_valid;
1568                 pin_eld->eld_valid = eld->eld_valid;
1569                 if (pin_eld->eld_size != eld->eld_size ||
1570                               memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1571                                      eld->eld_size) != 0) {
1572                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1573                                eld->eld_size);
1574                         eld_changed = true;
1575                 }
1576                 pin_eld->eld_size = eld->eld_size;
1577                 pin_eld->info = eld->info;
1578
1579                 /*
1580                  * Re-setup pin and infoframe. This is needed e.g. when
1581                  * - sink is first plugged-in (infoframe is not set up if !monitor_present)
1582                  * - transcoder can change during stream playback on Haswell
1583                  */
1584                 if (eld->eld_valid && !old_eld_valid && per_pin->setup)
1585                         hdmi_setup_audio_infoframe(codec, per_pin,
1586                                                    per_pin->non_pcm);
1587         }
1588
1589         if (eld_changed)
1590                 snd_ctl_notify(codec->bus->card,
1591                                SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1592                                &per_pin->eld_ctl->id);
1593  unlock:
1594         ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1595
1596         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1597         if (jack)
1598                 jack->block_report = !ret;
1599
1600         mutex_unlock(&per_pin->lock);
1601         snd_hda_power_down(codec);
1602         return ret;
1603 }
1604
1605 static void hdmi_repoll_eld(struct work_struct *work)
1606 {
1607         struct hdmi_spec_per_pin *per_pin =
1608         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1609
1610         if (per_pin->repoll_count++ > 6)
1611                 per_pin->repoll_count = 0;
1612
1613         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1614                 snd_hda_jack_report_sync(per_pin->codec);
1615 }
1616
1617 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1618                                              hda_nid_t nid);
1619
1620 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1621 {
1622         struct hdmi_spec *spec = codec->spec;
1623         unsigned int caps, config;
1624         int pin_idx;
1625         struct hdmi_spec_per_pin *per_pin;
1626         int err;
1627
1628         caps = snd_hda_query_pin_caps(codec, pin_nid);
1629         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1630                 return 0;
1631
1632         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1633         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1634                 return 0;
1635
1636         if (is_haswell_plus(codec))
1637                 intel_haswell_fixup_connect_list(codec, pin_nid);
1638
1639         pin_idx = spec->num_pins;
1640         per_pin = snd_array_new(&spec->pins);
1641         if (!per_pin)
1642                 return -ENOMEM;
1643
1644         per_pin->pin_nid = pin_nid;
1645         per_pin->non_pcm = false;
1646
1647         err = hdmi_read_pin_conn(codec, pin_idx);
1648         if (err < 0)
1649                 return err;
1650
1651         spec->num_pins++;
1652
1653         return 0;
1654 }
1655
1656 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1657 {
1658         struct hdmi_spec *spec = codec->spec;
1659         struct hdmi_spec_per_cvt *per_cvt;
1660         unsigned int chans;
1661         int err;
1662
1663         chans = get_wcaps(codec, cvt_nid);
1664         chans = get_wcaps_channels(chans);
1665
1666         per_cvt = snd_array_new(&spec->cvts);
1667         if (!per_cvt)
1668                 return -ENOMEM;
1669
1670         per_cvt->cvt_nid = cvt_nid;
1671         per_cvt->channels_min = 2;
1672         if (chans <= 16) {
1673                 per_cvt->channels_max = chans;
1674                 if (chans > spec->channels_max)
1675                         spec->channels_max = chans;
1676         }
1677
1678         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1679                                           &per_cvt->rates,
1680                                           &per_cvt->formats,
1681                                           &per_cvt->maxbps);
1682         if (err < 0)
1683                 return err;
1684
1685         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1686                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1687         spec->num_cvts++;
1688
1689         return 0;
1690 }
1691
1692 static int hdmi_parse_codec(struct hda_codec *codec)
1693 {
1694         hda_nid_t nid;
1695         int i, nodes;
1696
1697         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1698         if (!nid || nodes < 0) {
1699                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1700                 return -EINVAL;
1701         }
1702
1703         for (i = 0; i < nodes; i++, nid++) {
1704                 unsigned int caps;
1705                 unsigned int type;
1706
1707                 caps = get_wcaps(codec, nid);
1708                 type = get_wcaps_type(caps);
1709
1710                 if (!(caps & AC_WCAP_DIGITAL))
1711                         continue;
1712
1713                 switch (type) {
1714                 case AC_WID_AUD_OUT:
1715                         hdmi_add_cvt(codec, nid);
1716                         break;
1717                 case AC_WID_PIN:
1718                         hdmi_add_pin(codec, nid);
1719                         break;
1720                 }
1721         }
1722
1723         return 0;
1724 }
1725
1726 /*
1727  */
1728 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1729 {
1730         struct hda_spdif_out *spdif;
1731         bool non_pcm;
1732
1733         mutex_lock(&codec->spdif_mutex);
1734         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1735         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1736         mutex_unlock(&codec->spdif_mutex);
1737         return non_pcm;
1738 }
1739
1740
1741 /*
1742  * HDMI callbacks
1743  */
1744
1745 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1746                                            struct hda_codec *codec,
1747                                            unsigned int stream_tag,
1748                                            unsigned int format,
1749                                            struct snd_pcm_substream *substream)
1750 {
1751         hda_nid_t cvt_nid = hinfo->nid;
1752         struct hdmi_spec *spec = codec->spec;
1753         int pin_idx = hinfo_to_pin_index(spec, hinfo);
1754         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1755         hda_nid_t pin_nid = per_pin->pin_nid;
1756         bool non_pcm;
1757         int pinctl;
1758
1759         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1760         mutex_lock(&per_pin->lock);
1761         per_pin->channels = substream->runtime->channels;
1762         per_pin->setup = true;
1763
1764         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1765         mutex_unlock(&per_pin->lock);
1766
1767         if (spec->dyn_pin_out) {
1768                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1769                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1770                 snd_hda_codec_write(codec, pin_nid, 0,
1771                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1772                                     pinctl | PIN_OUT);
1773         }
1774
1775         return spec->ops.setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1776 }
1777
1778 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1779                                              struct hda_codec *codec,
1780                                              struct snd_pcm_substream *substream)
1781 {
1782         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1783         return 0;
1784 }
1785
1786 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1787                           struct hda_codec *codec,
1788                           struct snd_pcm_substream *substream)
1789 {
1790         struct hdmi_spec *spec = codec->spec;
1791         int cvt_idx, pin_idx;
1792         struct hdmi_spec_per_cvt *per_cvt;
1793         struct hdmi_spec_per_pin *per_pin;
1794         int pinctl;
1795
1796         if (hinfo->nid) {
1797                 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1798                 if (snd_BUG_ON(cvt_idx < 0))
1799                         return -EINVAL;
1800                 per_cvt = get_cvt(spec, cvt_idx);
1801
1802                 snd_BUG_ON(!per_cvt->assigned);
1803                 per_cvt->assigned = 0;
1804                 hinfo->nid = 0;
1805
1806                 pin_idx = hinfo_to_pin_index(spec, hinfo);
1807                 if (snd_BUG_ON(pin_idx < 0))
1808                         return -EINVAL;
1809                 per_pin = get_pin(spec, pin_idx);
1810
1811                 if (spec->dyn_pin_out) {
1812                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1813                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1814                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1815                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1816                                             pinctl & ~PIN_OUT);
1817                 }
1818
1819                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1820
1821                 mutex_lock(&per_pin->lock);
1822                 per_pin->chmap_set = false;
1823                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1824
1825                 per_pin->setup = false;
1826                 per_pin->channels = 0;
1827                 mutex_unlock(&per_pin->lock);
1828         }
1829
1830         return 0;
1831 }
1832
1833 static const struct hda_pcm_ops generic_ops = {
1834         .open = hdmi_pcm_open,
1835         .close = hdmi_pcm_close,
1836         .prepare = generic_hdmi_playback_pcm_prepare,
1837         .cleanup = generic_hdmi_playback_pcm_cleanup,
1838 };
1839
1840 /*
1841  * ALSA API channel-map control callbacks
1842  */
1843 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1844                                struct snd_ctl_elem_info *uinfo)
1845 {
1846         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1847         struct hda_codec *codec = info->private_data;
1848         struct hdmi_spec *spec = codec->spec;
1849         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1850         uinfo->count = spec->channels_max;
1851         uinfo->value.integer.min = 0;
1852         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1853         return 0;
1854 }
1855
1856 static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
1857                                                   int channels)
1858 {
1859         /* If the speaker allocation matches the channel count, it is OK.*/
1860         if (cap->channels != channels)
1861                 return -1;
1862
1863         /* all channels are remappable freely */
1864         return SNDRV_CTL_TLVT_CHMAP_VAR;
1865 }
1866
1867 static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
1868                                         unsigned int *chmap, int channels)
1869 {
1870         int count = 0;
1871         int c;
1872
1873         for (c = 7; c >= 0; c--) {
1874                 int spk = cap->speakers[c];
1875                 if (!spk)
1876                         continue;
1877
1878                 chmap[count++] = spk_to_chmap(spk);
1879         }
1880
1881         WARN_ON(count != channels);
1882 }
1883
1884 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1885                               unsigned int size, unsigned int __user *tlv)
1886 {
1887         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1888         struct hda_codec *codec = info->private_data;
1889         struct hdmi_spec *spec = codec->spec;
1890         unsigned int __user *dst;
1891         int chs, count = 0;
1892
1893         if (size < 8)
1894                 return -ENOMEM;
1895         if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1896                 return -EFAULT;
1897         size -= 8;
1898         dst = tlv + 2;
1899         for (chs = 2; chs <= spec->channels_max; chs++) {
1900                 int i;
1901                 struct cea_channel_speaker_allocation *cap;
1902                 cap = channel_allocations;
1903                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1904                         int chs_bytes = chs * 4;
1905                         int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
1906                         unsigned int tlv_chmap[8];
1907
1908                         if (type < 0)
1909                                 continue;
1910                         if (size < 8)
1911                                 return -ENOMEM;
1912                         if (put_user(type, dst) ||
1913                             put_user(chs_bytes, dst + 1))
1914                                 return -EFAULT;
1915                         dst += 2;
1916                         size -= 8;
1917                         count += 8;
1918                         if (size < chs_bytes)
1919                                 return -ENOMEM;
1920                         size -= chs_bytes;
1921                         count += chs_bytes;
1922                         spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
1923                         if (copy_to_user(dst, tlv_chmap, chs_bytes))
1924                                 return -EFAULT;
1925                         dst += chs;
1926                 }
1927         }
1928         if (put_user(count, tlv + 1))
1929                 return -EFAULT;
1930         return 0;
1931 }
1932
1933 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1934                               struct snd_ctl_elem_value *ucontrol)
1935 {
1936         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1937         struct hda_codec *codec = info->private_data;
1938         struct hdmi_spec *spec = codec->spec;
1939         int pin_idx = kcontrol->private_value;
1940         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1941         int i;
1942
1943         for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1944                 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1945         return 0;
1946 }
1947
1948 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1949                               struct snd_ctl_elem_value *ucontrol)
1950 {
1951         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1952         struct hda_codec *codec = info->private_data;
1953         struct hdmi_spec *spec = codec->spec;
1954         int pin_idx = kcontrol->private_value;
1955         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1956         unsigned int ctl_idx;
1957         struct snd_pcm_substream *substream;
1958         unsigned char chmap[8];
1959         int i, err, ca, prepared = 0;
1960
1961         ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1962         substream = snd_pcm_chmap_substream(info, ctl_idx);
1963         if (!substream || !substream->runtime)
1964                 return 0; /* just for avoiding error from alsactl restore */
1965         switch (substream->runtime->status->state) {
1966         case SNDRV_PCM_STATE_OPEN:
1967         case SNDRV_PCM_STATE_SETUP:
1968                 break;
1969         case SNDRV_PCM_STATE_PREPARED:
1970                 prepared = 1;
1971                 break;
1972         default:
1973                 return -EBUSY;
1974         }
1975         memset(chmap, 0, sizeof(chmap));
1976         for (i = 0; i < ARRAY_SIZE(chmap); i++)
1977                 chmap[i] = ucontrol->value.integer.value[i];
1978         if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1979                 return 0;
1980         ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1981         if (ca < 0)
1982                 return -EINVAL;
1983         if (spec->ops.chmap_validate) {
1984                 err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
1985                 if (err)
1986                         return err;
1987         }
1988         mutex_lock(&per_pin->lock);
1989         per_pin->chmap_set = true;
1990         memcpy(per_pin->chmap, chmap, sizeof(chmap));
1991         if (prepared)
1992                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1993         mutex_unlock(&per_pin->lock);
1994
1995         return 0;
1996 }
1997
1998 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1999 {
2000         struct hdmi_spec *spec = codec->spec;
2001         int pin_idx;
2002
2003         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2004                 struct hda_pcm *info;
2005                 struct hda_pcm_stream *pstr;
2006                 struct hdmi_spec_per_pin *per_pin;
2007
2008                 per_pin = get_pin(spec, pin_idx);
2009                 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
2010                 info = snd_array_new(&spec->pcm_rec);
2011                 if (!info)
2012                         return -ENOMEM;
2013                 info->name = per_pin->pcm_name;
2014                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2015                 info->own_chmap = true;
2016
2017                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2018                 pstr->substreams = 1;
2019                 pstr->ops = generic_ops;
2020                 /* other pstr fields are set in open */
2021         }
2022
2023         codec->num_pcms = spec->num_pins;
2024         codec->pcm_info = spec->pcm_rec.list;
2025
2026         return 0;
2027 }
2028
2029 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
2030 {
2031         char hdmi_str[32] = "HDMI/DP";
2032         struct hdmi_spec *spec = codec->spec;
2033         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2034         int pcmdev = get_pcm_rec(spec, pin_idx)->device;
2035
2036         if (pcmdev > 0)
2037                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2038         if (!is_jack_detectable(codec, per_pin->pin_nid))
2039                 strncat(hdmi_str, " Phantom",
2040                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2041
2042         return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
2043 }
2044
2045 static int generic_hdmi_build_controls(struct hda_codec *codec)
2046 {
2047         struct hdmi_spec *spec = codec->spec;
2048         int err;
2049         int pin_idx;
2050
2051         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2052                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2053
2054                 err = generic_hdmi_build_jack(codec, pin_idx);
2055                 if (err < 0)
2056                         return err;
2057
2058                 err = snd_hda_create_dig_out_ctls(codec,
2059                                                   per_pin->pin_nid,
2060                                                   per_pin->mux_nids[0],
2061                                                   HDA_PCM_TYPE_HDMI);
2062                 if (err < 0)
2063                         return err;
2064                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
2065
2066                 /* add control for ELD Bytes */
2067                 err = hdmi_create_eld_ctl(codec, pin_idx,
2068                                           get_pcm_rec(spec, pin_idx)->device);
2069
2070                 if (err < 0)
2071                         return err;
2072
2073                 hdmi_present_sense(per_pin, 0);
2074         }
2075
2076         /* add channel maps */
2077         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2078                 struct snd_pcm_chmap *chmap;
2079                 struct snd_kcontrol *kctl;
2080                 int i;
2081
2082                 if (!codec->pcm_info[pin_idx].pcm)
2083                         break;
2084                 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
2085                                              SNDRV_PCM_STREAM_PLAYBACK,
2086                                              NULL, 0, pin_idx, &chmap);
2087                 if (err < 0)
2088                         return err;
2089                 /* override handlers */
2090                 chmap->private_data = codec;
2091                 kctl = chmap->kctl;
2092                 for (i = 0; i < kctl->count; i++)
2093                         kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
2094                 kctl->info = hdmi_chmap_ctl_info;
2095                 kctl->get = hdmi_chmap_ctl_get;
2096                 kctl->put = hdmi_chmap_ctl_put;
2097                 kctl->tlv.c = hdmi_chmap_ctl_tlv;
2098         }
2099
2100         return 0;
2101 }
2102
2103 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2104 {
2105         struct hdmi_spec *spec = codec->spec;
2106         int pin_idx;
2107
2108         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2109                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2110
2111                 per_pin->codec = codec;
2112                 mutex_init(&per_pin->lock);
2113                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2114                 eld_proc_new(per_pin, pin_idx);
2115         }
2116         return 0;
2117 }
2118
2119 static int generic_hdmi_init(struct hda_codec *codec)
2120 {
2121         struct hdmi_spec *spec = codec->spec;
2122         int pin_idx;
2123
2124         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2125                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2126                 hda_nid_t pin_nid = per_pin->pin_nid;
2127
2128                 hdmi_init_pin(codec, pin_nid);
2129                 snd_hda_jack_detect_enable_callback(codec, pin_nid, pin_nid,
2130                         codec->jackpoll_interval > 0 ? jack_callback : NULL);
2131         }
2132         return 0;
2133 }
2134
2135 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2136 {
2137         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2138         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2139         snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
2140 }
2141
2142 static void hdmi_array_free(struct hdmi_spec *spec)
2143 {
2144         snd_array_free(&spec->pins);
2145         snd_array_free(&spec->cvts);
2146         snd_array_free(&spec->pcm_rec);
2147 }
2148
2149 static void generic_hdmi_free(struct hda_codec *codec)
2150 {
2151         struct hdmi_spec *spec = codec->spec;
2152         int pin_idx;
2153
2154         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2155                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2156
2157                 cancel_delayed_work(&per_pin->work);
2158                 eld_proc_free(per_pin);
2159         }
2160
2161         flush_workqueue(codec->bus->workq);
2162         hdmi_array_free(spec);
2163         kfree(spec);
2164 }
2165
2166 #ifdef CONFIG_PM
2167 static int generic_hdmi_resume(struct hda_codec *codec)
2168 {
2169         struct hdmi_spec *spec = codec->spec;
2170         int pin_idx;
2171
2172         codec->patch_ops.init(codec);
2173         snd_hda_codec_resume_amp(codec);
2174         snd_hda_codec_resume_cache(codec);
2175
2176         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2177                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2178                 hdmi_present_sense(per_pin, 1);
2179         }
2180         return 0;
2181 }
2182 #endif
2183
2184 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2185         .init                   = generic_hdmi_init,
2186         .free                   = generic_hdmi_free,
2187         .build_pcms             = generic_hdmi_build_pcms,
2188         .build_controls         = generic_hdmi_build_controls,
2189         .unsol_event            = hdmi_unsol_event,
2190 #ifdef CONFIG_PM
2191         .resume                 = generic_hdmi_resume,
2192 #endif
2193 };
2194
2195 static const struct hdmi_ops generic_standard_hdmi_ops = {
2196         .pin_get_eld                            = snd_hdmi_get_eld,
2197         .pin_get_slot_channel                   = hdmi_pin_get_slot_channel,
2198         .pin_set_slot_channel                   = hdmi_pin_set_slot_channel,
2199         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2200         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2201         .setup_stream                           = hdmi_setup_stream,
2202         .chmap_cea_alloc_validate_get_type      = hdmi_chmap_cea_alloc_validate_get_type,
2203         .cea_alloc_to_tlv_chmap                 = hdmi_cea_alloc_to_tlv_chmap,
2204 };
2205
2206
2207 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2208                                              hda_nid_t nid)
2209 {
2210         struct hdmi_spec *spec = codec->spec;
2211         hda_nid_t conns[4];
2212         int nconns;
2213
2214         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2215         if (nconns == spec->num_cvts &&
2216             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2217                 return;
2218
2219         /* override pins connection list */
2220         snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
2221         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2222 }
2223
2224 #define INTEL_VENDOR_NID 0x08
2225 #define INTEL_GET_VENDOR_VERB 0xf81
2226 #define INTEL_SET_VENDOR_VERB 0x781
2227 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2228 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2229
2230 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2231                                           bool update_tree)
2232 {
2233         unsigned int vendor_param;
2234
2235         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2236                                 INTEL_GET_VENDOR_VERB, 0);
2237         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2238                 return;
2239
2240         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2241         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2242                                 INTEL_SET_VENDOR_VERB, vendor_param);
2243         if (vendor_param == -1)
2244                 return;
2245
2246         if (update_tree)
2247                 snd_hda_codec_update_widgets(codec);
2248 }
2249
2250 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2251 {
2252         unsigned int vendor_param;
2253
2254         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2255                                 INTEL_GET_VENDOR_VERB, 0);
2256         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2257                 return;
2258
2259         /* enable DP1.2 mode */
2260         vendor_param |= INTEL_EN_DP12;
2261         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2262                                 INTEL_SET_VENDOR_VERB, vendor_param);
2263 }
2264
2265 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2266  * Otherwise you may get severe h/w communication errors.
2267  */
2268 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2269                                 unsigned int power_state)
2270 {
2271         if (power_state == AC_PWRST_D0) {
2272                 intel_haswell_enable_all_pins(codec, false);
2273                 intel_haswell_fixup_enable_dp12(codec);
2274         }
2275
2276         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2277         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2278 }
2279
2280 static int patch_generic_hdmi(struct hda_codec *codec)
2281 {
2282         struct hdmi_spec *spec;
2283
2284         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2285         if (spec == NULL)
2286                 return -ENOMEM;
2287
2288         spec->ops = generic_standard_hdmi_ops;
2289         codec->spec = spec;
2290         hdmi_array_init(spec, 4);
2291
2292         if (is_haswell_plus(codec)) {
2293                 intel_haswell_enable_all_pins(codec, true);
2294                 intel_haswell_fixup_enable_dp12(codec);
2295         }
2296
2297         if (is_haswell(codec) || is_valleyview(codec)) {
2298                 codec->depop_delay = 0;
2299         }
2300
2301         if (hdmi_parse_codec(codec) < 0) {
2302                 codec->spec = NULL;
2303                 kfree(spec);
2304                 return -EINVAL;
2305         }
2306         codec->patch_ops = generic_hdmi_patch_ops;
2307         if (is_haswell_plus(codec)) {
2308                 codec->patch_ops.set_power_state = haswell_set_power_state;
2309                 codec->dp_mst = true;
2310         }
2311
2312         generic_hdmi_init_per_pins(codec);
2313
2314         init_channel_allocations();
2315
2316         return 0;
2317 }
2318
2319 /*
2320  * Shared non-generic implementations
2321  */
2322
2323 static int simple_playback_build_pcms(struct hda_codec *codec)
2324 {
2325         struct hdmi_spec *spec = codec->spec;
2326         struct hda_pcm *info;
2327         unsigned int chans;
2328         struct hda_pcm_stream *pstr;
2329         struct hdmi_spec_per_cvt *per_cvt;
2330
2331         per_cvt = get_cvt(spec, 0);
2332         chans = get_wcaps(codec, per_cvt->cvt_nid);
2333         chans = get_wcaps_channels(chans);
2334
2335         info = snd_array_new(&spec->pcm_rec);
2336         if (!info)
2337                 return -ENOMEM;
2338         info->name = get_pin(spec, 0)->pcm_name;
2339         sprintf(info->name, "HDMI 0");
2340         info->pcm_type = HDA_PCM_TYPE_HDMI;
2341         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2342         *pstr = spec->pcm_playback;
2343         pstr->nid = per_cvt->cvt_nid;
2344         if (pstr->channels_max <= 2 && chans && chans <= 16)
2345                 pstr->channels_max = chans;
2346
2347         codec->num_pcms = 1;
2348         codec->pcm_info = info;
2349
2350         return 0;
2351 }
2352
2353 /* unsolicited event for jack sensing */
2354 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2355                                     unsigned int res)
2356 {
2357         snd_hda_jack_set_dirty_all(codec);
2358         snd_hda_jack_report_sync(codec);
2359 }
2360
2361 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2362  * as long as spec->pins[] is set correctly
2363  */
2364 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2365
2366 static int simple_playback_build_controls(struct hda_codec *codec)
2367 {
2368         struct hdmi_spec *spec = codec->spec;
2369         struct hdmi_spec_per_cvt *per_cvt;
2370         int err;
2371
2372         per_cvt = get_cvt(spec, 0);
2373         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2374                                           per_cvt->cvt_nid,
2375                                           HDA_PCM_TYPE_HDMI);
2376         if (err < 0)
2377                 return err;
2378         return simple_hdmi_build_jack(codec, 0);
2379 }
2380
2381 static int simple_playback_init(struct hda_codec *codec)
2382 {
2383         struct hdmi_spec *spec = codec->spec;
2384         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2385         hda_nid_t pin = per_pin->pin_nid;
2386
2387         snd_hda_codec_write(codec, pin, 0,
2388                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2389         /* some codecs require to unmute the pin */
2390         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2391                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2392                                     AMP_OUT_UNMUTE);
2393         snd_hda_jack_detect_enable(codec, pin, pin);
2394         return 0;
2395 }
2396
2397 static void simple_playback_free(struct hda_codec *codec)
2398 {
2399         struct hdmi_spec *spec = codec->spec;
2400
2401         hdmi_array_free(spec);
2402         kfree(spec);
2403 }
2404
2405 /*
2406  * Nvidia specific implementations
2407  */
2408
2409 #define Nv_VERB_SET_Channel_Allocation          0xF79
2410 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2411 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2412 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2413
2414 #define nvhdmi_master_con_nid_7x        0x04
2415 #define nvhdmi_master_pin_nid_7x        0x05
2416
2417 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2418         /*front, rear, clfe, rear_surr */
2419         0x6, 0x8, 0xa, 0xc,
2420 };
2421
2422 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2423         /* set audio protect on */
2424         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2425         /* enable digital output on pin widget */
2426         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2427         {} /* terminator */
2428 };
2429
2430 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2431         /* set audio protect on */
2432         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2433         /* enable digital output on pin widget */
2434         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2435         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2436         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2437         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2438         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2439         {} /* terminator */
2440 };
2441
2442 #ifdef LIMITED_RATE_FMT_SUPPORT
2443 /* support only the safe format and rate */
2444 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2445 #define SUPPORTED_MAXBPS        16
2446 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2447 #else
2448 /* support all rates and formats */
2449 #define SUPPORTED_RATES \
2450         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2451         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2452          SNDRV_PCM_RATE_192000)
2453 #define SUPPORTED_MAXBPS        24
2454 #define SUPPORTED_FORMATS \
2455         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2456 #endif
2457
2458 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2459 {
2460         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2461         return 0;
2462 }
2463
2464 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2465 {
2466         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2467         return 0;
2468 }
2469
2470 static unsigned int channels_2_6_8[] = {
2471         2, 6, 8
2472 };
2473
2474 static unsigned int channels_2_8[] = {
2475         2, 8
2476 };
2477
2478 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2479         .count = ARRAY_SIZE(channels_2_6_8),
2480         .list = channels_2_6_8,
2481         .mask = 0,
2482 };
2483
2484 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2485         .count = ARRAY_SIZE(channels_2_8),
2486         .list = channels_2_8,
2487         .mask = 0,
2488 };
2489
2490 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2491                                     struct hda_codec *codec,
2492                                     struct snd_pcm_substream *substream)
2493 {
2494         struct hdmi_spec *spec = codec->spec;
2495         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2496
2497         switch (codec->preset->id) {
2498         case 0x10de0002:
2499         case 0x10de0003:
2500         case 0x10de0005:
2501         case 0x10de0006:
2502                 hw_constraints_channels = &hw_constraints_2_8_channels;
2503                 break;
2504         case 0x10de0007:
2505                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2506                 break;
2507         default:
2508                 break;
2509         }
2510
2511         if (hw_constraints_channels != NULL) {
2512                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2513                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2514                                 hw_constraints_channels);
2515         } else {
2516                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2517                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2518         }
2519
2520         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2521 }
2522
2523 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2524                                      struct hda_codec *codec,
2525                                      struct snd_pcm_substream *substream)
2526 {
2527         struct hdmi_spec *spec = codec->spec;
2528         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2529 }
2530
2531 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2532                                        struct hda_codec *codec,
2533                                        unsigned int stream_tag,
2534                                        unsigned int format,
2535                                        struct snd_pcm_substream *substream)
2536 {
2537         struct hdmi_spec *spec = codec->spec;
2538         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2539                                              stream_tag, format, substream);
2540 }
2541
2542 static const struct hda_pcm_stream simple_pcm_playback = {
2543         .substreams = 1,
2544         .channels_min = 2,
2545         .channels_max = 2,
2546         .ops = {
2547                 .open = simple_playback_pcm_open,
2548                 .close = simple_playback_pcm_close,
2549                 .prepare = simple_playback_pcm_prepare
2550         },
2551 };
2552
2553 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2554         .build_controls = simple_playback_build_controls,
2555         .build_pcms = simple_playback_build_pcms,
2556         .init = simple_playback_init,
2557         .free = simple_playback_free,
2558         .unsol_event = simple_hdmi_unsol_event,
2559 };
2560
2561 static int patch_simple_hdmi(struct hda_codec *codec,
2562                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2563 {
2564         struct hdmi_spec *spec;
2565         struct hdmi_spec_per_cvt *per_cvt;
2566         struct hdmi_spec_per_pin *per_pin;
2567
2568         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2569         if (!spec)
2570                 return -ENOMEM;
2571
2572         codec->spec = spec;
2573         hdmi_array_init(spec, 1);
2574
2575         spec->multiout.num_dacs = 0;  /* no analog */
2576         spec->multiout.max_channels = 2;
2577         spec->multiout.dig_out_nid = cvt_nid;
2578         spec->num_cvts = 1;
2579         spec->num_pins = 1;
2580         per_pin = snd_array_new(&spec->pins);
2581         per_cvt = snd_array_new(&spec->cvts);
2582         if (!per_pin || !per_cvt) {
2583                 simple_playback_free(codec);
2584                 return -ENOMEM;
2585         }
2586         per_cvt->cvt_nid = cvt_nid;
2587         per_pin->pin_nid = pin_nid;
2588         spec->pcm_playback = simple_pcm_playback;
2589
2590         codec->patch_ops = simple_hdmi_patch_ops;
2591
2592         return 0;
2593 }
2594
2595 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2596                                                     int channels)
2597 {
2598         unsigned int chanmask;
2599         int chan = channels ? (channels - 1) : 1;
2600
2601         switch (channels) {
2602         default:
2603         case 0:
2604         case 2:
2605                 chanmask = 0x00;
2606                 break;
2607         case 4:
2608                 chanmask = 0x08;
2609                 break;
2610         case 6:
2611                 chanmask = 0x0b;
2612                 break;
2613         case 8:
2614                 chanmask = 0x13;
2615                 break;
2616         }
2617
2618         /* Set the audio infoframe channel allocation and checksum fields.  The
2619          * channel count is computed implicitly by the hardware. */
2620         snd_hda_codec_write(codec, 0x1, 0,
2621                         Nv_VERB_SET_Channel_Allocation, chanmask);
2622
2623         snd_hda_codec_write(codec, 0x1, 0,
2624                         Nv_VERB_SET_Info_Frame_Checksum,
2625                         (0x71 - chan - chanmask));
2626 }
2627
2628 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2629                                    struct hda_codec *codec,
2630                                    struct snd_pcm_substream *substream)
2631 {
2632         struct hdmi_spec *spec = codec->spec;
2633         int i;
2634
2635         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2636                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2637         for (i = 0; i < 4; i++) {
2638                 /* set the stream id */
2639                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2640                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
2641                 /* set the stream format */
2642                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2643                                 AC_VERB_SET_STREAM_FORMAT, 0);
2644         }
2645
2646         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2647          * streams are disabled. */
2648         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2649
2650         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2651 }
2652
2653 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2654                                      struct hda_codec *codec,
2655                                      unsigned int stream_tag,
2656                                      unsigned int format,
2657                                      struct snd_pcm_substream *substream)
2658 {
2659         int chs;
2660         unsigned int dataDCC2, channel_id;
2661         int i;
2662         struct hdmi_spec *spec = codec->spec;
2663         struct hda_spdif_out *spdif;
2664         struct hdmi_spec_per_cvt *per_cvt;
2665
2666         mutex_lock(&codec->spdif_mutex);
2667         per_cvt = get_cvt(spec, 0);
2668         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2669
2670         chs = substream->runtime->channels;
2671
2672         dataDCC2 = 0x2;
2673
2674         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2675         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2676                 snd_hda_codec_write(codec,
2677                                 nvhdmi_master_con_nid_7x,
2678                                 0,
2679                                 AC_VERB_SET_DIGI_CONVERT_1,
2680                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2681
2682         /* set the stream id */
2683         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2684                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2685
2686         /* set the stream format */
2687         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2688                         AC_VERB_SET_STREAM_FORMAT, format);
2689
2690         /* turn on again (if needed) */
2691         /* enable and set the channel status audio/data flag */
2692         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2693                 snd_hda_codec_write(codec,
2694                                 nvhdmi_master_con_nid_7x,
2695                                 0,
2696                                 AC_VERB_SET_DIGI_CONVERT_1,
2697                                 spdif->ctls & 0xff);
2698                 snd_hda_codec_write(codec,
2699                                 nvhdmi_master_con_nid_7x,
2700                                 0,
2701                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2702         }
2703
2704         for (i = 0; i < 4; i++) {
2705                 if (chs == 2)
2706                         channel_id = 0;
2707                 else
2708                         channel_id = i * 2;
2709
2710                 /* turn off SPDIF once;
2711                  *otherwise the IEC958 bits won't be updated
2712                  */
2713                 if (codec->spdif_status_reset &&
2714                 (spdif->ctls & AC_DIG1_ENABLE))
2715                         snd_hda_codec_write(codec,
2716                                 nvhdmi_con_nids_7x[i],
2717                                 0,
2718                                 AC_VERB_SET_DIGI_CONVERT_1,
2719                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2720                 /* set the stream id */
2721                 snd_hda_codec_write(codec,
2722                                 nvhdmi_con_nids_7x[i],
2723                                 0,
2724                                 AC_VERB_SET_CHANNEL_STREAMID,
2725                                 (stream_tag << 4) | channel_id);
2726                 /* set the stream format */
2727                 snd_hda_codec_write(codec,
2728                                 nvhdmi_con_nids_7x[i],
2729                                 0,
2730                                 AC_VERB_SET_STREAM_FORMAT,
2731                                 format);
2732                 /* turn on again (if needed) */
2733                 /* enable and set the channel status audio/data flag */
2734                 if (codec->spdif_status_reset &&
2735                 (spdif->ctls & AC_DIG1_ENABLE)) {
2736                         snd_hda_codec_write(codec,
2737                                         nvhdmi_con_nids_7x[i],
2738                                         0,
2739                                         AC_VERB_SET_DIGI_CONVERT_1,
2740                                         spdif->ctls & 0xff);
2741                         snd_hda_codec_write(codec,
2742                                         nvhdmi_con_nids_7x[i],
2743                                         0,
2744                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2745                 }
2746         }
2747
2748         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2749
2750         mutex_unlock(&codec->spdif_mutex);
2751         return 0;
2752 }
2753
2754 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2755         .substreams = 1,
2756         .channels_min = 2,
2757         .channels_max = 8,
2758         .nid = nvhdmi_master_con_nid_7x,
2759         .rates = SUPPORTED_RATES,
2760         .maxbps = SUPPORTED_MAXBPS,
2761         .formats = SUPPORTED_FORMATS,
2762         .ops = {
2763                 .open = simple_playback_pcm_open,
2764                 .close = nvhdmi_8ch_7x_pcm_close,
2765                 .prepare = nvhdmi_8ch_7x_pcm_prepare
2766         },
2767 };
2768
2769 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2770 {
2771         struct hdmi_spec *spec;
2772         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2773                                     nvhdmi_master_pin_nid_7x);
2774         if (err < 0)
2775                 return err;
2776
2777         codec->patch_ops.init = nvhdmi_7x_init_2ch;
2778         /* override the PCM rates, etc, as the codec doesn't give full list */
2779         spec = codec->spec;
2780         spec->pcm_playback.rates = SUPPORTED_RATES;
2781         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2782         spec->pcm_playback.formats = SUPPORTED_FORMATS;
2783         return 0;
2784 }
2785
2786 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2787 {
2788         struct hdmi_spec *spec = codec->spec;
2789         int err = simple_playback_build_pcms(codec);
2790         if (!err) {
2791                 struct hda_pcm *info = get_pcm_rec(spec, 0);
2792                 info->own_chmap = true;
2793         }
2794         return err;
2795 }
2796
2797 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2798 {
2799         struct hdmi_spec *spec = codec->spec;
2800         struct hda_pcm *info;
2801         struct snd_pcm_chmap *chmap;
2802         int err;
2803
2804         err = simple_playback_build_controls(codec);
2805         if (err < 0)
2806                 return err;
2807
2808         /* add channel maps */
2809         info = get_pcm_rec(spec, 0);
2810         err = snd_pcm_add_chmap_ctls(info->pcm,
2811                                      SNDRV_PCM_STREAM_PLAYBACK,
2812                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
2813         if (err < 0)
2814                 return err;
2815         switch (codec->preset->id) {
2816         case 0x10de0002:
2817         case 0x10de0003:
2818         case 0x10de0005:
2819         case 0x10de0006:
2820                 chmap->channel_mask = (1U << 2) | (1U << 8);
2821                 break;
2822         case 0x10de0007:
2823                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2824         }
2825         return 0;
2826 }
2827
2828 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2829 {
2830         struct hdmi_spec *spec;
2831         int err = patch_nvhdmi_2ch(codec);
2832         if (err < 0)
2833                 return err;
2834         spec = codec->spec;
2835         spec->multiout.max_channels = 8;
2836         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2837         codec->patch_ops.init = nvhdmi_7x_init_8ch;
2838         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2839         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2840
2841         /* Initialize the audio infoframe channel mask and checksum to something
2842          * valid */
2843         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2844
2845         return 0;
2846 }
2847
2848 /*
2849  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
2850  * - 0x10de0015
2851  * - 0x10de0040
2852  */
2853 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
2854                                                     int channels)
2855 {
2856         if (cap->ca_index == 0x00 && channels == 2)
2857                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
2858
2859         return hdmi_chmap_cea_alloc_validate_get_type(cap, channels);
2860 }
2861
2862 static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map)
2863 {
2864         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
2865                 return -EINVAL;
2866
2867         return 0;
2868 }
2869
2870 static int patch_nvhdmi(struct hda_codec *codec)
2871 {
2872         struct hdmi_spec *spec;
2873         int err;
2874
2875         err = patch_generic_hdmi(codec);
2876         if (err)
2877                 return err;
2878
2879         spec = codec->spec;
2880         spec->dyn_pin_out = true;
2881
2882         spec->ops.chmap_cea_alloc_validate_get_type =
2883                 nvhdmi_chmap_cea_alloc_validate_get_type;
2884         spec->ops.chmap_validate = nvhdmi_chmap_validate;
2885
2886         return 0;
2887 }
2888
2889 /*
2890  * ATI/AMD-specific implementations
2891  */
2892
2893 #define is_amdhdmi_rev3_or_later(codec) \
2894         ((codec)->vendor_id == 0x1002aa01 && ((codec)->revision_id & 0xff00) >= 0x0300)
2895 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
2896
2897 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
2898 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
2899 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
2900 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
2901 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
2902 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
2903 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
2904 #define ATI_VERB_SET_HBR_CONTROL        0x77c
2905 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
2906 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
2907 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
2908 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
2909 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
2910 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
2911 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
2912 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
2913 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
2914 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
2915 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
2916 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
2917 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
2918 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
2919 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
2920 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
2921 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
2922
2923 /* AMD specific HDA cvt verbs */
2924 #define ATI_VERB_SET_RAMP_RATE          0x770
2925 #define ATI_VERB_GET_RAMP_RATE          0xf70
2926
2927 #define ATI_OUT_ENABLE 0x1
2928
2929 #define ATI_MULTICHANNEL_MODE_PAIRED    0
2930 #define ATI_MULTICHANNEL_MODE_SINGLE    1
2931
2932 #define ATI_HBR_CAPABLE 0x01
2933 #define ATI_HBR_ENABLE 0x10
2934
2935 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
2936                            unsigned char *buf, int *eld_size)
2937 {
2938         /* call hda_eld.c ATI/AMD-specific function */
2939         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
2940                                     is_amdhdmi_rev3_or_later(codec));
2941 }
2942
2943 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
2944                                         int active_channels, int conn_type)
2945 {
2946         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
2947 }
2948
2949 static int atihdmi_paired_swap_fc_lfe(int pos)
2950 {
2951         /*
2952          * ATI/AMD have automatic FC/LFE swap built-in
2953          * when in pairwise mapping mode.
2954          */
2955
2956         switch (pos) {
2957                 /* see channel_allocations[].speakers[] */
2958                 case 2: return 3;
2959                 case 3: return 2;
2960                 default: break;
2961         }
2962
2963         return pos;
2964 }
2965
2966 static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
2967 {
2968         struct cea_channel_speaker_allocation *cap;
2969         int i, j;
2970
2971         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
2972
2973         cap = &channel_allocations[get_channel_allocation_order(ca)];
2974         for (i = 0; i < chs; ++i) {
2975                 int mask = to_spk_mask(map[i]);
2976                 bool ok = false;
2977                 bool companion_ok = false;
2978
2979                 if (!mask)
2980                         continue;
2981
2982                 for (j = 0 + i % 2; j < 8; j += 2) {
2983                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
2984                         if (cap->speakers[chan_idx] == mask) {
2985                                 /* channel is in a supported position */
2986                                 ok = true;
2987
2988                                 if (i % 2 == 0 && i + 1 < chs) {
2989                                         /* even channel, check the odd companion */
2990                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
2991                                         int comp_mask_req = to_spk_mask(map[i+1]);
2992                                         int comp_mask_act = cap->speakers[comp_chan_idx];
2993
2994                                         if (comp_mask_req == comp_mask_act)
2995                                                 companion_ok = true;
2996                                         else
2997                                                 return -EINVAL;
2998                                 }
2999                                 break;
3000                         }
3001                 }
3002
3003                 if (!ok)
3004                         return -EINVAL;
3005
3006                 if (companion_ok)
3007                         i++; /* companion channel already checked */
3008         }
3009
3010         return 0;
3011 }
3012
3013 static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3014                                         int hdmi_slot, int stream_channel)
3015 {
3016         int verb;
3017         int ati_channel_setup = 0;
3018
3019         if (hdmi_slot > 7)
3020                 return -EINVAL;
3021
3022         if (!has_amd_full_remap_support(codec)) {
3023                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3024
3025                 /* In case this is an odd slot but without stream channel, do not
3026                  * disable the slot since the corresponding even slot could have a
3027                  * channel. In case neither have a channel, the slot pair will be
3028                  * disabled when this function is called for the even slot. */
3029                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3030                         return 0;
3031
3032                 hdmi_slot -= hdmi_slot % 2;
3033
3034                 if (stream_channel != 0xf)
3035                         stream_channel -= stream_channel % 2;
3036         }
3037
3038         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3039
3040         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3041
3042         if (stream_channel != 0xf)
3043                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3044
3045         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3046 }
3047
3048 static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3049                                         int asp_slot)
3050 {
3051         bool was_odd = false;
3052         int ati_asp_slot = asp_slot;
3053         int verb;
3054         int ati_channel_setup;
3055
3056         if (asp_slot > 7)
3057                 return -EINVAL;
3058
3059         if (!has_amd_full_remap_support(codec)) {
3060                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3061                 if (ati_asp_slot % 2 != 0) {
3062                         ati_asp_slot -= 1;
3063                         was_odd = true;
3064                 }
3065         }
3066
3067         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3068
3069         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3070
3071         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3072                 return 0xf;
3073
3074         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3075 }
3076
3077 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3078                                                             int channels)
3079 {
3080         int c;
3081
3082         /*
3083          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3084          * we need to take that into account (a single channel may take 2
3085          * channel slots if we need to carry a silent channel next to it).
3086          * On Rev3+ AMD codecs this function is not used.
3087          */
3088         int chanpairs = 0;
3089
3090         /* We only produce even-numbered channel count TLVs */
3091         if ((channels % 2) != 0)
3092                 return -1;
3093
3094         for (c = 0; c < 7; c += 2) {
3095                 if (cap->speakers[c] || cap->speakers[c+1])
3096                         chanpairs++;
3097         }
3098
3099         if (chanpairs * 2 != channels)
3100                 return -1;
3101
3102         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3103 }
3104
3105 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
3106                                                   unsigned int *chmap, int channels)
3107 {
3108         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3109         int count = 0;
3110         int c;
3111
3112         for (c = 7; c >= 0; c--) {
3113                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3114                 int spk = cap->speakers[chan];
3115                 if (!spk) {
3116                         /* add N/A channel if the companion channel is occupied */
3117                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3118                                 chmap[count++] = SNDRV_CHMAP_NA;
3119
3120                         continue;
3121                 }
3122
3123                 chmap[count++] = spk_to_chmap(spk);
3124         }
3125
3126         WARN_ON(count != channels);
3127 }
3128
3129 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3130                                  bool hbr)
3131 {
3132         int hbr_ctl, hbr_ctl_new;
3133
3134         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3135         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3136                 if (hbr)
3137                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3138                 else
3139                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3140
3141                 snd_printdd("atihdmi_pin_hbr_setup: "
3142                                 "NID=0x%x, %shbr-ctl=0x%x\n",
3143                                 pin_nid,
3144                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3145                                 hbr_ctl_new);
3146
3147                 if (hbr_ctl != hbr_ctl_new)
3148                         snd_hda_codec_write(codec, pin_nid, 0,
3149                                                 ATI_VERB_SET_HBR_CONTROL,
3150                                                 hbr_ctl_new);
3151
3152         } else if (hbr)
3153                 return -EINVAL;
3154
3155         return 0;
3156 }
3157
3158 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3159                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3160 {
3161
3162         if (is_amdhdmi_rev3_or_later(codec)) {
3163                 int ramp_rate = 180; /* default as per AMD spec */
3164                 /* disable ramp-up/down for non-pcm as per AMD spec */
3165                 if (format & AC_FMT_TYPE_NON_PCM)
3166                         ramp_rate = 0;
3167
3168                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3169         }
3170
3171         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3172 }
3173
3174
3175 static int atihdmi_init(struct hda_codec *codec)
3176 {
3177         struct hdmi_spec *spec = codec->spec;
3178         int pin_idx, err;
3179
3180         err = generic_hdmi_init(codec);
3181
3182         if (err)
3183                 return err;
3184
3185         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3186                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3187
3188                 /* make sure downmix information in infoframe is zero */
3189                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3190
3191                 /* enable channel-wise remap mode if supported */
3192                 if (has_amd_full_remap_support(codec))
3193                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3194                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3195                                             ATI_MULTICHANNEL_MODE_SINGLE);
3196         }
3197
3198         return 0;
3199 }
3200
3201 static int patch_atihdmi(struct hda_codec *codec)
3202 {
3203         struct hdmi_spec *spec;
3204         struct hdmi_spec_per_cvt *per_cvt;
3205         int err, cvt_idx;
3206
3207         err = patch_generic_hdmi(codec);
3208
3209         if (err)
3210                 return err;
3211
3212         codec->patch_ops.init = atihdmi_init;
3213
3214         spec = codec->spec;
3215
3216         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3217         spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3218         spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3219         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3220         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3221         spec->ops.setup_stream = atihdmi_setup_stream;
3222
3223         if (!has_amd_full_remap_support(codec)) {
3224                 /* override to ATI/AMD-specific versions with pairwise mapping */
3225                 spec->ops.chmap_cea_alloc_validate_get_type =
3226                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3227                 spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
3228                 spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
3229         }
3230
3231         /* ATI/AMD converters do not advertise all of their capabilities */
3232         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3233                 per_cvt = get_cvt(spec, cvt_idx);
3234                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3235                 per_cvt->rates |= SUPPORTED_RATES;
3236                 per_cvt->formats |= SUPPORTED_FORMATS;
3237                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3238         }
3239
3240         spec->channels_max = max(spec->channels_max, 8u);
3241
3242         return 0;
3243 }
3244
3245 /* VIA HDMI Implementation */
3246 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3247 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3248
3249 static int patch_via_hdmi(struct hda_codec *codec)
3250 {
3251         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3252 }
3253
3254 /*
3255  * called from hda_codec.c for generic HDMI support
3256  */
3257 int snd_hda_parse_hdmi_codec(struct hda_codec *codec)
3258 {
3259         return patch_generic_hdmi(codec);
3260 }
3261 EXPORT_SYMBOL_GPL(snd_hda_parse_hdmi_codec);
3262
3263 /*
3264  * patch entries
3265  */
3266 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
3267 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
3268 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
3269 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
3270 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_atihdmi },
3271 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
3272 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
3273 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
3274 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3275 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3276 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3277 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3278 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
3279 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_nvhdmi },
3280 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_nvhdmi },
3281 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_nvhdmi },
3282 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_nvhdmi },
3283 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_nvhdmi },
3284 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_nvhdmi },
3285 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_nvhdmi },
3286 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_nvhdmi },
3287 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_nvhdmi },
3288 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_nvhdmi },
3289 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_nvhdmi },
3290 /* 17 is known to be absent */
3291 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_nvhdmi },
3292 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_nvhdmi },
3293 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_nvhdmi },
3294 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_nvhdmi },
3295 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_nvhdmi },
3296 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_nvhdmi },
3297 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_nvhdmi },
3298 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_nvhdmi },
3299 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_nvhdmi },
3300 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_nvhdmi },
3301 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP",   .patch = patch_nvhdmi },
3302 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP",   .patch = patch_nvhdmi },
3303 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
3304 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
3305 { .id = 0x11069f80, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
3306 { .id = 0x11069f81, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
3307 { .id = 0x11069f84, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
3308 { .id = 0x11069f85, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
3309 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
3310 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
3311 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
3312 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
3313 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
3314 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
3315 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
3316 { .id = 0x80862807, .name = "Haswell HDMI",     .patch = patch_generic_hdmi },
3317 { .id = 0x80862808, .name = "Broadwell HDMI",   .patch = patch_generic_hdmi },
3318 { .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
3319 { .id = 0x80862882, .name = "Valleyview2 HDMI", .patch = patch_generic_hdmi },
3320 { .id = 0x80862883, .name = "Braswell HDMI",    .patch = patch_generic_hdmi },
3321 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
3322 {} /* terminator */
3323 };
3324
3325 MODULE_ALIAS("snd-hda-codec-id:1002793c");
3326 MODULE_ALIAS("snd-hda-codec-id:10027919");
3327 MODULE_ALIAS("snd-hda-codec-id:1002791a");
3328 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
3329 MODULE_ALIAS("snd-hda-codec-id:10951390");
3330 MODULE_ALIAS("snd-hda-codec-id:10951392");
3331 MODULE_ALIAS("snd-hda-codec-id:10de0002");
3332 MODULE_ALIAS("snd-hda-codec-id:10de0003");
3333 MODULE_ALIAS("snd-hda-codec-id:10de0005");
3334 MODULE_ALIAS("snd-hda-codec-id:10de0006");
3335 MODULE_ALIAS("snd-hda-codec-id:10de0007");
3336 MODULE_ALIAS("snd-hda-codec-id:10de000a");
3337 MODULE_ALIAS("snd-hda-codec-id:10de000b");
3338 MODULE_ALIAS("snd-hda-codec-id:10de000c");
3339 MODULE_ALIAS("snd-hda-codec-id:10de000d");
3340 MODULE_ALIAS("snd-hda-codec-id:10de0010");
3341 MODULE_ALIAS("snd-hda-codec-id:10de0011");
3342 MODULE_ALIAS("snd-hda-codec-id:10de0012");
3343 MODULE_ALIAS("snd-hda-codec-id:10de0013");
3344 MODULE_ALIAS("snd-hda-codec-id:10de0014");
3345 MODULE_ALIAS("snd-hda-codec-id:10de0015");
3346 MODULE_ALIAS("snd-hda-codec-id:10de0016");
3347 MODULE_ALIAS("snd-hda-codec-id:10de0018");
3348 MODULE_ALIAS("snd-hda-codec-id:10de0019");
3349 MODULE_ALIAS("snd-hda-codec-id:10de001a");
3350 MODULE_ALIAS("snd-hda-codec-id:10de001b");
3351 MODULE_ALIAS("snd-hda-codec-id:10de001c");
3352 MODULE_ALIAS("snd-hda-codec-id:10de0040");
3353 MODULE_ALIAS("snd-hda-codec-id:10de0041");
3354 MODULE_ALIAS("snd-hda-codec-id:10de0042");
3355 MODULE_ALIAS("snd-hda-codec-id:10de0043");
3356 MODULE_ALIAS("snd-hda-codec-id:10de0044");
3357 MODULE_ALIAS("snd-hda-codec-id:10de0051");
3358 MODULE_ALIAS("snd-hda-codec-id:10de0060");
3359 MODULE_ALIAS("snd-hda-codec-id:10de0067");
3360 MODULE_ALIAS("snd-hda-codec-id:10de8001");
3361 MODULE_ALIAS("snd-hda-codec-id:11069f80");
3362 MODULE_ALIAS("snd-hda-codec-id:11069f81");
3363 MODULE_ALIAS("snd-hda-codec-id:11069f84");
3364 MODULE_ALIAS("snd-hda-codec-id:11069f85");
3365 MODULE_ALIAS("snd-hda-codec-id:17e80047");
3366 MODULE_ALIAS("snd-hda-codec-id:80860054");
3367 MODULE_ALIAS("snd-hda-codec-id:80862801");
3368 MODULE_ALIAS("snd-hda-codec-id:80862802");
3369 MODULE_ALIAS("snd-hda-codec-id:80862803");
3370 MODULE_ALIAS("snd-hda-codec-id:80862804");
3371 MODULE_ALIAS("snd-hda-codec-id:80862805");
3372 MODULE_ALIAS("snd-hda-codec-id:80862806");
3373 MODULE_ALIAS("snd-hda-codec-id:80862807");
3374 MODULE_ALIAS("snd-hda-codec-id:80862808");
3375 MODULE_ALIAS("snd-hda-codec-id:80862880");
3376 MODULE_ALIAS("snd-hda-codec-id:80862882");
3377 MODULE_ALIAS("snd-hda-codec-id:80862883");
3378 MODULE_ALIAS("snd-hda-codec-id:808629fb");
3379
3380 MODULE_LICENSE("GPL");
3381 MODULE_DESCRIPTION("HDMI HD-audio codec");
3382 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3383 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3384 MODULE_ALIAS("snd-hda-codec-atihdmi");
3385
3386 static struct hda_codec_preset_list intel_list = {
3387         .preset = snd_hda_preset_hdmi,
3388         .owner = THIS_MODULE,
3389 };
3390
3391 static int __init patch_hdmi_init(void)
3392 {
3393         return snd_hda_add_codec_preset(&intel_list);
3394 }
3395
3396 static void __exit patch_hdmi_exit(void)
3397 {
3398         snd_hda_delete_codec_preset(&intel_list);
3399 }
3400
3401 module_init(patch_hdmi_init)
3402 module_exit(patch_hdmi_exit)