sound/pci/hda/patch_hdmi.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *
   4  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   5  *
   6  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   7  *  Copyright (c) 2006 ATI Technologies Inc.
   8  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   9  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  10  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  11  *
  12  *  Authors:
  13  *                      Wu Fengguang <wfg@linux.intel.com>
  14  *
  15  *  Maintained by:
  16  *                      Wu Fengguang <wfg@linux.intel.com>
  17  */
  18
  19 #include <linux/init.h>
  20 #include <linux/delay.h>
  21 #include <linux/pci.h>
  22 #include <linux/slab.h>
  23 #include <linux/module.h>
  24 #include <linux/pm_runtime.h>
  25 #include <sound/core.h>
  26 #include <sound/jack.h>
  27 #include <sound/asoundef.h>
  28 #include <sound/tlv.h>
  29 #include <sound/hdaudio.h>
  30 #include <sound/hda_i915.h>
  31 #include <sound/hda_chmap.h>
  32 #include <sound/hda_codec.h>
  33 #include "hda_local.h"
  34 #include "hda_jack.h"
  35 #include "hda_controller.h"
  36
  37 static bool static_hdmi_pcm;
  38 module_param(static_hdmi_pcm, bool, 0644);
  39 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  40
  41 static bool enable_acomp = true;
  42 module_param(enable_acomp, bool, 0444);
  43 MODULE_PARM_DESC(enable_acomp, "Enable audio component binding (default=yes)");
  44
  45 static bool enable_silent_stream =
  46 IS_ENABLED(CONFIG_SND_HDA_INTEL_HDMI_SILENT_STREAM);
  47 module_param(enable_silent_stream, bool, 0644);
  48 MODULE_PARM_DESC(enable_silent_stream, "Enable Silent Stream for HDMI devices");
  49
  50 static bool enable_all_pins;
  51 module_param(enable_all_pins, bool, 0444);
  52 MODULE_PARM_DESC(enable_all_pins, "Forcibly enable all pins");
  53
  54 struct hdmi_spec_per_cvt {
  55         hda_nid_t cvt_nid;
  56         int assigned;
  57         unsigned int channels_min;
  58         unsigned int channels_max;
  59         u32 rates;
  60         u64 formats;
  61         unsigned int maxbps;
  62 };
  63
  64 /* max. connections to a widget */
  65 #define HDA_MAX_CONNECTIONS     32
  66
  67 struct hdmi_spec_per_pin {
  68         hda_nid_t pin_nid;
  69         int dev_id;
  70         /* pin idx, different device entries on the same pin use the same idx */
  71         int pin_nid_idx;
  72         int num_mux_nids;
  73         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  74         int mux_idx;
  75         hda_nid_t cvt_nid;
  76
  77         struct hda_codec *codec;
  78         struct hdmi_eld sink_eld;
  79         struct mutex lock;
  80         struct delayed_work work;
  81         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  82         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  83         int repoll_count;
  84         bool setup; /* the stream has been set up by prepare callback */
  85         bool silent_stream;
  86         int channels; /* current number of channels */
  87         bool non_pcm;
  88         bool chmap_set;         /* channel-map override by ALSA API? */
  89         unsigned char chmap[8]; /* ALSA API channel-map */
  90 #ifdef CONFIG_SND_PROC_FS
  91         struct snd_info_entry *proc_entry;
  92 #endif
  93 };
  94
  95 /* operations used by generic code that can be overridden by patches */
  96 struct hdmi_ops {
  97         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
  98                            int dev_id, unsigned char *buf, int *eld_size);
  99
 100         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 101                                     int dev_id,
 102                                     int ca, int active_channels, int conn_type);
 103
 104         /* enable/disable HBR (HD passthrough) */
 105         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid,
 106                              int dev_id, bool hbr);
 107
 108         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 109                             hda_nid_t pin_nid, int dev_id, u32 stream_tag,
 110                             int format);
 111
 112         void (*pin_cvt_fixup)(struct hda_codec *codec,
 113                               struct hdmi_spec_per_pin *per_pin,
 114                               hda_nid_t cvt_nid);
 115 };
 116
 117 struct hdmi_pcm {
 118         struct hda_pcm *pcm;
 119         struct snd_jack *jack;
 120         struct snd_kcontrol *eld_ctl;
 121 };
 122
 123 struct hdmi_spec {
 124         struct hda_codec *codec;
 125         int num_cvts;
 126         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 127         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 128
 129         /*
 130          * num_pins is the number of virtual pins
 131          * for example, there are 3 pins, and each pin
 132          * has 4 device entries, then the num_pins is 12
 133          */
 134         int num_pins;
 135         /*
 136          * num_nids is the number of real pins
 137          * In the above example, num_nids is 3
 138          */
 139         int num_nids;
 140         /*
 141          * dev_num is the number of device entries
 142          * on each pin.
 143          * In the above example, dev_num is 4
 144          */
 145         int dev_num;
 146         struct snd_array pins; /* struct hdmi_spec_per_pin */
 147         struct hdmi_pcm pcm_rec[16];
 148         struct mutex pcm_lock;
 149         struct mutex bind_lock; /* for audio component binding */
 150         /* pcm_bitmap means which pcms have been assigned to pins*/
 151         unsigned long pcm_bitmap;
 152         int pcm_used;   /* counter of pcm_rec[] */
 153         /* bitmap shows whether the pcm is opened in user space
 154          * bit 0 means the first playback PCM (PCM3);
 155          * bit 1 means the second playback PCM, and so on.
 156          */
 157         unsigned long pcm_in_use;
 158
 159         struct hdmi_eld temp_eld;
 160         struct hdmi_ops ops;
 161
 162         bool dyn_pin_out;
 163         bool dyn_pcm_assign;
 164         bool dyn_pcm_no_legacy;
 165         bool intel_hsw_fixup;   /* apply Intel platform-specific fixups */
 166         /*
 167          * Non-generic VIA/NVIDIA specific
 168          */
 169         struct hda_multi_out multiout;
 170         struct hda_pcm_stream pcm_playback;
 171
 172         bool use_acomp_notifier; /* use eld_notify callback for hotplug */
 173         bool acomp_registered; /* audio component registered in this driver */
 174         bool force_connect; /* force connectivity */
 175         struct drm_audio_component_audio_ops drm_audio_ops;
 176         int (*port2pin)(struct hda_codec *, int); /* reverse port/pin mapping */
 177
 178         struct hdac_chmap chmap;
 179         hda_nid_t vendor_nid;
 180         const int *port_map;
 181         int port_num;
 182         bool send_silent_stream; /* Flag to enable silent stream feature */
 183 };
 184
 185 #ifdef CONFIG_SND_HDA_COMPONENT
 186 static inline bool codec_has_acomp(struct hda_codec *codec)
 187 {
 188         struct hdmi_spec *spec = codec->spec;
 189         return spec->use_acomp_notifier;
 190 }
 191 #else
 192 #define codec_has_acomp(codec)  false
 193 #endif
 194
 195 struct hdmi_audio_infoframe {
 196         u8 type; /* 0x84 */
 197         u8 ver;  /* 0x01 */
 198         u8 len;  /* 0x0a */
 199
 200         u8 checksum;
 201
 202         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 203         u8 SS01_SF24;
 204         u8 CXT04;
 205         u8 CA;
 206         u8 LFEPBL01_LSV36_DM_INH7;
 207 };
 208
 209 struct dp_audio_infoframe {
 210         u8 type; /* 0x84 */
 211         u8 len;  /* 0x1b */
 212         u8 ver;  /* 0x11 << 2 */
 213
 214         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 215         u8 SS01_SF24;
 216         u8 CXT04;
 217         u8 CA;
 218         u8 LFEPBL01_LSV36_DM_INH7;
 219 };
 220
 221 union audio_infoframe {
 222         struct hdmi_audio_infoframe hdmi;
 223         struct dp_audio_infoframe dp;
 224         u8 bytes[0];
 225 };
 226
 227 /*
 228  * HDMI routines
 229  */
 230
 231 #define get_pin(spec, idx) \
 232         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 233 #define get_cvt(spec, idx) \
 234         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 235 /* obtain hdmi_pcm object assigned to idx */
 236 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 237 /* obtain hda_pcm object assigned to idx */
 238 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 239
 240 static int pin_id_to_pin_index(struct hda_codec *codec,
 241                                hda_nid_t pin_nid, int dev_id)
 242 {
 243         struct hdmi_spec *spec = codec->spec;
 244         int pin_idx;
 245         struct hdmi_spec_per_pin *per_pin;
 246
 247         /*
 248          * (dev_id == -1) means it is NON-MST pin
 249          * return the first virtual pin on this port
 250          */
 251         if (dev_id == -1)
 252                 dev_id = 0;
 253
 254         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 255                 per_pin = get_pin(spec, pin_idx);
 256                 if ((per_pin->pin_nid == pin_nid) &&
 257                         (per_pin->dev_id == dev_id))
 258                         return pin_idx;
 259         }
 260
 261         codec_warn(codec, "HDMI: pin NID 0x%x not registered\n", pin_nid);
 262         return -EINVAL;
 263 }
 264
 265 static int hinfo_to_pcm_index(struct hda_codec *codec,
 266                         struct hda_pcm_stream *hinfo)
 267 {
 268         struct hdmi_spec *spec = codec->spec;
 269         int pcm_idx;
 270
 271         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 272                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 273                         return pcm_idx;
 274
 275         codec_warn(codec, "HDMI: hinfo %p not tied to a PCM\n", hinfo);
 276         return -EINVAL;
 277 }
 278
 279 static int hinfo_to_pin_index(struct hda_codec *codec,
 280                               struct hda_pcm_stream *hinfo)
 281 {
 282         struct hdmi_spec *spec = codec->spec;
 283         struct hdmi_spec_per_pin *per_pin;
 284         int pin_idx;
 285
 286         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 287                 per_pin = get_pin(spec, pin_idx);
 288                 if (per_pin->pcm &&
 289                         per_pin->pcm->pcm->stream == hinfo)
 290                         return pin_idx;
 291         }
 292
 293         codec_dbg(codec, "HDMI: hinfo %p (pcm %d) not registered\n", hinfo,
 294                   hinfo_to_pcm_index(codec, hinfo));
 295         return -EINVAL;
 296 }
 297
 298 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 299                                                 int pcm_idx)
 300 {
 301         int i;
 302         struct hdmi_spec_per_pin *per_pin;
 303
 304         for (i = 0; i < spec->num_pins; i++) {
 305                 per_pin = get_pin(spec, i);
 306                 if (per_pin->pcm_idx == pcm_idx)
 307                         return per_pin;
 308         }
 309         return NULL;
 310 }
 311
 312 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 313 {
 314         struct hdmi_spec *spec = codec->spec;
 315         int cvt_idx;
 316
 317         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 318                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 319                         return cvt_idx;
 320
 321         codec_warn(codec, "HDMI: cvt NID 0x%x not registered\n", cvt_nid);
 322         return -EINVAL;
 323 }
 324
 325 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 326                         struct snd_ctl_elem_info *uinfo)
 327 {
 328         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 329         struct hdmi_spec *spec = codec->spec;
 330         struct hdmi_spec_per_pin *per_pin;
 331         struct hdmi_eld *eld;
 332         int pcm_idx;
 333
 334         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 335
 336         pcm_idx = kcontrol->private_value;
 337         mutex_lock(&spec->pcm_lock);
 338         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 339         if (!per_pin) {
 340                 /* no pin is bound to the pcm */
 341                 uinfo->count = 0;
 342                 goto unlock;
 343         }
 344         eld = &per_pin->sink_eld;
 345         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 346
 347  unlock:
 348         mutex_unlock(&spec->pcm_lock);
 349         return 0;
 350 }
 351
 352 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 353                         struct snd_ctl_elem_value *ucontrol)
 354 {
 355         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 356         struct hdmi_spec *spec = codec->spec;
 357         struct hdmi_spec_per_pin *per_pin;
 358         struct hdmi_eld *eld;
 359         int pcm_idx;
 360         int err = 0;
 361
 362         pcm_idx = kcontrol->private_value;
 363         mutex_lock(&spec->pcm_lock);
 364         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 365         if (!per_pin) {
 366                 /* no pin is bound to the pcm */
 367                 memset(ucontrol->value.bytes.data, 0,
 368                        ARRAY_SIZE(ucontrol->value.bytes.data));
 369                 goto unlock;
 370         }
 371
 372         eld = &per_pin->sink_eld;
 373         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
 374             eld->eld_size > ELD_MAX_SIZE) {
 375                 snd_BUG();
 376                 err = -EINVAL;
 377                 goto unlock;
 378         }
 379
 380         memset(ucontrol->value.bytes.data, 0,
 381                ARRAY_SIZE(ucontrol->value.bytes.data));
 382         if (eld->eld_valid)
 383                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 384                        eld->eld_size);
 385
 386  unlock:
 387         mutex_unlock(&spec->pcm_lock);
 388         return err;
 389 }
 390
 391 static const struct snd_kcontrol_new eld_bytes_ctl = {
 392         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE |
 393                 SNDRV_CTL_ELEM_ACCESS_SKIP_CHECK,
 394         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 395         .name = "ELD",
 396         .info = hdmi_eld_ctl_info,
 397         .get = hdmi_eld_ctl_get,
 398 };
 399
 400 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
 401                         int device)
 402 {
 403         struct snd_kcontrol *kctl;
 404         struct hdmi_spec *spec = codec->spec;
 405         int err;
 406
 407         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 408         if (!kctl)
 409                 return -ENOMEM;
 410         kctl->private_value = pcm_idx;
 411         kctl->id.device = device;
 412
 413         /* no pin nid is associated with the kctl now
 414          * tbd: associate pin nid to eld ctl later
 415          */
 416         err = snd_hda_ctl_add(codec, 0, kctl);
 417         if (err < 0)
 418                 return err;
 419
 420         get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
 421         return 0;
 422 }
 423
 424 #ifdef BE_PARANOID
 425 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 426                                 int *packet_index, int *byte_index)
 427 {
 428         int val;
 429
 430         val = snd_hda_codec_read(codec, pin_nid, 0,
 431                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 432
 433         *packet_index = val >> 5;
 434         *byte_index = val & 0x1f;
 435 }
 436 #endif
 437
 438 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 439                                 int packet_index, int byte_index)
 440 {
 441         int val;
 442
 443         val = (packet_index << 5) | (byte_index & 0x1f);
 444
 445         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 446 }
 447
 448 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 449                                 unsigned char val)
 450 {
 451         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 452 }
 453
 454 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 455 {
 456         struct hdmi_spec *spec = codec->spec;
 457         int pin_out;
 458
 459         /* Unmute */
 460         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 461                 snd_hda_codec_write(codec, pin_nid, 0,
 462                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 463
 464         if (spec->dyn_pin_out)
 465                 /* Disable pin out until stream is active */
 466                 pin_out = 0;
 467         else
 468                 /* Enable pin out: some machines with GM965 gets broken output
 469                  * when the pin is disabled or changed while using with HDMI
 470                  */
 471                 pin_out = PIN_OUT;
 472
 473         snd_hda_codec_write(codec, pin_nid, 0,
 474                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 475 }
 476
 477 /*
 478  * ELD proc files
 479  */
 480
 481 #ifdef CONFIG_SND_PROC_FS
 482 static void print_eld_info(struct snd_info_entry *entry,
 483                            struct snd_info_buffer *buffer)
 484 {
 485         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 486
 487         mutex_lock(&per_pin->lock);
 488         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 489         mutex_unlock(&per_pin->lock);
 490 }
 491
 492 static void write_eld_info(struct snd_info_entry *entry,
 493                            struct snd_info_buffer *buffer)
 494 {
 495         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 496
 497         mutex_lock(&per_pin->lock);
 498         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 499         mutex_unlock(&per_pin->lock);
 500 }
 501
 502 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 503 {
 504         char name[32];
 505         struct hda_codec *codec = per_pin->codec;
 506         struct snd_info_entry *entry;
 507         int err;
 508
 509         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 510         err = snd_card_proc_new(codec->card, name, &entry);
 511         if (err < 0)
 512                 return err;
 513
 514         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 515         entry->c.text.write = write_eld_info;
 516         entry->mode |= 0200;
 517         per_pin->proc_entry = entry;
 518
 519         return 0;
 520 }
 521
 522 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 523 {
 524         if (!per_pin->codec->bus->shutdown) {
 525                 snd_info_free_entry(per_pin->proc_entry);
 526                 per_pin->proc_entry = NULL;
 527         }
 528 }
 529 #else
 530 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 531                                int index)
 532 {
 533         return 0;
 534 }
 535 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 536 {
 537 }
 538 #endif
 539
 540 /*
 541  * Audio InfoFrame routines
 542  */
 543
 544 /*
 545  * Enable Audio InfoFrame Transmission
 546  */
 547 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 548                                        hda_nid_t pin_nid)
 549 {
 550         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 551         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 552                                                 AC_DIPXMIT_BEST);
 553 }
 554
 555 /*
 556  * Disable Audio InfoFrame Transmission
 557  */
 558 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 559                                       hda_nid_t pin_nid)
 560 {
 561         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 562         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 563                                                 AC_DIPXMIT_DISABLE);
 564 }
 565
 566 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 567 {
 568 #ifdef CONFIG_SND_DEBUG_VERBOSE
 569         int i;
 570         int size;
 571
 572         size = snd_hdmi_get_eld_size(codec, pin_nid);
 573         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 574
 575         for (i = 0; i < 8; i++) {
 576                 size = snd_hda_codec_read(codec, pin_nid, 0,
 577                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 578                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 579         }
 580 #endif
 581 }
 582
 583 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 584 {
 585 #ifdef BE_PARANOID
 586         int i, j;
 587         int size;
 588         int pi, bi;
 589         for (i = 0; i < 8; i++) {
 590                 size = snd_hda_codec_read(codec, pin_nid, 0,
 591                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 592                 if (size == 0)
 593                         continue;
 594
 595                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 596                 for (j = 1; j < 1000; j++) {
 597                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 598                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 599                         if (pi != i)
 600                                 codec_dbg(codec, "dip index %d: %d != %d\n",
 601                                                 bi, pi, i);
 602                         if (bi == 0) /* byte index wrapped around */
 603                                 break;
 604                 }
 605                 codec_dbg(codec,
 606                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 607                         i, size, j);
 608         }
 609 #endif
 610 }
 611
 612 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 613 {
 614         u8 *bytes = (u8 *)hdmi_ai;
 615         u8 sum = 0;
 616         int i;
 617
 618         hdmi_ai->checksum = 0;
 619
 620         for (i = 0; i < sizeof(*hdmi_ai); i++)
 621                 sum += bytes[i];
 622
 623         hdmi_ai->checksum = -sum;
 624 }
 625
 626 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 627                                       hda_nid_t pin_nid,
 628                                       u8 *dip, int size)
 629 {
 630         int i;
 631
 632         hdmi_debug_dip_size(codec, pin_nid);
 633         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 634
 635         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 636         for (i = 0; i < size; i++)
 637                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 638 }
 639
 640 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 641                                     u8 *dip, int size)
 642 {
 643         u8 val;
 644         int i;
 645
 646         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 647         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 648                                                             != AC_DIPXMIT_BEST)
 649                 return false;
 650
 651         for (i = 0; i < size; i++) {
 652                 val = snd_hda_codec_read(codec, pin_nid, 0,
 653                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 654                 if (val != dip[i])
 655                         return false;
 656         }
 657
 658         return true;
 659 }
 660
 661 static int hdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
 662                             int dev_id, unsigned char *buf, int *eld_size)
 663 {
 664         snd_hda_set_dev_select(codec, nid, dev_id);
 665
 666         return snd_hdmi_get_eld(codec, nid, buf, eld_size);
 667 }
 668
 669 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
 670                                      hda_nid_t pin_nid, int dev_id,
 671                                      int ca, int active_channels,
 672                                      int conn_type)
 673 {
 674         union audio_infoframe ai;
 675
 676         memset(&ai, 0, sizeof(ai));
 677         if (conn_type == 0) { /* HDMI */
 678                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 679
 680                 hdmi_ai->type           = 0x84;
 681                 hdmi_ai->ver            = 0x01;
 682                 hdmi_ai->len            = 0x0a;
 683                 hdmi_ai->CC02_CT47      = active_channels - 1;
 684                 hdmi_ai->CA             = ca;
 685                 hdmi_checksum_audio_infoframe(hdmi_ai);
 686         } else if (conn_type == 1) { /* DisplayPort */
 687                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 688
 689                 dp_ai->type             = 0x84;
 690                 dp_ai->len              = 0x1b;
 691                 dp_ai->ver              = 0x11 << 2;
 692                 dp_ai->CC02_CT47        = active_channels - 1;
 693                 dp_ai->CA               = ca;
 694         } else {
 695                 codec_dbg(codec, "HDMI: unknown connection type at pin NID 0x%x\n", pin_nid);
 696                 return;
 697         }
 698
 699         snd_hda_set_dev_select(codec, pin_nid, dev_id);
 700
 701         /*
 702          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 703          * sizeof(*dp_ai) to avoid partial match/update problems when
 704          * the user switches between HDMI/DP monitors.
 705          */
 706         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 707                                         sizeof(ai))) {
 708                 codec_dbg(codec, "%s: pin NID=0x%x channels=%d ca=0x%02x\n",
 709                           __func__, pin_nid, active_channels, ca);
 710                 hdmi_stop_infoframe_trans(codec, pin_nid);
 711                 hdmi_fill_audio_infoframe(codec, pin_nid,
 712                                             ai.bytes, sizeof(ai));
 713                 hdmi_start_infoframe_trans(codec, pin_nid);
 714         }
 715 }
 716
 717 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
 718                                        struct hdmi_spec_per_pin *per_pin,
 719                                        bool non_pcm)
 720 {
 721         struct hdmi_spec *spec = codec->spec;
 722         struct hdac_chmap *chmap = &spec->chmap;
 723         hda_nid_t pin_nid = per_pin->pin_nid;
 724         int dev_id = per_pin->dev_id;
 725         int channels = per_pin->channels;
 726         int active_channels;
 727         struct hdmi_eld *eld;
 728         int ca;
 729
 730         if (!channels)
 731                 return;
 732
 733         snd_hda_set_dev_select(codec, pin_nid, dev_id);
 734
 735         /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
 736         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 737                 snd_hda_codec_write(codec, pin_nid, 0,
 738                                             AC_VERB_SET_AMP_GAIN_MUTE,
 739                                             AMP_OUT_UNMUTE);
 740
 741         eld = &per_pin->sink_eld;
 742
 743         ca = snd_hdac_channel_allocation(&codec->core,
 744                         eld->info.spk_alloc, channels,
 745                         per_pin->chmap_set, non_pcm, per_pin->chmap);
 746
 747         active_channels = snd_hdac_get_active_channels(ca);
 748
 749         chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
 750                                                 active_channels);
 751
 752         /*
 753          * always configure channel mapping, it may have been changed by the
 754          * user in the meantime
 755          */
 756         snd_hdac_setup_channel_mapping(&spec->chmap,
 757                                 pin_nid, non_pcm, ca, channels,
 758                                 per_pin->chmap, per_pin->chmap_set);
 759
 760         spec->ops.pin_setup_infoframe(codec, pin_nid, dev_id,
 761                                       ca, active_channels, eld->info.conn_type);
 762
 763         per_pin->non_pcm = non_pcm;
 764 }
 765
 766 /*
 767  * Unsolicited events
 768  */
 769
 770 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 771
 772 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid,
 773                                       int dev_id)
 774 {
 775         struct hdmi_spec *spec = codec->spec;
 776         int pin_idx = pin_id_to_pin_index(codec, nid, dev_id);
 777
 778         if (pin_idx < 0)
 779                 return;
 780         mutex_lock(&spec->pcm_lock);
 781         hdmi_present_sense(get_pin(spec, pin_idx), 1);
 782         mutex_unlock(&spec->pcm_lock);
 783 }
 784
 785 static void jack_callback(struct hda_codec *codec,
 786                           struct hda_jack_callback *jack)
 787 {
 788         /* stop polling when notification is enabled */
 789         if (codec_has_acomp(codec))
 790                 return;
 791
 792         check_presence_and_report(codec, jack->nid, jack->dev_id);
 793 }
 794
 795 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res,
 796                                  struct hda_jack_tbl *jack)
 797 {
 798         jack->jack_dirty = 1;
 799
 800         codec_dbg(codec,
 801                 "HDMI hot plug event: Codec=%d NID=0x%x Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
 802                 codec->addr, jack->nid, jack->dev_id, !!(res & AC_UNSOL_RES_IA),
 803                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 804
 805         check_presence_and_report(codec, jack->nid, jack->dev_id);
 806 }
 807
 808 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 809 {
 810         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 811         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 812         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 813         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 814
 815         codec_info(codec,
 816                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 817                 codec->addr,
 818                 tag,
 819                 subtag,
 820                 cp_state,
 821                 cp_ready);
 822
 823         /* TODO */
 824         if (cp_state) {
 825                 ;
 826         }
 827         if (cp_ready) {
 828                 ;
 829         }
 830 }
 831
 832
 833 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 834 {
 835         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 836         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 837         struct hda_jack_tbl *jack;
 838
 839         if (codec_has_acomp(codec))
 840                 return;
 841
 842         if (codec->dp_mst) {
 843                 int dev_entry =
 844                         (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 845
 846                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, dev_entry);
 847         } else {
 848                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, 0);
 849         }
 850
 851         if (!jack) {
 852                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
 853                 return;
 854         }
 855
 856         if (subtag == 0)
 857                 hdmi_intrinsic_event(codec, res, jack);
 858         else
 859                 hdmi_non_intrinsic_event(codec, res);
 860 }
 861
 862 static void haswell_verify_D0(struct hda_codec *codec,
 863                 hda_nid_t cvt_nid, hda_nid_t nid)
 864 {
 865         int pwr;
 866
 867         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
 868          * thus pins could only choose converter 0 for use. Make sure the
 869          * converters are in correct power state */
 870         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
 871                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
 872
 873         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
 874                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
 875                                     AC_PWRST_D0);
 876                 msleep(40);
 877                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
 878                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
 879                 codec_dbg(codec, "Haswell HDMI audio: Power for NID 0x%x is now D%d\n", nid, pwr);
 880         }
 881 }
 882
 883 /*
 884  * Callbacks
 885  */
 886
 887 /* HBR should be Non-PCM, 8 channels */
 888 #define is_hbr_format(format) \
 889         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 890
 891 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
 892                               int dev_id, bool hbr)
 893 {
 894         int pinctl, new_pinctl;
 895
 896         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 897                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
 898                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 899                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 900
 901                 if (pinctl < 0)
 902                         return hbr ? -EINVAL : 0;
 903
 904                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 905                 if (hbr)
 906                         new_pinctl |= AC_PINCTL_EPT_HBR;
 907                 else
 908                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 909
 910                 codec_dbg(codec,
 911                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
 912                             pin_nid,
 913                             pinctl == new_pinctl ? "" : "new-",
 914                             new_pinctl);
 915
 916                 if (pinctl != new_pinctl)
 917                         snd_hda_codec_write(codec, pin_nid, 0,
 918                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 919                                             new_pinctl);
 920         } else if (hbr)
 921                 return -EINVAL;
 922
 923         return 0;
 924 }
 925
 926 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 927                               hda_nid_t pin_nid, int dev_id,
 928                               u32 stream_tag, int format)
 929 {
 930         struct hdmi_spec *spec = codec->spec;
 931         unsigned int param;
 932         int err;
 933
 934         err = spec->ops.pin_hbr_setup(codec, pin_nid, dev_id,
 935                                       is_hbr_format(format));
 936
 937         if (err) {
 938                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
 939                 return err;
 940         }
 941
 942         if (spec->intel_hsw_fixup) {
 943
 944                 /*
 945                  * on recent platforms IEC Coding Type is required for HBR
 946                  * support, read current Digital Converter settings and set
 947                  * ICT bitfield if needed.
 948                  */
 949                 param = snd_hda_codec_read(codec, cvt_nid, 0,
 950                                            AC_VERB_GET_DIGI_CONVERT_1, 0);
 951
 952                 param = (param >> 16) & ~(AC_DIG3_ICT);
 953
 954                 /* on recent platforms ICT mode is required for HBR support */
 955                 if (is_hbr_format(format))
 956                         param |= 0x1;
 957
 958                 snd_hda_codec_write(codec, cvt_nid, 0,
 959                                     AC_VERB_SET_DIGI_CONVERT_3, param);
 960         }
 961
 962         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 963         return 0;
 964 }
 965
 966 /* Try to find an available converter
 967  * If pin_idx is less then zero, just try to find an available converter.
 968  * Otherwise, try to find an available converter and get the cvt mux index
 969  * of the pin.
 970  */
 971 static int hdmi_choose_cvt(struct hda_codec *codec,
 972                            int pin_idx, int *cvt_id)
 973 {
 974         struct hdmi_spec *spec = codec->spec;
 975         struct hdmi_spec_per_pin *per_pin;
 976         struct hdmi_spec_per_cvt *per_cvt = NULL;
 977         int cvt_idx, mux_idx = 0;
 978
 979         /* pin_idx < 0 means no pin will be bound to the converter */
 980         if (pin_idx < 0)
 981                 per_pin = NULL;
 982         else
 983                 per_pin = get_pin(spec, pin_idx);
 984
 985         if (per_pin && per_pin->silent_stream) {
 986                 cvt_idx = cvt_nid_to_cvt_index(codec, per_pin->cvt_nid);
 987                 if (cvt_id)
 988                         *cvt_id = cvt_idx;
 989                 return 0;
 990         }
 991
 992         /* Dynamically assign converter to stream */
 993         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 994                 per_cvt = get_cvt(spec, cvt_idx);
 995
 996                 /* Must not already be assigned */
 997                 if (per_cvt->assigned)
 998                         continue;
 999                 if (per_pin == NULL)
1000                         break;
1001                 /* Must be in pin's mux's list of converters */
1002                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1003                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1004                                 break;
1005                 /* Not in mux list */
1006                 if (mux_idx == per_pin->num_mux_nids)
1007                         continue;
1008                 break;
1009         }
1010
1011         /* No free converters */
1012         if (cvt_idx == spec->num_cvts)
1013                 return -EBUSY;
1014
1015         if (per_pin != NULL)
1016                 per_pin->mux_idx = mux_idx;
1017
1018         if (cvt_id)
1019                 *cvt_id = cvt_idx;
1020
1021         return 0;
1022 }
1023
1024 /* Assure the pin select the right convetor */
1025 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1026                         struct hdmi_spec_per_pin *per_pin)
1027 {
1028         hda_nid_t pin_nid = per_pin->pin_nid;
1029         int mux_idx, curr;
1030
1031         mux_idx = per_pin->mux_idx;
1032         curr = snd_hda_codec_read(codec, pin_nid, 0,
1033                                           AC_VERB_GET_CONNECT_SEL, 0);
1034         if (curr != mux_idx)
1035                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1036                                             AC_VERB_SET_CONNECT_SEL,
1037                                             mux_idx);
1038 }
1039
1040 /* get the mux index for the converter of the pins
1041  * converter's mux index is the same for all pins on Intel platform
1042  */
1043 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1044                         hda_nid_t cvt_nid)
1045 {
1046         int i;
1047
1048         for (i = 0; i < spec->num_cvts; i++)
1049                 if (spec->cvt_nids[i] == cvt_nid)
1050                         return i;
1051         return -EINVAL;
1052 }
1053
1054 /* Intel HDMI workaround to fix audio routing issue:
1055  * For some Intel display codecs, pins share the same connection list.
1056  * So a conveter can be selected by multiple pins and playback on any of these
1057  * pins will generate sound on the external display, because audio flows from
1058  * the same converter to the display pipeline. Also muting one pin may make
1059  * other pins have no sound output.
1060  * So this function assures that an assigned converter for a pin is not selected
1061  * by any other pins.
1062  */
1063 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1064                                          hda_nid_t pin_nid,
1065                                          int dev_id, int mux_idx)
1066 {
1067         struct hdmi_spec *spec = codec->spec;
1068         hda_nid_t nid;
1069         int cvt_idx, curr;
1070         struct hdmi_spec_per_cvt *per_cvt;
1071         struct hdmi_spec_per_pin *per_pin;
1072         int pin_idx;
1073
1074         /* configure the pins connections */
1075         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1076                 int dev_id_saved;
1077                 int dev_num;
1078
1079                 per_pin = get_pin(spec, pin_idx);
1080                 /*
1081                  * pin not connected to monitor
1082                  * no need to operate on it
1083                  */
1084                 if (!per_pin->pcm)
1085                         continue;
1086
1087                 if ((per_pin->pin_nid == pin_nid) &&
1088                         (per_pin->dev_id == dev_id))
1089                         continue;
1090
1091                 /*
1092                  * if per_pin->dev_id >= dev_num,
1093                  * snd_hda_get_dev_select() will fail,
1094                  * and the following operation is unpredictable.
1095                  * So skip this situation.
1096                  */
1097                 dev_num = snd_hda_get_num_devices(codec, per_pin->pin_nid) + 1;
1098                 if (per_pin->dev_id >= dev_num)
1099                         continue;
1100
1101                 nid = per_pin->pin_nid;
1102
1103                 /*
1104                  * Calling this function should not impact
1105                  * on the device entry selection
1106                  * So let's save the dev id for each pin,
1107                  * and restore it when return
1108                  */
1109                 dev_id_saved = snd_hda_get_dev_select(codec, nid);
1110                 snd_hda_set_dev_select(codec, nid, per_pin->dev_id);
1111                 curr = snd_hda_codec_read(codec, nid, 0,
1112                                           AC_VERB_GET_CONNECT_SEL, 0);
1113                 if (curr != mux_idx) {
1114                         snd_hda_set_dev_select(codec, nid, dev_id_saved);
1115                         continue;
1116                 }
1117
1118
1119                 /* choose an unassigned converter. The conveters in the
1120                  * connection list are in the same order as in the codec.
1121                  */
1122                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1123                         per_cvt = get_cvt(spec, cvt_idx);
1124                         if (!per_cvt->assigned) {
1125                                 codec_dbg(codec,
1126                                           "choose cvt %d for pin NID 0x%x\n",
1127                                           cvt_idx, nid);
1128                                 snd_hda_codec_write_cache(codec, nid, 0,
1129                                             AC_VERB_SET_CONNECT_SEL,
1130                                             cvt_idx);
1131                                 break;
1132                         }
1133                 }
1134                 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1135         }
1136 }
1137
1138 /* A wrapper of intel_not_share_asigned_cvt() */
1139 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1140                         hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid)
1141 {
1142         int mux_idx;
1143         struct hdmi_spec *spec = codec->spec;
1144
1145         /* On Intel platform, the mapping of converter nid to
1146          * mux index of the pins are always the same.
1147          * The pin nid may be 0, this means all pins will not
1148          * share the converter.
1149          */
1150         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1151         if (mux_idx >= 0)
1152                 intel_not_share_assigned_cvt(codec, pin_nid, dev_id, mux_idx);
1153 }
1154
1155 /* skeleton caller of pin_cvt_fixup ops */
1156 static void pin_cvt_fixup(struct hda_codec *codec,
1157                           struct hdmi_spec_per_pin *per_pin,
1158                           hda_nid_t cvt_nid)
1159 {
1160         struct hdmi_spec *spec = codec->spec;
1161
1162         if (spec->ops.pin_cvt_fixup)
1163                 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid);
1164 }
1165
1166 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1167  * in dyn_pcm_assign mode.
1168  */
1169 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1170                          struct hda_codec *codec,
1171                          struct snd_pcm_substream *substream)
1172 {
1173         struct hdmi_spec *spec = codec->spec;
1174         struct snd_pcm_runtime *runtime = substream->runtime;
1175         int cvt_idx, pcm_idx;
1176         struct hdmi_spec_per_cvt *per_cvt = NULL;
1177         int err;
1178
1179         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1180         if (pcm_idx < 0)
1181                 return -EINVAL;
1182
1183         err = hdmi_choose_cvt(codec, -1, &cvt_idx);
1184         if (err)
1185                 return err;
1186
1187         per_cvt = get_cvt(spec, cvt_idx);
1188         per_cvt->assigned = 1;
1189         hinfo->nid = per_cvt->cvt_nid;
1190
1191         pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid);
1192
1193         set_bit(pcm_idx, &spec->pcm_in_use);
1194         /* todo: setup spdif ctls assign */
1195
1196         /* Initially set the converter's capabilities */
1197         hinfo->channels_min = per_cvt->channels_min;
1198         hinfo->channels_max = per_cvt->channels_max;
1199         hinfo->rates = per_cvt->rates;
1200         hinfo->formats = per_cvt->formats;
1201         hinfo->maxbps = per_cvt->maxbps;
1202
1203         /* Store the updated parameters */
1204         runtime->hw.channels_min = hinfo->channels_min;
1205         runtime->hw.channels_max = hinfo->channels_max;
1206         runtime->hw.formats = hinfo->formats;
1207         runtime->hw.rates = hinfo->rates;
1208
1209         snd_pcm_hw_constraint_step(substream->runtime, 0,
1210                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1211         return 0;
1212 }
1213
1214 /*
1215  * HDA PCM callbacks
1216  */
1217 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1218                          struct hda_codec *codec,
1219                          struct snd_pcm_substream *substream)
1220 {
1221         struct hdmi_spec *spec = codec->spec;
1222         struct snd_pcm_runtime *runtime = substream->runtime;
1223         int pin_idx, cvt_idx, pcm_idx;
1224         struct hdmi_spec_per_pin *per_pin;
1225         struct hdmi_eld *eld;
1226         struct hdmi_spec_per_cvt *per_cvt = NULL;
1227         int err;
1228
1229         /* Validate hinfo */
1230         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1231         if (pcm_idx < 0)
1232                 return -EINVAL;
1233
1234         mutex_lock(&spec->pcm_lock);
1235         pin_idx = hinfo_to_pin_index(codec, hinfo);
1236         if (!spec->dyn_pcm_assign) {
1237                 if (snd_BUG_ON(pin_idx < 0)) {
1238                         err = -EINVAL;
1239                         goto unlock;
1240                 }
1241         } else {
1242                 /* no pin is assigned to the PCM
1243                  * PA need pcm open successfully when probe
1244                  */
1245                 if (pin_idx < 0) {
1246                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1247                         goto unlock;
1248                 }
1249         }
1250
1251         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1252         if (err < 0)
1253                 goto unlock;
1254
1255         per_cvt = get_cvt(spec, cvt_idx);
1256         /* Claim converter */
1257         per_cvt->assigned = 1;
1258
1259         set_bit(pcm_idx, &spec->pcm_in_use);
1260         per_pin = get_pin(spec, pin_idx);
1261         per_pin->cvt_nid = per_cvt->cvt_nid;
1262         hinfo->nid = per_cvt->cvt_nid;
1263
1264         /* flip stripe flag for the assigned stream if supported */
1265         if (get_wcaps(codec, per_cvt->cvt_nid) & AC_WCAP_STRIPE)
1266                 azx_stream(get_azx_dev(substream))->stripe = 1;
1267
1268         snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1269         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1270                             AC_VERB_SET_CONNECT_SEL,
1271                             per_pin->mux_idx);
1272
1273         /* configure unused pins to choose other converters */
1274         pin_cvt_fixup(codec, per_pin, 0);
1275
1276         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1277
1278         /* Initially set the converter's capabilities */
1279         hinfo->channels_min = per_cvt->channels_min;
1280         hinfo->channels_max = per_cvt->channels_max;
1281         hinfo->rates = per_cvt->rates;
1282         hinfo->formats = per_cvt->formats;
1283         hinfo->maxbps = per_cvt->maxbps;
1284
1285         eld = &per_pin->sink_eld;
1286         /* Restrict capabilities by ELD if this isn't disabled */
1287         if (!static_hdmi_pcm && eld->eld_valid) {
1288                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1289                 if (hinfo->channels_min > hinfo->channels_max ||
1290                     !hinfo->rates || !hinfo->formats) {
1291                         per_cvt->assigned = 0;
1292                         hinfo->nid = 0;
1293                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1294                         err = -ENODEV;
1295                         goto unlock;
1296                 }
1297         }
1298
1299         /* Store the updated parameters */
1300         runtime->hw.channels_min = hinfo->channels_min;
1301         runtime->hw.channels_max = hinfo->channels_max;
1302         runtime->hw.formats = hinfo->formats;
1303         runtime->hw.rates = hinfo->rates;
1304
1305         snd_pcm_hw_constraint_step(substream->runtime, 0,
1306                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1307  unlock:
1308         mutex_unlock(&spec->pcm_lock);
1309         return err;
1310 }
1311
1312 /*
1313  * HDA/HDMI auto parsing
1314  */
1315 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1316 {
1317         struct hdmi_spec *spec = codec->spec;
1318         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1319         hda_nid_t pin_nid = per_pin->pin_nid;
1320         int dev_id = per_pin->dev_id;
1321         int conns;
1322
1323         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1324                 codec_warn(codec,
1325                            "HDMI: pin NID 0x%x wcaps %#x does not support connection list\n",
1326                            pin_nid, get_wcaps(codec, pin_nid));
1327                 return -EINVAL;
1328         }
1329
1330         snd_hda_set_dev_select(codec, pin_nid, dev_id);
1331
1332         if (spec->intel_hsw_fixup) {
1333                 conns = spec->num_cvts;
1334                 memcpy(per_pin->mux_nids, spec->cvt_nids,
1335                        sizeof(hda_nid_t) * conns);
1336         } else {
1337                 conns = snd_hda_get_raw_connections(codec, pin_nid,
1338                                                     per_pin->mux_nids,
1339                                                     HDA_MAX_CONNECTIONS);
1340         }
1341
1342         /* all the device entries on the same pin have the same conn list */
1343         per_pin->num_mux_nids = conns;
1344
1345         return 0;
1346 }
1347
1348 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1349                               struct hdmi_spec_per_pin *per_pin)
1350 {
1351         int i;
1352
1353         /* on the new machines, try to assign the pcm slot dynamically,
1354          * not use the preferred fixed map (legacy way) anymore.
1355          */
1356         if (spec->dyn_pcm_no_legacy)
1357                 goto last_try;
1358
1359         /*
1360          * generic_hdmi_build_pcms() may allocate extra PCMs on some
1361          * platforms (with maximum of 'num_nids + dev_num - 1')
1362          *
1363          * The per_pin of pin_nid_idx=n and dev_id=m prefers to get pcm-n
1364          * if m==0. This guarantees that dynamic pcm assignments are compatible
1365          * with the legacy static per_pin-pcm assignment that existed in the
1366          * days before DP-MST.
1367          *
1368          * Intel DP-MST prefers this legacy behavior for compatibility, too.
1369          *
1370          * per_pin of m!=0 prefers to get pcm=(num_nids + (m - 1)).
1371          */
1372
1373         if (per_pin->dev_id == 0 || spec->intel_hsw_fixup) {
1374                 if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1375                         return per_pin->pin_nid_idx;
1376         } else {
1377                 i = spec->num_nids + (per_pin->dev_id - 1);
1378                 if (i < spec->pcm_used && !(test_bit(i, &spec->pcm_bitmap)))
1379                         return i;
1380         }
1381
1382         /* have a second try; check the area over num_nids */
1383         for (i = spec->num_nids; i < spec->pcm_used; i++) {
1384                 if (!test_bit(i, &spec->pcm_bitmap))
1385                         return i;
1386         }
1387
1388  last_try:
1389         /* the last try; check the empty slots in pins */
1390         for (i = 0; i < spec->num_nids; i++) {
1391                 if (!test_bit(i, &spec->pcm_bitmap))
1392                         return i;
1393         }
1394         return -EBUSY;
1395 }
1396
1397 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1398                                 struct hdmi_spec_per_pin *per_pin)
1399 {
1400         int idx;
1401
1402         /* pcm already be attached to the pin */
1403         if (per_pin->pcm)
1404                 return;
1405         idx = hdmi_find_pcm_slot(spec, per_pin);
1406         if (idx == -EBUSY)
1407                 return;
1408         per_pin->pcm_idx = idx;
1409         per_pin->pcm = get_hdmi_pcm(spec, idx);
1410         set_bit(idx, &spec->pcm_bitmap);
1411 }
1412
1413 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1414                                 struct hdmi_spec_per_pin *per_pin)
1415 {
1416         int idx;
1417
1418         /* pcm already be detached from the pin */
1419         if (!per_pin->pcm)
1420                 return;
1421         idx = per_pin->pcm_idx;
1422         per_pin->pcm_idx = -1;
1423         per_pin->pcm = NULL;
1424         if (idx >= 0 && idx < spec->pcm_used)
1425                 clear_bit(idx, &spec->pcm_bitmap);
1426 }
1427
1428 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1429                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1430 {
1431         int mux_idx;
1432
1433         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1434                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1435                         break;
1436         return mux_idx;
1437 }
1438
1439 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1440
1441 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1442                            struct hdmi_spec_per_pin *per_pin)
1443 {
1444         struct hda_codec *codec = per_pin->codec;
1445         struct hda_pcm *pcm;
1446         struct hda_pcm_stream *hinfo;
1447         struct snd_pcm_substream *substream;
1448         int mux_idx;
1449         bool non_pcm;
1450
1451         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1452                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1453         else
1454                 return;
1455         if (!pcm->pcm)
1456                 return;
1457         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1458                 return;
1459
1460         /* hdmi audio only uses playback and one substream */
1461         hinfo = pcm->stream;
1462         substream = pcm->pcm->streams[0].substream;
1463
1464         per_pin->cvt_nid = hinfo->nid;
1465
1466         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1467         if (mux_idx < per_pin->num_mux_nids) {
1468                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1469                                    per_pin->dev_id);
1470                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1471                                 AC_VERB_SET_CONNECT_SEL,
1472                                 mux_idx);
1473         }
1474         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1475
1476         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1477         if (substream->runtime)
1478                 per_pin->channels = substream->runtime->channels;
1479         per_pin->setup = true;
1480         per_pin->mux_idx = mux_idx;
1481
1482         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1483 }
1484
1485 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1486                            struct hdmi_spec_per_pin *per_pin)
1487 {
1488         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1489                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1490
1491         per_pin->chmap_set = false;
1492         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1493
1494         per_pin->setup = false;
1495         per_pin->channels = 0;
1496 }
1497
1498 static struct snd_jack *pin_idx_to_pcm_jack(struct hda_codec *codec,
1499                                             struct hdmi_spec_per_pin *per_pin)
1500 {
1501         struct hdmi_spec *spec = codec->spec;
1502
1503         if (per_pin->pcm_idx >= 0)
1504                 return spec->pcm_rec[per_pin->pcm_idx].jack;
1505         else
1506                 return NULL;
1507 }
1508
1509 /* update per_pin ELD from the given new ELD;
1510  * setup info frame and notification accordingly
1511  * also notify ELD kctl and report jack status changes
1512  */
1513 static void update_eld(struct hda_codec *codec,
1514                        struct hdmi_spec_per_pin *per_pin,
1515                        struct hdmi_eld *eld,
1516                        int repoll)
1517 {
1518         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1519         struct hdmi_spec *spec = codec->spec;
1520         struct snd_jack *pcm_jack;
1521         bool old_eld_valid = pin_eld->eld_valid;
1522         bool eld_changed;
1523         int pcm_idx;
1524
1525         if (eld->eld_valid) {
1526                 if (eld->eld_size <= 0 ||
1527                     snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1528                                        eld->eld_size) < 0) {
1529                         eld->eld_valid = false;
1530                         if (repoll) {
1531                                 schedule_delayed_work(&per_pin->work,
1532                                                       msecs_to_jiffies(300));
1533                                 return;
1534                         }
1535                 }
1536         }
1537
1538         if (!eld->eld_valid || eld->eld_size <= 0) {
1539                 eld->eld_valid = false;
1540                 eld->eld_size = 0;
1541         }
1542
1543         /* for monitor disconnection, save pcm_idx firstly */
1544         pcm_idx = per_pin->pcm_idx;
1545
1546         /*
1547          * pcm_idx >=0 before update_eld() means it is in monitor
1548          * disconnected event. Jack must be fetched before update_eld().
1549          */
1550         pcm_jack = pin_idx_to_pcm_jack(codec, per_pin);
1551
1552         if (spec->dyn_pcm_assign) {
1553                 if (eld->eld_valid) {
1554                         hdmi_attach_hda_pcm(spec, per_pin);
1555                         hdmi_pcm_setup_pin(spec, per_pin);
1556                 } else {
1557                         hdmi_pcm_reset_pin(spec, per_pin);
1558                         hdmi_detach_hda_pcm(spec, per_pin);
1559                 }
1560         }
1561         /* if pcm_idx == -1, it means this is in monitor connection event
1562          * we can get the correct pcm_idx now.
1563          */
1564         if (pcm_idx == -1)
1565                 pcm_idx = per_pin->pcm_idx;
1566         if (!pcm_jack)
1567                 pcm_jack = pin_idx_to_pcm_jack(codec, per_pin);
1568
1569         if (eld->eld_valid)
1570                 snd_hdmi_show_eld(codec, &eld->info);
1571
1572         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1573         eld_changed |= (pin_eld->monitor_present != eld->monitor_present);
1574         if (!eld_changed && eld->eld_valid && pin_eld->eld_valid)
1575                 if (pin_eld->eld_size != eld->eld_size ||
1576                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1577                            eld->eld_size) != 0)
1578                         eld_changed = true;
1579
1580         if (eld_changed) {
1581                 pin_eld->monitor_present = eld->monitor_present;
1582                 pin_eld->eld_valid = eld->eld_valid;
1583                 pin_eld->eld_size = eld->eld_size;
1584                 if (eld->eld_valid)
1585                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1586                                eld->eld_size);
1587                 pin_eld->info = eld->info;
1588         }
1589
1590         /*
1591          * Re-setup pin and infoframe. This is needed e.g. when
1592          * - sink is first plugged-in
1593          * - transcoder can change during stream playback on Haswell
1594          *   and this can make HW reset converter selection on a pin.
1595          */
1596         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1597                 pin_cvt_fixup(codec, per_pin, 0);
1598                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1599         }
1600
1601         if (eld_changed && pcm_idx >= 0)
1602                 snd_ctl_notify(codec->card,
1603                                SNDRV_CTL_EVENT_MASK_VALUE |
1604                                SNDRV_CTL_EVENT_MASK_INFO,
1605                                &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1606
1607         if (eld_changed && pcm_jack)
1608                 snd_jack_report(pcm_jack,
1609                                 (eld->monitor_present && eld->eld_valid) ?
1610                                 SND_JACK_AVOUT : 0);
1611 }
1612
1613 /* update ELD and jack state via HD-audio verbs */
1614 static void hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1615                                          int repoll)
1616 {
1617         struct hda_codec *codec = per_pin->codec;
1618         struct hdmi_spec *spec = codec->spec;
1619         struct hdmi_eld *eld = &spec->temp_eld;
1620         hda_nid_t pin_nid = per_pin->pin_nid;
1621         int dev_id = per_pin->dev_id;
1622         /*
1623          * Always execute a GetPinSense verb here, even when called from
1624          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1625          * response's PD bit is not the real PD value, but indicates that
1626          * the real PD value changed. An older version of the HD-audio
1627          * specification worked this way. Hence, we just ignore the data in
1628          * the unsolicited response to avoid custom WARs.
1629          */
1630         int present;
1631         int ret;
1632
1633         ret = snd_hda_power_up_pm(codec);
1634         if (ret < 0 && pm_runtime_suspended(hda_codec_dev(codec)))
1635                 goto out;
1636
1637         present = snd_hda_jack_pin_sense(codec, pin_nid, dev_id);
1638
1639         mutex_lock(&per_pin->lock);
1640         eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1641         if (eld->monitor_present)
1642                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1643         else
1644                 eld->eld_valid = false;
1645
1646         codec_dbg(codec,
1647                 "HDMI status: Codec=%d NID=0x%x Presence_Detect=%d ELD_Valid=%d\n",
1648                 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1649
1650         if (eld->eld_valid) {
1651                 if (spec->ops.pin_get_eld(codec, pin_nid, dev_id,
1652                                           eld->eld_buffer, &eld->eld_size) < 0)
1653                         eld->eld_valid = false;
1654         }
1655
1656         update_eld(codec, per_pin, eld, repoll);
1657         mutex_unlock(&per_pin->lock);
1658  out:
1659         snd_hda_power_down_pm(codec);
1660 }
1661
1662 #define I915_SILENT_RATE                48000
1663 #define I915_SILENT_CHANNELS            2
1664 #define I915_SILENT_FORMAT              SNDRV_PCM_FORMAT_S16_LE
1665 #define I915_SILENT_FORMAT_BITS 16
1666 #define I915_SILENT_FMT_MASK            0xf
1667
1668 static void silent_stream_enable(struct hda_codec *codec,
1669                                  struct hdmi_spec_per_pin *per_pin)
1670 {
1671         struct hdmi_spec *spec = codec->spec;
1672         struct hdmi_spec_per_cvt *per_cvt;
1673         int cvt_idx, pin_idx, err;
1674         unsigned int format;
1675
1676         mutex_lock(&per_pin->lock);
1677
1678         if (per_pin->setup) {
1679                 codec_dbg(codec, "hdmi: PCM already open, no silent stream\n");
1680                 goto unlock_out;
1681         }
1682
1683         pin_idx = pin_id_to_pin_index(codec, per_pin->pin_nid, per_pin->dev_id);
1684         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1685         if (err) {
1686                 codec_err(codec, "hdmi: no free converter to enable silent mode\n");
1687                 goto unlock_out;
1688         }
1689
1690         per_cvt = get_cvt(spec, cvt_idx);
1691         per_cvt->assigned = 1;
1692         per_pin->cvt_nid = per_cvt->cvt_nid;
1693         per_pin->silent_stream = true;
1694
1695         codec_dbg(codec, "hdmi: enabling silent stream pin-NID=0x%x cvt-NID=0x%x\n",
1696                   per_pin->pin_nid, per_cvt->cvt_nid);
1697
1698         snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1699         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1700                                   AC_VERB_SET_CONNECT_SEL,
1701                                   per_pin->mux_idx);
1702
1703         /* configure unused pins to choose other converters */
1704         pin_cvt_fixup(codec, per_pin, 0);
1705
1706         snd_hdac_sync_audio_rate(&codec->core, per_pin->pin_nid,
1707                                  per_pin->dev_id, I915_SILENT_RATE);
1708
1709         /* trigger silent stream generation in hw */
1710         format = snd_hdac_calc_stream_format(I915_SILENT_RATE, I915_SILENT_CHANNELS,
1711                                              I915_SILENT_FORMAT, I915_SILENT_FORMAT_BITS, 0);
1712         snd_hda_codec_setup_stream(codec, per_pin->cvt_nid,
1713                                    I915_SILENT_FMT_MASK, I915_SILENT_FMT_MASK, format);
1714         usleep_range(100, 200);
1715         snd_hda_codec_setup_stream(codec, per_pin->cvt_nid, I915_SILENT_FMT_MASK, 0, format);
1716
1717         per_pin->channels = I915_SILENT_CHANNELS;
1718         hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1719
1720  unlock_out:
1721         mutex_unlock(&per_pin->lock);
1722 }
1723
1724 static void silent_stream_disable(struct hda_codec *codec,
1725                                   struct hdmi_spec_per_pin *per_pin)
1726 {
1727         struct hdmi_spec *spec = codec->spec;
1728         struct hdmi_spec_per_cvt *per_cvt;
1729         int cvt_idx;
1730
1731         mutex_lock(&per_pin->lock);
1732         if (!per_pin->silent_stream)
1733                 goto unlock_out;
1734
1735         codec_dbg(codec, "HDMI: disable silent stream on pin-NID=0x%x cvt-NID=0x%x\n",
1736                   per_pin->pin_nid, per_pin->cvt_nid);
1737
1738         cvt_idx = cvt_nid_to_cvt_index(codec, per_pin->cvt_nid);
1739         if (cvt_idx >= 0 && cvt_idx < spec->num_cvts) {
1740                 per_cvt = get_cvt(spec, cvt_idx);
1741                 per_cvt->assigned = 0;
1742         }
1743
1744         per_pin->cvt_nid = 0;
1745         per_pin->silent_stream = false;
1746
1747  unlock_out:
1748         mutex_unlock(&per_pin->lock);
1749 }
1750
1751 /* update ELD and jack state via audio component */
1752 static void sync_eld_via_acomp(struct hda_codec *codec,
1753                                struct hdmi_spec_per_pin *per_pin)
1754 {
1755         struct hdmi_spec *spec = codec->spec;
1756         struct hdmi_eld *eld = &spec->temp_eld;
1757         bool monitor_prev, monitor_next;
1758
1759         mutex_lock(&per_pin->lock);
1760         eld->monitor_present = false;
1761         monitor_prev = per_pin->sink_eld.monitor_present;
1762         eld->eld_size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid,
1763                                       per_pin->dev_id, &eld->monitor_present,
1764                                       eld->eld_buffer, ELD_MAX_SIZE);
1765         eld->eld_valid = (eld->eld_size > 0);
1766         update_eld(codec, per_pin, eld, 0);
1767         monitor_next = per_pin->sink_eld.monitor_present;
1768         mutex_unlock(&per_pin->lock);
1769
1770         /*
1771          * Power-up will call hdmi_present_sense, so the PM calls
1772          * have to be done without mutex held.
1773          */
1774
1775         if (spec->send_silent_stream) {
1776                 int pm_ret;
1777
1778                 if (!monitor_prev && monitor_next) {
1779                         pm_ret = snd_hda_power_up_pm(codec);
1780                         if (pm_ret < 0)
1781                                 codec_err(codec,
1782                                 "Monitor plugged-in, Failed to power up codec ret=[%d]\n",
1783                                 pm_ret);
1784                         silent_stream_enable(codec, per_pin);
1785                 } else if (monitor_prev && !monitor_next) {
1786                         silent_stream_disable(codec, per_pin);
1787                         pm_ret = snd_hda_power_down_pm(codec);
1788                         if (pm_ret < 0)
1789                                 codec_err(codec,
1790                                 "Monitor plugged-out, Failed to power down codec ret=[%d]\n",
1791                                 pm_ret);
1792                 }
1793         }
1794 }
1795
1796 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1797 {
1798         struct hda_codec *codec = per_pin->codec;
1799
1800         if (!codec_has_acomp(codec))
1801                 hdmi_present_sense_via_verbs(per_pin, repoll);
1802         else
1803                 sync_eld_via_acomp(codec, per_pin);
1804 }
1805
1806 static void hdmi_repoll_eld(struct work_struct *work)
1807 {
1808         struct hdmi_spec_per_pin *per_pin =
1809         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1810         struct hda_codec *codec = per_pin->codec;
1811         struct hdmi_spec *spec = codec->spec;
1812         struct hda_jack_tbl *jack;
1813
1814         jack = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
1815                                         per_pin->dev_id);
1816         if (jack)
1817                 jack->jack_dirty = 1;
1818
1819         if (per_pin->repoll_count++ > 6)
1820                 per_pin->repoll_count = 0;
1821
1822         mutex_lock(&spec->pcm_lock);
1823         hdmi_present_sense(per_pin, per_pin->repoll_count);
1824         mutex_unlock(&spec->pcm_lock);
1825 }
1826
1827 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1828 {
1829         struct hdmi_spec *spec = codec->spec;
1830         unsigned int caps, config;
1831         int pin_idx;
1832         struct hdmi_spec_per_pin *per_pin;
1833         int err;
1834         int dev_num, i;
1835
1836         caps = snd_hda_query_pin_caps(codec, pin_nid);
1837         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1838                 return 0;
1839
1840         /*
1841          * For DP MST audio, Configuration Default is the same for
1842          * all device entries on the same pin
1843          */
1844         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1845         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE &&
1846             !spec->force_connect)
1847                 return 0;
1848
1849         /*
1850          * To simplify the implementation, malloc all
1851          * the virtual pins in the initialization statically
1852          */
1853         if (spec->intel_hsw_fixup) {
1854                 /*
1855                  * On Intel platforms, device entries count returned
1856                  * by AC_PAR_DEVLIST_LEN is dynamic, and depends on
1857                  * the type of receiver that is connected. Allocate pin
1858                  * structures based on worst case.
1859                  */
1860                 dev_num = spec->dev_num;
1861         } else if (spec->dyn_pcm_assign && codec->dp_mst) {
1862                 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1;
1863                 /*
1864                  * spec->dev_num is the maxinum number of device entries
1865                  * among all the pins
1866                  */
1867                 spec->dev_num = (spec->dev_num > dev_num) ?
1868                         spec->dev_num : dev_num;
1869         } else {
1870                 /*
1871                  * If the platform doesn't support DP MST,
1872                  * manually set dev_num to 1. This means
1873                  * the pin has only one device entry.
1874                  */
1875                 dev_num = 1;
1876                 spec->dev_num = 1;
1877         }
1878
1879         for (i = 0; i < dev_num; i++) {
1880                 pin_idx = spec->num_pins;
1881                 per_pin = snd_array_new(&spec->pins);
1882
1883                 if (!per_pin)
1884                         return -ENOMEM;
1885
1886                 if (spec->dyn_pcm_assign) {
1887                         per_pin->pcm = NULL;
1888                         per_pin->pcm_idx = -1;
1889                 } else {
1890                         per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1891                         per_pin->pcm_idx = pin_idx;
1892                 }
1893                 per_pin->pin_nid = pin_nid;
1894                 per_pin->pin_nid_idx = spec->num_nids;
1895                 per_pin->dev_id = i;
1896                 per_pin->non_pcm = false;
1897                 snd_hda_set_dev_select(codec, pin_nid, i);
1898                 err = hdmi_read_pin_conn(codec, pin_idx);
1899                 if (err < 0)
1900                         return err;
1901                 spec->num_pins++;
1902         }
1903         spec->num_nids++;
1904
1905         return 0;
1906 }
1907
1908 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1909 {
1910         struct hdmi_spec *spec = codec->spec;
1911         struct hdmi_spec_per_cvt *per_cvt;
1912         unsigned int chans;
1913         int err;
1914
1915         chans = get_wcaps(codec, cvt_nid);
1916         chans = get_wcaps_channels(chans);
1917
1918         per_cvt = snd_array_new(&spec->cvts);
1919         if (!per_cvt)
1920                 return -ENOMEM;
1921
1922         per_cvt->cvt_nid = cvt_nid;
1923         per_cvt->channels_min = 2;
1924         if (chans <= 16) {
1925                 per_cvt->channels_max = chans;
1926                 if (chans > spec->chmap.channels_max)
1927                         spec->chmap.channels_max = chans;
1928         }
1929
1930         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1931                                           &per_cvt->rates,
1932                                           &per_cvt->formats,
1933                                           &per_cvt->maxbps);
1934         if (err < 0)
1935                 return err;
1936
1937         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1938                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1939         spec->num_cvts++;
1940
1941         return 0;
1942 }
1943
1944 static const struct snd_pci_quirk force_connect_list[] = {
1945         SND_PCI_QUIRK(0x103c, 0x870f, "HP", 1),
1946         SND_PCI_QUIRK(0x103c, 0x871a, "HP", 1),
1947         SND_PCI_QUIRK(0x1462, 0xec94, "MS-7C94", 1),
1948         SND_PCI_QUIRK(0x8086, 0x2081, "Intel NUC 10", 1),
1949         {}
1950 };
1951
1952 static int hdmi_parse_codec(struct hda_codec *codec)
1953 {
1954         struct hdmi_spec *spec = codec->spec;
1955         hda_nid_t start_nid;
1956         unsigned int caps;
1957         int i, nodes;
1958         const struct snd_pci_quirk *q;
1959
1960         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &start_nid);
1961         if (!start_nid || nodes < 0) {
1962                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1963                 return -EINVAL;
1964         }
1965
1966         if (enable_all_pins)
1967                 spec->force_connect = true;
1968
1969         q = snd_pci_quirk_lookup(codec->bus->pci, force_connect_list);
1970
1971         if (q && q->value)
1972                 spec->force_connect = true;
1973
1974         /*
1975          * hdmi_add_pin() assumes total amount of converters to
1976          * be known, so first discover all converters
1977          */
1978         for (i = 0; i < nodes; i++) {
1979                 hda_nid_t nid = start_nid + i;
1980
1981                 caps = get_wcaps(codec, nid);
1982
1983                 if (!(caps & AC_WCAP_DIGITAL))
1984                         continue;
1985
1986                 if (get_wcaps_type(caps) == AC_WID_AUD_OUT)
1987                         hdmi_add_cvt(codec, nid);
1988         }
1989
1990         /* discover audio pins */
1991         for (i = 0; i < nodes; i++) {
1992                 hda_nid_t nid = start_nid + i;
1993
1994                 caps = get_wcaps(codec, nid);
1995
1996                 if (!(caps & AC_WCAP_DIGITAL))
1997                         continue;
1998
1999                 if (get_wcaps_type(caps) == AC_WID_PIN)
2000                         hdmi_add_pin(codec, nid);
2001         }
2002
2003         return 0;
2004 }
2005
2006 /*
2007  */
2008 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
2009 {
2010         struct hda_spdif_out *spdif;
2011         bool non_pcm;
2012
2013         mutex_lock(&codec->spdif_mutex);
2014         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
2015         /* Add sanity check to pass klockwork check.
2016          * This should never happen.
2017          */
2018         if (WARN_ON(spdif == NULL)) {
2019                 mutex_unlock(&codec->spdif_mutex);
2020                 return true;
2021         }
2022         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
2023         mutex_unlock(&codec->spdif_mutex);
2024         return non_pcm;
2025 }
2026
2027 /*
2028  * HDMI callbacks
2029  */
2030
2031 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2032                                            struct hda_codec *codec,
2033                                            unsigned int stream_tag,
2034                                            unsigned int format,
2035                                            struct snd_pcm_substream *substream)
2036 {
2037         hda_nid_t cvt_nid = hinfo->nid;
2038         struct hdmi_spec *spec = codec->spec;
2039         int pin_idx;
2040         struct hdmi_spec_per_pin *per_pin;
2041         struct snd_pcm_runtime *runtime = substream->runtime;
2042         bool non_pcm;
2043         int pinctl, stripe;
2044         int err = 0;
2045
2046         mutex_lock(&spec->pcm_lock);
2047         pin_idx = hinfo_to_pin_index(codec, hinfo);
2048         if (spec->dyn_pcm_assign && pin_idx < 0) {
2049                 /* when dyn_pcm_assign and pcm is not bound to a pin
2050                  * skip pin setup and return 0 to make audio playback
2051                  * be ongoing
2052                  */
2053                 pin_cvt_fixup(codec, NULL, cvt_nid);
2054                 snd_hda_codec_setup_stream(codec, cvt_nid,
2055                                         stream_tag, 0, format);
2056                 goto unlock;
2057         }
2058
2059         if (snd_BUG_ON(pin_idx < 0)) {
2060                 err = -EINVAL;
2061                 goto unlock;
2062         }
2063         per_pin = get_pin(spec, pin_idx);
2064
2065         /* Verify pin:cvt selections to avoid silent audio after S3.
2066          * After S3, the audio driver restores pin:cvt selections
2067          * but this can happen before gfx is ready and such selection
2068          * is overlooked by HW. Thus multiple pins can share a same
2069          * default convertor and mute control will affect each other,
2070          * which can cause a resumed audio playback become silent
2071          * after S3.
2072          */
2073         pin_cvt_fixup(codec, per_pin, 0);
2074
2075         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
2076         /* Todo: add DP1.2 MST audio support later */
2077         if (codec_has_acomp(codec))
2078                 snd_hdac_sync_audio_rate(&codec->core, per_pin->pin_nid,
2079                                          per_pin->dev_id, runtime->rate);
2080
2081         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
2082         mutex_lock(&per_pin->lock);
2083         per_pin->channels = substream->runtime->channels;
2084         per_pin->setup = true;
2085
2086         if (get_wcaps(codec, cvt_nid) & AC_WCAP_STRIPE) {
2087                 stripe = snd_hdac_get_stream_stripe_ctl(&codec->bus->core,
2088                                                         substream);
2089                 snd_hda_codec_write(codec, cvt_nid, 0,
2090                                     AC_VERB_SET_STRIPE_CONTROL,
2091                                     stripe);
2092         }
2093
2094         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
2095         mutex_unlock(&per_pin->lock);
2096         if (spec->dyn_pin_out) {
2097                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2098                                        per_pin->dev_id);
2099                 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2100                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2101                 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2102                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
2103                                     pinctl | PIN_OUT);
2104         }
2105
2106         /* snd_hda_set_dev_select() has been called before */
2107         err = spec->ops.setup_stream(codec, cvt_nid, per_pin->pin_nid,
2108                                      per_pin->dev_id, stream_tag, format);
2109  unlock:
2110         mutex_unlock(&spec->pcm_lock);
2111         return err;
2112 }
2113
2114 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2115                                              struct hda_codec *codec,
2116                                              struct snd_pcm_substream *substream)
2117 {
2118         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
2119         return 0;
2120 }
2121
2122 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
2123                           struct hda_codec *codec,
2124                           struct snd_pcm_substream *substream)
2125 {
2126         struct hdmi_spec *spec = codec->spec;
2127         int cvt_idx, pin_idx, pcm_idx;
2128         struct hdmi_spec_per_cvt *per_cvt;
2129         struct hdmi_spec_per_pin *per_pin;
2130         int pinctl;
2131         int err = 0;
2132
2133         mutex_lock(&spec->pcm_lock);
2134         if (hinfo->nid) {
2135                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
2136                 if (snd_BUG_ON(pcm_idx < 0)) {
2137                         err = -EINVAL;
2138                         goto unlock;
2139                 }
2140                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
2141                 if (snd_BUG_ON(cvt_idx < 0)) {
2142                         err = -EINVAL;
2143                         goto unlock;
2144                 }
2145                 per_cvt = get_cvt(spec, cvt_idx);
2146                 per_cvt->assigned = 0;
2147                 hinfo->nid = 0;
2148
2149                 azx_stream(get_azx_dev(substream))->stripe = 0;
2150
2151                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2152                 clear_bit(pcm_idx, &spec->pcm_in_use);
2153                 pin_idx = hinfo_to_pin_index(codec, hinfo);
2154                 if (spec->dyn_pcm_assign && pin_idx < 0)
2155                         goto unlock;
2156
2157                 if (snd_BUG_ON(pin_idx < 0)) {
2158                         err = -EINVAL;
2159                         goto unlock;
2160                 }
2161                 per_pin = get_pin(spec, pin_idx);
2162
2163                 if (spec->dyn_pin_out) {
2164                         snd_hda_set_dev_select(codec, per_pin->pin_nid,
2165                                                per_pin->dev_id);
2166                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2167                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2168                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2169                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
2170                                             pinctl & ~PIN_OUT);
2171                 }
2172
2173                 mutex_lock(&per_pin->lock);
2174                 per_pin->chmap_set = false;
2175                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2176
2177                 per_pin->setup = false;
2178                 per_pin->channels = 0;
2179                 mutex_unlock(&per_pin->lock);
2180         }
2181
2182 unlock:
2183         mutex_unlock(&spec->pcm_lock);
2184
2185         return err;
2186 }
2187
2188 static const struct hda_pcm_ops generic_ops = {
2189         .open = hdmi_pcm_open,
2190         .close = hdmi_pcm_close,
2191         .prepare = generic_hdmi_playback_pcm_prepare,
2192         .cleanup = generic_hdmi_playback_pcm_cleanup,
2193 };
2194
2195 static int hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
2196 {
2197         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2198         struct hdmi_spec *spec = codec->spec;
2199         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2200
2201         if (!per_pin)
2202                 return 0;
2203
2204         return per_pin->sink_eld.info.spk_alloc;
2205 }
2206
2207 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
2208                                         unsigned char *chmap)
2209 {
2210         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2211         struct hdmi_spec *spec = codec->spec;
2212         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2213
2214         /* chmap is already set to 0 in caller */
2215         if (!per_pin)
2216                 return;
2217
2218         memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
2219 }
2220
2221 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
2222                                 unsigned char *chmap, int prepared)
2223 {
2224         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2225         struct hdmi_spec *spec = codec->spec;
2226         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2227
2228         if (!per_pin)
2229                 return;
2230         mutex_lock(&per_pin->lock);
2231         per_pin->chmap_set = true;
2232         memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
2233         if (prepared)
2234                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2235         mutex_unlock(&per_pin->lock);
2236 }
2237
2238 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
2239 {
2240         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2241         struct hdmi_spec *spec = codec->spec;
2242         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2243
2244         return per_pin ? true:false;
2245 }
2246
2247 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2248 {
2249         struct hdmi_spec *spec = codec->spec;
2250         int idx, pcm_num;
2251
2252         /*
2253          * for non-mst mode, pcm number is the same as before
2254          * for DP MST mode without extra PCM, pcm number is same
2255          * for DP MST mode with extra PCMs, pcm number is
2256          *  (nid number + dev_num - 1)
2257          * dev_num is the device entry number in a pin
2258          */
2259
2260         if (codec->mst_no_extra_pcms)
2261                 pcm_num = spec->num_nids;
2262         else
2263                 pcm_num = spec->num_nids + spec->dev_num - 1;
2264
2265         codec_dbg(codec, "hdmi: pcm_num set to %d\n", pcm_num);
2266
2267         for (idx = 0; idx < pcm_num; idx++) {
2268                 struct hda_pcm *info;
2269                 struct hda_pcm_stream *pstr;
2270
2271                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", idx);
2272                 if (!info)
2273                         return -ENOMEM;
2274
2275                 spec->pcm_rec[idx].pcm = info;
2276                 spec->pcm_used++;
2277                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2278                 info->own_chmap = true;
2279
2280                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2281                 pstr->substreams = 1;
2282                 pstr->ops = generic_ops;
2283                 /* pcm number is less than 16 */
2284                 if (spec->pcm_used >= 16)
2285                         break;
2286                 /* other pstr fields are set in open */
2287         }
2288
2289         return 0;
2290 }
2291
2292 static void free_hdmi_jack_priv(struct snd_jack *jack)
2293 {
2294         struct hdmi_pcm *pcm = jack->private_data;
2295
2296         pcm->jack = NULL;
2297 }
2298
2299 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2300 {
2301         char hdmi_str[32] = "HDMI/DP";
2302         struct hdmi_spec *spec = codec->spec;
2303         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pcm_idx);
2304         struct snd_jack *jack;
2305         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2306         int err;
2307
2308         if (pcmdev > 0)
2309                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2310         if (!spec->dyn_pcm_assign &&
2311             !is_jack_detectable(codec, per_pin->pin_nid))
2312                 strncat(hdmi_str, " Phantom",
2313                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2314
2315         err = snd_jack_new(codec->card, hdmi_str, SND_JACK_AVOUT, &jack,
2316                            true, false);
2317         if (err < 0)
2318                 return err;
2319
2320         spec->pcm_rec[pcm_idx].jack = jack;
2321         jack->private_data = &spec->pcm_rec[pcm_idx];
2322         jack->private_free = free_hdmi_jack_priv;
2323         return 0;
2324 }
2325
2326 static int generic_hdmi_build_controls(struct hda_codec *codec)
2327 {
2328         struct hdmi_spec *spec = codec->spec;
2329         int dev, err;
2330         int pin_idx, pcm_idx;
2331
2332         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2333                 if (!get_pcm_rec(spec, pcm_idx)->pcm) {
2334                         /* no PCM: mark this for skipping permanently */
2335                         set_bit(pcm_idx, &spec->pcm_bitmap);
2336                         continue;
2337                 }
2338
2339                 err = generic_hdmi_build_jack(codec, pcm_idx);
2340                 if (err < 0)
2341                         return err;
2342
2343                 /* create the spdif for each pcm
2344                  * pin will be bound when monitor is connected
2345                  */
2346                 if (spec->dyn_pcm_assign)
2347                         err = snd_hda_create_dig_out_ctls(codec,
2348                                           0, spec->cvt_nids[0],
2349                                           HDA_PCM_TYPE_HDMI);
2350                 else {
2351                         struct hdmi_spec_per_pin *per_pin =
2352                                 get_pin(spec, pcm_idx);
2353                         err = snd_hda_create_dig_out_ctls(codec,
2354                                                   per_pin->pin_nid,
2355                                                   per_pin->mux_nids[0],
2356                                                   HDA_PCM_TYPE_HDMI);
2357                 }
2358                 if (err < 0)
2359                         return err;
2360                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2361
2362                 dev = get_pcm_rec(spec, pcm_idx)->device;
2363                 if (dev != SNDRV_PCM_INVALID_DEVICE) {
2364                         /* add control for ELD Bytes */
2365                         err = hdmi_create_eld_ctl(codec, pcm_idx, dev);
2366                         if (err < 0)
2367                                 return err;
2368                 }
2369         }
2370
2371         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2372                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2373                 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
2374
2375                 pin_eld->eld_valid = false;
2376                 hdmi_present_sense(per_pin, 0);
2377         }
2378
2379         /* add channel maps */
2380         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2381                 struct hda_pcm *pcm;
2382
2383                 pcm = get_pcm_rec(spec, pcm_idx);
2384                 if (!pcm || !pcm->pcm)
2385                         break;
2386                 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2387                 if (err < 0)
2388                         return err;
2389         }
2390
2391         return 0;
2392 }
2393
2394 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2395 {
2396         struct hdmi_spec *spec = codec->spec;
2397         int pin_idx;
2398
2399         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2400                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2401
2402                 per_pin->codec = codec;
2403                 mutex_init(&per_pin->lock);
2404                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2405                 eld_proc_new(per_pin, pin_idx);
2406         }
2407         return 0;
2408 }
2409
2410 static int generic_hdmi_init(struct hda_codec *codec)
2411 {
2412         struct hdmi_spec *spec = codec->spec;
2413         int pin_idx;
2414
2415         mutex_lock(&spec->bind_lock);
2416         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2417                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2418                 hda_nid_t pin_nid = per_pin->pin_nid;
2419                 int dev_id = per_pin->dev_id;
2420
2421                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
2422                 hdmi_init_pin(codec, pin_nid);
2423                 if (codec_has_acomp(codec))
2424                         continue;
2425                 snd_hda_jack_detect_enable_callback_mst(codec, pin_nid, dev_id,
2426                                                         jack_callback);
2427         }
2428         mutex_unlock(&spec->bind_lock);
2429         return 0;
2430 }
2431
2432 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2433 {
2434         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2435         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2436 }
2437
2438 static void hdmi_array_free(struct hdmi_spec *spec)
2439 {
2440         snd_array_free(&spec->pins);
2441         snd_array_free(&spec->cvts);
2442 }
2443
2444 static void generic_spec_free(struct hda_codec *codec)
2445 {
2446         struct hdmi_spec *spec = codec->spec;
2447
2448         if (spec) {
2449                 hdmi_array_free(spec);
2450                 kfree(spec);
2451                 codec->spec = NULL;
2452         }
2453         codec->dp_mst = false;
2454 }
2455
2456 static void generic_hdmi_free(struct hda_codec *codec)
2457 {
2458         struct hdmi_spec *spec = codec->spec;
2459         int pin_idx, pcm_idx;
2460
2461         if (spec->acomp_registered) {
2462                 snd_hdac_acomp_exit(&codec->bus->core);
2463         } else if (codec_has_acomp(codec)) {
2464                 snd_hdac_acomp_register_notifier(&codec->bus->core, NULL);
2465         }
2466         codec->relaxed_resume = 0;
2467
2468         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2469                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2470                 cancel_delayed_work_sync(&per_pin->work);
2471                 eld_proc_free(per_pin);
2472         }
2473
2474         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2475                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2476                         continue;
2477                 if (spec->dyn_pcm_assign)
2478                         snd_device_free(codec->card,
2479                                         spec->pcm_rec[pcm_idx].jack);
2480                 else
2481                         spec->pcm_rec[pcm_idx].jack = NULL;
2482         }
2483
2484         generic_spec_free(codec);
2485 }
2486
2487 #ifdef CONFIG_PM
2488 static int generic_hdmi_suspend(struct hda_codec *codec)
2489 {
2490         struct hdmi_spec *spec = codec->spec;
2491         int pin_idx;
2492
2493         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2494                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2495                 cancel_delayed_work_sync(&per_pin->work);
2496         }
2497         return 0;
2498 }
2499
2500 static int generic_hdmi_resume(struct hda_codec *codec)
2501 {
2502         struct hdmi_spec *spec = codec->spec;
2503         int pin_idx;
2504
2505         codec->patch_ops.init(codec);
2506         snd_hda_regmap_sync(codec);
2507
2508         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2509                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2510                 hdmi_present_sense(per_pin, 1);
2511         }
2512         return 0;
2513 }
2514 #endif
2515
2516 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2517         .init                   = generic_hdmi_init,
2518         .free                   = generic_hdmi_free,
2519         .build_pcms             = generic_hdmi_build_pcms,
2520         .build_controls         = generic_hdmi_build_controls,
2521         .unsol_event            = hdmi_unsol_event,
2522 #ifdef CONFIG_PM
2523         .suspend                = generic_hdmi_suspend,
2524         .resume                 = generic_hdmi_resume,
2525 #endif
2526 };
2527
2528 static const struct hdmi_ops generic_standard_hdmi_ops = {
2529         .pin_get_eld                            = hdmi_pin_get_eld,
2530         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2531         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2532         .setup_stream                           = hdmi_setup_stream,
2533 };
2534
2535 /* allocate codec->spec and assign/initialize generic parser ops */
2536 static int alloc_generic_hdmi(struct hda_codec *codec)
2537 {
2538         struct hdmi_spec *spec;
2539
2540         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2541         if (!spec)
2542                 return -ENOMEM;
2543
2544         spec->codec = codec;
2545         spec->ops = generic_standard_hdmi_ops;
2546         spec->dev_num = 1;      /* initialize to 1 */
2547         mutex_init(&spec->pcm_lock);
2548         mutex_init(&spec->bind_lock);
2549         snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2550
2551         spec->chmap.ops.get_chmap = hdmi_get_chmap;
2552         spec->chmap.ops.set_chmap = hdmi_set_chmap;
2553         spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2554         spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc;
2555
2556         codec->spec = spec;
2557         hdmi_array_init(spec, 4);
2558
2559         codec->patch_ops = generic_hdmi_patch_ops;
2560
2561         return 0;
2562 }
2563
2564 /* generic HDMI parser */
2565 static int patch_generic_hdmi(struct hda_codec *codec)
2566 {
2567         int err;
2568
2569         err = alloc_generic_hdmi(codec);
2570         if (err < 0)
2571                 return err;
2572
2573         err = hdmi_parse_codec(codec);
2574         if (err < 0) {
2575                 generic_spec_free(codec);
2576                 return err;
2577         }
2578
2579         generic_hdmi_init_per_pins(codec);
2580         return 0;
2581 }
2582
2583 /*
2584  * generic audio component binding
2585  */
2586
2587 /* turn on / off the unsol event jack detection dynamically */
2588 static void reprogram_jack_detect(struct hda_codec *codec, hda_nid_t nid,
2589                                   int dev_id, bool use_acomp)
2590 {
2591         struct hda_jack_tbl *tbl;
2592
2593         tbl = snd_hda_jack_tbl_get_mst(codec, nid, dev_id);
2594         if (tbl) {
2595                 /* clear unsol even if component notifier is used, or re-enable
2596                  * if notifier is cleared
2597                  */
2598                 unsigned int val = use_acomp ? 0 : (AC_USRSP_EN | tbl->tag);
2599                 snd_hda_codec_write_cache(codec, nid, 0,
2600                                           AC_VERB_SET_UNSOLICITED_ENABLE, val);
2601         }
2602 }
2603
2604 /* set up / clear component notifier dynamically */
2605 static void generic_acomp_notifier_set(struct drm_audio_component *acomp,
2606                                        bool use_acomp)
2607 {
2608         struct hdmi_spec *spec;
2609         int i;
2610
2611         spec = container_of(acomp->audio_ops, struct hdmi_spec, drm_audio_ops);
2612         mutex_lock(&spec->bind_lock);
2613         spec->use_acomp_notifier = use_acomp;
2614         spec->codec->relaxed_resume = use_acomp;
2615         spec->codec->bus->keep_power = 0;
2616         /* reprogram each jack detection logic depending on the notifier */
2617         for (i = 0; i < spec->num_pins; i++)
2618                 reprogram_jack_detect(spec->codec,
2619                                       get_pin(spec, i)->pin_nid,
2620                                       get_pin(spec, i)->dev_id,
2621                                       use_acomp);
2622         mutex_unlock(&spec->bind_lock);
2623 }
2624
2625 /* enable / disable the notifier via master bind / unbind */
2626 static int generic_acomp_master_bind(struct device *dev,
2627                                      struct drm_audio_component *acomp)
2628 {
2629         generic_acomp_notifier_set(acomp, true);
2630         return 0;
2631 }
2632
2633 static void generic_acomp_master_unbind(struct device *dev,
2634                                         struct drm_audio_component *acomp)
2635 {
2636         generic_acomp_notifier_set(acomp, false);
2637 }
2638
2639 /* check whether both HD-audio and DRM PCI devices belong to the same bus */
2640 static int match_bound_vga(struct device *dev, int subtype, void *data)
2641 {
2642         struct hdac_bus *bus = data;
2643         struct pci_dev *pci, *master;
2644
2645         if (!dev_is_pci(dev) || !dev_is_pci(bus->dev))
2646                 return 0;
2647         master = to_pci_dev(bus->dev);
2648         pci = to_pci_dev(dev);
2649         return master->bus == pci->bus;
2650 }
2651
2652 /* audio component notifier for AMD/Nvidia HDMI codecs */
2653 static void generic_acomp_pin_eld_notify(void *audio_ptr, int port, int dev_id)
2654 {
2655         struct hda_codec *codec = audio_ptr;
2656         struct hdmi_spec *spec = codec->spec;
2657         hda_nid_t pin_nid = spec->port2pin(codec, port);
2658
2659         if (!pin_nid)
2660                 return;
2661         if (get_wcaps_type(get_wcaps(codec, pin_nid)) != AC_WID_PIN)
2662                 return;
2663         /* skip notification during system suspend (but not in runtime PM);
2664          * the state will be updated at resume
2665          */
2666         if (codec->core.dev.power.power_state.event == PM_EVENT_SUSPEND)
2667                 return;
2668         /* ditto during suspend/resume process itself */
2669         if (snd_hdac_is_in_pm(&codec->core))
2670                 return;
2671
2672         check_presence_and_report(codec, pin_nid, dev_id);
2673 }
2674
2675 /* set up the private drm_audio_ops from the template */
2676 static void setup_drm_audio_ops(struct hda_codec *codec,
2677                                 const struct drm_audio_component_audio_ops *ops)
2678 {
2679         struct hdmi_spec *spec = codec->spec;
2680
2681         spec->drm_audio_ops.audio_ptr = codec;
2682         /* intel_audio_codec_enable() or intel_audio_codec_disable()
2683          * will call pin_eld_notify with using audio_ptr pointer
2684          * We need make sure audio_ptr is really setup
2685          */
2686         wmb();
2687         spec->drm_audio_ops.pin2port = ops->pin2port;
2688         spec->drm_audio_ops.pin_eld_notify = ops->pin_eld_notify;
2689         spec->drm_audio_ops.master_bind = ops->master_bind;
2690         spec->drm_audio_ops.master_unbind = ops->master_unbind;
2691 }
2692
2693 /* initialize the generic HDMI audio component */
2694 static void generic_acomp_init(struct hda_codec *codec,
2695                                const struct drm_audio_component_audio_ops *ops,
2696                                int (*port2pin)(struct hda_codec *, int))
2697 {
2698         struct hdmi_spec *spec = codec->spec;
2699
2700         if (!enable_acomp) {
2701                 codec_info(codec, "audio component disabled by module option\n");
2702                 return;
2703         }
2704
2705         spec->port2pin = port2pin;
2706         setup_drm_audio_ops(codec, ops);
2707         if (!snd_hdac_acomp_init(&codec->bus->core, &spec->drm_audio_ops,
2708                                  match_bound_vga, 0)) {
2709                 spec->acomp_registered = true;
2710         }
2711 }
2712
2713 /*
2714  * Intel codec parsers and helpers
2715  */
2716
2717 #define INTEL_GET_VENDOR_VERB   0xf81
2718 #define INTEL_SET_VENDOR_VERB   0x781
2719 #define INTEL_EN_DP12           0x02    /* enable DP 1.2 features */
2720 #define INTEL_EN_ALL_PIN_CVTS   0x01    /* enable 2nd & 3rd pins and convertors */
2721
2722 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2723                                           bool update_tree)
2724 {
2725         unsigned int vendor_param;
2726         struct hdmi_spec *spec = codec->spec;
2727
2728         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2729                                 INTEL_GET_VENDOR_VERB, 0);
2730         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2731                 return;
2732
2733         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2734         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2735                                 INTEL_SET_VENDOR_VERB, vendor_param);
2736         if (vendor_param == -1)
2737                 return;
2738
2739         if (update_tree)
2740                 snd_hda_codec_update_widgets(codec);
2741 }
2742
2743 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2744 {
2745         unsigned int vendor_param;
2746         struct hdmi_spec *spec = codec->spec;
2747
2748         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2749                                 INTEL_GET_VENDOR_VERB, 0);
2750         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2751                 return;
2752
2753         /* enable DP1.2 mode */
2754         vendor_param |= INTEL_EN_DP12;
2755         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2756         snd_hda_codec_write_cache(codec, spec->vendor_nid, 0,
2757                                 INTEL_SET_VENDOR_VERB, vendor_param);
2758 }
2759
2760 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2761  * Otherwise you may get severe h/w communication errors.
2762  */
2763 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2764                                 unsigned int power_state)
2765 {
2766         if (power_state == AC_PWRST_D0) {
2767                 intel_haswell_enable_all_pins(codec, false);
2768                 intel_haswell_fixup_enable_dp12(codec);
2769         }
2770
2771         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2772         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2773 }
2774
2775 /* There is a fixed mapping between audio pin node and display port.
2776  * on SNB, IVY, HSW, BSW, SKL, BXT, KBL:
2777  * Pin Widget 5 - PORT B (port = 1 in i915 driver)
2778  * Pin Widget 6 - PORT C (port = 2 in i915 driver)
2779  * Pin Widget 7 - PORT D (port = 3 in i915 driver)
2780  *
2781  * on VLV, ILK:
2782  * Pin Widget 4 - PORT B (port = 1 in i915 driver)
2783  * Pin Widget 5 - PORT C (port = 2 in i915 driver)
2784  * Pin Widget 6 - PORT D (port = 3 in i915 driver)
2785  */
2786 static int intel_base_nid(struct hda_codec *codec)
2787 {
2788         switch (codec->core.vendor_id) {
2789         case 0x80860054: /* ILK */
2790         case 0x80862804: /* ILK */
2791         case 0x80862882: /* VLV */
2792                 return 4;
2793         default:
2794                 return 5;
2795         }
2796 }
2797
2798 static int intel_pin2port(void *audio_ptr, int pin_nid)
2799 {
2800         struct hda_codec *codec = audio_ptr;
2801         struct hdmi_spec *spec = codec->spec;
2802         int base_nid, i;
2803
2804         if (!spec->port_num) {
2805                 base_nid = intel_base_nid(codec);
2806                 if (WARN_ON(pin_nid < base_nid || pin_nid >= base_nid + 3))
2807                         return -1;
2808                 return pin_nid - base_nid + 1;
2809         }
2810
2811         /*
2812          * looking for the pin number in the mapping table and return
2813          * the index which indicate the port number
2814          */
2815         for (i = 0; i < spec->port_num; i++) {
2816                 if (pin_nid == spec->port_map[i])
2817                         return i;
2818         }
2819
2820         codec_info(codec, "Can't find the HDMI/DP port for pin NID 0x%x\n", pin_nid);
2821         return -1;
2822 }
2823
2824 static int intel_port2pin(struct hda_codec *codec, int port)
2825 {
2826         struct hdmi_spec *spec = codec->spec;
2827
2828         if (!spec->port_num) {
2829                 /* we assume only from port-B to port-D */
2830                 if (port < 1 || port > 3)
2831                         return 0;
2832                 return port + intel_base_nid(codec) - 1;
2833         }
2834
2835         if (port < 0 || port >= spec->port_num)
2836                 return 0;
2837         return spec->port_map[port];
2838 }
2839
2840 static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)
2841 {
2842         struct hda_codec *codec = audio_ptr;
2843         int pin_nid;
2844         int dev_id = pipe;
2845
2846         pin_nid = intel_port2pin(codec, port);
2847         if (!pin_nid)
2848                 return;
2849         /* skip notification during system suspend (but not in runtime PM);
2850          * the state will be updated at resume
2851          */
2852         if (codec->core.dev.power.power_state.event == PM_EVENT_SUSPEND)
2853                 return;
2854         /* ditto during suspend/resume process itself */
2855         if (snd_hdac_is_in_pm(&codec->core))
2856                 return;
2857
2858         snd_hdac_i915_set_bclk(&codec->bus->core);
2859         check_presence_and_report(codec, pin_nid, dev_id);
2860 }
2861
2862 static const struct drm_audio_component_audio_ops intel_audio_ops = {
2863         .pin2port = intel_pin2port,
2864         .pin_eld_notify = intel_pin_eld_notify,
2865 };
2866
2867 /* register i915 component pin_eld_notify callback */
2868 static void register_i915_notifier(struct hda_codec *codec)
2869 {
2870         struct hdmi_spec *spec = codec->spec;
2871
2872         spec->use_acomp_notifier = true;
2873         spec->port2pin = intel_port2pin;
2874         setup_drm_audio_ops(codec, &intel_audio_ops);
2875         snd_hdac_acomp_register_notifier(&codec->bus->core,
2876                                         &spec->drm_audio_ops);
2877         /* no need for forcible resume for jack check thanks to notifier */
2878         codec->relaxed_resume = 1;
2879 }
2880
2881 /* setup_stream ops override for HSW+ */
2882 static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
2883                                  hda_nid_t pin_nid, int dev_id, u32 stream_tag,
2884                                  int format)
2885 {
2886         haswell_verify_D0(codec, cvt_nid, pin_nid);
2887         return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
2888                                  stream_tag, format);
2889 }
2890
2891 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2892 static void i915_pin_cvt_fixup(struct hda_codec *codec,
2893                                struct hdmi_spec_per_pin *per_pin,
2894                                hda_nid_t cvt_nid)
2895 {
2896         if (per_pin) {
2897                 haswell_verify_D0(codec, per_pin->cvt_nid, per_pin->pin_nid);
2898                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2899                                per_pin->dev_id);
2900                 intel_verify_pin_cvt_connect(codec, per_pin);
2901                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
2902                                      per_pin->dev_id, per_pin->mux_idx);
2903         } else {
2904                 intel_not_share_assigned_cvt_nid(codec, 0, 0, cvt_nid);
2905         }
2906 }
2907
2908 /* precondition and allocation for Intel codecs */
2909 static int alloc_intel_hdmi(struct hda_codec *codec)
2910 {
2911         int err;
2912
2913         /* requires i915 binding */
2914         if (!codec->bus->core.audio_component) {
2915                 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2916                 /* set probe_id here to prevent generic fallback binding */
2917                 codec->probe_id = HDA_CODEC_ID_SKIP_PROBE;
2918                 return -ENODEV;
2919         }
2920
2921         err = alloc_generic_hdmi(codec);
2922         if (err < 0)
2923                 return err;
2924         /* no need to handle unsol events */
2925         codec->patch_ops.unsol_event = NULL;
2926         return 0;
2927 }
2928
2929 /* parse and post-process for Intel codecs */
2930 static int parse_intel_hdmi(struct hda_codec *codec)
2931 {
2932         int err, retries = 3;
2933
2934         do {
2935                 err = hdmi_parse_codec(codec);
2936         } while (err < 0 && retries--);
2937
2938         if (err < 0) {
2939                 generic_spec_free(codec);
2940                 return err;
2941         }
2942
2943         generic_hdmi_init_per_pins(codec);
2944         register_i915_notifier(codec);
2945         return 0;
2946 }
2947
2948 /* Intel Haswell and onwards; audio component with eld notifier */
2949 static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid,
2950                                  const int *port_map, int port_num, int dev_num)
2951 {
2952         struct hdmi_spec *spec;
2953         int err;
2954
2955         err = alloc_intel_hdmi(codec);
2956         if (err < 0)
2957                 return err;
2958         spec = codec->spec;
2959         codec->dp_mst = true;
2960         spec->dyn_pcm_assign = true;
2961         spec->vendor_nid = vendor_nid;
2962         spec->port_map = port_map;
2963         spec->port_num = port_num;
2964         spec->intel_hsw_fixup = true;
2965         spec->dev_num = dev_num;
2966
2967         intel_haswell_enable_all_pins(codec, true);
2968         intel_haswell_fixup_enable_dp12(codec);
2969
2970         codec->display_power_control = 1;
2971
2972         codec->patch_ops.set_power_state = haswell_set_power_state;
2973         codec->depop_delay = 0;
2974         codec->auto_runtime_pm = 1;
2975
2976         spec->ops.setup_stream = i915_hsw_setup_stream;
2977         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2978
2979         /*
2980          * Enable silent stream feature, if it is enabled via
2981          * module param or Kconfig option
2982          */
2983         if (enable_silent_stream)
2984                 spec->send_silent_stream = true;
2985
2986         return parse_intel_hdmi(codec);
2987 }
2988
2989 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2990 {
2991         return intel_hsw_common_init(codec, 0x08, NULL, 0, 3);
2992 }
2993
2994 static int patch_i915_glk_hdmi(struct hda_codec *codec)
2995 {
2996         return intel_hsw_common_init(codec, 0x0b, NULL, 0, 3);
2997 }
2998
2999 static int patch_i915_icl_hdmi(struct hda_codec *codec)
3000 {
3001         /*
3002          * pin to port mapping table where the value indicate the pin number and
3003          * the index indicate the port number.
3004          */
3005         static const int map[] = {0x0, 0x4, 0x6, 0x8, 0xa, 0xb};
3006
3007         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map), 3);
3008 }
3009
3010 static int patch_i915_tgl_hdmi(struct hda_codec *codec)
3011 {
3012         /*
3013          * pin to port mapping table where the value indicate the pin number and
3014          * the index indicate the port number.
3015          */
3016         static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
3017         int ret;
3018
3019         ret = intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map), 4);
3020         if (!ret) {
3021                 struct hdmi_spec *spec = codec->spec;
3022
3023                 spec->dyn_pcm_no_legacy = true;
3024         }
3025
3026         return ret;
3027 }
3028
3029 /* Intel Baytrail and Braswell; with eld notifier */
3030 static int patch_i915_byt_hdmi(struct hda_codec *codec)
3031 {
3032         struct hdmi_spec *spec;
3033         int err;
3034
3035         err = alloc_intel_hdmi(codec);
3036         if (err < 0)
3037                 return err;
3038         spec = codec->spec;
3039
3040         /* For Valleyview/Cherryview, only the display codec is in the display
3041          * power well and can use link_power ops to request/release the power.
3042          */
3043         codec->display_power_control = 1;
3044
3045         codec->depop_delay = 0;
3046         codec->auto_runtime_pm = 1;
3047
3048         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
3049
3050         return parse_intel_hdmi(codec);
3051 }
3052
3053 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
3054 static int patch_i915_cpt_hdmi(struct hda_codec *codec)
3055 {
3056         int err;
3057
3058         err = alloc_intel_hdmi(codec);
3059         if (err < 0)
3060                 return err;
3061         return parse_intel_hdmi(codec);
3062 }
3063
3064 /*
3065  * Shared non-generic implementations
3066  */
3067
3068 static int simple_playback_build_pcms(struct hda_codec *codec)
3069 {
3070         struct hdmi_spec *spec = codec->spec;
3071         struct hda_pcm *info;
3072         unsigned int chans;
3073         struct hda_pcm_stream *pstr;
3074         struct hdmi_spec_per_cvt *per_cvt;
3075
3076         per_cvt = get_cvt(spec, 0);
3077         chans = get_wcaps(codec, per_cvt->cvt_nid);
3078         chans = get_wcaps_channels(chans);
3079
3080         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
3081         if (!info)
3082                 return -ENOMEM;
3083         spec->pcm_rec[0].pcm = info;
3084         info->pcm_type = HDA_PCM_TYPE_HDMI;
3085         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
3086         *pstr = spec->pcm_playback;
3087         pstr->nid = per_cvt->cvt_nid;
3088         if (pstr->channels_max <= 2 && chans && chans <= 16)
3089                 pstr->channels_max = chans;
3090
3091         return 0;
3092 }
3093
3094 /* unsolicited event for jack sensing */
3095 static void simple_hdmi_unsol_event(struct hda_codec *codec,
3096                                     unsigned int res)
3097 {
3098         snd_hda_jack_set_dirty_all(codec);
3099         snd_hda_jack_report_sync(codec);
3100 }
3101
3102 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
3103  * as long as spec->pins[] is set correctly
3104  */
3105 #define simple_hdmi_build_jack  generic_hdmi_build_jack
3106
3107 static int simple_playback_build_controls(struct hda_codec *codec)
3108 {
3109         struct hdmi_spec *spec = codec->spec;
3110         struct hdmi_spec_per_cvt *per_cvt;
3111         int err;
3112
3113         per_cvt = get_cvt(spec, 0);
3114         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
3115                                           per_cvt->cvt_nid,
3116                                           HDA_PCM_TYPE_HDMI);
3117         if (err < 0)
3118                 return err;
3119         return simple_hdmi_build_jack(codec, 0);
3120 }
3121
3122 static int simple_playback_init(struct hda_codec *codec)
3123 {
3124         struct hdmi_spec *spec = codec->spec;
3125         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
3126         hda_nid_t pin = per_pin->pin_nid;
3127
3128         snd_hda_codec_write(codec, pin, 0,
3129                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
3130         /* some codecs require to unmute the pin */
3131         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
3132                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
3133                                     AMP_OUT_UNMUTE);
3134         snd_hda_jack_detect_enable(codec, pin, per_pin->dev_id);
3135         return 0;
3136 }
3137
3138 static void simple_playback_free(struct hda_codec *codec)
3139 {
3140         struct hdmi_spec *spec = codec->spec;
3141
3142         hdmi_array_free(spec);
3143         kfree(spec);
3144 }
3145
3146 /*
3147  * Nvidia specific implementations
3148  */
3149
3150 #define Nv_VERB_SET_Channel_Allocation          0xF79
3151 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
3152 #define Nv_VERB_SET_Audio_Protection_On         0xF98
3153 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
3154
3155 #define nvhdmi_master_con_nid_7x        0x04
3156 #define nvhdmi_master_pin_nid_7x        0x05
3157
3158 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
3159         /*front, rear, clfe, rear_surr */
3160         0x6, 0x8, 0xa, 0xc,
3161 };
3162
3163 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
3164         /* set audio protect on */
3165         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3166         /* enable digital output on pin widget */
3167         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3168         {} /* terminator */
3169 };
3170
3171 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
3172         /* set audio protect on */
3173         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3174         /* enable digital output on pin widget */
3175         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3176         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3177         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3178         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3179         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3180         {} /* terminator */
3181 };
3182
3183 #ifdef LIMITED_RATE_FMT_SUPPORT
3184 /* support only the safe format and rate */
3185 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
3186 #define SUPPORTED_MAXBPS        16
3187 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
3188 #else
3189 /* support all rates and formats */
3190 #define SUPPORTED_RATES \
3191         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
3192         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
3193          SNDRV_PCM_RATE_192000)
3194 #define SUPPORTED_MAXBPS        24
3195 #define SUPPORTED_FORMATS \
3196         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
3197 #endif
3198
3199 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
3200 {
3201         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
3202         return 0;
3203 }
3204
3205 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
3206 {
3207         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
3208         return 0;
3209 }
3210
3211 static const unsigned int channels_2_6_8[] = {
3212         2, 6, 8
3213 };
3214
3215 static const unsigned int channels_2_8[] = {
3216         2, 8
3217 };
3218
3219 static const struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
3220         .count = ARRAY_SIZE(channels_2_6_8),
3221         .list = channels_2_6_8,
3222         .mask = 0,
3223 };
3224
3225 static const struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
3226         .count = ARRAY_SIZE(channels_2_8),
3227         .list = channels_2_8,
3228         .mask = 0,
3229 };
3230
3231 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
3232                                     struct hda_codec *codec,
3233                                     struct snd_pcm_substream *substream)
3234 {
3235         struct hdmi_spec *spec = codec->spec;
3236         const struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
3237
3238         switch (codec->preset->vendor_id) {
3239         case 0x10de0002:
3240         case 0x10de0003:
3241         case 0x10de0005:
3242         case 0x10de0006:
3243                 hw_constraints_channels = &hw_constraints_2_8_channels;
3244                 break;
3245         case 0x10de0007:
3246                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
3247                 break;
3248         default:
3249                 break;
3250         }
3251
3252         if (hw_constraints_channels != NULL) {
3253                 snd_pcm_hw_constraint_list(substream->runtime, 0,
3254                                 SNDRV_PCM_HW_PARAM_CHANNELS,
3255                                 hw_constraints_channels);
3256         } else {
3257                 snd_pcm_hw_constraint_step(substream->runtime, 0,
3258                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
3259         }
3260
3261         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3262 }
3263
3264 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
3265                                      struct hda_codec *codec,
3266                                      struct snd_pcm_substream *substream)
3267 {
3268         struct hdmi_spec *spec = codec->spec;
3269         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3270 }
3271
3272 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3273                                        struct hda_codec *codec,
3274                                        unsigned int stream_tag,
3275                                        unsigned int format,
3276                                        struct snd_pcm_substream *substream)
3277 {
3278         struct hdmi_spec *spec = codec->spec;
3279         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3280                                              stream_tag, format, substream);
3281 }
3282
3283 static const struct hda_pcm_stream simple_pcm_playback = {
3284         .substreams = 1,
3285         .channels_min = 2,
3286         .channels_max = 2,
3287         .ops = {
3288                 .open = simple_playback_pcm_open,
3289                 .close = simple_playback_pcm_close,
3290                 .prepare = simple_playback_pcm_prepare
3291         },
3292 };
3293
3294 static const struct hda_codec_ops simple_hdmi_patch_ops = {
3295         .build_controls = simple_playback_build_controls,
3296         .build_pcms = simple_playback_build_pcms,
3297         .init = simple_playback_init,
3298         .free = simple_playback_free,
3299         .unsol_event = simple_hdmi_unsol_event,
3300 };
3301
3302 static int patch_simple_hdmi(struct hda_codec *codec,
3303                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
3304 {
3305         struct hdmi_spec *spec;
3306         struct hdmi_spec_per_cvt *per_cvt;
3307         struct hdmi_spec_per_pin *per_pin;
3308
3309         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3310         if (!spec)
3311                 return -ENOMEM;
3312
3313         spec->codec = codec;
3314         codec->spec = spec;
3315         hdmi_array_init(spec, 1);
3316
3317         spec->multiout.num_dacs = 0;  /* no analog */
3318         spec->multiout.max_channels = 2;
3319         spec->multiout.dig_out_nid = cvt_nid;
3320         spec->num_cvts = 1;
3321         spec->num_pins = 1;
3322         per_pin = snd_array_new(&spec->pins);
3323         per_cvt = snd_array_new(&spec->cvts);
3324         if (!per_pin || !per_cvt) {
3325                 simple_playback_free(codec);
3326                 return -ENOMEM;
3327         }
3328         per_cvt->cvt_nid = cvt_nid;
3329         per_pin->pin_nid = pin_nid;
3330         spec->pcm_playback = simple_pcm_playback;
3331
3332         codec->patch_ops = simple_hdmi_patch_ops;
3333
3334         return 0;
3335 }
3336
3337 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3338                                                     int channels)
3339 {
3340         unsigned int chanmask;
3341         int chan = channels ? (channels - 1) : 1;
3342
3343         switch (channels) {
3344         default:
3345         case 0:
3346         case 2:
3347                 chanmask = 0x00;
3348                 break;
3349         case 4:
3350                 chanmask = 0x08;
3351                 break;
3352         case 6:
3353                 chanmask = 0x0b;
3354                 break;
3355         case 8:
3356                 chanmask = 0x13;
3357                 break;
3358         }
3359
3360         /* Set the audio infoframe channel allocation and checksum fields.  The
3361          * channel count is computed implicitly by the hardware. */
3362         snd_hda_codec_write(codec, 0x1, 0,
3363                         Nv_VERB_SET_Channel_Allocation, chanmask);
3364
3365         snd_hda_codec_write(codec, 0x1, 0,
3366                         Nv_VERB_SET_Info_Frame_Checksum,
3367                         (0x71 - chan - chanmask));
3368 }
3369
3370 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3371                                    struct hda_codec *codec,
3372                                    struct snd_pcm_substream *substream)
3373 {
3374         struct hdmi_spec *spec = codec->spec;
3375         int i;
3376
3377         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3378                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3379         for (i = 0; i < 4; i++) {
3380                 /* set the stream id */
3381                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3382                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
3383                 /* set the stream format */
3384                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3385                                 AC_VERB_SET_STREAM_FORMAT, 0);
3386         }
3387
3388         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3389          * streams are disabled. */
3390         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3391
3392         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3393 }
3394
3395 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3396                                      struct hda_codec *codec,
3397                                      unsigned int stream_tag,
3398                                      unsigned int format,
3399                                      struct snd_pcm_substream *substream)
3400 {
3401         int chs;
3402         unsigned int dataDCC2, channel_id;
3403         int i;
3404         struct hdmi_spec *spec = codec->spec;
3405         struct hda_spdif_out *spdif;
3406         struct hdmi_spec_per_cvt *per_cvt;
3407
3408         mutex_lock(&codec->spdif_mutex);
3409         per_cvt = get_cvt(spec, 0);
3410         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3411
3412         chs = substream->runtime->channels;
3413
3414         dataDCC2 = 0x2;
3415
3416         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3417         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3418                 snd_hda_codec_write(codec,
3419                                 nvhdmi_master_con_nid_7x,
3420                                 0,
3421                                 AC_VERB_SET_DIGI_CONVERT_1,
3422                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3423
3424         /* set the stream id */
3425         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3426                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3427
3428         /* set the stream format */
3429         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3430                         AC_VERB_SET_STREAM_FORMAT, format);
3431
3432         /* turn on again (if needed) */
3433         /* enable and set the channel status audio/data flag */
3434         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3435                 snd_hda_codec_write(codec,
3436                                 nvhdmi_master_con_nid_7x,
3437                                 0,
3438                                 AC_VERB_SET_DIGI_CONVERT_1,
3439                                 spdif->ctls & 0xff);
3440                 snd_hda_codec_write(codec,
3441                                 nvhdmi_master_con_nid_7x,
3442                                 0,
3443                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3444         }
3445
3446         for (i = 0; i < 4; i++) {
3447                 if (chs == 2)
3448                         channel_id = 0;
3449                 else
3450                         channel_id = i * 2;
3451
3452                 /* turn off SPDIF once;
3453                  *otherwise the IEC958 bits won't be updated
3454                  */
3455                 if (codec->spdif_status_reset &&
3456                 (spdif->ctls & AC_DIG1_ENABLE))
3457                         snd_hda_codec_write(codec,
3458                                 nvhdmi_con_nids_7x[i],
3459                                 0,
3460                                 AC_VERB_SET_DIGI_CONVERT_1,
3461                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3462                 /* set the stream id */
3463                 snd_hda_codec_write(codec,
3464                                 nvhdmi_con_nids_7x[i],
3465                                 0,
3466                                 AC_VERB_SET_CHANNEL_STREAMID,
3467                                 (stream_tag << 4) | channel_id);
3468                 /* set the stream format */
3469                 snd_hda_codec_write(codec,
3470                                 nvhdmi_con_nids_7x[i],
3471                                 0,
3472                                 AC_VERB_SET_STREAM_FORMAT,
3473                                 format);
3474                 /* turn on again (if needed) */
3475                 /* enable and set the channel status audio/data flag */
3476                 if (codec->spdif_status_reset &&
3477                 (spdif->ctls & AC_DIG1_ENABLE)) {
3478                         snd_hda_codec_write(codec,
3479                                         nvhdmi_con_nids_7x[i],
3480                                         0,
3481                                         AC_VERB_SET_DIGI_CONVERT_1,
3482                                         spdif->ctls & 0xff);
3483                         snd_hda_codec_write(codec,
3484                                         nvhdmi_con_nids_7x[i],
3485                                         0,
3486                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3487                 }
3488         }
3489
3490         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3491
3492         mutex_unlock(&codec->spdif_mutex);
3493         return 0;
3494 }
3495
3496 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3497         .substreams = 1,
3498         .channels_min = 2,
3499         .channels_max = 8,
3500         .nid = nvhdmi_master_con_nid_7x,
3501         .rates = SUPPORTED_RATES,
3502         .maxbps = SUPPORTED_MAXBPS,
3503         .formats = SUPPORTED_FORMATS,
3504         .ops = {
3505                 .open = simple_playback_pcm_open,
3506                 .close = nvhdmi_8ch_7x_pcm_close,
3507                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3508         },
3509 };
3510
3511 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3512 {
3513         struct hdmi_spec *spec;
3514         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3515                                     nvhdmi_master_pin_nid_7x);
3516         if (err < 0)
3517                 return err;
3518
3519         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3520         /* override the PCM rates, etc, as the codec doesn't give full list */
3521         spec = codec->spec;
3522         spec->pcm_playback.rates = SUPPORTED_RATES;
3523         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3524         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3525         return 0;
3526 }
3527
3528 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3529 {
3530         struct hdmi_spec *spec = codec->spec;
3531         int err = simple_playback_build_pcms(codec);
3532         if (!err) {
3533                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3534                 info->own_chmap = true;
3535         }
3536         return err;
3537 }
3538
3539 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3540 {
3541         struct hdmi_spec *spec = codec->spec;
3542         struct hda_pcm *info;
3543         struct snd_pcm_chmap *chmap;
3544         int err;
3545
3546         err = simple_playback_build_controls(codec);
3547         if (err < 0)
3548                 return err;
3549
3550         /* add channel maps */
3551         info = get_pcm_rec(spec, 0);
3552         err = snd_pcm_add_chmap_ctls(info->pcm,
3553                                      SNDRV_PCM_STREAM_PLAYBACK,
3554                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3555         if (err < 0)
3556                 return err;
3557         switch (codec->preset->vendor_id) {
3558         case 0x10de0002:
3559         case 0x10de0003:
3560         case 0x10de0005:
3561         case 0x10de0006:
3562                 chmap->channel_mask = (1U << 2) | (1U << 8);
3563                 break;
3564         case 0x10de0007:
3565                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3566         }
3567         return 0;
3568 }
3569
3570 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3571 {
3572         struct hdmi_spec *spec;
3573         int err = patch_nvhdmi_2ch(codec);
3574         if (err < 0)
3575                 return err;
3576         spec = codec->spec;
3577         spec->multiout.max_channels = 8;
3578         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3579         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3580         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3581         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3582
3583         /* Initialize the audio infoframe channel mask and checksum to something
3584          * valid */
3585         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3586
3587         return 0;
3588 }
3589
3590 /*
3591  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3592  * - 0x10de0015
3593  * - 0x10de0040
3594  */
3595 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
3596                 struct hdac_cea_channel_speaker_allocation *cap, int channels)
3597 {
3598         if (cap->ca_index == 0x00 && channels == 2)
3599                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3600
3601         /* If the speaker allocation matches the channel count, it is OK. */
3602         if (cap->channels != channels)
3603                 return -1;
3604
3605         /* all channels are remappable freely */
3606         return SNDRV_CTL_TLVT_CHMAP_VAR;
3607 }
3608
3609 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
3610                 int ca, int chs, unsigned char *map)
3611 {
3612         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3613                 return -EINVAL;
3614
3615         return 0;
3616 }
3617
3618 /* map from pin NID to port; port is 0-based */
3619 /* for Nvidia: assume widget NID starting from 4, with step 1 (4, 5, 6, ...) */
3620 static int nvhdmi_pin2port(void *audio_ptr, int pin_nid)
3621 {
3622         return pin_nid - 4;
3623 }
3624
3625 /* reverse-map from port to pin NID: see above */
3626 static int nvhdmi_port2pin(struct hda_codec *codec, int port)
3627 {
3628         return port + 4;
3629 }
3630
3631 static const struct drm_audio_component_audio_ops nvhdmi_audio_ops = {
3632         .pin2port = nvhdmi_pin2port,
3633         .pin_eld_notify = generic_acomp_pin_eld_notify,
3634         .master_bind = generic_acomp_master_bind,
3635         .master_unbind = generic_acomp_master_unbind,
3636 };
3637
3638 static int patch_nvhdmi(struct hda_codec *codec)
3639 {
3640         struct hdmi_spec *spec;
3641         int err;
3642
3643         err = alloc_generic_hdmi(codec);
3644         if (err < 0)
3645                 return err;
3646         codec->dp_mst = true;
3647
3648         spec = codec->spec;
3649         spec->dyn_pcm_assign = true;
3650
3651         err = hdmi_parse_codec(codec);
3652         if (err < 0) {
3653                 generic_spec_free(codec);
3654                 return err;
3655         }
3656
3657         generic_hdmi_init_per_pins(codec);
3658
3659         spec->dyn_pin_out = true;
3660
3661         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3662                 nvhdmi_chmap_cea_alloc_validate_get_type;
3663         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3664
3665         codec->link_down_at_suspend = 1;
3666
3667         generic_acomp_init(codec, &nvhdmi_audio_ops, nvhdmi_port2pin);
3668
3669         return 0;
3670 }
3671
3672 static int patch_nvhdmi_legacy(struct hda_codec *codec)
3673 {
3674         struct hdmi_spec *spec;
3675         int err;
3676
3677         err = patch_generic_hdmi(codec);
3678         if (err)
3679                 return err;
3680
3681         spec = codec->spec;
3682         spec->dyn_pin_out = true;
3683
3684         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3685                 nvhdmi_chmap_cea_alloc_validate_get_type;
3686         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3687
3688         codec->link_down_at_suspend = 1;
3689
3690         return 0;
3691 }
3692
3693 /*
3694  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3695  * accessed using vendor-defined verbs. These registers can be used for
3696  * interoperability between the HDA and HDMI drivers.
3697  */
3698
3699 /* Audio Function Group node */
3700 #define NVIDIA_AFG_NID 0x01
3701
3702 /*
3703  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3704  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3705  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3706  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3707  * additional bit (at position 30) to signal the validity of the format.
3708  *
3709  * | 31      | 30    | 29  16 | 15   0 |
3710  * +---------+-------+--------+--------+
3711  * | TRIGGER | VALID | UNUSED | FORMAT |
3712  * +-----------------------------------|
3713  *
3714  * Note that for the trigger bit to take effect it needs to change value
3715  * (i.e. it needs to be toggled).
3716  */
3717 #define NVIDIA_GET_SCRATCH0             0xfa6
3718 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3719 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3720 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3721 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3722 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3723 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3724
3725 #define NVIDIA_GET_SCRATCH1             0xfab
3726 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3727 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3728 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3729 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3730
3731 /*
3732  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3733  * the format is invalidated so that the HDMI codec can be disabled.
3734  */
3735 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3736 {
3737         unsigned int value;
3738
3739         /* bits [31:30] contain the trigger and valid bits */
3740         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3741                                    NVIDIA_GET_SCRATCH0, 0);
3742         value = (value >> 24) & 0xff;
3743
3744         /* bits [15:0] are used to store the HDA format */
3745         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3746                             NVIDIA_SET_SCRATCH0_BYTE0,
3747                             (format >> 0) & 0xff);
3748         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3749                             NVIDIA_SET_SCRATCH0_BYTE1,
3750                             (format >> 8) & 0xff);
3751
3752         /* bits [16:24] are unused */
3753         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3754                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3755
3756         /*
3757          * Bit 30 signals that the data is valid and hence that HDMI audio can
3758          * be enabled.
3759          */
3760         if (format == 0)
3761                 value &= ~NVIDIA_SCRATCH_VALID;
3762         else
3763                 value |= NVIDIA_SCRATCH_VALID;
3764
3765         /*
3766          * Whenever the trigger bit is toggled, an interrupt is raised in the
3767          * HDMI codec. The HDMI driver will use that as trigger to update its
3768          * configuration.
3769          */
3770         value ^= NVIDIA_SCRATCH_TRIGGER;
3771
3772         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3773                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3774 }
3775
3776 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3777                                   struct hda_codec *codec,
3778                                   unsigned int stream_tag,
3779                                   unsigned int format,
3780                                   struct snd_pcm_substream *substream)
3781 {
3782         int err;
3783
3784         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3785                                                 format, substream);
3786         if (err < 0)
3787                 return err;
3788
3789         /* notify the HDMI codec of the format change */
3790         tegra_hdmi_set_format(codec, format);
3791
3792         return 0;
3793 }
3794
3795 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3796                                   struct hda_codec *codec,
3797                                   struct snd_pcm_substream *substream)
3798 {
3799         /* invalidate the format in the HDMI codec */
3800         tegra_hdmi_set_format(codec, 0);
3801
3802         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3803 }
3804
3805 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3806 {
3807         struct hdmi_spec *spec = codec->spec;
3808         unsigned int i;
3809
3810         for (i = 0; i < spec->num_pins; i++) {
3811                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3812
3813                 if (pcm->pcm_type == type)
3814                         return pcm;
3815         }
3816
3817         return NULL;
3818 }
3819
3820 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3821 {
3822         struct hda_pcm_stream *stream;
3823         struct hda_pcm *pcm;
3824         int err;
3825
3826         err = generic_hdmi_build_pcms(codec);
3827         if (err < 0)
3828                 return err;
3829
3830         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3831         if (!pcm)
3832                 return -ENODEV;
3833
3834         /*
3835          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3836          * codec about format changes.
3837          */
3838         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3839         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3840         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3841
3842         return 0;
3843 }
3844
3845 static int patch_tegra_hdmi(struct hda_codec *codec)
3846 {
3847         struct hdmi_spec *spec;
3848         int err;
3849
3850         err = patch_generic_hdmi(codec);
3851         if (err)
3852                 return err;
3853
3854         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3855         spec = codec->spec;
3856         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3857                 nvhdmi_chmap_cea_alloc_validate_get_type;
3858         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3859
3860         return 0;
3861 }
3862
3863 /*
3864  * ATI/AMD-specific implementations
3865  */
3866
3867 #define is_amdhdmi_rev3_or_later(codec) \
3868         ((codec)->core.vendor_id == 0x1002aa01 && \
3869          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3870 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3871
3872 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3873 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3874 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3875 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3876 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3877 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3878 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3879 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3880 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3881 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3882 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3883 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3884 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3885 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3886 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3887 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3888 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3889 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3890 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3891 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3892 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3893 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3894 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3895 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3896 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3897
3898 /* AMD specific HDA cvt verbs */
3899 #define ATI_VERB_SET_RAMP_RATE          0x770
3900 #define ATI_VERB_GET_RAMP_RATE          0xf70
3901
3902 #define ATI_OUT_ENABLE 0x1
3903
3904 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3905 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3906
3907 #define ATI_HBR_CAPABLE 0x01
3908 #define ATI_HBR_ENABLE 0x10
3909
3910 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3911                                int dev_id, unsigned char *buf, int *eld_size)
3912 {
3913         WARN_ON(dev_id != 0);
3914         /* call hda_eld.c ATI/AMD-specific function */
3915         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3916                                     is_amdhdmi_rev3_or_later(codec));
3917 }
3918
3919 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec,
3920                                         hda_nid_t pin_nid, int dev_id, int ca,
3921                                         int active_channels, int conn_type)
3922 {
3923         WARN_ON(dev_id != 0);
3924         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3925 }
3926
3927 static int atihdmi_paired_swap_fc_lfe(int pos)
3928 {
3929         /*
3930          * ATI/AMD have automatic FC/LFE swap built-in
3931          * when in pairwise mapping mode.
3932          */
3933
3934         switch (pos) {
3935                 /* see channel_allocations[].speakers[] */
3936                 case 2: return 3;
3937                 case 3: return 2;
3938                 default: break;
3939         }
3940
3941         return pos;
3942 }
3943
3944 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3945                         int ca, int chs, unsigned char *map)
3946 {
3947         struct hdac_cea_channel_speaker_allocation *cap;
3948         int i, j;
3949
3950         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3951
3952         cap = snd_hdac_get_ch_alloc_from_ca(ca);
3953         for (i = 0; i < chs; ++i) {
3954                 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3955                 bool ok = false;
3956                 bool companion_ok = false;
3957
3958                 if (!mask)
3959                         continue;
3960
3961                 for (j = 0 + i % 2; j < 8; j += 2) {
3962                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3963                         if (cap->speakers[chan_idx] == mask) {
3964                                 /* channel is in a supported position */
3965                                 ok = true;
3966
3967                                 if (i % 2 == 0 && i + 1 < chs) {
3968                                         /* even channel, check the odd companion */
3969                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3970                                         int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3971                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3972
3973                                         if (comp_mask_req == comp_mask_act)
3974                                                 companion_ok = true;
3975                                         else
3976                                                 return -EINVAL;
3977                                 }
3978                                 break;
3979                         }
3980                 }
3981
3982                 if (!ok)
3983                         return -EINVAL;
3984
3985                 if (companion_ok)
3986                         i++; /* companion channel already checked */
3987         }
3988
3989         return 0;
3990 }
3991
3992 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3993                 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3994 {
3995         struct hda_codec *codec = hdac_to_hda_codec(hdac);
3996         int verb;
3997         int ati_channel_setup = 0;
3998
3999         if (hdmi_slot > 7)
4000                 return -EINVAL;
4001
4002         if (!has_amd_full_remap_support(codec)) {
4003                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
4004
4005                 /* In case this is an odd slot but without stream channel, do not
4006                  * disable the slot since the corresponding even slot could have a
4007                  * channel. In case neither have a channel, the slot pair will be
4008                  * disabled when this function is called for the even slot. */
4009                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
4010                         return 0;
4011
4012                 hdmi_slot -= hdmi_slot % 2;
4013
4014                 if (stream_channel != 0xf)
4015                         stream_channel -= stream_channel % 2;
4016         }
4017
4018         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
4019
4020         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
4021
4022         if (stream_channel != 0xf)
4023                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
4024
4025         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
4026 }
4027
4028 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
4029                                 hda_nid_t pin_nid, int asp_slot)
4030 {
4031         struct hda_codec *codec = hdac_to_hda_codec(hdac);
4032         bool was_odd = false;
4033         int ati_asp_slot = asp_slot;
4034         int verb;
4035         int ati_channel_setup;
4036
4037         if (asp_slot > 7)
4038                 return -EINVAL;
4039
4040         if (!has_amd_full_remap_support(codec)) {
4041                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
4042                 if (ati_asp_slot % 2 != 0) {
4043                         ati_asp_slot -= 1;
4044                         was_odd = true;
4045                 }
4046         }
4047
4048         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
4049
4050         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
4051
4052         if (!(ati_channel_setup & ATI_OUT_ENABLE))
4053                 return 0xf;
4054
4055         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
4056 }
4057
4058 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
4059                 struct hdac_chmap *chmap,
4060                 struct hdac_cea_channel_speaker_allocation *cap,
4061                 int channels)
4062 {
4063         int c;
4064
4065         /*
4066          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
4067          * we need to take that into account (a single channel may take 2
4068          * channel slots if we need to carry a silent channel next to it).
4069          * On Rev3+ AMD codecs this function is not used.
4070          */
4071         int chanpairs = 0;
4072
4073         /* We only produce even-numbered channel count TLVs */
4074         if ((channels % 2) != 0)
4075                 return -1;
4076
4077         for (c = 0; c < 7; c += 2) {
4078                 if (cap->speakers[c] || cap->speakers[c+1])
4079                         chanpairs++;
4080         }
4081
4082         if (chanpairs * 2 != channels)
4083                 return -1;
4084
4085         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
4086 }
4087
4088 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
4089                 struct hdac_cea_channel_speaker_allocation *cap,
4090                 unsigned int *chmap, int channels)
4091 {
4092         /* produce paired maps for pre-rev3 ATI/AMD codecs */
4093         int count = 0;
4094         int c;
4095
4096         for (c = 7; c >= 0; c--) {
4097                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
4098                 int spk = cap->speakers[chan];
4099                 if (!spk) {
4100                         /* add N/A channel if the companion channel is occupied */
4101                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
4102                                 chmap[count++] = SNDRV_CHMAP_NA;
4103
4104                         continue;
4105                 }
4106
4107                 chmap[count++] = snd_hdac_spk_to_chmap(spk);
4108         }
4109
4110         WARN_ON(count != channels);
4111 }
4112
4113 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
4114                                  int dev_id, bool hbr)
4115 {
4116         int hbr_ctl, hbr_ctl_new;
4117
4118         WARN_ON(dev_id != 0);
4119
4120         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
4121         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
4122                 if (hbr)
4123                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
4124                 else
4125                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
4126
4127                 codec_dbg(codec,
4128                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
4129                                 pin_nid,
4130                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
4131                                 hbr_ctl_new);
4132
4133                 if (hbr_ctl != hbr_ctl_new)
4134                         snd_hda_codec_write(codec, pin_nid, 0,
4135                                                 ATI_VERB_SET_HBR_CONTROL,
4136                                                 hbr_ctl_new);
4137
4138         } else if (hbr)
4139                 return -EINVAL;
4140
4141         return 0;
4142 }
4143
4144 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
4145                                 hda_nid_t pin_nid, int dev_id,
4146                                 u32 stream_tag, int format)
4147 {
4148         if (is_amdhdmi_rev3_or_later(codec)) {
4149                 int ramp_rate = 180; /* default as per AMD spec */
4150                 /* disable ramp-up/down for non-pcm as per AMD spec */
4151                 if (format & AC_FMT_TYPE_NON_PCM)
4152                         ramp_rate = 0;
4153
4154                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
4155         }
4156
4157         return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
4158                                  stream_tag, format);
4159 }
4160
4161
4162 static int atihdmi_init(struct hda_codec *codec)
4163 {
4164         struct hdmi_spec *spec = codec->spec;
4165         int pin_idx, err;
4166
4167         err = generic_hdmi_init(codec);
4168
4169         if (err)
4170                 return err;
4171
4172         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
4173                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
4174
4175                 /* make sure downmix information in infoframe is zero */
4176                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
4177
4178                 /* enable channel-wise remap mode if supported */
4179                 if (has_amd_full_remap_support(codec))
4180                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
4181                                             ATI_VERB_SET_MULTICHANNEL_MODE,
4182                                             ATI_MULTICHANNEL_MODE_SINGLE);
4183         }
4184         codec->auto_runtime_pm = 1;
4185
4186         return 0;
4187 }
4188
4189 /* map from pin NID to port; port is 0-based */
4190 /* for AMD: assume widget NID starting from 3, with step 2 (3, 5, 7, ...) */
4191 static int atihdmi_pin2port(void *audio_ptr, int pin_nid)
4192 {
4193         return pin_nid / 2 - 1;
4194 }
4195
4196 /* reverse-map from port to pin NID: see above */
4197 static int atihdmi_port2pin(struct hda_codec *codec, int port)
4198 {
4199         return port * 2 + 3;
4200 }
4201
4202 static const struct drm_audio_component_audio_ops atihdmi_audio_ops = {
4203         .pin2port = atihdmi_pin2port,
4204         .pin_eld_notify = generic_acomp_pin_eld_notify,
4205         .master_bind = generic_acomp_master_bind,
4206         .master_unbind = generic_acomp_master_unbind,
4207 };
4208
4209 static int patch_atihdmi(struct hda_codec *codec)
4210 {
4211         struct hdmi_spec *spec;
4212         struct hdmi_spec_per_cvt *per_cvt;
4213         int err, cvt_idx;
4214
4215         err = patch_generic_hdmi(codec);
4216
4217         if (err)
4218                 return err;
4219
4220         codec->patch_ops.init = atihdmi_init;
4221
4222         spec = codec->spec;
4223
4224         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
4225         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
4226         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
4227         spec->ops.setup_stream = atihdmi_setup_stream;
4228
4229         spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
4230         spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
4231
4232         if (!has_amd_full_remap_support(codec)) {
4233                 /* override to ATI/AMD-specific versions with pairwise mapping */
4234                 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
4235                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
4236                 spec->chmap.ops.cea_alloc_to_tlv_chmap =
4237                                 atihdmi_paired_cea_alloc_to_tlv_chmap;
4238                 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
4239         }
4240
4241         /* ATI/AMD converters do not advertise all of their capabilities */
4242         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
4243                 per_cvt = get_cvt(spec, cvt_idx);
4244                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
4245                 per_cvt->rates |= SUPPORTED_RATES;
4246                 per_cvt->formats |= SUPPORTED_FORMATS;
4247                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
4248         }
4249
4250         spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
4251
4252         /* AMD GPUs have neither EPSS nor CLKSTOP bits, hence preventing
4253          * the link-down as is.  Tell the core to allow it.
4254          */
4255         codec->link_down_at_suspend = 1;
4256
4257         generic_acomp_init(codec, &atihdmi_audio_ops, atihdmi_port2pin);
4258
4259         return 0;
4260 }
4261
4262 /* VIA HDMI Implementation */
4263 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
4264 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
4265
4266 static int patch_via_hdmi(struct hda_codec *codec)
4267 {
4268         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
4269 }
4270
4271 /*
4272  * patch entries
4273  */
4274 static const struct hda_device_id snd_hda_id_hdmi[] = {
4275 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
4276 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
4277 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
4278 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
4279 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
4280 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
4281 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
4282 HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4283 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4284 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4285 HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI",      patch_nvhdmi_8ch_7x),
4286 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4287 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4288 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
4289 HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP",   patch_nvhdmi_legacy),
4290 HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP",   patch_nvhdmi_legacy),
4291 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi_legacy),
4292 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi_legacy),
4293 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi_legacy),
4294 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi_legacy),
4295 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi_legacy),
4296 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi_legacy),
4297 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi_legacy),
4298 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi_legacy),
4299 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi_legacy),
4300 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi_legacy),
4301 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi_legacy),
4302 /* 17 is known to be absent */
4303 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi_legacy),
4304 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi_legacy),
4305 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi_legacy),
4306 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi_legacy),
4307 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi_legacy),
4308 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
4309 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
4310 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
4311 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
4312 HDA_CODEC_ENTRY(0x10de002d, "Tegra186 HDMI/DP0", patch_tegra_hdmi),
4313 HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi),
4314 HDA_CODEC_ENTRY(0x10de002f, "Tegra194 HDMI/DP2", patch_tegra_hdmi),
4315 HDA_CODEC_ENTRY(0x10de0030, "Tegra194 HDMI/DP3", patch_tegra_hdmi),
4316 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
4317 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
4318 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
4319 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
4320 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
4321 HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP",   patch_nvhdmi),
4322 HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP",   patch_nvhdmi),
4323 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
4324 HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP",   patch_nvhdmi),
4325 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
4326 HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP",   patch_nvhdmi),
4327 HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP",   patch_nvhdmi),
4328 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
4329 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
4330 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
4331 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
4332 HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP",   patch_nvhdmi),
4333 HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP",   patch_nvhdmi),
4334 HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP",   patch_nvhdmi),
4335 HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP",   patch_nvhdmi),
4336 HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP",   patch_nvhdmi),
4337 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
4338 HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP",   patch_nvhdmi),
4339 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP",   patch_nvhdmi),
4340 HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP",   patch_nvhdmi),
4341 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP",   patch_nvhdmi),
4342 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
4343 HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP",   patch_nvhdmi),
4344 HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP",   patch_nvhdmi),
4345 HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP",   patch_nvhdmi),
4346 HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP",   patch_nvhdmi),
4347 HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP",   patch_nvhdmi),
4348 HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP",   patch_nvhdmi),
4349 HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP",   patch_nvhdmi),
4350 HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP",   patch_nvhdmi),
4351 HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP",   patch_nvhdmi),
4352 HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP",   patch_nvhdmi),
4353 HDA_CODEC_ENTRY(0x10de009a, "GPU 9a HDMI/DP",   patch_nvhdmi),
4354 HDA_CODEC_ENTRY(0x10de009d, "GPU 9d HDMI/DP",   patch_nvhdmi),
4355 HDA_CODEC_ENTRY(0x10de009e, "GPU 9e HDMI/DP",   patch_nvhdmi),
4356 HDA_CODEC_ENTRY(0x10de009f, "GPU 9f HDMI/DP",   patch_nvhdmi),
4357 HDA_CODEC_ENTRY(0x10de00a0, "GPU a0 HDMI/DP",   patch_nvhdmi),
4358 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4359 HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI",    patch_nvhdmi_2ch),
4360 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
4361 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
4362 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
4363 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
4364 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4365 HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI",  patch_i915_glk_hdmi),
4366 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
4367 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
4368 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
4369 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4370 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
4371 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
4372 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_i915_hsw_hdmi),
4373 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_i915_hsw_hdmi),
4374 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_i915_hsw_hdmi),
4375 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_i915_hsw_hdmi),
4376 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_i915_hsw_hdmi),
4377 HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI",  patch_i915_glk_hdmi),
4378 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI",  patch_i915_glk_hdmi),
4379 HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI",     patch_i915_icl_hdmi),
4380 HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI",   patch_i915_tgl_hdmi),
4381 HDA_CODEC_ENTRY(0x80862814, "DG1 HDMI", patch_i915_tgl_hdmi),
4382 HDA_CODEC_ENTRY(0x80862815, "Alderlake HDMI",   patch_i915_tgl_hdmi),
4383 HDA_CODEC_ENTRY(0x8086281c, "Alderlake-P HDMI", patch_i915_tgl_hdmi),
4384 HDA_CODEC_ENTRY(0x80862816, "Rocketlake HDMI",  patch_i915_tgl_hdmi),
4385 HDA_CODEC_ENTRY(0x8086281a, "Jasperlake HDMI",  patch_i915_icl_hdmi),
4386 HDA_CODEC_ENTRY(0x8086281b, "Elkhartlake HDMI", patch_i915_icl_hdmi),
4387 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
4388 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
4389 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_i915_byt_hdmi),
4390 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
4391 /* special ID for generic HDMI */
4392 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
4393 {} /* terminator */
4394 };
4395 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
4396
4397 MODULE_LICENSE("GPL");
4398 MODULE_DESCRIPTION("HDMI HD-audio codec");
4399 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4400 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4401 MODULE_ALIAS("snd-hda-codec-atihdmi");
4402
4403 static struct hda_codec_driver hdmi_driver = {
4404         .id = snd_hda_id_hdmi,
4405 };
4406
4407 module_hda_codec_driver(hdmi_driver);