sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *
  10  *  Authors:
  11  *                      Wu Fengguang <wfg@linux.intel.com>
  12  *
  13  *  Maintained by:
  14  *                      Wu Fengguang <wfg@linux.intel.com>
  15  *
  16  *  This program is free software; you can redistribute it and/or modify it
  17  *  under the terms of the GNU General Public License as published by the Free
  18  *  Software Foundation; either version 2 of the License, or (at your option)
  19  *  any later version.
  20  *
  21  *  This program is distributed in the hope that it will be useful, but
  22  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  24  *  for more details.
  25  *
  26  *  You should have received a copy of the GNU General Public License
  27  *  along with this program; if not, write to the Free Software Foundation,
  28  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  29  */
  30
  31 #include <linux/init.h>
  32 #include <linux/delay.h>
  33 #include <linux/slab.h>
  34 #include <linux/module.h>
  35 #include <sound/core.h>
  36 #include <sound/jack.h>
  37 #include <sound/asoundef.h>
  38 #include <sound/tlv.h>
  39 #include "hda_codec.h"
  40 #include "hda_local.h"
  41 #include "hda_jack.h"
  42
  43 static bool static_hdmi_pcm;
  44 module_param(static_hdmi_pcm, bool, 0644);
  45 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  46
  47 struct hdmi_spec_per_cvt {
  48         hda_nid_t cvt_nid;
  49         int assigned;
  50         unsigned int channels_min;
  51         unsigned int channels_max;
  52         u32 rates;
  53         u64 formats;
  54         unsigned int maxbps;
  55 };
  56
  57 /* max. connections to a widget */
  58 #define HDA_MAX_CONNECTIONS     32
  59
  60 struct hdmi_spec_per_pin {
  61         hda_nid_t pin_nid;
  62         int num_mux_nids;
  63         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  64
  65         struct hda_codec *codec;
  66         struct hdmi_eld sink_eld;
  67         struct delayed_work work;
  68         struct snd_kcontrol *eld_ctl;
  69         int repoll_count;
  70         bool setup; /* the stream has been set up by prepare callback */
  71         int channels; /* current number of channels */
  72         bool non_pcm;
  73         bool chmap_set;         /* channel-map override by ALSA API? */
  74         unsigned char chmap[8]; /* ALSA API channel-map */
  75         char pcm_name[8];       /* filled in build_pcm callbacks */
  76 };
  77
  78 struct hdmi_spec {
  79         int num_cvts;
  80         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
  81         hda_nid_t cvt_nids[4]; /* only for haswell fix */
  82
  83         int num_pins;
  84         struct snd_array pins; /* struct hdmi_spec_per_pin */
  85         struct snd_array pcm_rec; /* struct hda_pcm */
  86         unsigned int channels_max; /* max over all cvts */
  87
  88         struct hdmi_eld temp_eld;
  89         /*
  90          * Non-generic ATI/NVIDIA specific
  91          */
  92         struct hda_multi_out multiout;
  93         struct hda_pcm_stream pcm_playback;
  94 };
  95
  96
  97 struct hdmi_audio_infoframe {
  98         u8 type; /* 0x84 */
  99         u8 ver;  /* 0x01 */
 100         u8 len;  /* 0x0a */
 101
 102         u8 checksum;
 103
 104         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 105         u8 SS01_SF24;
 106         u8 CXT04;
 107         u8 CA;
 108         u8 LFEPBL01_LSV36_DM_INH7;
 109 };
 110
 111 struct dp_audio_infoframe {
 112         u8 type; /* 0x84 */
 113         u8 len;  /* 0x1b */
 114         u8 ver;  /* 0x11 << 2 */
 115
 116         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 117         u8 SS01_SF24;
 118         u8 CXT04;
 119         u8 CA;
 120         u8 LFEPBL01_LSV36_DM_INH7;
 121 };
 122
 123 union audio_infoframe {
 124         struct hdmi_audio_infoframe hdmi;
 125         struct dp_audio_infoframe dp;
 126         u8 bytes[0];
 127 };
 128
 129 /*
 130  * CEA speaker placement:
 131  *
 132  *        FLH       FCH        FRH
 133  *  FLW    FL  FLC   FC   FRC   FR   FRW
 134  *
 135  *                                  LFE
 136  *                     TC
 137  *
 138  *          RL  RLC   RC   RRC   RR
 139  *
 140  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 141  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 142  */
 143 enum cea_speaker_placement {
 144         FL  = (1 <<  0),        /* Front Left           */
 145         FC  = (1 <<  1),        /* Front Center         */
 146         FR  = (1 <<  2),        /* Front Right          */
 147         FLC = (1 <<  3),        /* Front Left Center    */
 148         FRC = (1 <<  4),        /* Front Right Center   */
 149         RL  = (1 <<  5),        /* Rear Left            */
 150         RC  = (1 <<  6),        /* Rear Center          */
 151         RR  = (1 <<  7),        /* Rear Right           */
 152         RLC = (1 <<  8),        /* Rear Left Center     */
 153         RRC = (1 <<  9),        /* Rear Right Center    */
 154         LFE = (1 << 10),        /* Low Frequency Effect */
 155         FLW = (1 << 11),        /* Front Left Wide      */
 156         FRW = (1 << 12),        /* Front Right Wide     */
 157         FLH = (1 << 13),        /* Front Left High      */
 158         FCH = (1 << 14),        /* Front Center High    */
 159         FRH = (1 << 15),        /* Front Right High     */
 160         TC  = (1 << 16),        /* Top Center           */
 161 };
 162
 163 /*
 164  * ELD SA bits in the CEA Speaker Allocation data block
 165  */
 166 static int eld_speaker_allocation_bits[] = {
 167         [0] = FL | FR,
 168         [1] = LFE,
 169         [2] = FC,
 170         [3] = RL | RR,
 171         [4] = RC,
 172         [5] = FLC | FRC,
 173         [6] = RLC | RRC,
 174         /* the following are not defined in ELD yet */
 175         [7] = FLW | FRW,
 176         [8] = FLH | FRH,
 177         [9] = TC,
 178         [10] = FCH,
 179 };
 180
 181 struct cea_channel_speaker_allocation {
 182         int ca_index;
 183         int speakers[8];
 184
 185         /* derived values, just for convenience */
 186         int channels;
 187         int spk_mask;
 188 };
 189
 190 /*
 191  * ALSA sequence is:
 192  *
 193  *       surround40   surround41   surround50   surround51   surround71
 194  * ch0   front left   =            =            =            =
 195  * ch1   front right  =            =            =            =
 196  * ch2   rear left    =            =            =            =
 197  * ch3   rear right   =            =            =            =
 198  * ch4                LFE          center       center       center
 199  * ch5                                          LFE          LFE
 200  * ch6                                                       side left
 201  * ch7                                                       side right
 202  *
 203  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 204  */
 205 static int hdmi_channel_mapping[0x32][8] = {
 206         /* stereo */
 207         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 208         /* 2.1 */
 209         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 210         /* Dolby Surround */
 211         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 212         /* surround40 */
 213         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 214         /* 4ch */
 215         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 216         /* surround41 */
 217         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 218         /* surround50 */
 219         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 220         /* surround51 */
 221         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 222         /* 7.1 */
 223         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 224 };
 225
 226 /*
 227  * This is an ordered list!
 228  *
 229  * The preceding ones have better chances to be selected by
 230  * hdmi_channel_allocation().
 231  */
 232 static struct cea_channel_speaker_allocation channel_allocations[] = {
 233 /*                        channel:   7     6    5    4    3     2    1    0  */
 234 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 235                                  /* 2.1 */
 236 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 237                                  /* Dolby Surround */
 238 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 239                                  /* surround40 */
 240 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 241                                  /* surround41 */
 242 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 243                                  /* surround50 */
 244 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 245                                  /* surround51 */
 246 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 247                                  /* 6.1 */
 248 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 249                                  /* surround71 */
 250 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 251
 252 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 253 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 254 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 255 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 256 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 257 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 258 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 259 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 260 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 261 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 262 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 263 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 264 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 265 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 266 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 267 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 268 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 269 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 270 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 271 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 272 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 273 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 274 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 275 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 276 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 277 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 278 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 279 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 280 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 281 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 282 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 283 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 284 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 285 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 286 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 287 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 288 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 289 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 290 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 291 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 292 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 293 };
 294
 295
 296 /*
 297  * HDMI routines
 298  */
 299
 300 #define get_pin(spec, idx) \
 301         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 302 #define get_cvt(spec, idx) \
 303         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 304 #define get_pcm_rec(spec, idx) \
 305         ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
 306
 307 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
 308 {
 309         int pin_idx;
 310
 311         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 312                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
 313                         return pin_idx;
 314
 315         snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
 316         return -EINVAL;
 317 }
 318
 319 static int hinfo_to_pin_index(struct hdmi_spec *spec,
 320                               struct hda_pcm_stream *hinfo)
 321 {
 322         int pin_idx;
 323
 324         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 325                 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
 326                         return pin_idx;
 327
 328         snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
 329         return -EINVAL;
 330 }
 331
 332 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
 333 {
 334         int cvt_idx;
 335
 336         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 337                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 338                         return cvt_idx;
 339
 340         snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
 341         return -EINVAL;
 342 }
 343
 344 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 345                         struct snd_ctl_elem_info *uinfo)
 346 {
 347         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 348         struct hdmi_spec *spec = codec->spec;
 349         struct hdmi_eld *eld;
 350         int pin_idx;
 351
 352         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 353
 354         pin_idx = kcontrol->private_value;
 355         eld = &get_pin(spec, pin_idx)->sink_eld;
 356
 357         mutex_lock(&eld->lock);
 358         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 359         mutex_unlock(&eld->lock);
 360
 361         return 0;
 362 }
 363
 364 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 365                         struct snd_ctl_elem_value *ucontrol)
 366 {
 367         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 368         struct hdmi_spec *spec = codec->spec;
 369         struct hdmi_eld *eld;
 370         int pin_idx;
 371
 372         pin_idx = kcontrol->private_value;
 373         eld = &get_pin(spec, pin_idx)->sink_eld;
 374
 375         mutex_lock(&eld->lock);
 376         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
 377                 mutex_unlock(&eld->lock);
 378                 snd_BUG();
 379                 return -EINVAL;
 380         }
 381
 382         memset(ucontrol->value.bytes.data, 0,
 383                ARRAY_SIZE(ucontrol->value.bytes.data));
 384         if (eld->eld_valid)
 385                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 386                        eld->eld_size);
 387         mutex_unlock(&eld->lock);
 388
 389         return 0;
 390 }
 391
 392 static struct snd_kcontrol_new eld_bytes_ctl = {
 393         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 394         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 395         .name = "ELD",
 396         .info = hdmi_eld_ctl_info,
 397         .get = hdmi_eld_ctl_get,
 398 };
 399
 400 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
 401                         int device)
 402 {
 403         struct snd_kcontrol *kctl;
 404         struct hdmi_spec *spec = codec->spec;
 405         int err;
 406
 407         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 408         if (!kctl)
 409                 return -ENOMEM;
 410         kctl->private_value = pin_idx;
 411         kctl->id.device = device;
 412
 413         err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
 414         if (err < 0)
 415                 return err;
 416
 417         get_pin(spec, pin_idx)->eld_ctl = kctl;
 418         return 0;
 419 }
 420
 421 #ifdef BE_PARANOID
 422 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 423                                 int *packet_index, int *byte_index)
 424 {
 425         int val;
 426
 427         val = snd_hda_codec_read(codec, pin_nid, 0,
 428                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 429
 430         *packet_index = val >> 5;
 431         *byte_index = val & 0x1f;
 432 }
 433 #endif
 434
 435 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 436                                 int packet_index, int byte_index)
 437 {
 438         int val;
 439
 440         val = (packet_index << 5) | (byte_index & 0x1f);
 441
 442         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 443 }
 444
 445 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 446                                 unsigned char val)
 447 {
 448         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 449 }
 450
 451 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 452 {
 453         /* Unmute */
 454         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 455                 snd_hda_codec_write(codec, pin_nid, 0,
 456                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 457         /* Enable pin out: some machines with GM965 gets broken output when
 458          * the pin is disabled or changed while using with HDMI
 459          */
 460         snd_hda_codec_write(codec, pin_nid, 0,
 461                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
 462 }
 463
 464 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
 465 {
 466         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
 467                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 468 }
 469
 470 static void hdmi_set_channel_count(struct hda_codec *codec,
 471                                    hda_nid_t cvt_nid, int chs)
 472 {
 473         if (chs != hdmi_get_channel_count(codec, cvt_nid))
 474                 snd_hda_codec_write(codec, cvt_nid, 0,
 475                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 476 }
 477
 478
 479 /*
 480  * Channel mapping routines
 481  */
 482
 483 /*
 484  * Compute derived values in channel_allocations[].
 485  */
 486 static void init_channel_allocations(void)
 487 {
 488         int i, j;
 489         struct cea_channel_speaker_allocation *p;
 490
 491         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 492                 p = channel_allocations + i;
 493                 p->channels = 0;
 494                 p->spk_mask = 0;
 495                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 496                         if (p->speakers[j]) {
 497                                 p->channels++;
 498                                 p->spk_mask |= p->speakers[j];
 499                         }
 500         }
 501 }
 502
 503 static int get_channel_allocation_order(int ca)
 504 {
 505         int i;
 506
 507         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 508                 if (channel_allocations[i].ca_index == ca)
 509                         break;
 510         }
 511         return i;
 512 }
 513
 514 /*
 515  * The transformation takes two steps:
 516  *
 517  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 518  *            spk_mask => (channel_allocations[])         => ai->CA
 519  *
 520  * TODO: it could select the wrong CA from multiple candidates.
 521 */
 522 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
 523 {
 524         int i;
 525         int ca = 0;
 526         int spk_mask = 0;
 527         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 528
 529         /*
 530          * CA defaults to 0 for basic stereo audio
 531          */
 532         if (channels <= 2)
 533                 return 0;
 534
 535         /*
 536          * expand ELD's speaker allocation mask
 537          *
 538          * ELD tells the speaker mask in a compact(paired) form,
 539          * expand ELD's notions to match the ones used by Audio InfoFrame.
 540          */
 541         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 542                 if (eld->info.spk_alloc & (1 << i))
 543                         spk_mask |= eld_speaker_allocation_bits[i];
 544         }
 545
 546         /* search for the first working match in the CA table */
 547         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 548                 if (channels == channel_allocations[i].channels &&
 549                     (spk_mask & channel_allocations[i].spk_mask) ==
 550                                 channel_allocations[i].spk_mask) {
 551                         ca = channel_allocations[i].ca_index;
 552                         break;
 553                 }
 554         }
 555
 556         if (!ca) {
 557                 /* if there was no match, select the regular ALSA channel
 558                  * allocation with the matching number of channels */
 559                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 560                         if (channels == channel_allocations[i].channels) {
 561                                 ca = channel_allocations[i].ca_index;
 562                                 break;
 563                         }
 564                 }
 565         }
 566
 567         snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
 568         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 569                     ca, channels, buf);
 570
 571         return ca;
 572 }
 573
 574 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 575                                        hda_nid_t pin_nid)
 576 {
 577 #ifdef CONFIG_SND_DEBUG_VERBOSE
 578         int i;
 579         int slot;
 580
 581         for (i = 0; i < 8; i++) {
 582                 slot = snd_hda_codec_read(codec, pin_nid, 0,
 583                                                 AC_VERB_GET_HDMI_CHAN_SLOT, i);
 584                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
 585                                                 slot >> 4, slot & 0xf);
 586         }
 587 #endif
 588 }
 589
 590
 591 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
 592                                        hda_nid_t pin_nid,
 593                                        bool non_pcm,
 594                                        int ca)
 595 {
 596         int i;
 597         int err;
 598         int order;
 599         int non_pcm_mapping[8];
 600
 601         order = get_channel_allocation_order(ca);
 602
 603         if (hdmi_channel_mapping[ca][1] == 0) {
 604                 for (i = 0; i < channel_allocations[order].channels; i++)
 605                         hdmi_channel_mapping[ca][i] = i | (i << 4);
 606                 for (; i < 8; i++)
 607                         hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
 608         }
 609
 610         if (non_pcm) {
 611                 for (i = 0; i < channel_allocations[order].channels; i++)
 612                         non_pcm_mapping[i] = i | (i << 4);
 613                 for (; i < 8; i++)
 614                         non_pcm_mapping[i] = 0xf | (i << 4);
 615         }
 616
 617         for (i = 0; i < 8; i++) {
 618                 err = snd_hda_codec_write(codec, pin_nid, 0,
 619                                           AC_VERB_SET_HDMI_CHAN_SLOT,
 620                                           non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
 621                 if (err) {
 622                         snd_printdd(KERN_NOTICE
 623                                     "HDMI: channel mapping failed\n");
 624                         break;
 625                 }
 626         }
 627
 628         hdmi_debug_channel_mapping(codec, pin_nid);
 629 }
 630
 631 struct channel_map_table {
 632         unsigned char map;              /* ALSA API channel map position */
 633         unsigned char cea_slot;         /* CEA slot value */
 634         int spk_mask;                   /* speaker position bit mask */
 635 };
 636
 637 static struct channel_map_table map_tables[] = {
 638         { SNDRV_CHMAP_FL,       0x00,   FL },
 639         { SNDRV_CHMAP_FR,       0x01,   FR },
 640         { SNDRV_CHMAP_RL,       0x04,   RL },
 641         { SNDRV_CHMAP_RR,       0x05,   RR },
 642         { SNDRV_CHMAP_LFE,      0x02,   LFE },
 643         { SNDRV_CHMAP_FC,       0x03,   FC },
 644         { SNDRV_CHMAP_RLC,      0x06,   RLC },
 645         { SNDRV_CHMAP_RRC,      0x07,   RRC },
 646         {} /* terminator */
 647 };
 648
 649 /* from ALSA API channel position to speaker bit mask */
 650 static int to_spk_mask(unsigned char c)
 651 {
 652         struct channel_map_table *t = map_tables;
 653         for (; t->map; t++) {
 654                 if (t->map == c)
 655                         return t->spk_mask;
 656         }
 657         return 0;
 658 }
 659
 660 /* from ALSA API channel position to CEA slot */
 661 static int to_cea_slot(unsigned char c)
 662 {
 663         struct channel_map_table *t = map_tables;
 664         for (; t->map; t++) {
 665                 if (t->map == c)
 666                         return t->cea_slot;
 667         }
 668         return 0x0f;
 669 }
 670
 671 /* from CEA slot to ALSA API channel position */
 672 static int from_cea_slot(unsigned char c)
 673 {
 674         struct channel_map_table *t = map_tables;
 675         for (; t->map; t++) {
 676                 if (t->cea_slot == c)
 677                         return t->map;
 678         }
 679         return 0;
 680 }
 681
 682 /* from speaker bit mask to ALSA API channel position */
 683 static int spk_to_chmap(int spk)
 684 {
 685         struct channel_map_table *t = map_tables;
 686         for (; t->map; t++) {
 687                 if (t->spk_mask == spk)
 688                         return t->map;
 689         }
 690         return 0;
 691 }
 692
 693 /* get the CA index corresponding to the given ALSA API channel map */
 694 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
 695 {
 696         int i, spks = 0, spk_mask = 0;
 697
 698         for (i = 0; i < chs; i++) {
 699                 int mask = to_spk_mask(map[i]);
 700                 if (mask) {
 701                         spk_mask |= mask;
 702                         spks++;
 703                 }
 704         }
 705
 706         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 707                 if ((chs == channel_allocations[i].channels ||
 708                      spks == channel_allocations[i].channels) &&
 709                     (spk_mask & channel_allocations[i].spk_mask) ==
 710                                 channel_allocations[i].spk_mask)
 711                         return channel_allocations[i].ca_index;
 712         }
 713         return -1;
 714 }
 715
 716 /* set up the channel slots for the given ALSA API channel map */
 717 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
 718                                              hda_nid_t pin_nid,
 719                                              int chs, unsigned char *map)
 720 {
 721         int i;
 722         for (i = 0; i < 8; i++) {
 723                 int val, err;
 724                 if (i < chs)
 725                         val = to_cea_slot(map[i]);
 726                 else
 727                         val = 0xf;
 728                 val |= (i << 4);
 729                 err = snd_hda_codec_write(codec, pin_nid, 0,
 730                                           AC_VERB_SET_HDMI_CHAN_SLOT, val);
 731                 if (err)
 732                         return -EINVAL;
 733         }
 734         return 0;
 735 }
 736
 737 /* store ALSA API channel map from the current default map */
 738 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
 739 {
 740         int i;
 741         for (i = 0; i < 8; i++) {
 742                 if (i < channel_allocations[ca].channels)
 743                         map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
 744                 else
 745                         map[i] = 0;
 746         }
 747 }
 748
 749 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 750                                        hda_nid_t pin_nid, bool non_pcm, int ca,
 751                                        int channels, unsigned char *map,
 752                                        bool chmap_set)
 753 {
 754         if (!non_pcm && chmap_set) {
 755                 hdmi_manual_setup_channel_mapping(codec, pin_nid,
 756                                                   channels, map);
 757         } else {
 758                 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
 759                 hdmi_setup_fake_chmap(map, ca);
 760         }
 761 }
 762
 763 /*
 764  * Audio InfoFrame routines
 765  */
 766
 767 /*
 768  * Enable Audio InfoFrame Transmission
 769  */
 770 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 771                                        hda_nid_t pin_nid)
 772 {
 773         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 774         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 775                                                 AC_DIPXMIT_BEST);
 776 }
 777
 778 /*
 779  * Disable Audio InfoFrame Transmission
 780  */
 781 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 782                                       hda_nid_t pin_nid)
 783 {
 784         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 785         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 786                                                 AC_DIPXMIT_DISABLE);
 787 }
 788
 789 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 790 {
 791 #ifdef CONFIG_SND_DEBUG_VERBOSE
 792         int i;
 793         int size;
 794
 795         size = snd_hdmi_get_eld_size(codec, pin_nid);
 796         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
 797
 798         for (i = 0; i < 8; i++) {
 799                 size = snd_hda_codec_read(codec, pin_nid, 0,
 800                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 801                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 802         }
 803 #endif
 804 }
 805
 806 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 807 {
 808 #ifdef BE_PARANOID
 809         int i, j;
 810         int size;
 811         int pi, bi;
 812         for (i = 0; i < 8; i++) {
 813                 size = snd_hda_codec_read(codec, pin_nid, 0,
 814                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 815                 if (size == 0)
 816                         continue;
 817
 818                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 819                 for (j = 1; j < 1000; j++) {
 820                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 821                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 822                         if (pi != i)
 823                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
 824                                                 bi, pi, i);
 825                         if (bi == 0) /* byte index wrapped around */
 826                                 break;
 827                 }
 828                 snd_printd(KERN_INFO
 829                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 830                         i, size, j);
 831         }
 832 #endif
 833 }
 834
 835 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 836 {
 837         u8 *bytes = (u8 *)hdmi_ai;
 838         u8 sum = 0;
 839         int i;
 840
 841         hdmi_ai->checksum = 0;
 842
 843         for (i = 0; i < sizeof(*hdmi_ai); i++)
 844                 sum += bytes[i];
 845
 846         hdmi_ai->checksum = -sum;
 847 }
 848
 849 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 850                                       hda_nid_t pin_nid,
 851                                       u8 *dip, int size)
 852 {
 853         int i;
 854
 855         hdmi_debug_dip_size(codec, pin_nid);
 856         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 857
 858         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 859         for (i = 0; i < size; i++)
 860                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 861 }
 862
 863 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 864                                     u8 *dip, int size)
 865 {
 866         u8 val;
 867         int i;
 868
 869         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 870                                                             != AC_DIPXMIT_BEST)
 871                 return false;
 872
 873         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 874         for (i = 0; i < size; i++) {
 875                 val = snd_hda_codec_read(codec, pin_nid, 0,
 876                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 877                 if (val != dip[i])
 878                         return false;
 879         }
 880
 881         return true;
 882 }
 883
 884 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
 885                                        struct hdmi_spec_per_pin *per_pin,
 886                                        bool non_pcm)
 887 {
 888         hda_nid_t pin_nid = per_pin->pin_nid;
 889         int channels = per_pin->channels;
 890         struct hdmi_eld *eld;
 891         int ca;
 892         union audio_infoframe ai;
 893
 894         if (!channels)
 895                 return;
 896
 897         eld = &per_pin->sink_eld;
 898         if (!eld->monitor_present)
 899                 return;
 900
 901         if (!non_pcm && per_pin->chmap_set)
 902                 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
 903         else
 904                 ca = hdmi_channel_allocation(eld, channels);
 905         if (ca < 0)
 906                 ca = 0;
 907
 908         memset(&ai, 0, sizeof(ai));
 909         if (eld->info.conn_type == 0) { /* HDMI */
 910                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 911
 912                 hdmi_ai->type           = 0x84;
 913                 hdmi_ai->ver            = 0x01;
 914                 hdmi_ai->len            = 0x0a;
 915                 hdmi_ai->CC02_CT47      = channels - 1;
 916                 hdmi_ai->CA             = ca;
 917                 hdmi_checksum_audio_infoframe(hdmi_ai);
 918         } else if (eld->info.conn_type == 1) { /* DisplayPort */
 919                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 920
 921                 dp_ai->type             = 0x84;
 922                 dp_ai->len              = 0x1b;
 923                 dp_ai->ver              = 0x11 << 2;
 924                 dp_ai->CC02_CT47        = channels - 1;
 925                 dp_ai->CA               = ca;
 926         } else {
 927                 snd_printd("HDMI: unknown connection type at pin %d\n",
 928                             pin_nid);
 929                 return;
 930         }
 931
 932         /*
 933          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 934          * sizeof(*dp_ai) to avoid partial match/update problems when
 935          * the user switches between HDMI/DP monitors.
 936          */
 937         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 938                                         sizeof(ai))) {
 939                 snd_printdd("hdmi_setup_audio_infoframe: "
 940                             "pin=%d channels=%d\n",
 941                             pin_nid,
 942                             channels);
 943                 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
 944                                            channels, per_pin->chmap,
 945                                            per_pin->chmap_set);
 946                 hdmi_stop_infoframe_trans(codec, pin_nid);
 947                 hdmi_fill_audio_infoframe(codec, pin_nid,
 948                                             ai.bytes, sizeof(ai));
 949                 hdmi_start_infoframe_trans(codec, pin_nid);
 950         } else {
 951                 /* For non-pcm audio switch, setup new channel mapping
 952                  * accordingly */
 953                 if (per_pin->non_pcm != non_pcm)
 954                         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
 955                                                    channels, per_pin->chmap,
 956                                                    per_pin->chmap_set);
 957         }
 958
 959         per_pin->non_pcm = non_pcm;
 960 }
 961
 962
 963 /*
 964  * Unsolicited events
 965  */
 966
 967 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 968
 969 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 970 {
 971         struct hdmi_spec *spec = codec->spec;
 972         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 973         int pin_nid;
 974         int pin_idx;
 975         struct hda_jack_tbl *jack;
 976         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 977
 978         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
 979         if (!jack)
 980                 return;
 981         pin_nid = jack->nid;
 982         jack->jack_dirty = 1;
 983
 984         _snd_printd(SND_PR_VERBOSE,
 985                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
 986                 codec->addr, pin_nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
 987                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 988
 989         pin_idx = pin_nid_to_pin_index(spec, pin_nid);
 990         if (pin_idx < 0)
 991                 return;
 992
 993         hdmi_present_sense(get_pin(spec, pin_idx), 1);
 994         snd_hda_jack_report_sync(codec);
 995 }
 996
 997 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 998 {
 999         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1000         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1001         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1002         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1003
1004         printk(KERN_INFO
1005                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1006                 codec->addr,
1007                 tag,
1008                 subtag,
1009                 cp_state,
1010                 cp_ready);
1011
1012         /* TODO */
1013         if (cp_state)
1014                 ;
1015         if (cp_ready)
1016                 ;
1017 }
1018
1019
1020 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1021 {
1022         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1023         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1024
1025         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1026                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
1027                 return;
1028         }
1029
1030         if (subtag == 0)
1031                 hdmi_intrinsic_event(codec, res);
1032         else
1033                 hdmi_non_intrinsic_event(codec, res);
1034 }
1035
1036 static void haswell_verify_pin_D0(struct hda_codec *codec,
1037                 hda_nid_t cvt_nid, hda_nid_t nid)
1038 {
1039         int pwr, lamp, ramp;
1040
1041         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1042          * thus pins could only choose converter 0 for use. Make sure the
1043          * converters are in correct power state */
1044         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1045                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1046
1047         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1048                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1049                                     AC_PWRST_D0);
1050                 msleep(40);
1051                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1052                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1053                 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1054         }
1055
1056         lamp = snd_hda_codec_read(codec, nid, 0,
1057                                   AC_VERB_GET_AMP_GAIN_MUTE,
1058                                   AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
1059         ramp = snd_hda_codec_read(codec, nid, 0,
1060                                   AC_VERB_GET_AMP_GAIN_MUTE,
1061                                   AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
1062         if (lamp != ramp) {
1063                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_AMP_GAIN_MUTE,
1064                                     AC_AMP_SET_RIGHT | AC_AMP_SET_OUTPUT | lamp);
1065
1066                 lamp = snd_hda_codec_read(codec, nid, 0,
1067                                   AC_VERB_GET_AMP_GAIN_MUTE,
1068                                   AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
1069                 ramp = snd_hda_codec_read(codec, nid, 0,
1070                                   AC_VERB_GET_AMP_GAIN_MUTE,
1071                                   AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
1072                 snd_printd("Haswell HDMI audio: Mute after set on pin 0x%x: [0x%x 0x%x]\n", nid, lamp, ramp);
1073         }
1074 }
1075
1076 /*
1077  * Callbacks
1078  */
1079
1080 /* HBR should be Non-PCM, 8 channels */
1081 #define is_hbr_format(format) \
1082         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1083
1084 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1085                               hda_nid_t pin_nid, u32 stream_tag, int format)
1086 {
1087         int pinctl;
1088         int new_pinctl = 0;
1089
1090         if (codec->vendor_id == 0x80862807)
1091                 haswell_verify_pin_D0(codec, cvt_nid, pin_nid);
1092
1093         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1094                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1095                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1096
1097                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1098                 if (is_hbr_format(format))
1099                         new_pinctl |= AC_PINCTL_EPT_HBR;
1100                 else
1101                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
1102
1103                 snd_printdd("hdmi_setup_stream: "
1104                             "NID=0x%x, %spinctl=0x%x\n",
1105                             pin_nid,
1106                             pinctl == new_pinctl ? "" : "new-",
1107                             new_pinctl);
1108
1109                 if (pinctl != new_pinctl)
1110                         snd_hda_codec_write(codec, pin_nid, 0,
1111                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1112                                             new_pinctl);
1113
1114         }
1115         if (is_hbr_format(format) && !new_pinctl) {
1116                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1117                 return -EINVAL;
1118         }
1119
1120         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1121         return 0;
1122 }
1123
1124 static int hdmi_choose_cvt(struct hda_codec *codec,
1125                         int pin_idx, int *cvt_id, int *mux_id)
1126 {
1127         struct hdmi_spec *spec = codec->spec;
1128         struct hdmi_spec_per_pin *per_pin;
1129         struct hdmi_spec_per_cvt *per_cvt = NULL;
1130         int cvt_idx, mux_idx = 0;
1131
1132         per_pin = get_pin(spec, pin_idx);
1133
1134         /* Dynamically assign converter to stream */
1135         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1136                 per_cvt = get_cvt(spec, cvt_idx);
1137
1138                 /* Must not already be assigned */
1139                 if (per_cvt->assigned)
1140                         continue;
1141                 /* Must be in pin's mux's list of converters */
1142                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1143                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1144                                 break;
1145                 /* Not in mux list */
1146                 if (mux_idx == per_pin->num_mux_nids)
1147                         continue;
1148                 break;
1149         }
1150
1151         /* No free converters */
1152         if (cvt_idx == spec->num_cvts)
1153                 return -ENODEV;
1154
1155         if (cvt_id)
1156                 *cvt_id = cvt_idx;
1157         if (mux_id)
1158                 *mux_id = mux_idx;
1159
1160         return 0;
1161 }
1162
1163 static void haswell_config_cvts(struct hda_codec *codec,
1164                         int pin_id, int mux_id)
1165 {
1166         struct hdmi_spec *spec = codec->spec;
1167         struct hdmi_spec_per_pin *per_pin;
1168         int pin_idx, mux_idx;
1169         int curr;
1170         int err;
1171
1172         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1173                 per_pin = get_pin(spec, pin_idx);
1174
1175                 if (pin_idx == pin_id)
1176                         continue;
1177
1178                 curr = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1179                                           AC_VERB_GET_CONNECT_SEL, 0);
1180
1181                 /* Choose another unused converter */
1182                 if (curr == mux_id) {
1183                         err = hdmi_choose_cvt(codec, pin_idx, NULL, &mux_idx);
1184                         if (err < 0)
1185                                 return;
1186                         snd_printdd("HDMI: choose converter %d for pin %d\n", mux_idx, pin_idx);
1187                         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1188                                             AC_VERB_SET_CONNECT_SEL,
1189                                             mux_idx);
1190                 }
1191         }
1192 }
1193
1194 /*
1195  * HDA PCM callbacks
1196  */
1197 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1198                          struct hda_codec *codec,
1199                          struct snd_pcm_substream *substream)
1200 {
1201         struct hdmi_spec *spec = codec->spec;
1202         struct snd_pcm_runtime *runtime = substream->runtime;
1203         int pin_idx, cvt_idx, mux_idx = 0;
1204         struct hdmi_spec_per_pin *per_pin;
1205         struct hdmi_eld *eld;
1206         struct hdmi_spec_per_cvt *per_cvt = NULL;
1207         int err;
1208
1209         /* Validate hinfo */
1210         pin_idx = hinfo_to_pin_index(spec, hinfo);
1211         if (snd_BUG_ON(pin_idx < 0))
1212                 return -EINVAL;
1213         per_pin = get_pin(spec, pin_idx);
1214         eld = &per_pin->sink_eld;
1215
1216         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1217         if (err < 0)
1218                 return err;
1219
1220         per_cvt = get_cvt(spec, cvt_idx);
1221         /* Claim converter */
1222         per_cvt->assigned = 1;
1223         hinfo->nid = per_cvt->cvt_nid;
1224
1225         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1226                             AC_VERB_SET_CONNECT_SEL,
1227                             mux_idx);
1228
1229         /* configure unused pins to choose other converters */
1230         if (codec->vendor_id == 0x80862807)
1231                 haswell_config_cvts(codec, pin_idx, mux_idx);
1232
1233         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1234
1235         /* Initially set the converter's capabilities */
1236         hinfo->channels_min = per_cvt->channels_min;
1237         hinfo->channels_max = per_cvt->channels_max;
1238         hinfo->rates = per_cvt->rates;
1239         hinfo->formats = per_cvt->formats;
1240         hinfo->maxbps = per_cvt->maxbps;
1241
1242         /* Restrict capabilities by ELD if this isn't disabled */
1243         if (!static_hdmi_pcm && eld->eld_valid) {
1244                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1245                 if (hinfo->channels_min > hinfo->channels_max ||
1246                     !hinfo->rates || !hinfo->formats) {
1247                         per_cvt->assigned = 0;
1248                         hinfo->nid = 0;
1249                         snd_hda_spdif_ctls_unassign(codec, pin_idx);
1250                         return -ENODEV;
1251                 }
1252         }
1253
1254         /* Store the updated parameters */
1255         runtime->hw.channels_min = hinfo->channels_min;
1256         runtime->hw.channels_max = hinfo->channels_max;
1257         runtime->hw.formats = hinfo->formats;
1258         runtime->hw.rates = hinfo->rates;
1259
1260         snd_pcm_hw_constraint_step(substream->runtime, 0,
1261                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1262         return 0;
1263 }
1264
1265 /*
1266  * HDA/HDMI auto parsing
1267  */
1268 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1269 {
1270         struct hdmi_spec *spec = codec->spec;
1271         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1272         hda_nid_t pin_nid = per_pin->pin_nid;
1273
1274         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1275                 snd_printk(KERN_WARNING
1276                            "HDMI: pin %d wcaps %#x "
1277                            "does not support connection list\n",
1278                            pin_nid, get_wcaps(codec, pin_nid));
1279                 return -EINVAL;
1280         }
1281
1282         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1283                                                         per_pin->mux_nids,
1284                                                         HDA_MAX_CONNECTIONS);
1285
1286         return 0;
1287 }
1288
1289 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1290 {
1291         struct hda_codec *codec = per_pin->codec;
1292         struct hdmi_spec *spec = codec->spec;
1293         struct hdmi_eld *eld = &spec->temp_eld;
1294         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1295         hda_nid_t pin_nid = per_pin->pin_nid;
1296         /*
1297          * Always execute a GetPinSense verb here, even when called from
1298          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1299          * response's PD bit is not the real PD value, but indicates that
1300          * the real PD value changed. An older version of the HD-audio
1301          * specification worked this way. Hence, we just ignore the data in
1302          * the unsolicited response to avoid custom WARs.
1303          */
1304         int present = snd_hda_pin_sense(codec, pin_nid);
1305         bool update_eld = false;
1306         bool eld_changed = false;
1307
1308         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1309         if (pin_eld->monitor_present)
1310                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1311         else
1312                 eld->eld_valid = false;
1313
1314         _snd_printd(SND_PR_VERBOSE,
1315                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1316                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1317
1318         if (eld->eld_valid) {
1319                 if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer,
1320                                                      &eld->eld_size) < 0)
1321                         eld->eld_valid = false;
1322                 else {
1323                         memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1324                         if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1325                                                     eld->eld_size) < 0)
1326                                 eld->eld_valid = false;
1327                 }
1328
1329                 if (eld->eld_valid) {
1330                         snd_hdmi_show_eld(&eld->info);
1331                         update_eld = true;
1332                 }
1333                 else if (repoll) {
1334                         queue_delayed_work(codec->bus->workq,
1335                                            &per_pin->work,
1336                                            msecs_to_jiffies(300));
1337                         return;
1338                 }
1339         }
1340
1341         mutex_lock(&pin_eld->lock);
1342         if (pin_eld->eld_valid && !eld->eld_valid) {
1343                 update_eld = true;
1344                 eld_changed = true;
1345         }
1346         if (update_eld) {
1347                 bool old_eld_valid = pin_eld->eld_valid;
1348                 pin_eld->eld_valid = eld->eld_valid;
1349                 eld_changed = pin_eld->eld_size != eld->eld_size ||
1350                               memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1351                                      eld->eld_size) != 0;
1352                 if (eld_changed)
1353                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1354                                eld->eld_size);
1355                 pin_eld->eld_size = eld->eld_size;
1356                 pin_eld->info = eld->info;
1357
1358                 /* Haswell-specific workaround: re-setup when the transcoder is
1359                  * changed during the stream playback
1360                  */
1361                 if (codec->vendor_id == 0x80862807 &&
1362                     eld->eld_valid && !old_eld_valid && per_pin->setup) {
1363                         snd_hda_codec_write(codec, pin_nid, 0,
1364                                             AC_VERB_SET_AMP_GAIN_MUTE,
1365                                             AMP_OUT_UNMUTE);
1366                         hdmi_setup_audio_infoframe(codec, per_pin,
1367                                                    per_pin->non_pcm);
1368                 }
1369         }
1370         mutex_unlock(&pin_eld->lock);
1371
1372         if (eld_changed)
1373                 snd_ctl_notify(codec->bus->card,
1374                                SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1375                                &per_pin->eld_ctl->id);
1376 }
1377
1378 static void hdmi_repoll_eld(struct work_struct *work)
1379 {
1380         struct hdmi_spec_per_pin *per_pin =
1381         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1382
1383         if (per_pin->repoll_count++ > 6)
1384                 per_pin->repoll_count = 0;
1385
1386         hdmi_present_sense(per_pin, per_pin->repoll_count);
1387 }
1388
1389 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1390                                              hda_nid_t nid);
1391
1392 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1393 {
1394         struct hdmi_spec *spec = codec->spec;
1395         unsigned int caps, config;
1396         int pin_idx;
1397         struct hdmi_spec_per_pin *per_pin;
1398         int err;
1399
1400         caps = snd_hda_query_pin_caps(codec, pin_nid);
1401         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1402                 return 0;
1403
1404         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1405         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1406                 return 0;
1407
1408         if (codec->vendor_id == 0x80862807)
1409                 intel_haswell_fixup_connect_list(codec, pin_nid);
1410
1411         pin_idx = spec->num_pins;
1412         per_pin = snd_array_new(&spec->pins);
1413         if (!per_pin)
1414                 return -ENOMEM;
1415
1416         per_pin->pin_nid = pin_nid;
1417         per_pin->non_pcm = false;
1418
1419         err = hdmi_read_pin_conn(codec, pin_idx);
1420         if (err < 0)
1421                 return err;
1422
1423         spec->num_pins++;
1424
1425         return 0;
1426 }
1427
1428 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1429 {
1430         struct hdmi_spec *spec = codec->spec;
1431         struct hdmi_spec_per_cvt *per_cvt;
1432         unsigned int chans;
1433         int err;
1434
1435         chans = get_wcaps(codec, cvt_nid);
1436         chans = get_wcaps_channels(chans);
1437
1438         per_cvt = snd_array_new(&spec->cvts);
1439         if (!per_cvt)
1440                 return -ENOMEM;
1441
1442         per_cvt->cvt_nid = cvt_nid;
1443         per_cvt->channels_min = 2;
1444         if (chans <= 16) {
1445                 per_cvt->channels_max = chans;
1446                 if (chans > spec->channels_max)
1447                         spec->channels_max = chans;
1448         }
1449
1450         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1451                                           &per_cvt->rates,
1452                                           &per_cvt->formats,
1453                                           &per_cvt->maxbps);
1454         if (err < 0)
1455                 return err;
1456
1457         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1458                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1459         spec->num_cvts++;
1460
1461         return 0;
1462 }
1463
1464 static int hdmi_parse_codec(struct hda_codec *codec)
1465 {
1466         hda_nid_t nid;
1467         int i, nodes;
1468
1469         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1470         if (!nid || nodes < 0) {
1471                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1472                 return -EINVAL;
1473         }
1474
1475         for (i = 0; i < nodes; i++, nid++) {
1476                 unsigned int caps;
1477                 unsigned int type;
1478
1479                 caps = get_wcaps(codec, nid);
1480                 type = get_wcaps_type(caps);
1481
1482                 if (!(caps & AC_WCAP_DIGITAL))
1483                         continue;
1484
1485                 switch (type) {
1486                 case AC_WID_AUD_OUT:
1487                         hdmi_add_cvt(codec, nid);
1488                         break;
1489                 case AC_WID_PIN:
1490                         hdmi_add_pin(codec, nid);
1491                         break;
1492                 }
1493         }
1494
1495 #ifdef CONFIG_PM
1496         /* We're seeing some problems with unsolicited hot plug events on
1497          * PantherPoint after S3, if this is not enabled */
1498         if (codec->vendor_id == 0x80862806)
1499                 codec->bus->power_keep_link_on = 1;
1500         /*
1501          * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1502          * can be lost and presence sense verb will become inaccurate if the
1503          * HDA link is powered off at hot plug or hw initialization time.
1504          */
1505         else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1506               AC_PWRST_EPSS))
1507                 codec->bus->power_keep_link_on = 1;
1508 #endif
1509
1510         return 0;
1511 }
1512
1513 /*
1514  */
1515 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1516 {
1517         struct hda_spdif_out *spdif;
1518         bool non_pcm;
1519
1520         mutex_lock(&codec->spdif_mutex);
1521         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1522         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1523         mutex_unlock(&codec->spdif_mutex);
1524         return non_pcm;
1525 }
1526
1527
1528 /*
1529  * HDMI callbacks
1530  */
1531
1532 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1533                                            struct hda_codec *codec,
1534                                            unsigned int stream_tag,
1535                                            unsigned int format,
1536                                            struct snd_pcm_substream *substream)
1537 {
1538         hda_nid_t cvt_nid = hinfo->nid;
1539         struct hdmi_spec *spec = codec->spec;
1540         int pin_idx = hinfo_to_pin_index(spec, hinfo);
1541         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1542         hda_nid_t pin_nid = per_pin->pin_nid;
1543         bool non_pcm;
1544
1545         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1546         per_pin->channels = substream->runtime->channels;
1547         per_pin->setup = true;
1548
1549         hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1550
1551         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1552
1553         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1554 }
1555
1556 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1557                                              struct hda_codec *codec,
1558                                              struct snd_pcm_substream *substream)
1559 {
1560         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1561         return 0;
1562 }
1563
1564 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1565                           struct hda_codec *codec,
1566                           struct snd_pcm_substream *substream)
1567 {
1568         struct hdmi_spec *spec = codec->spec;
1569         int cvt_idx, pin_idx;
1570         struct hdmi_spec_per_cvt *per_cvt;
1571         struct hdmi_spec_per_pin *per_pin;
1572
1573         if (hinfo->nid) {
1574                 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1575                 if (snd_BUG_ON(cvt_idx < 0))
1576                         return -EINVAL;
1577                 per_cvt = get_cvt(spec, cvt_idx);
1578
1579                 snd_BUG_ON(!per_cvt->assigned);
1580                 per_cvt->assigned = 0;
1581                 hinfo->nid = 0;
1582
1583                 pin_idx = hinfo_to_pin_index(spec, hinfo);
1584                 if (snd_BUG_ON(pin_idx < 0))
1585                         return -EINVAL;
1586                 per_pin = get_pin(spec, pin_idx);
1587
1588                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1589                 per_pin->chmap_set = false;
1590                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1591
1592                 per_pin->setup = false;
1593                 per_pin->channels = 0;
1594         }
1595
1596         return 0;
1597 }
1598
1599 static const struct hda_pcm_ops generic_ops = {
1600         .open = hdmi_pcm_open,
1601         .close = hdmi_pcm_close,
1602         .prepare = generic_hdmi_playback_pcm_prepare,
1603         .cleanup = generic_hdmi_playback_pcm_cleanup,
1604 };
1605
1606 /*
1607  * ALSA API channel-map control callbacks
1608  */
1609 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1610                                struct snd_ctl_elem_info *uinfo)
1611 {
1612         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1613         struct hda_codec *codec = info->private_data;
1614         struct hdmi_spec *spec = codec->spec;
1615         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1616         uinfo->count = spec->channels_max;
1617         uinfo->value.integer.min = 0;
1618         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1619         return 0;
1620 }
1621
1622 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1623                               unsigned int size, unsigned int __user *tlv)
1624 {
1625         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1626         struct hda_codec *codec = info->private_data;
1627         struct hdmi_spec *spec = codec->spec;
1628         const unsigned int valid_mask =
1629                 FL | FR | RL | RR | LFE | FC | RLC | RRC;
1630         unsigned int __user *dst;
1631         int chs, count = 0;
1632
1633         if (size < 8)
1634                 return -ENOMEM;
1635         if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1636                 return -EFAULT;
1637         size -= 8;
1638         dst = tlv + 2;
1639         for (chs = 2; chs <= spec->channels_max; chs++) {
1640                 int i, c;
1641                 struct cea_channel_speaker_allocation *cap;
1642                 cap = channel_allocations;
1643                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1644                         int chs_bytes = chs * 4;
1645                         if (cap->channels != chs)
1646                                 continue;
1647                         if (cap->spk_mask & ~valid_mask)
1648                                 continue;
1649                         if (size < 8)
1650                                 return -ENOMEM;
1651                         if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
1652                             put_user(chs_bytes, dst + 1))
1653                                 return -EFAULT;
1654                         dst += 2;
1655                         size -= 8;
1656                         count += 8;
1657                         if (size < chs_bytes)
1658                                 return -ENOMEM;
1659                         size -= chs_bytes;
1660                         count += chs_bytes;
1661                         for (c = 7; c >= 0; c--) {
1662                                 int spk = cap->speakers[c];
1663                                 if (!spk)
1664                                         continue;
1665                                 if (put_user(spk_to_chmap(spk), dst))
1666                                         return -EFAULT;
1667                                 dst++;
1668                         }
1669                 }
1670         }
1671         if (put_user(count, tlv + 1))
1672                 return -EFAULT;
1673         return 0;
1674 }
1675
1676 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1677                               struct snd_ctl_elem_value *ucontrol)
1678 {
1679         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1680         struct hda_codec *codec = info->private_data;
1681         struct hdmi_spec *spec = codec->spec;
1682         int pin_idx = kcontrol->private_value;
1683         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1684         int i;
1685
1686         for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1687                 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1688         return 0;
1689 }
1690
1691 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1692                               struct snd_ctl_elem_value *ucontrol)
1693 {
1694         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1695         struct hda_codec *codec = info->private_data;
1696         struct hdmi_spec *spec = codec->spec;
1697         int pin_idx = kcontrol->private_value;
1698         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1699         unsigned int ctl_idx;
1700         struct snd_pcm_substream *substream;
1701         unsigned char chmap[8];
1702         int i, ca, prepared = 0;
1703
1704         ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1705         substream = snd_pcm_chmap_substream(info, ctl_idx);
1706         if (!substream || !substream->runtime)
1707                 return 0; /* just for avoiding error from alsactl restore */
1708         switch (substream->runtime->status->state) {
1709         case SNDRV_PCM_STATE_OPEN:
1710         case SNDRV_PCM_STATE_SETUP:
1711                 break;
1712         case SNDRV_PCM_STATE_PREPARED:
1713                 prepared = 1;
1714                 break;
1715         default:
1716                 return -EBUSY;
1717         }
1718         memset(chmap, 0, sizeof(chmap));
1719         for (i = 0; i < ARRAY_SIZE(chmap); i++)
1720                 chmap[i] = ucontrol->value.integer.value[i];
1721         if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1722                 return 0;
1723         ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1724         if (ca < 0)
1725                 return -EINVAL;
1726         per_pin->chmap_set = true;
1727         memcpy(per_pin->chmap, chmap, sizeof(chmap));
1728         if (prepared)
1729                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1730
1731         return 0;
1732 }
1733
1734 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1735 {
1736         struct hdmi_spec *spec = codec->spec;
1737         int pin_idx;
1738
1739         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1740                 struct hda_pcm *info;
1741                 struct hda_pcm_stream *pstr;
1742                 struct hdmi_spec_per_pin *per_pin;
1743
1744                 per_pin = get_pin(spec, pin_idx);
1745                 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
1746                 info = snd_array_new(&spec->pcm_rec);
1747                 if (!info)
1748                         return -ENOMEM;
1749                 info->name = per_pin->pcm_name;
1750                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1751                 info->own_chmap = true;
1752
1753                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1754                 pstr->substreams = 1;
1755                 pstr->ops = generic_ops;
1756                 /* other pstr fields are set in open */
1757         }
1758
1759         codec->num_pcms = spec->num_pins;
1760         codec->pcm_info = spec->pcm_rec.list;
1761
1762         return 0;
1763 }
1764
1765 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1766 {
1767         char hdmi_str[32] = "HDMI/DP";
1768         struct hdmi_spec *spec = codec->spec;
1769         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1770         int pcmdev = get_pcm_rec(spec, pin_idx)->device;
1771
1772         if (pcmdev > 0)
1773                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1774         if (!is_jack_detectable(codec, per_pin->pin_nid))
1775                 strncat(hdmi_str, " Phantom",
1776                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
1777
1778         return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1779 }
1780
1781 static int generic_hdmi_build_controls(struct hda_codec *codec)
1782 {
1783         struct hdmi_spec *spec = codec->spec;
1784         int err;
1785         int pin_idx;
1786
1787         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1788                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1789
1790                 err = generic_hdmi_build_jack(codec, pin_idx);
1791                 if (err < 0)
1792                         return err;
1793
1794                 err = snd_hda_create_dig_out_ctls(codec,
1795                                                   per_pin->pin_nid,
1796                                                   per_pin->mux_nids[0],
1797                                                   HDA_PCM_TYPE_HDMI);
1798                 if (err < 0)
1799                         return err;
1800                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1801
1802                 /* add control for ELD Bytes */
1803                 err = hdmi_create_eld_ctl(codec, pin_idx,
1804                                           get_pcm_rec(spec, pin_idx)->device);
1805
1806                 if (err < 0)
1807                         return err;
1808
1809                 hdmi_present_sense(per_pin, 0);
1810         }
1811
1812         /* add channel maps */
1813         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1814                 struct snd_pcm_chmap *chmap;
1815                 struct snd_kcontrol *kctl;
1816                 int i;
1817
1818                 if (!codec->pcm_info[pin_idx].pcm)
1819                         break;
1820                 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
1821                                              SNDRV_PCM_STREAM_PLAYBACK,
1822                                              NULL, 0, pin_idx, &chmap);
1823                 if (err < 0)
1824                         return err;
1825                 /* override handlers */
1826                 chmap->private_data = codec;
1827                 kctl = chmap->kctl;
1828                 for (i = 0; i < kctl->count; i++)
1829                         kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
1830                 kctl->info = hdmi_chmap_ctl_info;
1831                 kctl->get = hdmi_chmap_ctl_get;
1832                 kctl->put = hdmi_chmap_ctl_put;
1833                 kctl->tlv.c = hdmi_chmap_ctl_tlv;
1834         }
1835
1836         return 0;
1837 }
1838
1839 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
1840 {
1841         struct hdmi_spec *spec = codec->spec;
1842         int pin_idx;
1843
1844         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1845                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1846                 struct hdmi_eld *eld = &per_pin->sink_eld;
1847
1848                 per_pin->codec = codec;
1849                 mutex_init(&eld->lock);
1850                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1851                 snd_hda_eld_proc_new(codec, eld, pin_idx);
1852         }
1853         return 0;
1854 }
1855
1856 static int generic_hdmi_init(struct hda_codec *codec)
1857 {
1858         struct hdmi_spec *spec = codec->spec;
1859         int pin_idx;
1860
1861         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1862                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1863                 hda_nid_t pin_nid = per_pin->pin_nid;
1864
1865                 hdmi_init_pin(codec, pin_nid);
1866                 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1867         }
1868         return 0;
1869 }
1870
1871 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
1872 {
1873         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
1874         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
1875         snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
1876 }
1877
1878 static void hdmi_array_free(struct hdmi_spec *spec)
1879 {
1880         snd_array_free(&spec->pins);
1881         snd_array_free(&spec->cvts);
1882         snd_array_free(&spec->pcm_rec);
1883 }
1884
1885 static void generic_hdmi_free(struct hda_codec *codec)
1886 {
1887         struct hdmi_spec *spec = codec->spec;
1888         int pin_idx;
1889
1890         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1891                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1892                 struct hdmi_eld *eld = &per_pin->sink_eld;
1893
1894                 cancel_delayed_work(&per_pin->work);
1895                 snd_hda_eld_proc_free(codec, eld);
1896         }
1897
1898         flush_workqueue(codec->bus->workq);
1899         hdmi_array_free(spec);
1900         kfree(spec);
1901 }
1902
1903 #ifdef CONFIG_PM
1904 static int generic_hdmi_resume(struct hda_codec *codec)
1905 {
1906         struct hdmi_spec *spec = codec->spec;
1907         int pin_idx;
1908
1909         generic_hdmi_init(codec);
1910         snd_hda_codec_resume_amp(codec);
1911         snd_hda_codec_resume_cache(codec);
1912
1913         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1914                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1915                 hdmi_present_sense(per_pin, 1);
1916         }
1917         return 0;
1918 }
1919 #endif
1920
1921 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1922         .init                   = generic_hdmi_init,
1923         .free                   = generic_hdmi_free,
1924         .build_pcms             = generic_hdmi_build_pcms,
1925         .build_controls         = generic_hdmi_build_controls,
1926         .unsol_event            = hdmi_unsol_event,
1927 #ifdef CONFIG_PM
1928         .resume                 = generic_hdmi_resume,
1929 #endif
1930 };
1931
1932
1933 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1934                                              hda_nid_t nid)
1935 {
1936         struct hdmi_spec *spec = codec->spec;
1937         hda_nid_t conns[4];
1938         int nconns;
1939
1940         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
1941         if (nconns == spec->num_cvts &&
1942             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
1943                 return;
1944
1945         /* override pins connection list */
1946         snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
1947         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
1948 }
1949
1950 #define INTEL_VENDOR_NID 0x08
1951 #define INTEL_GET_VENDOR_VERB 0xf81
1952 #define INTEL_SET_VENDOR_VERB 0x781
1953 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
1954 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
1955
1956 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
1957                                           bool update_tree)
1958 {
1959         unsigned int vendor_param;
1960
1961         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1962                                 INTEL_GET_VENDOR_VERB, 0);
1963         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
1964                 return;
1965
1966         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
1967         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1968                                 INTEL_SET_VENDOR_VERB, vendor_param);
1969         if (vendor_param == -1)
1970                 return;
1971
1972         if (update_tree)
1973                 snd_hda_codec_update_widgets(codec);
1974 }
1975
1976 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
1977 {
1978         unsigned int vendor_param;
1979
1980         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1981                                 INTEL_GET_VENDOR_VERB, 0);
1982         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
1983                 return;
1984
1985         /* enable DP1.2 mode */
1986         vendor_param |= INTEL_EN_DP12;
1987         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
1988                                 INTEL_SET_VENDOR_VERB, vendor_param);
1989 }
1990
1991 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
1992  * Otherwise you may get severe h/w communication errors.
1993  */
1994 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
1995                                 unsigned int power_state)
1996 {
1997         if (power_state == AC_PWRST_D0) {
1998                 intel_haswell_enable_all_pins(codec, false);
1999                 intel_haswell_fixup_enable_dp12(codec);
2000         }
2001
2002         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2003         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2004 }
2005
2006 static int patch_generic_hdmi(struct hda_codec *codec)
2007 {
2008         struct hdmi_spec *spec;
2009
2010         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2011         if (spec == NULL)
2012                 return -ENOMEM;
2013
2014         codec->spec = spec;
2015         hdmi_array_init(spec, 4);
2016
2017         if (codec->vendor_id == 0x80862807) {
2018                 intel_haswell_enable_all_pins(codec, true);
2019                 intel_haswell_fixup_enable_dp12(codec);
2020         }
2021
2022         if (hdmi_parse_codec(codec) < 0) {
2023                 codec->spec = NULL;
2024                 kfree(spec);
2025                 return -EINVAL;
2026         }
2027         codec->patch_ops = generic_hdmi_patch_ops;
2028         if (codec->vendor_id == 0x80862807) {
2029                 codec->patch_ops.set_power_state = haswell_set_power_state;
2030                 codec->dp_mst = true;
2031         }
2032
2033         generic_hdmi_init_per_pins(codec);
2034
2035         init_channel_allocations();
2036
2037         return 0;
2038 }
2039
2040 /*
2041  * Shared non-generic implementations
2042  */
2043
2044 static int simple_playback_build_pcms(struct hda_codec *codec)
2045 {
2046         struct hdmi_spec *spec = codec->spec;
2047         struct hda_pcm *info;
2048         unsigned int chans;
2049         struct hda_pcm_stream *pstr;
2050         struct hdmi_spec_per_cvt *per_cvt;
2051
2052         per_cvt = get_cvt(spec, 0);
2053         chans = get_wcaps(codec, per_cvt->cvt_nid);
2054         chans = get_wcaps_channels(chans);
2055
2056         info = snd_array_new(&spec->pcm_rec);
2057         if (!info)
2058                 return -ENOMEM;
2059         info->name = get_pin(spec, 0)->pcm_name;
2060         sprintf(info->name, "HDMI 0");
2061         info->pcm_type = HDA_PCM_TYPE_HDMI;
2062         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2063         *pstr = spec->pcm_playback;
2064         pstr->nid = per_cvt->cvt_nid;
2065         if (pstr->channels_max <= 2 && chans && chans <= 16)
2066                 pstr->channels_max = chans;
2067
2068         codec->num_pcms = 1;
2069         codec->pcm_info = info;
2070
2071         return 0;
2072 }
2073
2074 /* unsolicited event for jack sensing */
2075 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2076                                     unsigned int res)
2077 {
2078         snd_hda_jack_set_dirty_all(codec);
2079         snd_hda_jack_report_sync(codec);
2080 }
2081
2082 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2083  * as long as spec->pins[] is set correctly
2084  */
2085 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2086
2087 static int simple_playback_build_controls(struct hda_codec *codec)
2088 {
2089         struct hdmi_spec *spec = codec->spec;
2090         struct hdmi_spec_per_cvt *per_cvt;
2091         int err;
2092
2093         per_cvt = get_cvt(spec, 0);
2094         err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
2095                                             per_cvt->cvt_nid);
2096         if (err < 0)
2097                 return err;
2098         return simple_hdmi_build_jack(codec, 0);
2099 }
2100
2101 static int simple_playback_init(struct hda_codec *codec)
2102 {
2103         struct hdmi_spec *spec = codec->spec;
2104         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2105         hda_nid_t pin = per_pin->pin_nid;
2106
2107         snd_hda_codec_write(codec, pin, 0,
2108                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2109         /* some codecs require to unmute the pin */
2110         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2111                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2112                                     AMP_OUT_UNMUTE);
2113         snd_hda_jack_detect_enable(codec, pin, pin);
2114         return 0;
2115 }
2116
2117 static void simple_playback_free(struct hda_codec *codec)
2118 {
2119         struct hdmi_spec *spec = codec->spec;
2120
2121         hdmi_array_free(spec);
2122         kfree(spec);
2123 }
2124
2125 /*
2126  * Nvidia specific implementations
2127  */
2128
2129 #define Nv_VERB_SET_Channel_Allocation          0xF79
2130 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2131 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2132 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2133
2134 #define nvhdmi_master_con_nid_7x        0x04
2135 #define nvhdmi_master_pin_nid_7x        0x05
2136
2137 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2138         /*front, rear, clfe, rear_surr */
2139         0x6, 0x8, 0xa, 0xc,
2140 };
2141
2142 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2143         /* set audio protect on */
2144         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2145         /* enable digital output on pin widget */
2146         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2147         {} /* terminator */
2148 };
2149
2150 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2151         /* set audio protect on */
2152         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2153         /* enable digital output on pin widget */
2154         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2155         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2156         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2157         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2158         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2159         {} /* terminator */
2160 };
2161
2162 #ifdef LIMITED_RATE_FMT_SUPPORT
2163 /* support only the safe format and rate */
2164 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2165 #define SUPPORTED_MAXBPS        16
2166 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2167 #else
2168 /* support all rates and formats */
2169 #define SUPPORTED_RATES \
2170         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2171         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2172          SNDRV_PCM_RATE_192000)
2173 #define SUPPORTED_MAXBPS        24
2174 #define SUPPORTED_FORMATS \
2175         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2176 #endif
2177
2178 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2179 {
2180         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2181         return 0;
2182 }
2183
2184 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2185 {
2186         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2187         return 0;
2188 }
2189
2190 static unsigned int channels_2_6_8[] = {
2191         2, 6, 8
2192 };
2193
2194 static unsigned int channels_2_8[] = {
2195         2, 8
2196 };
2197
2198 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2199         .count = ARRAY_SIZE(channels_2_6_8),
2200         .list = channels_2_6_8,
2201         .mask = 0,
2202 };
2203
2204 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2205         .count = ARRAY_SIZE(channels_2_8),
2206         .list = channels_2_8,
2207         .mask = 0,
2208 };
2209
2210 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2211                                     struct hda_codec *codec,
2212                                     struct snd_pcm_substream *substream)
2213 {
2214         struct hdmi_spec *spec = codec->spec;
2215         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2216
2217         switch (codec->preset->id) {
2218         case 0x10de0002:
2219         case 0x10de0003:
2220         case 0x10de0005:
2221         case 0x10de0006:
2222                 hw_constraints_channels = &hw_constraints_2_8_channels;
2223                 break;
2224         case 0x10de0007:
2225                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2226                 break;
2227         default:
2228                 break;
2229         }
2230
2231         if (hw_constraints_channels != NULL) {
2232                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2233                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2234                                 hw_constraints_channels);
2235         } else {
2236                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2237                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2238         }
2239
2240         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2241 }
2242
2243 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2244                                      struct hda_codec *codec,
2245                                      struct snd_pcm_substream *substream)
2246 {
2247         struct hdmi_spec *spec = codec->spec;
2248         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2249 }
2250
2251 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2252                                        struct hda_codec *codec,
2253                                        unsigned int stream_tag,
2254                                        unsigned int format,
2255                                        struct snd_pcm_substream *substream)
2256 {
2257         struct hdmi_spec *spec = codec->spec;
2258         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2259                                              stream_tag, format, substream);
2260 }
2261
2262 static const struct hda_pcm_stream simple_pcm_playback = {
2263         .substreams = 1,
2264         .channels_min = 2,
2265         .channels_max = 2,
2266         .ops = {
2267                 .open = simple_playback_pcm_open,
2268                 .close = simple_playback_pcm_close,
2269                 .prepare = simple_playback_pcm_prepare
2270         },
2271 };
2272
2273 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2274         .build_controls = simple_playback_build_controls,
2275         .build_pcms = simple_playback_build_pcms,
2276         .init = simple_playback_init,
2277         .free = simple_playback_free,
2278         .unsol_event = simple_hdmi_unsol_event,
2279 };
2280
2281 static int patch_simple_hdmi(struct hda_codec *codec,
2282                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2283 {
2284         struct hdmi_spec *spec;
2285         struct hdmi_spec_per_cvt *per_cvt;
2286         struct hdmi_spec_per_pin *per_pin;
2287
2288         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2289         if (!spec)
2290                 return -ENOMEM;
2291
2292         codec->spec = spec;
2293         hdmi_array_init(spec, 1);
2294
2295         spec->multiout.num_dacs = 0;  /* no analog */
2296         spec->multiout.max_channels = 2;
2297         spec->multiout.dig_out_nid = cvt_nid;
2298         spec->num_cvts = 1;
2299         spec->num_pins = 1;
2300         per_pin = snd_array_new(&spec->pins);
2301         per_cvt = snd_array_new(&spec->cvts);
2302         if (!per_pin || !per_cvt) {
2303                 simple_playback_free(codec);
2304                 return -ENOMEM;
2305         }
2306         per_cvt->cvt_nid = cvt_nid;
2307         per_pin->pin_nid = pin_nid;
2308         spec->pcm_playback = simple_pcm_playback;
2309
2310         codec->patch_ops = simple_hdmi_patch_ops;
2311
2312         return 0;
2313 }
2314
2315 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2316                                                     int channels)
2317 {
2318         unsigned int chanmask;
2319         int chan = channels ? (channels - 1) : 1;
2320
2321         switch (channels) {
2322         default:
2323         case 0:
2324         case 2:
2325                 chanmask = 0x00;
2326                 break;
2327         case 4:
2328                 chanmask = 0x08;
2329                 break;
2330         case 6:
2331                 chanmask = 0x0b;
2332                 break;
2333         case 8:
2334                 chanmask = 0x13;
2335                 break;
2336         }
2337
2338         /* Set the audio infoframe channel allocation and checksum fields.  The
2339          * channel count is computed implicitly by the hardware. */
2340         snd_hda_codec_write(codec, 0x1, 0,
2341                         Nv_VERB_SET_Channel_Allocation, chanmask);
2342
2343         snd_hda_codec_write(codec, 0x1, 0,
2344                         Nv_VERB_SET_Info_Frame_Checksum,
2345                         (0x71 - chan - chanmask));
2346 }
2347
2348 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2349                                    struct hda_codec *codec,
2350                                    struct snd_pcm_substream *substream)
2351 {
2352         struct hdmi_spec *spec = codec->spec;
2353         int i;
2354
2355         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2356                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2357         for (i = 0; i < 4; i++) {
2358                 /* set the stream id */
2359                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2360                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
2361                 /* set the stream format */
2362                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2363                                 AC_VERB_SET_STREAM_FORMAT, 0);
2364         }
2365
2366         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2367          * streams are disabled. */
2368         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2369
2370         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2371 }
2372
2373 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2374                                      struct hda_codec *codec,
2375                                      unsigned int stream_tag,
2376                                      unsigned int format,
2377                                      struct snd_pcm_substream *substream)
2378 {
2379         int chs;
2380         unsigned int dataDCC2, channel_id;
2381         int i;
2382         struct hdmi_spec *spec = codec->spec;
2383         struct hda_spdif_out *spdif;
2384         struct hdmi_spec_per_cvt *per_cvt;
2385
2386         mutex_lock(&codec->spdif_mutex);
2387         per_cvt = get_cvt(spec, 0);
2388         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2389
2390         chs = substream->runtime->channels;
2391
2392         dataDCC2 = 0x2;
2393
2394         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2395         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2396                 snd_hda_codec_write(codec,
2397                                 nvhdmi_master_con_nid_7x,
2398                                 0,
2399                                 AC_VERB_SET_DIGI_CONVERT_1,
2400                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2401
2402         /* set the stream id */
2403         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2404                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2405
2406         /* set the stream format */
2407         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2408                         AC_VERB_SET_STREAM_FORMAT, format);
2409
2410         /* turn on again (if needed) */
2411         /* enable and set the channel status audio/data flag */
2412         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2413                 snd_hda_codec_write(codec,
2414                                 nvhdmi_master_con_nid_7x,
2415                                 0,
2416                                 AC_VERB_SET_DIGI_CONVERT_1,
2417                                 spdif->ctls & 0xff);
2418                 snd_hda_codec_write(codec,
2419                                 nvhdmi_master_con_nid_7x,
2420                                 0,
2421                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2422         }
2423
2424         for (i = 0; i < 4; i++) {
2425                 if (chs == 2)
2426                         channel_id = 0;
2427                 else
2428                         channel_id = i * 2;
2429
2430                 /* turn off SPDIF once;
2431                  *otherwise the IEC958 bits won't be updated
2432                  */
2433                 if (codec->spdif_status_reset &&
2434                 (spdif->ctls & AC_DIG1_ENABLE))
2435                         snd_hda_codec_write(codec,
2436                                 nvhdmi_con_nids_7x[i],
2437                                 0,
2438                                 AC_VERB_SET_DIGI_CONVERT_1,
2439                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2440                 /* set the stream id */
2441                 snd_hda_codec_write(codec,
2442                                 nvhdmi_con_nids_7x[i],
2443                                 0,
2444                                 AC_VERB_SET_CHANNEL_STREAMID,
2445                                 (stream_tag << 4) | channel_id);
2446                 /* set the stream format */
2447                 snd_hda_codec_write(codec,
2448                                 nvhdmi_con_nids_7x[i],
2449                                 0,
2450                                 AC_VERB_SET_STREAM_FORMAT,
2451                                 format);
2452                 /* turn on again (if needed) */
2453                 /* enable and set the channel status audio/data flag */
2454                 if (codec->spdif_status_reset &&
2455                 (spdif->ctls & AC_DIG1_ENABLE)) {
2456                         snd_hda_codec_write(codec,
2457                                         nvhdmi_con_nids_7x[i],
2458                                         0,
2459                                         AC_VERB_SET_DIGI_CONVERT_1,
2460                                         spdif->ctls & 0xff);
2461                         snd_hda_codec_write(codec,
2462                                         nvhdmi_con_nids_7x[i],
2463                                         0,
2464                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2465                 }
2466         }
2467
2468         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2469
2470         mutex_unlock(&codec->spdif_mutex);
2471         return 0;
2472 }
2473
2474 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2475         .substreams = 1,
2476         .channels_min = 2,
2477         .channels_max = 8,
2478         .nid = nvhdmi_master_con_nid_7x,
2479         .rates = SUPPORTED_RATES,
2480         .maxbps = SUPPORTED_MAXBPS,
2481         .formats = SUPPORTED_FORMATS,
2482         .ops = {
2483                 .open = simple_playback_pcm_open,
2484                 .close = nvhdmi_8ch_7x_pcm_close,
2485                 .prepare = nvhdmi_8ch_7x_pcm_prepare
2486         },
2487 };
2488
2489 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2490 {
2491         struct hdmi_spec *spec;
2492         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2493                                     nvhdmi_master_pin_nid_7x);
2494         if (err < 0)
2495                 return err;
2496
2497         codec->patch_ops.init = nvhdmi_7x_init_2ch;
2498         /* override the PCM rates, etc, as the codec doesn't give full list */
2499         spec = codec->spec;
2500         spec->pcm_playback.rates = SUPPORTED_RATES;
2501         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2502         spec->pcm_playback.formats = SUPPORTED_FORMATS;
2503         return 0;
2504 }
2505
2506 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2507 {
2508         struct hdmi_spec *spec = codec->spec;
2509         int err = simple_playback_build_pcms(codec);
2510         if (!err) {
2511                 struct hda_pcm *info = get_pcm_rec(spec, 0);
2512                 info->own_chmap = true;
2513         }
2514         return err;
2515 }
2516
2517 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2518 {
2519         struct hdmi_spec *spec = codec->spec;
2520         struct hda_pcm *info;
2521         struct snd_pcm_chmap *chmap;
2522         int err;
2523
2524         err = simple_playback_build_controls(codec);
2525         if (err < 0)
2526                 return err;
2527
2528         /* add channel maps */
2529         info = get_pcm_rec(spec, 0);
2530         err = snd_pcm_add_chmap_ctls(info->pcm,
2531                                      SNDRV_PCM_STREAM_PLAYBACK,
2532                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
2533         if (err < 0)
2534                 return err;
2535         switch (codec->preset->id) {
2536         case 0x10de0002:
2537         case 0x10de0003:
2538         case 0x10de0005:
2539         case 0x10de0006:
2540                 chmap->channel_mask = (1U << 2) | (1U << 8);
2541                 break;
2542         case 0x10de0007:
2543                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2544         }
2545         return 0;
2546 }
2547
2548 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2549 {
2550         struct hdmi_spec *spec;
2551         int err = patch_nvhdmi_2ch(codec);
2552         if (err < 0)
2553                 return err;
2554         spec = codec->spec;
2555         spec->multiout.max_channels = 8;
2556         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2557         codec->patch_ops.init = nvhdmi_7x_init_8ch;
2558         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2559         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2560
2561         /* Initialize the audio infoframe channel mask and checksum to something
2562          * valid */
2563         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2564
2565         return 0;
2566 }
2567
2568 /*
2569  * ATI-specific implementations
2570  *
2571  * FIXME: we may omit the whole this and use the generic code once after
2572  * it's confirmed to work.
2573  */
2574
2575 #define ATIHDMI_CVT_NID         0x02    /* audio converter */
2576 #define ATIHDMI_PIN_NID         0x03    /* HDMI output pin */
2577
2578 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2579                                         struct hda_codec *codec,
2580                                         unsigned int stream_tag,
2581                                         unsigned int format,
2582                                         struct snd_pcm_substream *substream)
2583 {
2584         struct hdmi_spec *spec = codec->spec;
2585         struct hdmi_spec_per_cvt *per_cvt = get_cvt(spec, 0);
2586         int chans = substream->runtime->channels;
2587         int i, err;
2588
2589         err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
2590                                           substream);
2591         if (err < 0)
2592                 return err;
2593         snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2594                             AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
2595         /* FIXME: XXX */
2596         for (i = 0; i < chans; i++) {
2597                 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2598                                     AC_VERB_SET_HDMI_CHAN_SLOT,
2599                                     (i << 4) | i);
2600         }
2601         return 0;
2602 }
2603
2604 static int patch_atihdmi(struct hda_codec *codec)
2605 {
2606         struct hdmi_spec *spec;
2607         int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
2608         if (err < 0)
2609                 return err;
2610         spec = codec->spec;
2611         spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
2612         return 0;
2613 }
2614
2615 /* VIA HDMI Implementation */
2616 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
2617 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
2618
2619 static int patch_via_hdmi(struct hda_codec *codec)
2620 {
2621         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
2622 }
2623
2624 /*
2625  * patch entries
2626  */
2627 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
2628 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
2629 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
2630 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
2631 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_generic_hdmi },
2632 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
2633 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
2634 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
2635 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
2636 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
2637 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
2638 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
2639 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
2640 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_generic_hdmi },
2641 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_generic_hdmi },
2642 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_generic_hdmi },
2643 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_generic_hdmi },
2644 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_generic_hdmi },
2645 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_generic_hdmi },
2646 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_generic_hdmi },
2647 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_generic_hdmi },
2648 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_generic_hdmi },
2649 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_generic_hdmi },
2650 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_generic_hdmi },
2651 /* 17 is known to be absent */
2652 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_generic_hdmi },
2653 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_generic_hdmi },
2654 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_generic_hdmi },
2655 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_generic_hdmi },
2656 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_generic_hdmi },
2657 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_generic_hdmi },
2658 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_generic_hdmi },
2659 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_generic_hdmi },
2660 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_generic_hdmi },
2661 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_generic_hdmi },
2662 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP",   .patch = patch_generic_hdmi },
2663 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP",   .patch = patch_generic_hdmi },
2664 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
2665 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
2666 { .id = 0x11069f80, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
2667 { .id = 0x11069f81, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
2668 { .id = 0x11069f84, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
2669 { .id = 0x11069f85, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
2670 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
2671 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
2672 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
2673 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
2674 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
2675 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
2676 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
2677 { .id = 0x80862807, .name = "Haswell HDMI",     .patch = patch_generic_hdmi },
2678 { .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
2679 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
2680 {} /* terminator */
2681 };
2682
2683 MODULE_ALIAS("snd-hda-codec-id:1002793c");
2684 MODULE_ALIAS("snd-hda-codec-id:10027919");
2685 MODULE_ALIAS("snd-hda-codec-id:1002791a");
2686 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
2687 MODULE_ALIAS("snd-hda-codec-id:10951390");
2688 MODULE_ALIAS("snd-hda-codec-id:10951392");
2689 MODULE_ALIAS("snd-hda-codec-id:10de0002");
2690 MODULE_ALIAS("snd-hda-codec-id:10de0003");
2691 MODULE_ALIAS("snd-hda-codec-id:10de0005");
2692 MODULE_ALIAS("snd-hda-codec-id:10de0006");
2693 MODULE_ALIAS("snd-hda-codec-id:10de0007");
2694 MODULE_ALIAS("snd-hda-codec-id:10de000a");
2695 MODULE_ALIAS("snd-hda-codec-id:10de000b");
2696 MODULE_ALIAS("snd-hda-codec-id:10de000c");
2697 MODULE_ALIAS("snd-hda-codec-id:10de000d");
2698 MODULE_ALIAS("snd-hda-codec-id:10de0010");
2699 MODULE_ALIAS("snd-hda-codec-id:10de0011");
2700 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2701 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2702 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2703 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2704 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2705 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2706 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2707 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2708 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2709 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2710 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2711 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2712 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2713 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2714 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2715 MODULE_ALIAS("snd-hda-codec-id:10de0051");
2716 MODULE_ALIAS("snd-hda-codec-id:10de0060");
2717 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2718 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2719 MODULE_ALIAS("snd-hda-codec-id:11069f80");
2720 MODULE_ALIAS("snd-hda-codec-id:11069f81");
2721 MODULE_ALIAS("snd-hda-codec-id:11069f84");
2722 MODULE_ALIAS("snd-hda-codec-id:11069f85");
2723 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2724 MODULE_ALIAS("snd-hda-codec-id:80860054");
2725 MODULE_ALIAS("snd-hda-codec-id:80862801");
2726 MODULE_ALIAS("snd-hda-codec-id:80862802");
2727 MODULE_ALIAS("snd-hda-codec-id:80862803");
2728 MODULE_ALIAS("snd-hda-codec-id:80862804");
2729 MODULE_ALIAS("snd-hda-codec-id:80862805");
2730 MODULE_ALIAS("snd-hda-codec-id:80862806");
2731 MODULE_ALIAS("snd-hda-codec-id:80862807");
2732 MODULE_ALIAS("snd-hda-codec-id:80862880");
2733 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2734
2735 MODULE_LICENSE("GPL");
2736 MODULE_DESCRIPTION("HDMI HD-audio codec");
2737 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2738 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2739 MODULE_ALIAS("snd-hda-codec-atihdmi");
2740
2741 static struct hda_codec_preset_list intel_list = {
2742         .preset = snd_hda_preset_hdmi,
2743         .owner = THIS_MODULE,
2744 };
2745
2746 static int __init patch_hdmi_init(void)
2747 {
2748         return snd_hda_add_codec_preset(&intel_list);
2749 }
2750
2751 static void __exit patch_hdmi_exit(void)
2752 {
2753         snd_hda_delete_codec_preset(&intel_list);
2754 }
2755
2756 module_init(patch_hdmi_init)
2757 module_exit(patch_hdmi_exit)