3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
11 * Wu Fengguang <wfg@linux.intel.com>
14 * Wu Fengguang <wfg@linux.intel.com>
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the Free
18 * Software Foundation; either version 2 of the License, or (at your option)
21 * This program is distributed in the hope that it will be useful, but
22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software Foundation,
28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include <sound/asoundef.h>
38 #include <sound/tlv.h>
39 #include "hda_codec.h"
40 #include "hda_local.h"
43 static bool static_hdmi_pcm;
44 module_param(static_hdmi_pcm, bool, 0644);
45 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
48 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
49 * could support N independent pipes, each of them can be connected to one or
50 * more ports (DVI, HDMI or DisplayPort).
52 * The HDA correspondence of pipes/ports are converter/pin nodes.
54 #define MAX_HDMI_CVTS 8
55 #define MAX_HDMI_PINS 8
57 struct hdmi_spec_per_cvt {
60 unsigned int channels_min;
61 unsigned int channels_max;
67 struct hdmi_spec_per_pin {
70 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
72 struct hda_codec *codec;
73 struct hdmi_eld sink_eld;
74 struct delayed_work work;
77 bool chmap_set; /* channel-map override by ALSA API? */
78 unsigned char chmap[8]; /* ALSA API channel-map */
83 struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
86 struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
87 struct hda_pcm pcm_rec[MAX_HDMI_PINS];
88 unsigned int channels_max; /* max over all cvts */
91 * Non-generic ATI/NVIDIA specific
93 struct hda_multi_out multiout;
94 struct hda_pcm_stream pcm_playback;
98 struct hdmi_audio_infoframe {
105 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
109 u8 LFEPBL01_LSV36_DM_INH7;
112 struct dp_audio_infoframe {
115 u8 ver; /* 0x11 << 2 */
117 u8 CC02_CT47; /* match with HDMI infoframe from this on */
121 u8 LFEPBL01_LSV36_DM_INH7;
124 union audio_infoframe {
125 struct hdmi_audio_infoframe hdmi;
126 struct dp_audio_infoframe dp;
131 * CEA speaker placement:
134 * FLW FL FLC FC FRC FR FRW
141 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
142 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
144 enum cea_speaker_placement {
145 FL = (1 << 0), /* Front Left */
146 FC = (1 << 1), /* Front Center */
147 FR = (1 << 2), /* Front Right */
148 FLC = (1 << 3), /* Front Left Center */
149 FRC = (1 << 4), /* Front Right Center */
150 RL = (1 << 5), /* Rear Left */
151 RC = (1 << 6), /* Rear Center */
152 RR = (1 << 7), /* Rear Right */
153 RLC = (1 << 8), /* Rear Left Center */
154 RRC = (1 << 9), /* Rear Right Center */
155 LFE = (1 << 10), /* Low Frequency Effect */
156 FLW = (1 << 11), /* Front Left Wide */
157 FRW = (1 << 12), /* Front Right Wide */
158 FLH = (1 << 13), /* Front Left High */
159 FCH = (1 << 14), /* Front Center High */
160 FRH = (1 << 15), /* Front Right High */
161 TC = (1 << 16), /* Top Center */
165 * ELD SA bits in the CEA Speaker Allocation data block
167 static int eld_speaker_allocation_bits[] = {
175 /* the following are not defined in ELD yet */
182 struct cea_channel_speaker_allocation {
186 /* derived values, just for convenience */
194 * surround40 surround41 surround50 surround51 surround71
195 * ch0 front left = = = =
196 * ch1 front right = = = =
197 * ch2 rear left = = = =
198 * ch3 rear right = = = =
199 * ch4 LFE center center center
204 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
206 static int hdmi_channel_mapping[0x32][8] = {
208 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
210 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
212 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
214 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
216 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
218 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
220 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
222 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
224 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
228 * This is an ordered list!
230 * The preceding ones have better chances to be selected by
231 * hdmi_channel_allocation().
233 static struct cea_channel_speaker_allocation channel_allocations[] = {
234 /* channel: 7 6 5 4 3 2 1 0 */
235 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
237 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
239 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
241 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
243 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
245 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
247 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
249 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
251 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
253 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
254 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
255 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
256 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
257 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
258 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
259 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
260 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
261 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
262 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
263 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
264 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
265 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
266 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
267 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
268 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
269 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
270 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
271 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
272 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
273 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
274 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
275 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
276 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
277 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
278 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
279 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
280 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
281 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
282 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
283 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
284 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
285 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
286 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
287 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
288 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
289 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
290 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
291 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
292 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
293 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
301 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
305 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
306 if (spec->pins[pin_idx].pin_nid == pin_nid)
309 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
313 static int hinfo_to_pin_index(struct hdmi_spec *spec,
314 struct hda_pcm_stream *hinfo)
318 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
319 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
322 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
326 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
330 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
331 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
334 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
338 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
339 struct snd_ctl_elem_info *uinfo)
341 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
342 struct hdmi_spec *spec;
346 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
348 pin_idx = kcontrol->private_value;
349 uinfo->count = spec->pins[pin_idx].sink_eld.eld_size;
354 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
355 struct snd_ctl_elem_value *ucontrol)
357 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
358 struct hdmi_spec *spec;
362 pin_idx = kcontrol->private_value;
364 memcpy(ucontrol->value.bytes.data,
365 spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE);
370 static struct snd_kcontrol_new eld_bytes_ctl = {
371 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
372 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
374 .info = hdmi_eld_ctl_info,
375 .get = hdmi_eld_ctl_get,
378 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
381 struct snd_kcontrol *kctl;
382 struct hdmi_spec *spec = codec->spec;
385 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
388 kctl->private_value = pin_idx;
389 kctl->id.device = device;
391 err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
399 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
400 int *packet_index, int *byte_index)
404 val = snd_hda_codec_read(codec, pin_nid, 0,
405 AC_VERB_GET_HDMI_DIP_INDEX, 0);
407 *packet_index = val >> 5;
408 *byte_index = val & 0x1f;
412 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
413 int packet_index, int byte_index)
417 val = (packet_index << 5) | (byte_index & 0x1f);
419 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
422 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
425 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
428 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
431 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
432 snd_hda_codec_write(codec, pin_nid, 0,
433 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
434 /* Enable pin out: some machines with GM965 gets broken output when
435 * the pin is disabled or changed while using with HDMI
437 snd_hda_codec_write(codec, pin_nid, 0,
438 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
441 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
443 return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
444 AC_VERB_GET_CVT_CHAN_COUNT, 0);
447 static void hdmi_set_channel_count(struct hda_codec *codec,
448 hda_nid_t cvt_nid, int chs)
450 if (chs != hdmi_get_channel_count(codec, cvt_nid))
451 snd_hda_codec_write(codec, cvt_nid, 0,
452 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
457 * Channel mapping routines
461 * Compute derived values in channel_allocations[].
463 static void init_channel_allocations(void)
466 struct cea_channel_speaker_allocation *p;
468 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
469 p = channel_allocations + i;
472 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
473 if (p->speakers[j]) {
475 p->spk_mask |= p->speakers[j];
480 static int get_channel_allocation_order(int ca)
484 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
485 if (channel_allocations[i].ca_index == ca)
492 * The transformation takes two steps:
494 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
495 * spk_mask => (channel_allocations[]) => ai->CA
497 * TODO: it could select the wrong CA from multiple candidates.
499 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
504 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
507 * CA defaults to 0 for basic stereo audio
513 * expand ELD's speaker allocation mask
515 * ELD tells the speaker mask in a compact(paired) form,
516 * expand ELD's notions to match the ones used by Audio InfoFrame.
518 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
519 if (eld->spk_alloc & (1 << i))
520 spk_mask |= eld_speaker_allocation_bits[i];
523 /* search for the first working match in the CA table */
524 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
525 if (channels == channel_allocations[i].channels &&
526 (spk_mask & channel_allocations[i].spk_mask) ==
527 channel_allocations[i].spk_mask) {
528 ca = channel_allocations[i].ca_index;
533 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
534 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
540 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
543 #ifdef CONFIG_SND_DEBUG_VERBOSE
547 for (i = 0; i < 8; i++) {
548 slot = snd_hda_codec_read(codec, pin_nid, 0,
549 AC_VERB_GET_HDMI_CHAN_SLOT, i);
550 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
551 slot >> 4, slot & 0xf);
557 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
565 int non_pcm_mapping[8];
567 order = get_channel_allocation_order(ca);
569 if (hdmi_channel_mapping[ca][1] == 0) {
570 for (i = 0; i < channel_allocations[order].channels; i++)
571 hdmi_channel_mapping[ca][i] = i | (i << 4);
573 hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
577 for (i = 0; i < channel_allocations[order].channels; i++)
578 non_pcm_mapping[i] = i | (i << 4);
580 non_pcm_mapping[i] = 0xf | (i << 4);
583 for (i = 0; i < 8; i++) {
584 err = snd_hda_codec_write(codec, pin_nid, 0,
585 AC_VERB_SET_HDMI_CHAN_SLOT,
586 non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
588 snd_printdd(KERN_NOTICE
589 "HDMI: channel mapping failed\n");
594 hdmi_debug_channel_mapping(codec, pin_nid);
597 struct channel_map_table {
598 unsigned char map; /* ALSA API channel map position */
599 unsigned char cea_slot; /* CEA slot value */
600 int spk_mask; /* speaker position bit mask */
603 static struct channel_map_table map_tables[] = {
604 { SNDRV_CHMAP_FL, 0x00, FL },
605 { SNDRV_CHMAP_FR, 0x01, FR },
606 { SNDRV_CHMAP_RL, 0x04, RL },
607 { SNDRV_CHMAP_RR, 0x05, RR },
608 { SNDRV_CHMAP_LFE, 0x02, LFE },
609 { SNDRV_CHMAP_FC, 0x03, FC },
610 { SNDRV_CHMAP_RLC, 0x06, RLC },
611 { SNDRV_CHMAP_RRC, 0x07, RRC },
615 /* from ALSA API channel position to speaker bit mask */
616 static int to_spk_mask(unsigned char c)
618 struct channel_map_table *t = map_tables;
619 for (; t->map; t++) {
626 /* from ALSA API channel position to CEA slot */
627 static int to_cea_slot(unsigned char c)
629 struct channel_map_table *t = map_tables;
630 for (; t->map; t++) {
637 /* from CEA slot to ALSA API channel position */
638 static int from_cea_slot(unsigned char c)
640 struct channel_map_table *t = map_tables;
641 for (; t->map; t++) {
642 if (t->cea_slot == c)
648 /* from speaker bit mask to ALSA API channel position */
649 static int spk_to_chmap(int spk)
651 struct channel_map_table *t = map_tables;
652 for (; t->map; t++) {
653 if (t->spk_mask == spk)
659 /* get the CA index corresponding to the given ALSA API channel map */
660 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
662 int i, spks = 0, spk_mask = 0;
664 for (i = 0; i < chs; i++) {
665 int mask = to_spk_mask(map[i]);
672 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
673 if ((chs == channel_allocations[i].channels ||
674 spks == channel_allocations[i].channels) &&
675 (spk_mask & channel_allocations[i].spk_mask) ==
676 channel_allocations[i].spk_mask)
677 return channel_allocations[i].ca_index;
682 /* set up the channel slots for the given ALSA API channel map */
683 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
685 int chs, unsigned char *map)
688 for (i = 0; i < 8; i++) {
691 val = to_cea_slot(map[i]);
695 err = snd_hda_codec_write(codec, pin_nid, 0,
696 AC_VERB_SET_HDMI_CHAN_SLOT, val);
703 /* store ALSA API channel map from the current default map */
704 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
707 for (i = 0; i < 8; i++) {
708 if (i < channel_allocations[ca].channels)
709 map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
715 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
716 hda_nid_t pin_nid, bool non_pcm, int ca,
717 int channels, unsigned char *map)
719 if (!non_pcm && map) {
720 hdmi_manual_setup_channel_mapping(codec, pin_nid,
723 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
724 hdmi_setup_fake_chmap(map, ca);
729 * Audio InfoFrame routines
733 * Enable Audio InfoFrame Transmission
735 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
738 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
739 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
744 * Disable Audio InfoFrame Transmission
746 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
749 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
750 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
754 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
756 #ifdef CONFIG_SND_DEBUG_VERBOSE
760 size = snd_hdmi_get_eld_size(codec, pin_nid);
761 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
763 for (i = 0; i < 8; i++) {
764 size = snd_hda_codec_read(codec, pin_nid, 0,
765 AC_VERB_GET_HDMI_DIP_SIZE, i);
766 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
771 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
777 for (i = 0; i < 8; i++) {
778 size = snd_hda_codec_read(codec, pin_nid, 0,
779 AC_VERB_GET_HDMI_DIP_SIZE, i);
783 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
784 for (j = 1; j < 1000; j++) {
785 hdmi_write_dip_byte(codec, pin_nid, 0x0);
786 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
788 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
790 if (bi == 0) /* byte index wrapped around */
794 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
800 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
802 u8 *bytes = (u8 *)hdmi_ai;
806 hdmi_ai->checksum = 0;
808 for (i = 0; i < sizeof(*hdmi_ai); i++)
811 hdmi_ai->checksum = -sum;
814 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
820 hdmi_debug_dip_size(codec, pin_nid);
821 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
823 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
824 for (i = 0; i < size; i++)
825 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
828 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
834 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
838 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
839 for (i = 0; i < size; i++) {
840 val = snd_hda_codec_read(codec, pin_nid, 0,
841 AC_VERB_GET_HDMI_DIP_DATA, 0);
849 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
851 struct snd_pcm_substream *substream)
853 struct hdmi_spec *spec = codec->spec;
854 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
855 hda_nid_t pin_nid = per_pin->pin_nid;
856 int channels = substream->runtime->channels;
857 struct hdmi_eld *eld;
859 union audio_infoframe ai;
861 eld = &spec->pins[pin_idx].sink_eld;
862 if (!eld->monitor_present)
865 if (!non_pcm && per_pin->chmap_set)
866 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
868 ca = hdmi_channel_allocation(eld, channels);
872 memset(&ai, 0, sizeof(ai));
873 if (eld->conn_type == 0) { /* HDMI */
874 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
876 hdmi_ai->type = 0x84;
879 hdmi_ai->CC02_CT47 = channels - 1;
881 hdmi_checksum_audio_infoframe(hdmi_ai);
882 } else if (eld->conn_type == 1) { /* DisplayPort */
883 struct dp_audio_infoframe *dp_ai = &ai.dp;
887 dp_ai->ver = 0x11 << 2;
888 dp_ai->CC02_CT47 = channels - 1;
891 snd_printd("HDMI: unknown connection type at pin %d\n",
897 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
898 * sizeof(*dp_ai) to avoid partial match/update problems when
899 * the user switches between HDMI/DP monitors.
901 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
903 snd_printdd("hdmi_setup_audio_infoframe: "
904 "pin=%d channels=%d\n",
907 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
908 channels, per_pin->chmap);
909 hdmi_stop_infoframe_trans(codec, pin_nid);
910 hdmi_fill_audio_infoframe(codec, pin_nid,
911 ai.bytes, sizeof(ai));
912 hdmi_start_infoframe_trans(codec, pin_nid);
914 /* For non-pcm audio switch, setup new channel mapping
916 if (per_pin->non_pcm != non_pcm)
917 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
918 channels, per_pin->chmap);
921 per_pin->non_pcm = non_pcm;
929 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
931 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
933 struct hdmi_spec *spec = codec->spec;
934 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
937 struct hda_jack_tbl *jack;
939 jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
943 jack->jack_dirty = 1;
945 _snd_printd(SND_PR_VERBOSE,
946 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
947 codec->addr, pin_nid,
948 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
950 pin_idx = pin_nid_to_pin_index(spec, pin_nid);
954 hdmi_present_sense(&spec->pins[pin_idx], 1);
955 snd_hda_jack_report_sync(codec);
958 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
960 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
961 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
962 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
963 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
966 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
981 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
983 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
984 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
986 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
987 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
992 hdmi_intrinsic_event(codec, res);
994 hdmi_non_intrinsic_event(codec, res);
1001 /* HBR should be Non-PCM, 8 channels */
1002 #define is_hbr_format(format) \
1003 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1005 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1006 hda_nid_t pin_nid, u32 stream_tag, int format)
1011 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1012 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1013 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1015 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1016 if (is_hbr_format(format))
1017 new_pinctl |= AC_PINCTL_EPT_HBR;
1019 new_pinctl |= AC_PINCTL_EPT_NATIVE;
1021 snd_printdd("hdmi_setup_stream: "
1022 "NID=0x%x, %spinctl=0x%x\n",
1024 pinctl == new_pinctl ? "" : "new-",
1027 if (pinctl != new_pinctl)
1028 snd_hda_codec_write(codec, pin_nid, 0,
1029 AC_VERB_SET_PIN_WIDGET_CONTROL,
1033 if (is_hbr_format(format) && !new_pinctl) {
1034 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1038 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1045 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1046 struct hda_codec *codec,
1047 struct snd_pcm_substream *substream)
1049 struct hdmi_spec *spec = codec->spec;
1050 struct snd_pcm_runtime *runtime = substream->runtime;
1051 int pin_idx, cvt_idx, mux_idx = 0;
1052 struct hdmi_spec_per_pin *per_pin;
1053 struct hdmi_eld *eld;
1054 struct hdmi_spec_per_cvt *per_cvt = NULL;
1056 /* Validate hinfo */
1057 pin_idx = hinfo_to_pin_index(spec, hinfo);
1058 if (snd_BUG_ON(pin_idx < 0))
1060 per_pin = &spec->pins[pin_idx];
1061 eld = &per_pin->sink_eld;
1063 /* Dynamically assign converter to stream */
1064 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1065 per_cvt = &spec->cvts[cvt_idx];
1067 /* Must not already be assigned */
1068 if (per_cvt->assigned)
1070 /* Must be in pin's mux's list of converters */
1071 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1072 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1074 /* Not in mux list */
1075 if (mux_idx == per_pin->num_mux_nids)
1079 /* No free converters */
1080 if (cvt_idx == spec->num_cvts)
1083 /* Claim converter */
1084 per_cvt->assigned = 1;
1085 hinfo->nid = per_cvt->cvt_nid;
1087 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1088 AC_VERB_SET_CONNECT_SEL,
1090 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1092 /* Initially set the converter's capabilities */
1093 hinfo->channels_min = per_cvt->channels_min;
1094 hinfo->channels_max = per_cvt->channels_max;
1095 hinfo->rates = per_cvt->rates;
1096 hinfo->formats = per_cvt->formats;
1097 hinfo->maxbps = per_cvt->maxbps;
1099 /* Restrict capabilities by ELD if this isn't disabled */
1100 if (!static_hdmi_pcm && eld->eld_valid) {
1101 snd_hdmi_eld_update_pcm_info(eld, hinfo);
1102 if (hinfo->channels_min > hinfo->channels_max ||
1103 !hinfo->rates || !hinfo->formats)
1107 /* Store the updated parameters */
1108 runtime->hw.channels_min = hinfo->channels_min;
1109 runtime->hw.channels_max = hinfo->channels_max;
1110 runtime->hw.formats = hinfo->formats;
1111 runtime->hw.rates = hinfo->rates;
1113 snd_pcm_hw_constraint_step(substream->runtime, 0,
1114 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1119 * HDA/HDMI auto parsing
1121 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1123 struct hdmi_spec *spec = codec->spec;
1124 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1125 hda_nid_t pin_nid = per_pin->pin_nid;
1127 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1128 snd_printk(KERN_WARNING
1129 "HDMI: pin %d wcaps %#x "
1130 "does not support connection list\n",
1131 pin_nid, get_wcaps(codec, pin_nid));
1135 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1137 HDA_MAX_CONNECTIONS);
1142 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1144 struct hda_codec *codec = per_pin->codec;
1145 struct hdmi_eld *eld = &per_pin->sink_eld;
1146 hda_nid_t pin_nid = per_pin->pin_nid;
1148 * Always execute a GetPinSense verb here, even when called from
1149 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1150 * response's PD bit is not the real PD value, but indicates that
1151 * the real PD value changed. An older version of the HD-audio
1152 * specification worked this way. Hence, we just ignore the data in
1153 * the unsolicited response to avoid custom WARs.
1155 int present = snd_hda_pin_sense(codec, pin_nid);
1156 bool eld_valid = false;
1158 memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
1160 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1161 if (eld->monitor_present)
1162 eld_valid = !!(present & AC_PINSENSE_ELDV);
1164 _snd_printd(SND_PR_VERBOSE,
1165 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1166 codec->addr, pin_nid, eld->monitor_present, eld_valid);
1169 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
1170 snd_hdmi_show_eld(eld);
1172 queue_delayed_work(codec->bus->workq,
1174 msecs_to_jiffies(300));
1179 static void hdmi_repoll_eld(struct work_struct *work)
1181 struct hdmi_spec_per_pin *per_pin =
1182 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1184 if (per_pin->repoll_count++ > 6)
1185 per_pin->repoll_count = 0;
1187 hdmi_present_sense(per_pin, per_pin->repoll_count);
1190 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1192 struct hdmi_spec *spec = codec->spec;
1193 unsigned int caps, config;
1195 struct hdmi_spec_per_pin *per_pin;
1198 caps = snd_hda_query_pin_caps(codec, pin_nid);
1199 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1202 config = snd_hda_codec_get_pincfg(codec, pin_nid);
1203 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1206 if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
1209 pin_idx = spec->num_pins;
1210 per_pin = &spec->pins[pin_idx];
1212 per_pin->pin_nid = pin_nid;
1213 per_pin->non_pcm = false;
1215 err = hdmi_read_pin_conn(codec, pin_idx);
1224 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1226 struct hdmi_spec *spec = codec->spec;
1228 struct hdmi_spec_per_cvt *per_cvt;
1232 if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
1235 chans = get_wcaps(codec, cvt_nid);
1236 chans = get_wcaps_channels(chans);
1238 cvt_idx = spec->num_cvts;
1239 per_cvt = &spec->cvts[cvt_idx];
1241 per_cvt->cvt_nid = cvt_nid;
1242 per_cvt->channels_min = 2;
1244 per_cvt->channels_max = chans;
1245 if (chans > spec->channels_max)
1246 spec->channels_max = chans;
1249 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1261 static int hdmi_parse_codec(struct hda_codec *codec)
1266 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1267 if (!nid || nodes < 0) {
1268 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1272 for (i = 0; i < nodes; i++, nid++) {
1276 caps = get_wcaps(codec, nid);
1277 type = get_wcaps_type(caps);
1279 if (!(caps & AC_WCAP_DIGITAL))
1283 case AC_WID_AUD_OUT:
1284 hdmi_add_cvt(codec, nid);
1287 hdmi_add_pin(codec, nid);
1293 /* We're seeing some problems with unsolicited hot plug events on
1294 * PantherPoint after S3, if this is not enabled */
1295 if (codec->vendor_id == 0x80862806)
1296 codec->bus->power_keep_link_on = 1;
1298 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1299 * can be lost and presence sense verb will become inaccurate if the
1300 * HDA link is powered off at hot plug or hw initialization time.
1302 else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1304 codec->bus->power_keep_link_on = 1;
1312 static char *get_hdmi_pcm_name(int idx)
1314 static char names[MAX_HDMI_PINS][8];
1315 sprintf(&names[idx][0], "HDMI %d", idx);
1316 return &names[idx][0];
1319 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1321 struct hda_spdif_out *spdif;
1324 mutex_lock(&codec->spdif_mutex);
1325 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1326 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1327 mutex_unlock(&codec->spdif_mutex);
1336 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1337 struct hda_codec *codec,
1338 unsigned int stream_tag,
1339 unsigned int format,
1340 struct snd_pcm_substream *substream)
1342 hda_nid_t cvt_nid = hinfo->nid;
1343 struct hdmi_spec *spec = codec->spec;
1344 int pin_idx = hinfo_to_pin_index(spec, hinfo);
1345 hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
1348 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1350 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1352 hdmi_setup_audio_infoframe(codec, pin_idx, non_pcm, substream);
1354 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1357 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1358 struct hda_codec *codec,
1359 struct snd_pcm_substream *substream)
1361 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1365 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1366 struct hda_codec *codec,
1367 struct snd_pcm_substream *substream)
1369 struct hdmi_spec *spec = codec->spec;
1370 int cvt_idx, pin_idx;
1371 struct hdmi_spec_per_cvt *per_cvt;
1372 struct hdmi_spec_per_pin *per_pin;
1375 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1376 if (snd_BUG_ON(cvt_idx < 0))
1378 per_cvt = &spec->cvts[cvt_idx];
1380 snd_BUG_ON(!per_cvt->assigned);
1381 per_cvt->assigned = 0;
1384 pin_idx = hinfo_to_pin_index(spec, hinfo);
1385 if (snd_BUG_ON(pin_idx < 0))
1387 per_pin = &spec->pins[pin_idx];
1389 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1390 per_pin->chmap_set = false;
1391 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1397 static const struct hda_pcm_ops generic_ops = {
1398 .open = hdmi_pcm_open,
1399 .close = hdmi_pcm_close,
1400 .prepare = generic_hdmi_playback_pcm_prepare,
1401 .cleanup = generic_hdmi_playback_pcm_cleanup,
1405 * ALSA API channel-map control callbacks
1407 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1408 struct snd_ctl_elem_info *uinfo)
1410 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1411 struct hda_codec *codec = info->private_data;
1412 struct hdmi_spec *spec = codec->spec;
1413 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1414 uinfo->count = spec->channels_max;
1415 uinfo->value.integer.min = 0;
1416 uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1420 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1421 unsigned int size, unsigned int __user *tlv)
1423 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1424 struct hda_codec *codec = info->private_data;
1425 struct hdmi_spec *spec = codec->spec;
1426 const unsigned int valid_mask =
1427 FL | FR | RL | RR | LFE | FC | RLC | RRC;
1428 unsigned int __user *dst;
1433 if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1437 for (chs = 2; chs <= spec->channels_max; chs++) {
1439 struct cea_channel_speaker_allocation *cap;
1440 cap = channel_allocations;
1441 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1442 int chs_bytes = chs * 4;
1443 if (cap->channels != chs)
1445 if (cap->spk_mask & ~valid_mask)
1449 if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
1450 put_user(chs_bytes, dst + 1))
1455 if (size < chs_bytes)
1459 for (c = 7; c >= 0; c--) {
1460 int spk = cap->speakers[c];
1463 if (put_user(spk_to_chmap(spk), dst))
1469 if (put_user(count, tlv + 1))
1474 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1475 struct snd_ctl_elem_value *ucontrol)
1477 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1478 struct hda_codec *codec = info->private_data;
1479 struct hdmi_spec *spec = codec->spec;
1480 int pin_idx = kcontrol->private_value;
1481 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1484 for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1485 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1489 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1490 struct snd_ctl_elem_value *ucontrol)
1492 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1493 struct hda_codec *codec = info->private_data;
1494 struct hdmi_spec *spec = codec->spec;
1495 int pin_idx = kcontrol->private_value;
1496 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1497 unsigned int ctl_idx;
1498 struct snd_pcm_substream *substream;
1499 unsigned char chmap[8];
1500 int i, ca, prepared = 0;
1502 ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1503 substream = snd_pcm_chmap_substream(info, ctl_idx);
1504 if (!substream || !substream->runtime)
1505 return 0; /* just for avoiding error from alsactl restore */
1506 switch (substream->runtime->status->state) {
1507 case SNDRV_PCM_STATE_OPEN:
1508 case SNDRV_PCM_STATE_SETUP:
1510 case SNDRV_PCM_STATE_PREPARED:
1516 memset(chmap, 0, sizeof(chmap));
1517 for (i = 0; i < ARRAY_SIZE(chmap); i++)
1518 chmap[i] = ucontrol->value.integer.value[i];
1519 if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1521 ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1524 per_pin->chmap_set = true;
1525 memcpy(per_pin->chmap, chmap, sizeof(chmap));
1527 hdmi_setup_audio_infoframe(codec, pin_idx, per_pin->non_pcm,
1533 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1535 struct hdmi_spec *spec = codec->spec;
1538 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1539 struct hda_pcm *info;
1540 struct hda_pcm_stream *pstr;
1542 info = &spec->pcm_rec[pin_idx];
1543 info->name = get_hdmi_pcm_name(pin_idx);
1544 info->pcm_type = HDA_PCM_TYPE_HDMI;
1545 info->own_chmap = true;
1547 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1548 pstr->substreams = 1;
1549 pstr->ops = generic_ops;
1550 /* other pstr fields are set in open */
1553 codec->num_pcms = spec->num_pins;
1554 codec->pcm_info = spec->pcm_rec;
1559 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1561 char hdmi_str[32] = "HDMI/DP";
1562 struct hdmi_spec *spec = codec->spec;
1563 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1564 int pcmdev = spec->pcm_rec[pin_idx].device;
1567 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1569 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1572 static int generic_hdmi_build_controls(struct hda_codec *codec)
1574 struct hdmi_spec *spec = codec->spec;
1578 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1579 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1581 err = generic_hdmi_build_jack(codec, pin_idx);
1585 err = snd_hda_create_dig_out_ctls(codec,
1587 per_pin->mux_nids[0],
1591 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1593 /* add control for ELD Bytes */
1594 err = hdmi_create_eld_ctl(codec,
1596 spec->pcm_rec[pin_idx].device);
1601 hdmi_present_sense(per_pin, 0);
1604 /* add channel maps */
1605 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1606 struct snd_pcm_chmap *chmap;
1607 struct snd_kcontrol *kctl;
1609 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
1610 SNDRV_PCM_STREAM_PLAYBACK,
1611 NULL, 0, pin_idx, &chmap);
1614 /* override handlers */
1615 chmap->private_data = codec;
1617 for (i = 0; i < kctl->count; i++)
1618 kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
1619 kctl->info = hdmi_chmap_ctl_info;
1620 kctl->get = hdmi_chmap_ctl_get;
1621 kctl->put = hdmi_chmap_ctl_put;
1622 kctl->tlv.c = hdmi_chmap_ctl_tlv;
1628 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
1630 struct hdmi_spec *spec = codec->spec;
1633 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1634 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1635 struct hdmi_eld *eld = &per_pin->sink_eld;
1637 per_pin->codec = codec;
1638 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1639 snd_hda_eld_proc_new(codec, eld, pin_idx);
1644 static int generic_hdmi_init(struct hda_codec *codec)
1646 struct hdmi_spec *spec = codec->spec;
1649 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1650 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1651 hda_nid_t pin_nid = per_pin->pin_nid;
1653 hdmi_init_pin(codec, pin_nid);
1654 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1659 static void generic_hdmi_free(struct hda_codec *codec)
1661 struct hdmi_spec *spec = codec->spec;
1664 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1665 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1666 struct hdmi_eld *eld = &per_pin->sink_eld;
1668 cancel_delayed_work(&per_pin->work);
1669 snd_hda_eld_proc_free(codec, eld);
1672 flush_workqueue(codec->bus->workq);
1676 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1677 .init = generic_hdmi_init,
1678 .free = generic_hdmi_free,
1679 .build_pcms = generic_hdmi_build_pcms,
1680 .build_controls = generic_hdmi_build_controls,
1681 .unsol_event = hdmi_unsol_event,
1684 static void intel_haswell_fixup_connect_list(struct hda_codec *codec)
1686 unsigned int vendor_param;
1687 hda_nid_t list[3] = {0x2, 0x3, 0x4};
1689 vendor_param = snd_hda_codec_read(codec, 0x08, 0, 0xf81, 0);
1690 if (vendor_param == -1 || vendor_param & 0x02)
1693 /* enable DP1.2 mode */
1694 vendor_param |= 0x02;
1695 snd_hda_codec_read(codec, 0x08, 0, 0x781, vendor_param);
1697 vendor_param = snd_hda_codec_read(codec, 0x08, 0, 0xf81, 0);
1698 if (vendor_param == -1 || !(vendor_param & 0x02))
1701 /* override 3 pins connection list */
1702 snd_hda_override_conn_list(codec, 0x05, 3, list);
1703 snd_hda_override_conn_list(codec, 0x06, 3, list);
1704 snd_hda_override_conn_list(codec, 0x07, 3, list);
1708 static int patch_generic_hdmi(struct hda_codec *codec)
1710 struct hdmi_spec *spec;
1712 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1718 if (codec->vendor_id == 0x80862807)
1719 intel_haswell_fixup_connect_list(codec);
1721 if (hdmi_parse_codec(codec) < 0) {
1726 codec->patch_ops = generic_hdmi_patch_ops;
1727 generic_hdmi_init_per_pins(codec);
1729 init_channel_allocations();
1735 * Shared non-generic implementations
1738 static int simple_playback_build_pcms(struct hda_codec *codec)
1740 struct hdmi_spec *spec = codec->spec;
1741 struct hda_pcm *info = spec->pcm_rec;
1743 struct hda_pcm_stream *pstr;
1745 codec->num_pcms = 1;
1746 codec->pcm_info = info;
1748 chans = get_wcaps(codec, spec->cvts[0].cvt_nid);
1749 chans = get_wcaps_channels(chans);
1751 info->name = get_hdmi_pcm_name(0);
1752 info->pcm_type = HDA_PCM_TYPE_HDMI;
1753 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1754 *pstr = spec->pcm_playback;
1755 pstr->nid = spec->cvts[0].cvt_nid;
1756 if (pstr->channels_max <= 2 && chans && chans <= 16)
1757 pstr->channels_max = chans;
1762 /* unsolicited event for jack sensing */
1763 static void simple_hdmi_unsol_event(struct hda_codec *codec,
1766 snd_hda_jack_set_dirty_all(codec);
1767 snd_hda_jack_report_sync(codec);
1770 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
1771 * as long as spec->pins[] is set correctly
1773 #define simple_hdmi_build_jack generic_hdmi_build_jack
1775 static int simple_playback_build_controls(struct hda_codec *codec)
1777 struct hdmi_spec *spec = codec->spec;
1780 err = snd_hda_create_spdif_out_ctls(codec,
1781 spec->cvts[0].cvt_nid,
1782 spec->cvts[0].cvt_nid);
1785 return simple_hdmi_build_jack(codec, 0);
1788 static int simple_playback_init(struct hda_codec *codec)
1790 struct hdmi_spec *spec = codec->spec;
1791 hda_nid_t pin = spec->pins[0].pin_nid;
1793 snd_hda_codec_write(codec, pin, 0,
1794 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
1795 /* some codecs require to unmute the pin */
1796 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
1797 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
1799 snd_hda_jack_detect_enable(codec, pin, pin);
1803 static void simple_playback_free(struct hda_codec *codec)
1805 struct hdmi_spec *spec = codec->spec;
1811 * Nvidia specific implementations
1814 #define Nv_VERB_SET_Channel_Allocation 0xF79
1815 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
1816 #define Nv_VERB_SET_Audio_Protection_On 0xF98
1817 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
1819 #define nvhdmi_master_con_nid_7x 0x04
1820 #define nvhdmi_master_pin_nid_7x 0x05
1822 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
1823 /*front, rear, clfe, rear_surr */
1827 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
1828 /* set audio protect on */
1829 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1830 /* enable digital output on pin widget */
1831 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1835 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
1836 /* set audio protect on */
1837 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1838 /* enable digital output on pin widget */
1839 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1840 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1841 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1842 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1843 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1847 #ifdef LIMITED_RATE_FMT_SUPPORT
1848 /* support only the safe format and rate */
1849 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
1850 #define SUPPORTED_MAXBPS 16
1851 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
1853 /* support all rates and formats */
1854 #define SUPPORTED_RATES \
1855 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1856 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1857 SNDRV_PCM_RATE_192000)
1858 #define SUPPORTED_MAXBPS 24
1859 #define SUPPORTED_FORMATS \
1860 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1863 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
1865 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
1869 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
1871 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
1875 static unsigned int channels_2_6_8[] = {
1879 static unsigned int channels_2_8[] = {
1883 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1884 .count = ARRAY_SIZE(channels_2_6_8),
1885 .list = channels_2_6_8,
1889 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1890 .count = ARRAY_SIZE(channels_2_8),
1891 .list = channels_2_8,
1895 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1896 struct hda_codec *codec,
1897 struct snd_pcm_substream *substream)
1899 struct hdmi_spec *spec = codec->spec;
1900 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1902 switch (codec->preset->id) {
1907 hw_constraints_channels = &hw_constraints_2_8_channels;
1910 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1916 if (hw_constraints_channels != NULL) {
1917 snd_pcm_hw_constraint_list(substream->runtime, 0,
1918 SNDRV_PCM_HW_PARAM_CHANNELS,
1919 hw_constraints_channels);
1921 snd_pcm_hw_constraint_step(substream->runtime, 0,
1922 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1925 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1928 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1929 struct hda_codec *codec,
1930 struct snd_pcm_substream *substream)
1932 struct hdmi_spec *spec = codec->spec;
1933 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1936 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1937 struct hda_codec *codec,
1938 unsigned int stream_tag,
1939 unsigned int format,
1940 struct snd_pcm_substream *substream)
1942 struct hdmi_spec *spec = codec->spec;
1943 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1944 stream_tag, format, substream);
1947 static const struct hda_pcm_stream simple_pcm_playback = {
1952 .open = simple_playback_pcm_open,
1953 .close = simple_playback_pcm_close,
1954 .prepare = simple_playback_pcm_prepare
1958 static const struct hda_codec_ops simple_hdmi_patch_ops = {
1959 .build_controls = simple_playback_build_controls,
1960 .build_pcms = simple_playback_build_pcms,
1961 .init = simple_playback_init,
1962 .free = simple_playback_free,
1963 .unsol_event = simple_hdmi_unsol_event,
1966 static int patch_simple_hdmi(struct hda_codec *codec,
1967 hda_nid_t cvt_nid, hda_nid_t pin_nid)
1969 struct hdmi_spec *spec;
1971 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1977 spec->multiout.num_dacs = 0; /* no analog */
1978 spec->multiout.max_channels = 2;
1979 spec->multiout.dig_out_nid = cvt_nid;
1982 spec->cvts[0].cvt_nid = cvt_nid;
1983 spec->pins[0].pin_nid = pin_nid;
1984 spec->pcm_playback = simple_pcm_playback;
1986 codec->patch_ops = simple_hdmi_patch_ops;
1991 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
1994 unsigned int chanmask;
1995 int chan = channels ? (channels - 1) : 1;
2014 /* Set the audio infoframe channel allocation and checksum fields. The
2015 * channel count is computed implicitly by the hardware. */
2016 snd_hda_codec_write(codec, 0x1, 0,
2017 Nv_VERB_SET_Channel_Allocation, chanmask);
2019 snd_hda_codec_write(codec, 0x1, 0,
2020 Nv_VERB_SET_Info_Frame_Checksum,
2021 (0x71 - chan - chanmask));
2024 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2025 struct hda_codec *codec,
2026 struct snd_pcm_substream *substream)
2028 struct hdmi_spec *spec = codec->spec;
2031 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2032 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2033 for (i = 0; i < 4; i++) {
2034 /* set the stream id */
2035 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2036 AC_VERB_SET_CHANNEL_STREAMID, 0);
2037 /* set the stream format */
2038 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2039 AC_VERB_SET_STREAM_FORMAT, 0);
2042 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2043 * streams are disabled. */
2044 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2046 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2049 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2050 struct hda_codec *codec,
2051 unsigned int stream_tag,
2052 unsigned int format,
2053 struct snd_pcm_substream *substream)
2056 unsigned int dataDCC2, channel_id;
2058 struct hdmi_spec *spec = codec->spec;
2059 struct hda_spdif_out *spdif;
2061 mutex_lock(&codec->spdif_mutex);
2062 spdif = snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
2064 chs = substream->runtime->channels;
2068 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2069 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2070 snd_hda_codec_write(codec,
2071 nvhdmi_master_con_nid_7x,
2073 AC_VERB_SET_DIGI_CONVERT_1,
2074 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2076 /* set the stream id */
2077 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2078 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2080 /* set the stream format */
2081 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2082 AC_VERB_SET_STREAM_FORMAT, format);
2084 /* turn on again (if needed) */
2085 /* enable and set the channel status audio/data flag */
2086 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2087 snd_hda_codec_write(codec,
2088 nvhdmi_master_con_nid_7x,
2090 AC_VERB_SET_DIGI_CONVERT_1,
2091 spdif->ctls & 0xff);
2092 snd_hda_codec_write(codec,
2093 nvhdmi_master_con_nid_7x,
2095 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2098 for (i = 0; i < 4; i++) {
2104 /* turn off SPDIF once;
2105 *otherwise the IEC958 bits won't be updated
2107 if (codec->spdif_status_reset &&
2108 (spdif->ctls & AC_DIG1_ENABLE))
2109 snd_hda_codec_write(codec,
2110 nvhdmi_con_nids_7x[i],
2112 AC_VERB_SET_DIGI_CONVERT_1,
2113 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2114 /* set the stream id */
2115 snd_hda_codec_write(codec,
2116 nvhdmi_con_nids_7x[i],
2118 AC_VERB_SET_CHANNEL_STREAMID,
2119 (stream_tag << 4) | channel_id);
2120 /* set the stream format */
2121 snd_hda_codec_write(codec,
2122 nvhdmi_con_nids_7x[i],
2124 AC_VERB_SET_STREAM_FORMAT,
2126 /* turn on again (if needed) */
2127 /* enable and set the channel status audio/data flag */
2128 if (codec->spdif_status_reset &&
2129 (spdif->ctls & AC_DIG1_ENABLE)) {
2130 snd_hda_codec_write(codec,
2131 nvhdmi_con_nids_7x[i],
2133 AC_VERB_SET_DIGI_CONVERT_1,
2134 spdif->ctls & 0xff);
2135 snd_hda_codec_write(codec,
2136 nvhdmi_con_nids_7x[i],
2138 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2142 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2144 mutex_unlock(&codec->spdif_mutex);
2148 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2152 .nid = nvhdmi_master_con_nid_7x,
2153 .rates = SUPPORTED_RATES,
2154 .maxbps = SUPPORTED_MAXBPS,
2155 .formats = SUPPORTED_FORMATS,
2157 .open = simple_playback_pcm_open,
2158 .close = nvhdmi_8ch_7x_pcm_close,
2159 .prepare = nvhdmi_8ch_7x_pcm_prepare
2163 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2165 struct hdmi_spec *spec;
2166 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2167 nvhdmi_master_pin_nid_7x);
2171 codec->patch_ops.init = nvhdmi_7x_init_2ch;
2172 /* override the PCM rates, etc, as the codec doesn't give full list */
2174 spec->pcm_playback.rates = SUPPORTED_RATES;
2175 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2176 spec->pcm_playback.formats = SUPPORTED_FORMATS;
2180 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2182 struct hdmi_spec *spec = codec->spec;
2183 int err = simple_playback_build_pcms(codec);
2184 spec->pcm_rec[0].own_chmap = true;
2188 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2190 struct hdmi_spec *spec = codec->spec;
2191 struct snd_pcm_chmap *chmap;
2194 err = simple_playback_build_controls(codec);
2198 /* add channel maps */
2199 err = snd_pcm_add_chmap_ctls(spec->pcm_rec[0].pcm,
2200 SNDRV_PCM_STREAM_PLAYBACK,
2201 snd_pcm_alt_chmaps, 8, 0, &chmap);
2204 switch (codec->preset->id) {
2209 chmap->channel_mask = (1U << 2) | (1U << 8);
2212 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2217 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2219 struct hdmi_spec *spec;
2220 int err = patch_nvhdmi_2ch(codec);
2224 spec->multiout.max_channels = 8;
2225 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2226 codec->patch_ops.init = nvhdmi_7x_init_8ch;
2227 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2228 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2230 /* Initialize the audio infoframe channel mask and checksum to something
2232 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2238 * ATI-specific implementations
2240 * FIXME: we may omit the whole this and use the generic code once after
2241 * it's confirmed to work.
2244 #define ATIHDMI_CVT_NID 0x02 /* audio converter */
2245 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
2247 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2248 struct hda_codec *codec,
2249 unsigned int stream_tag,
2250 unsigned int format,
2251 struct snd_pcm_substream *substream)
2253 struct hdmi_spec *spec = codec->spec;
2254 int chans = substream->runtime->channels;
2257 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
2261 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
2262 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
2264 for (i = 0; i < chans; i++) {
2265 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
2266 AC_VERB_SET_HDMI_CHAN_SLOT,
2272 static int patch_atihdmi(struct hda_codec *codec)
2274 struct hdmi_spec *spec;
2275 int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
2279 spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
2283 /* VIA HDMI Implementation */
2284 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
2285 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
2287 static int patch_via_hdmi(struct hda_codec *codec)
2289 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
2295 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
2296 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
2297 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
2298 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
2299 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
2300 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
2301 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
2302 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
2303 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2304 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2305 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2306 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2307 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
2308 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
2309 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
2310 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
2311 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
2312 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
2313 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
2314 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
2315 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
2316 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
2317 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
2318 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
2319 /* 17 is known to be absent */
2320 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
2321 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
2322 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
2323 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
2324 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
2325 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
2326 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
2327 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
2328 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
2329 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
2330 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
2331 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
2332 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
2333 { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2334 { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2335 { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2336 { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2337 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2338 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
2339 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
2340 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
2341 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2342 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
2343 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
2344 { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
2345 { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
2346 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
2350 MODULE_ALIAS("snd-hda-codec-id:1002793c");
2351 MODULE_ALIAS("snd-hda-codec-id:10027919");
2352 MODULE_ALIAS("snd-hda-codec-id:1002791a");
2353 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
2354 MODULE_ALIAS("snd-hda-codec-id:10951390");
2355 MODULE_ALIAS("snd-hda-codec-id:10951392");
2356 MODULE_ALIAS("snd-hda-codec-id:10de0002");
2357 MODULE_ALIAS("snd-hda-codec-id:10de0003");
2358 MODULE_ALIAS("snd-hda-codec-id:10de0005");
2359 MODULE_ALIAS("snd-hda-codec-id:10de0006");
2360 MODULE_ALIAS("snd-hda-codec-id:10de0007");
2361 MODULE_ALIAS("snd-hda-codec-id:10de000a");
2362 MODULE_ALIAS("snd-hda-codec-id:10de000b");
2363 MODULE_ALIAS("snd-hda-codec-id:10de000c");
2364 MODULE_ALIAS("snd-hda-codec-id:10de000d");
2365 MODULE_ALIAS("snd-hda-codec-id:10de0010");
2366 MODULE_ALIAS("snd-hda-codec-id:10de0011");
2367 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2368 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2369 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2370 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2371 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2372 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2373 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2374 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2375 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2376 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2377 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2378 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2379 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2380 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2381 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2382 MODULE_ALIAS("snd-hda-codec-id:10de0051");
2383 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2384 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2385 MODULE_ALIAS("snd-hda-codec-id:11069f80");
2386 MODULE_ALIAS("snd-hda-codec-id:11069f81");
2387 MODULE_ALIAS("snd-hda-codec-id:11069f84");
2388 MODULE_ALIAS("snd-hda-codec-id:11069f85");
2389 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2390 MODULE_ALIAS("snd-hda-codec-id:80860054");
2391 MODULE_ALIAS("snd-hda-codec-id:80862801");
2392 MODULE_ALIAS("snd-hda-codec-id:80862802");
2393 MODULE_ALIAS("snd-hda-codec-id:80862803");
2394 MODULE_ALIAS("snd-hda-codec-id:80862804");
2395 MODULE_ALIAS("snd-hda-codec-id:80862805");
2396 MODULE_ALIAS("snd-hda-codec-id:80862806");
2397 MODULE_ALIAS("snd-hda-codec-id:80862807");
2398 MODULE_ALIAS("snd-hda-codec-id:80862880");
2399 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2401 MODULE_LICENSE("GPL");
2402 MODULE_DESCRIPTION("HDMI HD-audio codec");
2403 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2404 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2405 MODULE_ALIAS("snd-hda-codec-atihdmi");
2407 static struct hda_codec_preset_list intel_list = {
2408 .preset = snd_hda_preset_hdmi,
2409 .owner = THIS_MODULE,
2412 static int __init patch_hdmi_init(void)
2414 return snd_hda_add_codec_preset(&intel_list);
2417 static void __exit patch_hdmi_exit(void)
2419 snd_hda_delete_codec_preset(&intel_list);
2422 module_init(patch_hdmi_init)
2423 module_exit(patch_hdmi_exit)