3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
11 * Wu Fengguang <wfg@linux.intel.com>
14 * Wu Fengguang <wfg@linux.intel.com>
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the Free
18 * Software Foundation; either version 2 of the License, or (at your option)
21 * This program is distributed in the hope that it will be useful, but
22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software Foundation,
28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include <sound/asoundef.h>
38 #include <sound/tlv.h>
39 #include "hda_codec.h"
40 #include "hda_local.h"
43 static bool static_hdmi_pcm;
44 module_param(static_hdmi_pcm, bool, 0644);
45 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
47 #define is_haswell(codec) ((codec)->vendor_id == 0x80862807)
49 struct hdmi_spec_per_cvt {
52 unsigned int channels_min;
53 unsigned int channels_max;
59 /* max. connections to a widget */
60 #define HDA_MAX_CONNECTIONS 32
62 struct hdmi_spec_per_pin {
65 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
68 struct hda_codec *codec;
69 struct hdmi_eld sink_eld;
70 struct delayed_work work;
71 struct snd_kcontrol *eld_ctl;
73 bool setup; /* the stream has been set up by prepare callback */
74 int channels; /* current number of channels */
76 bool chmap_set; /* channel-map override by ALSA API? */
77 unsigned char chmap[8]; /* ALSA API channel-map */
78 char pcm_name[8]; /* filled in build_pcm callbacks */
83 struct snd_array cvts; /* struct hdmi_spec_per_cvt */
84 hda_nid_t cvt_nids[4]; /* only for haswell fix */
87 struct snd_array pins; /* struct hdmi_spec_per_pin */
88 struct snd_array pcm_rec; /* struct hda_pcm */
89 unsigned int channels_max; /* max over all cvts */
91 struct hdmi_eld temp_eld;
93 * Non-generic ATI/NVIDIA specific
95 struct hda_multi_out multiout;
96 struct hda_pcm_stream pcm_playback;
100 struct hdmi_audio_infoframe {
107 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
111 u8 LFEPBL01_LSV36_DM_INH7;
114 struct dp_audio_infoframe {
117 u8 ver; /* 0x11 << 2 */
119 u8 CC02_CT47; /* match with HDMI infoframe from this on */
123 u8 LFEPBL01_LSV36_DM_INH7;
126 union audio_infoframe {
127 struct hdmi_audio_infoframe hdmi;
128 struct dp_audio_infoframe dp;
133 * CEA speaker placement:
136 * FLW FL FLC FC FRC FR FRW
143 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
144 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
146 enum cea_speaker_placement {
147 FL = (1 << 0), /* Front Left */
148 FC = (1 << 1), /* Front Center */
149 FR = (1 << 2), /* Front Right */
150 FLC = (1 << 3), /* Front Left Center */
151 FRC = (1 << 4), /* Front Right Center */
152 RL = (1 << 5), /* Rear Left */
153 RC = (1 << 6), /* Rear Center */
154 RR = (1 << 7), /* Rear Right */
155 RLC = (1 << 8), /* Rear Left Center */
156 RRC = (1 << 9), /* Rear Right Center */
157 LFE = (1 << 10), /* Low Frequency Effect */
158 FLW = (1 << 11), /* Front Left Wide */
159 FRW = (1 << 12), /* Front Right Wide */
160 FLH = (1 << 13), /* Front Left High */
161 FCH = (1 << 14), /* Front Center High */
162 FRH = (1 << 15), /* Front Right High */
163 TC = (1 << 16), /* Top Center */
167 * ELD SA bits in the CEA Speaker Allocation data block
169 static int eld_speaker_allocation_bits[] = {
177 /* the following are not defined in ELD yet */
184 struct cea_channel_speaker_allocation {
188 /* derived values, just for convenience */
196 * surround40 surround41 surround50 surround51 surround71
197 * ch0 front left = = = =
198 * ch1 front right = = = =
199 * ch2 rear left = = = =
200 * ch3 rear right = = = =
201 * ch4 LFE center center center
206 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
208 static int hdmi_channel_mapping[0x32][8] = {
210 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
212 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
214 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
216 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
218 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
220 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
222 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
224 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
226 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
230 * This is an ordered list!
232 * The preceding ones have better chances to be selected by
233 * hdmi_channel_allocation().
235 static struct cea_channel_speaker_allocation channel_allocations[] = {
236 /* channel: 7 6 5 4 3 2 1 0 */
237 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
239 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
241 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
243 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
245 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
247 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
249 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
251 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
253 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
255 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
256 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
257 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
258 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
259 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
260 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
261 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
262 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
263 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
264 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
265 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
266 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
267 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
268 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
269 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
270 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
271 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
272 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
273 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
274 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
275 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
276 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
277 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
278 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
279 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
280 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
281 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
282 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
283 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
284 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
285 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
286 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
287 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
288 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
289 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
290 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
291 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
292 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
293 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
294 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
295 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
303 #define get_pin(spec, idx) \
304 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
305 #define get_cvt(spec, idx) \
306 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
307 #define get_pcm_rec(spec, idx) \
308 ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
310 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
314 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
315 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
318 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
322 static int hinfo_to_pin_index(struct hdmi_spec *spec,
323 struct hda_pcm_stream *hinfo)
327 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
328 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
331 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
335 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
339 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
340 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
343 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
347 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
348 struct snd_ctl_elem_info *uinfo)
350 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
351 struct hdmi_spec *spec = codec->spec;
352 struct hdmi_eld *eld;
355 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
357 pin_idx = kcontrol->private_value;
358 eld = &get_pin(spec, pin_idx)->sink_eld;
360 mutex_lock(&eld->lock);
361 uinfo->count = eld->eld_valid ? eld->eld_size : 0;
362 mutex_unlock(&eld->lock);
367 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
368 struct snd_ctl_elem_value *ucontrol)
370 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
371 struct hdmi_spec *spec = codec->spec;
372 struct hdmi_eld *eld;
375 pin_idx = kcontrol->private_value;
376 eld = &get_pin(spec, pin_idx)->sink_eld;
378 mutex_lock(&eld->lock);
379 if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
380 mutex_unlock(&eld->lock);
385 memset(ucontrol->value.bytes.data, 0,
386 ARRAY_SIZE(ucontrol->value.bytes.data));
388 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
390 mutex_unlock(&eld->lock);
395 static struct snd_kcontrol_new eld_bytes_ctl = {
396 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
397 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
399 .info = hdmi_eld_ctl_info,
400 .get = hdmi_eld_ctl_get,
403 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
406 struct snd_kcontrol *kctl;
407 struct hdmi_spec *spec = codec->spec;
410 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
413 kctl->private_value = pin_idx;
414 kctl->id.device = device;
416 err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
420 get_pin(spec, pin_idx)->eld_ctl = kctl;
425 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
426 int *packet_index, int *byte_index)
430 val = snd_hda_codec_read(codec, pin_nid, 0,
431 AC_VERB_GET_HDMI_DIP_INDEX, 0);
433 *packet_index = val >> 5;
434 *byte_index = val & 0x1f;
438 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
439 int packet_index, int byte_index)
443 val = (packet_index << 5) | (byte_index & 0x1f);
445 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
448 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
451 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
454 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
457 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
458 snd_hda_codec_write(codec, pin_nid, 0,
459 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
460 /* Enable pin out: some machines with GM965 gets broken output when
461 * the pin is disabled or changed while using with HDMI
463 snd_hda_codec_write(codec, pin_nid, 0,
464 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
467 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
469 return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
470 AC_VERB_GET_CVT_CHAN_COUNT, 0);
473 static void hdmi_set_channel_count(struct hda_codec *codec,
474 hda_nid_t cvt_nid, int chs)
476 if (chs != hdmi_get_channel_count(codec, cvt_nid))
477 snd_hda_codec_write(codec, cvt_nid, 0,
478 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
483 * Channel mapping routines
487 * Compute derived values in channel_allocations[].
489 static void init_channel_allocations(void)
492 struct cea_channel_speaker_allocation *p;
494 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
495 p = channel_allocations + i;
498 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
499 if (p->speakers[j]) {
501 p->spk_mask |= p->speakers[j];
506 static int get_channel_allocation_order(int ca)
510 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
511 if (channel_allocations[i].ca_index == ca)
518 * The transformation takes two steps:
520 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
521 * spk_mask => (channel_allocations[]) => ai->CA
523 * TODO: it could select the wrong CA from multiple candidates.
525 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
530 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
533 * CA defaults to 0 for basic stereo audio
539 * expand ELD's speaker allocation mask
541 * ELD tells the speaker mask in a compact(paired) form,
542 * expand ELD's notions to match the ones used by Audio InfoFrame.
544 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
545 if (eld->info.spk_alloc & (1 << i))
546 spk_mask |= eld_speaker_allocation_bits[i];
549 /* search for the first working match in the CA table */
550 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
551 if (channels == channel_allocations[i].channels &&
552 (spk_mask & channel_allocations[i].spk_mask) ==
553 channel_allocations[i].spk_mask) {
554 ca = channel_allocations[i].ca_index;
560 /* if there was no match, select the regular ALSA channel
561 * allocation with the matching number of channels */
562 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
563 if (channels == channel_allocations[i].channels) {
564 ca = channel_allocations[i].ca_index;
570 snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
571 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
577 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
580 #ifdef CONFIG_SND_DEBUG_VERBOSE
584 for (i = 0; i < 8; i++) {
585 slot = snd_hda_codec_read(codec, pin_nid, 0,
586 AC_VERB_GET_HDMI_CHAN_SLOT, i);
587 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
588 slot >> 4, slot & 0xf);
594 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
599 struct cea_channel_speaker_allocation *ch_alloc;
603 int non_pcm_mapping[8];
605 order = get_channel_allocation_order(ca);
606 ch_alloc = &channel_allocations[order];
608 if (hdmi_channel_mapping[ca][1] == 0) {
610 /* fill actual channel mappings in ALSA channel (i) order */
611 for (i = 0; i < ch_alloc->channels; i++) {
612 while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
613 hdmi_slot++; /* skip zero slots */
615 hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
617 /* fill the rest of the slots with ALSA channel 0xf */
618 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
619 if (!ch_alloc->speakers[7 - hdmi_slot])
620 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
624 for (i = 0; i < ch_alloc->channels; i++)
625 non_pcm_mapping[i] = (i << 4) | i;
627 non_pcm_mapping[i] = (0xf << 4) | i;
630 for (i = 0; i < 8; i++) {
631 err = snd_hda_codec_write(codec, pin_nid, 0,
632 AC_VERB_SET_HDMI_CHAN_SLOT,
633 non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
635 snd_printdd(KERN_NOTICE
636 "HDMI: channel mapping failed\n");
641 hdmi_debug_channel_mapping(codec, pin_nid);
644 struct channel_map_table {
645 unsigned char map; /* ALSA API channel map position */
646 int spk_mask; /* speaker position bit mask */
649 static struct channel_map_table map_tables[] = {
650 { SNDRV_CHMAP_FL, FL },
651 { SNDRV_CHMAP_FR, FR },
652 { SNDRV_CHMAP_RL, RL },
653 { SNDRV_CHMAP_RR, RR },
654 { SNDRV_CHMAP_LFE, LFE },
655 { SNDRV_CHMAP_FC, FC },
656 { SNDRV_CHMAP_RLC, RLC },
657 { SNDRV_CHMAP_RRC, RRC },
658 { SNDRV_CHMAP_RC, RC },
659 { SNDRV_CHMAP_FLC, FLC },
660 { SNDRV_CHMAP_FRC, FRC },
661 { SNDRV_CHMAP_FLH, FLH },
662 { SNDRV_CHMAP_FRH, FRH },
663 { SNDRV_CHMAP_FLW, FLW },
664 { SNDRV_CHMAP_FRW, FRW },
665 { SNDRV_CHMAP_TC, TC },
666 { SNDRV_CHMAP_FCH, FCH },
670 /* from ALSA API channel position to speaker bit mask */
671 static int to_spk_mask(unsigned char c)
673 struct channel_map_table *t = map_tables;
674 for (; t->map; t++) {
681 /* from ALSA API channel position to CEA slot */
682 static int to_cea_slot(int ordered_ca, unsigned char pos)
684 int mask = to_spk_mask(pos);
688 for (i = 0; i < 8; i++) {
689 if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
697 /* from speaker bit mask to ALSA API channel position */
698 static int spk_to_chmap(int spk)
700 struct channel_map_table *t = map_tables;
701 for (; t->map; t++) {
702 if (t->spk_mask == spk)
708 /* from CEA slot to ALSA API channel position */
709 static int from_cea_slot(int ordered_ca, unsigned char slot)
711 int mask = channel_allocations[ordered_ca].speakers[7 - slot];
713 return spk_to_chmap(mask);
716 /* get the CA index corresponding to the given ALSA API channel map */
717 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
719 int i, spks = 0, spk_mask = 0;
721 for (i = 0; i < chs; i++) {
722 int mask = to_spk_mask(map[i]);
729 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
730 if ((chs == channel_allocations[i].channels ||
731 spks == channel_allocations[i].channels) &&
732 (spk_mask & channel_allocations[i].spk_mask) ==
733 channel_allocations[i].spk_mask)
734 return channel_allocations[i].ca_index;
739 /* set up the channel slots for the given ALSA API channel map */
740 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
742 int chs, unsigned char *map,
745 int ordered_ca = get_channel_allocation_order(ca);
746 int alsa_pos, hdmi_slot;
747 int assignments[8] = {[0 ... 7] = 0xf};
749 for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
751 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
754 continue; /* unassigned channel */
756 assignments[hdmi_slot] = alsa_pos;
759 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
762 val = (assignments[hdmi_slot] << 4) | hdmi_slot;
763 err = snd_hda_codec_write(codec, pin_nid, 0,
764 AC_VERB_SET_HDMI_CHAN_SLOT, val);
771 /* store ALSA API channel map from the current default map */
772 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
775 int ordered_ca = get_channel_allocation_order(ca);
776 for (i = 0; i < 8; i++) {
777 if (i < channel_allocations[ordered_ca].channels)
778 map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
784 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
785 hda_nid_t pin_nid, bool non_pcm, int ca,
786 int channels, unsigned char *map,
789 if (!non_pcm && chmap_set) {
790 hdmi_manual_setup_channel_mapping(codec, pin_nid,
793 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
794 hdmi_setup_fake_chmap(map, ca);
799 * Audio InfoFrame routines
803 * Enable Audio InfoFrame Transmission
805 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
808 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
809 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
814 * Disable Audio InfoFrame Transmission
816 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
819 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
820 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
824 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
826 #ifdef CONFIG_SND_DEBUG_VERBOSE
830 size = snd_hdmi_get_eld_size(codec, pin_nid);
831 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
833 for (i = 0; i < 8; i++) {
834 size = snd_hda_codec_read(codec, pin_nid, 0,
835 AC_VERB_GET_HDMI_DIP_SIZE, i);
836 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
841 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
847 for (i = 0; i < 8; i++) {
848 size = snd_hda_codec_read(codec, pin_nid, 0,
849 AC_VERB_GET_HDMI_DIP_SIZE, i);
853 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
854 for (j = 1; j < 1000; j++) {
855 hdmi_write_dip_byte(codec, pin_nid, 0x0);
856 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
858 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
860 if (bi == 0) /* byte index wrapped around */
864 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
870 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
872 u8 *bytes = (u8 *)hdmi_ai;
876 hdmi_ai->checksum = 0;
878 for (i = 0; i < sizeof(*hdmi_ai); i++)
881 hdmi_ai->checksum = -sum;
884 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
890 hdmi_debug_dip_size(codec, pin_nid);
891 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
893 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
894 for (i = 0; i < size; i++)
895 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
898 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
904 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
908 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
909 for (i = 0; i < size; i++) {
910 val = snd_hda_codec_read(codec, pin_nid, 0,
911 AC_VERB_GET_HDMI_DIP_DATA, 0);
919 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
920 struct hdmi_spec_per_pin *per_pin,
923 hda_nid_t pin_nid = per_pin->pin_nid;
924 int channels = per_pin->channels;
926 struct hdmi_eld *eld;
928 union audio_infoframe ai;
933 if (is_haswell(codec))
934 snd_hda_codec_write(codec, pin_nid, 0,
935 AC_VERB_SET_AMP_GAIN_MUTE,
938 eld = &per_pin->sink_eld;
939 if (!eld->monitor_present)
942 if (!non_pcm && per_pin->chmap_set)
943 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
945 ca = hdmi_channel_allocation(eld, channels);
949 ordered_ca = get_channel_allocation_order(ca);
950 active_channels = channel_allocations[ordered_ca].channels;
952 hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
954 memset(&ai, 0, sizeof(ai));
955 if (eld->info.conn_type == 0) { /* HDMI */
956 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
958 hdmi_ai->type = 0x84;
961 hdmi_ai->CC02_CT47 = active_channels - 1;
963 hdmi_checksum_audio_infoframe(hdmi_ai);
964 } else if (eld->info.conn_type == 1) { /* DisplayPort */
965 struct dp_audio_infoframe *dp_ai = &ai.dp;
969 dp_ai->ver = 0x11 << 2;
970 dp_ai->CC02_CT47 = active_channels - 1;
973 snd_printd("HDMI: unknown connection type at pin %d\n",
979 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
980 * sizeof(*dp_ai) to avoid partial match/update problems when
981 * the user switches between HDMI/DP monitors.
983 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
985 snd_printdd("hdmi_setup_audio_infoframe: "
986 "pin=%d channels=%d\n",
989 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
990 channels, per_pin->chmap,
992 hdmi_stop_infoframe_trans(codec, pin_nid);
993 hdmi_fill_audio_infoframe(codec, pin_nid,
994 ai.bytes, sizeof(ai));
995 hdmi_start_infoframe_trans(codec, pin_nid);
997 /* For non-pcm audio switch, setup new channel mapping
999 if (per_pin->non_pcm != non_pcm)
1000 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1001 channels, per_pin->chmap,
1002 per_pin->chmap_set);
1005 per_pin->non_pcm = non_pcm;
1010 * Unsolicited events
1013 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1015 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1017 struct hdmi_spec *spec = codec->spec;
1018 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1021 struct hda_jack_tbl *jack;
1022 int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1024 jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1027 pin_nid = jack->nid;
1028 jack->jack_dirty = 1;
1030 _snd_printd(SND_PR_VERBOSE,
1031 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1032 codec->addr, pin_nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1033 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1035 pin_idx = pin_nid_to_pin_index(spec, pin_nid);
1039 hdmi_present_sense(get_pin(spec, pin_idx), 1);
1040 snd_hda_jack_report_sync(codec);
1043 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1045 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1046 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1047 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1048 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1051 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1066 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1068 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1069 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1071 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1072 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
1077 hdmi_intrinsic_event(codec, res);
1079 hdmi_non_intrinsic_event(codec, res);
1082 static void haswell_verify_D0(struct hda_codec *codec,
1083 hda_nid_t cvt_nid, hda_nid_t nid)
1087 /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1088 * thus pins could only choose converter 0 for use. Make sure the
1089 * converters are in correct power state */
1090 if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1091 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1093 if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1094 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1097 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1098 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1099 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1107 /* HBR should be Non-PCM, 8 channels */
1108 #define is_hbr_format(format) \
1109 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1111 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1112 hda_nid_t pin_nid, u32 stream_tag, int format)
1117 if (is_haswell(codec))
1118 haswell_verify_D0(codec, cvt_nid, pin_nid);
1120 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1121 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1122 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1124 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1125 if (is_hbr_format(format))
1126 new_pinctl |= AC_PINCTL_EPT_HBR;
1128 new_pinctl |= AC_PINCTL_EPT_NATIVE;
1130 snd_printdd("hdmi_setup_stream: "
1131 "NID=0x%x, %spinctl=0x%x\n",
1133 pinctl == new_pinctl ? "" : "new-",
1136 if (pinctl != new_pinctl)
1137 snd_hda_codec_write(codec, pin_nid, 0,
1138 AC_VERB_SET_PIN_WIDGET_CONTROL,
1142 if (is_hbr_format(format) && !new_pinctl) {
1143 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1147 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1151 static int hdmi_choose_cvt(struct hda_codec *codec,
1152 int pin_idx, int *cvt_id, int *mux_id)
1154 struct hdmi_spec *spec = codec->spec;
1155 struct hdmi_spec_per_pin *per_pin;
1156 struct hdmi_spec_per_cvt *per_cvt = NULL;
1157 int cvt_idx, mux_idx = 0;
1159 per_pin = get_pin(spec, pin_idx);
1161 /* Dynamically assign converter to stream */
1162 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1163 per_cvt = get_cvt(spec, cvt_idx);
1165 /* Must not already be assigned */
1166 if (per_cvt->assigned)
1168 /* Must be in pin's mux's list of converters */
1169 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1170 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1172 /* Not in mux list */
1173 if (mux_idx == per_pin->num_mux_nids)
1178 /* No free converters */
1179 if (cvt_idx == spec->num_cvts)
1190 static void haswell_config_cvts(struct hda_codec *codec,
1191 hda_nid_t pin_nid, int mux_idx)
1193 struct hdmi_spec *spec = codec->spec;
1194 hda_nid_t nid, end_nid;
1196 struct hdmi_spec_per_cvt *per_cvt;
1198 /* configure all pins, including "no physical connection" ones */
1199 end_nid = codec->start_nid + codec->num_nodes;
1200 for (nid = codec->start_nid; nid < end_nid; nid++) {
1201 unsigned int wid_caps = get_wcaps(codec, nid);
1202 unsigned int wid_type = get_wcaps_type(wid_caps);
1204 if (wid_type != AC_WID_PIN)
1210 curr = snd_hda_codec_read(codec, nid, 0,
1211 AC_VERB_GET_CONNECT_SEL, 0);
1212 if (curr != mux_idx)
1215 /* choose an unassigned converter. The conveters in the
1216 * connection list are in the same order as in the codec.
1218 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1219 per_cvt = get_cvt(spec, cvt_idx);
1220 if (!per_cvt->assigned) {
1221 snd_printdd("choose cvt %d for pin nid %d\n",
1223 snd_hda_codec_write_cache(codec, nid, 0,
1224 AC_VERB_SET_CONNECT_SEL,
1235 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1236 struct hda_codec *codec,
1237 struct snd_pcm_substream *substream)
1239 struct hdmi_spec *spec = codec->spec;
1240 struct snd_pcm_runtime *runtime = substream->runtime;
1241 int pin_idx, cvt_idx, mux_idx = 0;
1242 struct hdmi_spec_per_pin *per_pin;
1243 struct hdmi_eld *eld;
1244 struct hdmi_spec_per_cvt *per_cvt = NULL;
1247 /* Validate hinfo */
1248 pin_idx = hinfo_to_pin_index(spec, hinfo);
1249 if (snd_BUG_ON(pin_idx < 0))
1251 per_pin = get_pin(spec, pin_idx);
1252 eld = &per_pin->sink_eld;
1254 err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1258 per_cvt = get_cvt(spec, cvt_idx);
1259 /* Claim converter */
1260 per_cvt->assigned = 1;
1261 per_pin->cvt_nid = per_cvt->cvt_nid;
1262 hinfo->nid = per_cvt->cvt_nid;
1264 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1265 AC_VERB_SET_CONNECT_SEL,
1268 /* configure unused pins to choose other converters */
1269 if (is_haswell(codec))
1270 haswell_config_cvts(codec, per_pin->pin_nid, mux_idx);
1272 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1274 /* Initially set the converter's capabilities */
1275 hinfo->channels_min = per_cvt->channels_min;
1276 hinfo->channels_max = per_cvt->channels_max;
1277 hinfo->rates = per_cvt->rates;
1278 hinfo->formats = per_cvt->formats;
1279 hinfo->maxbps = per_cvt->maxbps;
1281 /* Restrict capabilities by ELD if this isn't disabled */
1282 if (!static_hdmi_pcm && eld->eld_valid) {
1283 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1284 if (hinfo->channels_min > hinfo->channels_max ||
1285 !hinfo->rates || !hinfo->formats) {
1286 per_cvt->assigned = 0;
1288 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1293 /* Store the updated parameters */
1294 runtime->hw.channels_min = hinfo->channels_min;
1295 runtime->hw.channels_max = hinfo->channels_max;
1296 runtime->hw.formats = hinfo->formats;
1297 runtime->hw.rates = hinfo->rates;
1299 snd_pcm_hw_constraint_step(substream->runtime, 0,
1300 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1305 * HDA/HDMI auto parsing
1307 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1309 struct hdmi_spec *spec = codec->spec;
1310 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1311 hda_nid_t pin_nid = per_pin->pin_nid;
1313 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1314 snd_printk(KERN_WARNING
1315 "HDMI: pin %d wcaps %#x "
1316 "does not support connection list\n",
1317 pin_nid, get_wcaps(codec, pin_nid));
1321 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1323 HDA_MAX_CONNECTIONS);
1328 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1330 struct hda_codec *codec = per_pin->codec;
1331 struct hdmi_spec *spec = codec->spec;
1332 struct hdmi_eld *eld = &spec->temp_eld;
1333 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1334 hda_nid_t pin_nid = per_pin->pin_nid;
1336 * Always execute a GetPinSense verb here, even when called from
1337 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1338 * response's PD bit is not the real PD value, but indicates that
1339 * the real PD value changed. An older version of the HD-audio
1340 * specification worked this way. Hence, we just ignore the data in
1341 * the unsolicited response to avoid custom WARs.
1343 int present = snd_hda_pin_sense(codec, pin_nid);
1344 bool update_eld = false;
1345 bool eld_changed = false;
1347 pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1348 if (pin_eld->monitor_present)
1349 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
1351 eld->eld_valid = false;
1353 _snd_printd(SND_PR_VERBOSE,
1354 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1355 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1357 if (eld->eld_valid) {
1358 if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer,
1359 &eld->eld_size) < 0)
1360 eld->eld_valid = false;
1362 memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1363 if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1365 eld->eld_valid = false;
1368 if (eld->eld_valid) {
1369 snd_hdmi_show_eld(&eld->info);
1373 queue_delayed_work(codec->bus->workq,
1375 msecs_to_jiffies(300));
1380 mutex_lock(&pin_eld->lock);
1381 if (pin_eld->eld_valid && !eld->eld_valid) {
1386 bool old_eld_valid = pin_eld->eld_valid;
1387 pin_eld->eld_valid = eld->eld_valid;
1388 eld_changed = pin_eld->eld_size != eld->eld_size ||
1389 memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1390 eld->eld_size) != 0;
1392 memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1394 pin_eld->eld_size = eld->eld_size;
1395 pin_eld->info = eld->info;
1397 /* Haswell-specific workaround: re-setup when the transcoder is
1398 * changed during the stream playback
1400 if (is_haswell(codec) &&
1401 eld->eld_valid && !old_eld_valid && per_pin->setup)
1402 hdmi_setup_audio_infoframe(codec, per_pin,
1405 mutex_unlock(&pin_eld->lock);
1408 snd_ctl_notify(codec->bus->card,
1409 SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1410 &per_pin->eld_ctl->id);
1413 static void hdmi_repoll_eld(struct work_struct *work)
1415 struct hdmi_spec_per_pin *per_pin =
1416 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1418 if (per_pin->repoll_count++ > 6)
1419 per_pin->repoll_count = 0;
1421 hdmi_present_sense(per_pin, per_pin->repoll_count);
1424 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1427 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1429 struct hdmi_spec *spec = codec->spec;
1430 unsigned int caps, config;
1432 struct hdmi_spec_per_pin *per_pin;
1435 caps = snd_hda_query_pin_caps(codec, pin_nid);
1436 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1439 config = snd_hda_codec_get_pincfg(codec, pin_nid);
1440 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1443 if (is_haswell(codec))
1444 intel_haswell_fixup_connect_list(codec, pin_nid);
1446 pin_idx = spec->num_pins;
1447 per_pin = snd_array_new(&spec->pins);
1451 per_pin->pin_nid = pin_nid;
1452 per_pin->non_pcm = false;
1454 err = hdmi_read_pin_conn(codec, pin_idx);
1463 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1465 struct hdmi_spec *spec = codec->spec;
1466 struct hdmi_spec_per_cvt *per_cvt;
1470 chans = get_wcaps(codec, cvt_nid);
1471 chans = get_wcaps_channels(chans);
1473 per_cvt = snd_array_new(&spec->cvts);
1477 per_cvt->cvt_nid = cvt_nid;
1478 per_cvt->channels_min = 2;
1480 per_cvt->channels_max = chans;
1481 if (chans > spec->channels_max)
1482 spec->channels_max = chans;
1485 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1492 if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1493 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1499 static int hdmi_parse_codec(struct hda_codec *codec)
1504 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1505 if (!nid || nodes < 0) {
1506 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1510 for (i = 0; i < nodes; i++, nid++) {
1514 caps = get_wcaps(codec, nid);
1515 type = get_wcaps_type(caps);
1517 if (!(caps & AC_WCAP_DIGITAL))
1521 case AC_WID_AUD_OUT:
1522 hdmi_add_cvt(codec, nid);
1525 hdmi_add_pin(codec, nid);
1531 /* We're seeing some problems with unsolicited hot plug events on
1532 * PantherPoint after S3, if this is not enabled */
1533 if (codec->vendor_id == 0x80862806)
1534 codec->bus->power_keep_link_on = 1;
1536 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1537 * can be lost and presence sense verb will become inaccurate if the
1538 * HDA link is powered off at hot plug or hw initialization time.
1540 else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1542 codec->bus->power_keep_link_on = 1;
1550 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1552 struct hda_spdif_out *spdif;
1555 mutex_lock(&codec->spdif_mutex);
1556 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1557 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1558 mutex_unlock(&codec->spdif_mutex);
1567 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1568 struct hda_codec *codec,
1569 unsigned int stream_tag,
1570 unsigned int format,
1571 struct snd_pcm_substream *substream)
1573 hda_nid_t cvt_nid = hinfo->nid;
1574 struct hdmi_spec *spec = codec->spec;
1575 int pin_idx = hinfo_to_pin_index(spec, hinfo);
1576 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1577 hda_nid_t pin_nid = per_pin->pin_nid;
1580 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1581 per_pin->channels = substream->runtime->channels;
1582 per_pin->setup = true;
1584 hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1586 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1589 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1590 struct hda_codec *codec,
1591 struct snd_pcm_substream *substream)
1593 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1597 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1598 struct hda_codec *codec,
1599 struct snd_pcm_substream *substream)
1601 struct hdmi_spec *spec = codec->spec;
1602 int cvt_idx, pin_idx;
1603 struct hdmi_spec_per_cvt *per_cvt;
1604 struct hdmi_spec_per_pin *per_pin;
1607 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1608 if (snd_BUG_ON(cvt_idx < 0))
1610 per_cvt = get_cvt(spec, cvt_idx);
1612 snd_BUG_ON(!per_cvt->assigned);
1613 per_cvt->assigned = 0;
1616 pin_idx = hinfo_to_pin_index(spec, hinfo);
1617 if (snd_BUG_ON(pin_idx < 0))
1619 per_pin = get_pin(spec, pin_idx);
1621 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1622 per_pin->chmap_set = false;
1623 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1625 per_pin->setup = false;
1626 per_pin->channels = 0;
1632 static const struct hda_pcm_ops generic_ops = {
1633 .open = hdmi_pcm_open,
1634 .close = hdmi_pcm_close,
1635 .prepare = generic_hdmi_playback_pcm_prepare,
1636 .cleanup = generic_hdmi_playback_pcm_cleanup,
1640 * ALSA API channel-map control callbacks
1642 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1643 struct snd_ctl_elem_info *uinfo)
1645 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1646 struct hda_codec *codec = info->private_data;
1647 struct hdmi_spec *spec = codec->spec;
1648 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1649 uinfo->count = spec->channels_max;
1650 uinfo->value.integer.min = 0;
1651 uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1655 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1656 unsigned int size, unsigned int __user *tlv)
1658 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1659 struct hda_codec *codec = info->private_data;
1660 struct hdmi_spec *spec = codec->spec;
1661 unsigned int __user *dst;
1666 if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1670 for (chs = 2; chs <= spec->channels_max; chs++) {
1672 struct cea_channel_speaker_allocation *cap;
1673 cap = channel_allocations;
1674 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1675 int chs_bytes = chs * 4;
1676 if (cap->channels != chs)
1680 if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
1681 put_user(chs_bytes, dst + 1))
1686 if (size < chs_bytes)
1690 for (c = 7; c >= 0; c--) {
1691 int spk = cap->speakers[c];
1694 if (put_user(spk_to_chmap(spk), dst))
1700 if (put_user(count, tlv + 1))
1705 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1706 struct snd_ctl_elem_value *ucontrol)
1708 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1709 struct hda_codec *codec = info->private_data;
1710 struct hdmi_spec *spec = codec->spec;
1711 int pin_idx = kcontrol->private_value;
1712 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1715 for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1716 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1720 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1721 struct snd_ctl_elem_value *ucontrol)
1723 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1724 struct hda_codec *codec = info->private_data;
1725 struct hdmi_spec *spec = codec->spec;
1726 int pin_idx = kcontrol->private_value;
1727 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1728 unsigned int ctl_idx;
1729 struct snd_pcm_substream *substream;
1730 unsigned char chmap[8];
1731 int i, ca, prepared = 0;
1733 ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1734 substream = snd_pcm_chmap_substream(info, ctl_idx);
1735 if (!substream || !substream->runtime)
1736 return 0; /* just for avoiding error from alsactl restore */
1737 switch (substream->runtime->status->state) {
1738 case SNDRV_PCM_STATE_OPEN:
1739 case SNDRV_PCM_STATE_SETUP:
1741 case SNDRV_PCM_STATE_PREPARED:
1747 memset(chmap, 0, sizeof(chmap));
1748 for (i = 0; i < ARRAY_SIZE(chmap); i++)
1749 chmap[i] = ucontrol->value.integer.value[i];
1750 if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1752 ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1755 per_pin->chmap_set = true;
1756 memcpy(per_pin->chmap, chmap, sizeof(chmap));
1758 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1763 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1765 struct hdmi_spec *spec = codec->spec;
1768 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1769 struct hda_pcm *info;
1770 struct hda_pcm_stream *pstr;
1771 struct hdmi_spec_per_pin *per_pin;
1773 per_pin = get_pin(spec, pin_idx);
1774 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
1775 info = snd_array_new(&spec->pcm_rec);
1778 info->name = per_pin->pcm_name;
1779 info->pcm_type = HDA_PCM_TYPE_HDMI;
1780 info->own_chmap = true;
1782 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1783 pstr->substreams = 1;
1784 pstr->ops = generic_ops;
1785 /* other pstr fields are set in open */
1788 codec->num_pcms = spec->num_pins;
1789 codec->pcm_info = spec->pcm_rec.list;
1794 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1796 char hdmi_str[32] = "HDMI/DP";
1797 struct hdmi_spec *spec = codec->spec;
1798 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1799 int pcmdev = get_pcm_rec(spec, pin_idx)->device;
1802 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1803 if (!is_jack_detectable(codec, per_pin->pin_nid))
1804 strncat(hdmi_str, " Phantom",
1805 sizeof(hdmi_str) - strlen(hdmi_str) - 1);
1807 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1810 static int generic_hdmi_build_controls(struct hda_codec *codec)
1812 struct hdmi_spec *spec = codec->spec;
1816 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1817 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1819 err = generic_hdmi_build_jack(codec, pin_idx);
1823 err = snd_hda_create_dig_out_ctls(codec,
1825 per_pin->mux_nids[0],
1829 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1831 /* add control for ELD Bytes */
1832 err = hdmi_create_eld_ctl(codec, pin_idx,
1833 get_pcm_rec(spec, pin_idx)->device);
1838 hdmi_present_sense(per_pin, 0);
1841 /* add channel maps */
1842 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1843 struct snd_pcm_chmap *chmap;
1844 struct snd_kcontrol *kctl;
1847 if (!codec->pcm_info[pin_idx].pcm)
1849 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
1850 SNDRV_PCM_STREAM_PLAYBACK,
1851 NULL, 0, pin_idx, &chmap);
1854 /* override handlers */
1855 chmap->private_data = codec;
1857 for (i = 0; i < kctl->count; i++)
1858 kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
1859 kctl->info = hdmi_chmap_ctl_info;
1860 kctl->get = hdmi_chmap_ctl_get;
1861 kctl->put = hdmi_chmap_ctl_put;
1862 kctl->tlv.c = hdmi_chmap_ctl_tlv;
1868 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
1870 struct hdmi_spec *spec = codec->spec;
1873 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1874 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1875 struct hdmi_eld *eld = &per_pin->sink_eld;
1877 per_pin->codec = codec;
1878 mutex_init(&eld->lock);
1879 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1880 snd_hda_eld_proc_new(codec, eld, pin_idx);
1885 static int generic_hdmi_init(struct hda_codec *codec)
1887 struct hdmi_spec *spec = codec->spec;
1890 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1891 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1892 hda_nid_t pin_nid = per_pin->pin_nid;
1894 hdmi_init_pin(codec, pin_nid);
1895 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1900 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
1902 snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
1903 snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
1904 snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
1907 static void hdmi_array_free(struct hdmi_spec *spec)
1909 snd_array_free(&spec->pins);
1910 snd_array_free(&spec->cvts);
1911 snd_array_free(&spec->pcm_rec);
1914 static void generic_hdmi_free(struct hda_codec *codec)
1916 struct hdmi_spec *spec = codec->spec;
1919 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1920 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1921 struct hdmi_eld *eld = &per_pin->sink_eld;
1923 cancel_delayed_work(&per_pin->work);
1924 snd_hda_eld_proc_free(codec, eld);
1927 flush_workqueue(codec->bus->workq);
1928 hdmi_array_free(spec);
1933 static int generic_hdmi_resume(struct hda_codec *codec)
1935 struct hdmi_spec *spec = codec->spec;
1938 generic_hdmi_init(codec);
1939 snd_hda_codec_resume_amp(codec);
1940 snd_hda_codec_resume_cache(codec);
1942 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1943 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1944 hdmi_present_sense(per_pin, 1);
1950 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1951 .init = generic_hdmi_init,
1952 .free = generic_hdmi_free,
1953 .build_pcms = generic_hdmi_build_pcms,
1954 .build_controls = generic_hdmi_build_controls,
1955 .unsol_event = hdmi_unsol_event,
1957 .resume = generic_hdmi_resume,
1962 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1965 struct hdmi_spec *spec = codec->spec;
1969 nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
1970 if (nconns == spec->num_cvts &&
1971 !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
1974 /* override pins connection list */
1975 snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
1976 snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
1979 #define INTEL_VENDOR_NID 0x08
1980 #define INTEL_GET_VENDOR_VERB 0xf81
1981 #define INTEL_SET_VENDOR_VERB 0x781
1982 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
1983 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
1985 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
1988 unsigned int vendor_param;
1990 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1991 INTEL_GET_VENDOR_VERB, 0);
1992 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
1995 vendor_param |= INTEL_EN_ALL_PIN_CVTS;
1996 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1997 INTEL_SET_VENDOR_VERB, vendor_param);
1998 if (vendor_param == -1)
2002 snd_hda_codec_update_widgets(codec);
2005 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2007 unsigned int vendor_param;
2009 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2010 INTEL_GET_VENDOR_VERB, 0);
2011 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2014 /* enable DP1.2 mode */
2015 vendor_param |= INTEL_EN_DP12;
2016 snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2017 INTEL_SET_VENDOR_VERB, vendor_param);
2020 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2021 * Otherwise you may get severe h/w communication errors.
2023 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2024 unsigned int power_state)
2026 if (power_state == AC_PWRST_D0) {
2027 intel_haswell_enable_all_pins(codec, false);
2028 intel_haswell_fixup_enable_dp12(codec);
2031 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2032 snd_hda_codec_set_power_to_all(codec, fg, power_state);
2035 static int patch_generic_hdmi(struct hda_codec *codec)
2037 struct hdmi_spec *spec;
2039 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2044 hdmi_array_init(spec, 4);
2046 if (is_haswell(codec)) {
2047 intel_haswell_enable_all_pins(codec, true);
2048 intel_haswell_fixup_enable_dp12(codec);
2051 if (hdmi_parse_codec(codec) < 0) {
2056 codec->patch_ops = generic_hdmi_patch_ops;
2057 if (is_haswell(codec)) {
2058 codec->patch_ops.set_power_state = haswell_set_power_state;
2059 codec->dp_mst = true;
2062 generic_hdmi_init_per_pins(codec);
2064 init_channel_allocations();
2070 * Shared non-generic implementations
2073 static int simple_playback_build_pcms(struct hda_codec *codec)
2075 struct hdmi_spec *spec = codec->spec;
2076 struct hda_pcm *info;
2078 struct hda_pcm_stream *pstr;
2079 struct hdmi_spec_per_cvt *per_cvt;
2081 per_cvt = get_cvt(spec, 0);
2082 chans = get_wcaps(codec, per_cvt->cvt_nid);
2083 chans = get_wcaps_channels(chans);
2085 info = snd_array_new(&spec->pcm_rec);
2088 info->name = get_pin(spec, 0)->pcm_name;
2089 sprintf(info->name, "HDMI 0");
2090 info->pcm_type = HDA_PCM_TYPE_HDMI;
2091 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2092 *pstr = spec->pcm_playback;
2093 pstr->nid = per_cvt->cvt_nid;
2094 if (pstr->channels_max <= 2 && chans && chans <= 16)
2095 pstr->channels_max = chans;
2097 codec->num_pcms = 1;
2098 codec->pcm_info = info;
2103 /* unsolicited event for jack sensing */
2104 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2107 snd_hda_jack_set_dirty_all(codec);
2108 snd_hda_jack_report_sync(codec);
2111 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2112 * as long as spec->pins[] is set correctly
2114 #define simple_hdmi_build_jack generic_hdmi_build_jack
2116 static int simple_playback_build_controls(struct hda_codec *codec)
2118 struct hdmi_spec *spec = codec->spec;
2119 struct hdmi_spec_per_cvt *per_cvt;
2122 per_cvt = get_cvt(spec, 0);
2123 err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
2127 return simple_hdmi_build_jack(codec, 0);
2130 static int simple_playback_init(struct hda_codec *codec)
2132 struct hdmi_spec *spec = codec->spec;
2133 struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2134 hda_nid_t pin = per_pin->pin_nid;
2136 snd_hda_codec_write(codec, pin, 0,
2137 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2138 /* some codecs require to unmute the pin */
2139 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2140 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2142 snd_hda_jack_detect_enable(codec, pin, pin);
2146 static void simple_playback_free(struct hda_codec *codec)
2148 struct hdmi_spec *spec = codec->spec;
2150 hdmi_array_free(spec);
2155 * Nvidia specific implementations
2158 #define Nv_VERB_SET_Channel_Allocation 0xF79
2159 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
2160 #define Nv_VERB_SET_Audio_Protection_On 0xF98
2161 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
2163 #define nvhdmi_master_con_nid_7x 0x04
2164 #define nvhdmi_master_pin_nid_7x 0x05
2166 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2167 /*front, rear, clfe, rear_surr */
2171 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2172 /* set audio protect on */
2173 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2174 /* enable digital output on pin widget */
2175 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2179 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2180 /* set audio protect on */
2181 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2182 /* enable digital output on pin widget */
2183 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2184 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2185 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2186 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2187 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2191 #ifdef LIMITED_RATE_FMT_SUPPORT
2192 /* support only the safe format and rate */
2193 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
2194 #define SUPPORTED_MAXBPS 16
2195 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
2197 /* support all rates and formats */
2198 #define SUPPORTED_RATES \
2199 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2200 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2201 SNDRV_PCM_RATE_192000)
2202 #define SUPPORTED_MAXBPS 24
2203 #define SUPPORTED_FORMATS \
2204 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2207 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2209 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2213 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2215 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2219 static unsigned int channels_2_6_8[] = {
2223 static unsigned int channels_2_8[] = {
2227 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2228 .count = ARRAY_SIZE(channels_2_6_8),
2229 .list = channels_2_6_8,
2233 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2234 .count = ARRAY_SIZE(channels_2_8),
2235 .list = channels_2_8,
2239 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2240 struct hda_codec *codec,
2241 struct snd_pcm_substream *substream)
2243 struct hdmi_spec *spec = codec->spec;
2244 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2246 switch (codec->preset->id) {
2251 hw_constraints_channels = &hw_constraints_2_8_channels;
2254 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2260 if (hw_constraints_channels != NULL) {
2261 snd_pcm_hw_constraint_list(substream->runtime, 0,
2262 SNDRV_PCM_HW_PARAM_CHANNELS,
2263 hw_constraints_channels);
2265 snd_pcm_hw_constraint_step(substream->runtime, 0,
2266 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2269 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2272 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2273 struct hda_codec *codec,
2274 struct snd_pcm_substream *substream)
2276 struct hdmi_spec *spec = codec->spec;
2277 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2280 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2281 struct hda_codec *codec,
2282 unsigned int stream_tag,
2283 unsigned int format,
2284 struct snd_pcm_substream *substream)
2286 struct hdmi_spec *spec = codec->spec;
2287 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2288 stream_tag, format, substream);
2291 static const struct hda_pcm_stream simple_pcm_playback = {
2296 .open = simple_playback_pcm_open,
2297 .close = simple_playback_pcm_close,
2298 .prepare = simple_playback_pcm_prepare
2302 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2303 .build_controls = simple_playback_build_controls,
2304 .build_pcms = simple_playback_build_pcms,
2305 .init = simple_playback_init,
2306 .free = simple_playback_free,
2307 .unsol_event = simple_hdmi_unsol_event,
2310 static int patch_simple_hdmi(struct hda_codec *codec,
2311 hda_nid_t cvt_nid, hda_nid_t pin_nid)
2313 struct hdmi_spec *spec;
2314 struct hdmi_spec_per_cvt *per_cvt;
2315 struct hdmi_spec_per_pin *per_pin;
2317 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2322 hdmi_array_init(spec, 1);
2324 spec->multiout.num_dacs = 0; /* no analog */
2325 spec->multiout.max_channels = 2;
2326 spec->multiout.dig_out_nid = cvt_nid;
2329 per_pin = snd_array_new(&spec->pins);
2330 per_cvt = snd_array_new(&spec->cvts);
2331 if (!per_pin || !per_cvt) {
2332 simple_playback_free(codec);
2335 per_cvt->cvt_nid = cvt_nid;
2336 per_pin->pin_nid = pin_nid;
2337 spec->pcm_playback = simple_pcm_playback;
2339 codec->patch_ops = simple_hdmi_patch_ops;
2344 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2347 unsigned int chanmask;
2348 int chan = channels ? (channels - 1) : 1;
2367 /* Set the audio infoframe channel allocation and checksum fields. The
2368 * channel count is computed implicitly by the hardware. */
2369 snd_hda_codec_write(codec, 0x1, 0,
2370 Nv_VERB_SET_Channel_Allocation, chanmask);
2372 snd_hda_codec_write(codec, 0x1, 0,
2373 Nv_VERB_SET_Info_Frame_Checksum,
2374 (0x71 - chan - chanmask));
2377 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2378 struct hda_codec *codec,
2379 struct snd_pcm_substream *substream)
2381 struct hdmi_spec *spec = codec->spec;
2384 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2385 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2386 for (i = 0; i < 4; i++) {
2387 /* set the stream id */
2388 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2389 AC_VERB_SET_CHANNEL_STREAMID, 0);
2390 /* set the stream format */
2391 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2392 AC_VERB_SET_STREAM_FORMAT, 0);
2395 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2396 * streams are disabled. */
2397 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2399 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2402 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2403 struct hda_codec *codec,
2404 unsigned int stream_tag,
2405 unsigned int format,
2406 struct snd_pcm_substream *substream)
2409 unsigned int dataDCC2, channel_id;
2411 struct hdmi_spec *spec = codec->spec;
2412 struct hda_spdif_out *spdif;
2413 struct hdmi_spec_per_cvt *per_cvt;
2415 mutex_lock(&codec->spdif_mutex);
2416 per_cvt = get_cvt(spec, 0);
2417 spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2419 chs = substream->runtime->channels;
2423 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2424 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2425 snd_hda_codec_write(codec,
2426 nvhdmi_master_con_nid_7x,
2428 AC_VERB_SET_DIGI_CONVERT_1,
2429 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2431 /* set the stream id */
2432 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2433 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2435 /* set the stream format */
2436 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2437 AC_VERB_SET_STREAM_FORMAT, format);
2439 /* turn on again (if needed) */
2440 /* enable and set the channel status audio/data flag */
2441 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2442 snd_hda_codec_write(codec,
2443 nvhdmi_master_con_nid_7x,
2445 AC_VERB_SET_DIGI_CONVERT_1,
2446 spdif->ctls & 0xff);
2447 snd_hda_codec_write(codec,
2448 nvhdmi_master_con_nid_7x,
2450 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2453 for (i = 0; i < 4; i++) {
2459 /* turn off SPDIF once;
2460 *otherwise the IEC958 bits won't be updated
2462 if (codec->spdif_status_reset &&
2463 (spdif->ctls & AC_DIG1_ENABLE))
2464 snd_hda_codec_write(codec,
2465 nvhdmi_con_nids_7x[i],
2467 AC_VERB_SET_DIGI_CONVERT_1,
2468 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2469 /* set the stream id */
2470 snd_hda_codec_write(codec,
2471 nvhdmi_con_nids_7x[i],
2473 AC_VERB_SET_CHANNEL_STREAMID,
2474 (stream_tag << 4) | channel_id);
2475 /* set the stream format */
2476 snd_hda_codec_write(codec,
2477 nvhdmi_con_nids_7x[i],
2479 AC_VERB_SET_STREAM_FORMAT,
2481 /* turn on again (if needed) */
2482 /* enable and set the channel status audio/data flag */
2483 if (codec->spdif_status_reset &&
2484 (spdif->ctls & AC_DIG1_ENABLE)) {
2485 snd_hda_codec_write(codec,
2486 nvhdmi_con_nids_7x[i],
2488 AC_VERB_SET_DIGI_CONVERT_1,
2489 spdif->ctls & 0xff);
2490 snd_hda_codec_write(codec,
2491 nvhdmi_con_nids_7x[i],
2493 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2497 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2499 mutex_unlock(&codec->spdif_mutex);
2503 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2507 .nid = nvhdmi_master_con_nid_7x,
2508 .rates = SUPPORTED_RATES,
2509 .maxbps = SUPPORTED_MAXBPS,
2510 .formats = SUPPORTED_FORMATS,
2512 .open = simple_playback_pcm_open,
2513 .close = nvhdmi_8ch_7x_pcm_close,
2514 .prepare = nvhdmi_8ch_7x_pcm_prepare
2518 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2520 struct hdmi_spec *spec;
2521 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2522 nvhdmi_master_pin_nid_7x);
2526 codec->patch_ops.init = nvhdmi_7x_init_2ch;
2527 /* override the PCM rates, etc, as the codec doesn't give full list */
2529 spec->pcm_playback.rates = SUPPORTED_RATES;
2530 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2531 spec->pcm_playback.formats = SUPPORTED_FORMATS;
2535 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2537 struct hdmi_spec *spec = codec->spec;
2538 int err = simple_playback_build_pcms(codec);
2540 struct hda_pcm *info = get_pcm_rec(spec, 0);
2541 info->own_chmap = true;
2546 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2548 struct hdmi_spec *spec = codec->spec;
2549 struct hda_pcm *info;
2550 struct snd_pcm_chmap *chmap;
2553 err = simple_playback_build_controls(codec);
2557 /* add channel maps */
2558 info = get_pcm_rec(spec, 0);
2559 err = snd_pcm_add_chmap_ctls(info->pcm,
2560 SNDRV_PCM_STREAM_PLAYBACK,
2561 snd_pcm_alt_chmaps, 8, 0, &chmap);
2564 switch (codec->preset->id) {
2569 chmap->channel_mask = (1U << 2) | (1U << 8);
2572 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2577 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2579 struct hdmi_spec *spec;
2580 int err = patch_nvhdmi_2ch(codec);
2584 spec->multiout.max_channels = 8;
2585 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2586 codec->patch_ops.init = nvhdmi_7x_init_8ch;
2587 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2588 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2590 /* Initialize the audio infoframe channel mask and checksum to something
2592 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2598 * ATI-specific implementations
2600 * FIXME: we may omit the whole this and use the generic code once after
2601 * it's confirmed to work.
2604 #define ATIHDMI_CVT_NID 0x02 /* audio converter */
2605 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
2607 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2608 struct hda_codec *codec,
2609 unsigned int stream_tag,
2610 unsigned int format,
2611 struct snd_pcm_substream *substream)
2613 struct hdmi_spec *spec = codec->spec;
2614 struct hdmi_spec_per_cvt *per_cvt = get_cvt(spec, 0);
2615 int chans = substream->runtime->channels;
2618 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
2622 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2623 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
2625 for (i = 0; i < chans; i++) {
2626 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2627 AC_VERB_SET_HDMI_CHAN_SLOT,
2633 static int patch_atihdmi(struct hda_codec *codec)
2635 struct hdmi_spec *spec;
2636 int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
2640 spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
2644 /* VIA HDMI Implementation */
2645 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
2646 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
2648 static int patch_via_hdmi(struct hda_codec *codec)
2650 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
2656 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
2657 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
2658 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
2659 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
2660 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
2661 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
2662 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
2663 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
2664 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2665 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2666 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2667 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2668 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
2669 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
2670 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
2671 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
2672 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
2673 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
2674 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
2675 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
2676 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
2677 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
2678 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
2679 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
2680 /* 17 is known to be absent */
2681 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
2682 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
2683 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
2684 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
2685 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
2686 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
2687 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
2688 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
2689 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
2690 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
2691 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
2692 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP", .patch = patch_generic_hdmi },
2693 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
2694 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
2695 { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2696 { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2697 { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2698 { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2699 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2700 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
2701 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
2702 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
2703 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2704 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
2705 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
2706 { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
2707 { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
2708 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
2712 MODULE_ALIAS("snd-hda-codec-id:1002793c");
2713 MODULE_ALIAS("snd-hda-codec-id:10027919");
2714 MODULE_ALIAS("snd-hda-codec-id:1002791a");
2715 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
2716 MODULE_ALIAS("snd-hda-codec-id:10951390");
2717 MODULE_ALIAS("snd-hda-codec-id:10951392");
2718 MODULE_ALIAS("snd-hda-codec-id:10de0002");
2719 MODULE_ALIAS("snd-hda-codec-id:10de0003");
2720 MODULE_ALIAS("snd-hda-codec-id:10de0005");
2721 MODULE_ALIAS("snd-hda-codec-id:10de0006");
2722 MODULE_ALIAS("snd-hda-codec-id:10de0007");
2723 MODULE_ALIAS("snd-hda-codec-id:10de000a");
2724 MODULE_ALIAS("snd-hda-codec-id:10de000b");
2725 MODULE_ALIAS("snd-hda-codec-id:10de000c");
2726 MODULE_ALIAS("snd-hda-codec-id:10de000d");
2727 MODULE_ALIAS("snd-hda-codec-id:10de0010");
2728 MODULE_ALIAS("snd-hda-codec-id:10de0011");
2729 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2730 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2731 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2732 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2733 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2734 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2735 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2736 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2737 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2738 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2739 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2740 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2741 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2742 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2743 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2744 MODULE_ALIAS("snd-hda-codec-id:10de0051");
2745 MODULE_ALIAS("snd-hda-codec-id:10de0060");
2746 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2747 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2748 MODULE_ALIAS("snd-hda-codec-id:11069f80");
2749 MODULE_ALIAS("snd-hda-codec-id:11069f81");
2750 MODULE_ALIAS("snd-hda-codec-id:11069f84");
2751 MODULE_ALIAS("snd-hda-codec-id:11069f85");
2752 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2753 MODULE_ALIAS("snd-hda-codec-id:80860054");
2754 MODULE_ALIAS("snd-hda-codec-id:80862801");
2755 MODULE_ALIAS("snd-hda-codec-id:80862802");
2756 MODULE_ALIAS("snd-hda-codec-id:80862803");
2757 MODULE_ALIAS("snd-hda-codec-id:80862804");
2758 MODULE_ALIAS("snd-hda-codec-id:80862805");
2759 MODULE_ALIAS("snd-hda-codec-id:80862806");
2760 MODULE_ALIAS("snd-hda-codec-id:80862807");
2761 MODULE_ALIAS("snd-hda-codec-id:80862880");
2762 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2764 MODULE_LICENSE("GPL");
2765 MODULE_DESCRIPTION("HDMI HD-audio codec");
2766 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2767 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2768 MODULE_ALIAS("snd-hda-codec-atihdmi");
2770 static struct hda_codec_preset_list intel_list = {
2771 .preset = snd_hda_preset_hdmi,
2772 .owner = THIS_MODULE,
2775 static int __init patch_hdmi_init(void)
2777 return snd_hda_add_codec_preset(&intel_list);
2780 static void __exit patch_hdmi_exit(void)
2782 snd_hda_delete_codec_preset(&intel_list);
2785 module_init(patch_hdmi_init)
2786 module_exit(patch_hdmi_exit)