sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  10  *
  11  *  Authors:
  12  *                      Wu Fengguang <wfg@linux.intel.com>
  13  *
  14  *  Maintained by:
  15  *                      Wu Fengguang <wfg@linux.intel.com>
  16  *
  17  *  This program is free software; you can redistribute it and/or modify it
  18  *  under the terms of the GNU General Public License as published by the Free
  19  *  Software Foundation; either version 2 of the License, or (at your option)
  20  *  any later version.
  21  *
  22  *  This program is distributed in the hope that it will be useful, but
  23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  25  *  for more details.
  26  *
  27  *  You should have received a copy of the GNU General Public License
  28  *  along with this program; if not, write to the Free Software Foundation,
  29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  30  */
  31
  32 #include <linux/init.h>
  33 #include <linux/delay.h>
  34 #include <linux/slab.h>
  35 #include <linux/module.h>
  36 #include <linux/pm_runtime.h>
  37 #include <sound/core.h>
  38 #include <sound/jack.h>
  39 #include <sound/asoundef.h>
  40 #include <sound/tlv.h>
  41 #include <sound/hdaudio.h>
  42 #include <sound/hda_i915.h>
  43 #include <sound/hda_chmap.h>
  44 #include <sound/hda_codec.h>
  45 #include "hda_local.h"
  46 #include "hda_jack.h"
  47
  48 static bool static_hdmi_pcm;
  49 module_param(static_hdmi_pcm, bool, 0644);
  50 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  51
  52 #define is_haswell(codec)  ((codec)->core.vendor_id == 0x80862807)
  53 #define is_broadwell(codec)    ((codec)->core.vendor_id == 0x80862808)
  54 #define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
  55 #define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
  56 #define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
  57 #define is_geminilake(codec) (((codec)->core.vendor_id == 0x8086280d) || \
  58                                 ((codec)->core.vendor_id == 0x80862800))
  59 #define is_cannonlake(codec) ((codec)->core.vendor_id == 0x8086280c)
  60 #define is_icelake(codec) ((codec)->core.vendor_id == 0x8086280f)
  61 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
  62                                 || is_skylake(codec) || is_broxton(codec) \
  63                                 || is_kabylake(codec) || is_geminilake(codec) \
  64                                 || is_cannonlake(codec) || is_icelake(codec))
  65 #define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
  66 #define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
  67 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
  68
  69 struct hdmi_spec_per_cvt {
  70         hda_nid_t cvt_nid;
  71         int assigned;
  72         unsigned int channels_min;
  73         unsigned int channels_max;
  74         u32 rates;
  75         u64 formats;
  76         unsigned int maxbps;
  77 };
  78
  79 /* max. connections to a widget */
  80 #define HDA_MAX_CONNECTIONS     32
  81
  82 struct hdmi_spec_per_pin {
  83         hda_nid_t pin_nid;
  84         int dev_id;
  85         /* pin idx, different device entries on the same pin use the same idx */
  86         int pin_nid_idx;
  87         int num_mux_nids;
  88         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  89         int mux_idx;
  90         hda_nid_t cvt_nid;
  91
  92         struct hda_codec *codec;
  93         struct hdmi_eld sink_eld;
  94         struct mutex lock;
  95         struct delayed_work work;
  96         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  97         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  98         int repoll_count;
  99         bool setup; /* the stream has been set up by prepare callback */
 100         int channels; /* current number of channels */
 101         bool non_pcm;
 102         bool chmap_set;         /* channel-map override by ALSA API? */
 103         unsigned char chmap[8]; /* ALSA API channel-map */
 104 #ifdef CONFIG_SND_PROC_FS
 105         struct snd_info_entry *proc_entry;
 106 #endif
 107 };
 108
 109 /* operations used by generic code that can be overridden by patches */
 110 struct hdmi_ops {
 111         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
 112                            unsigned char *buf, int *eld_size);
 113
 114         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 115                                     int ca, int active_channels, int conn_type);
 116
 117         /* enable/disable HBR (HD passthrough) */
 118         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 119
 120         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 121                             hda_nid_t pin_nid, u32 stream_tag, int format);
 122
 123         void (*pin_cvt_fixup)(struct hda_codec *codec,
 124                               struct hdmi_spec_per_pin *per_pin,
 125                               hda_nid_t cvt_nid);
 126 };
 127
 128 struct hdmi_pcm {
 129         struct hda_pcm *pcm;
 130         struct snd_jack *jack;
 131         struct snd_kcontrol *eld_ctl;
 132 };
 133
 134 struct hdmi_spec {
 135         int num_cvts;
 136         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 137         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 138
 139         /*
 140          * num_pins is the number of virtual pins
 141          * for example, there are 3 pins, and each pin
 142          * has 4 device entries, then the num_pins is 12
 143          */
 144         int num_pins;
 145         /*
 146          * num_nids is the number of real pins
 147          * In the above example, num_nids is 3
 148          */
 149         int num_nids;
 150         /*
 151          * dev_num is the number of device entries
 152          * on each pin.
 153          * In the above example, dev_num is 4
 154          */
 155         int dev_num;
 156         struct snd_array pins; /* struct hdmi_spec_per_pin */
 157         struct hdmi_pcm pcm_rec[16];
 158         struct mutex pcm_lock;
 159         /* pcm_bitmap means which pcms have been assigned to pins*/
 160         unsigned long pcm_bitmap;
 161         int pcm_used;   /* counter of pcm_rec[] */
 162         /* bitmap shows whether the pcm is opened in user space
 163          * bit 0 means the first playback PCM (PCM3);
 164          * bit 1 means the second playback PCM, and so on.
 165          */
 166         unsigned long pcm_in_use;
 167
 168         struct hdmi_eld temp_eld;
 169         struct hdmi_ops ops;
 170
 171         bool dyn_pin_out;
 172         bool dyn_pcm_assign;
 173         /*
 174          * Non-generic VIA/NVIDIA specific
 175          */
 176         struct hda_multi_out multiout;
 177         struct hda_pcm_stream pcm_playback;
 178
 179         /* i915/powerwell (Haswell+/Valleyview+) specific */
 180         bool use_acomp_notifier; /* use i915 eld_notify callback for hotplug */
 181         struct drm_audio_component_audio_ops drm_audio_ops;
 182
 183         struct hdac_chmap chmap;
 184         hda_nid_t vendor_nid;
 185         const int *port_map;
 186         int port_num;
 187 };
 188
 189 #ifdef CONFIG_SND_HDA_COMPONENT
 190 static inline bool codec_has_acomp(struct hda_codec *codec)
 191 {
 192         struct hdmi_spec *spec = codec->spec;
 193         return spec->use_acomp_notifier;
 194 }
 195 #else
 196 #define codec_has_acomp(codec)  false
 197 #endif
 198
 199 struct hdmi_audio_infoframe {
 200         u8 type; /* 0x84 */
 201         u8 ver;  /* 0x01 */
 202         u8 len;  /* 0x0a */
 203
 204         u8 checksum;
 205
 206         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 207         u8 SS01_SF24;
 208         u8 CXT04;
 209         u8 CA;
 210         u8 LFEPBL01_LSV36_DM_INH7;
 211 };
 212
 213 struct dp_audio_infoframe {
 214         u8 type; /* 0x84 */
 215         u8 len;  /* 0x1b */
 216         u8 ver;  /* 0x11 << 2 */
 217
 218         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 219         u8 SS01_SF24;
 220         u8 CXT04;
 221         u8 CA;
 222         u8 LFEPBL01_LSV36_DM_INH7;
 223 };
 224
 225 union audio_infoframe {
 226         struct hdmi_audio_infoframe hdmi;
 227         struct dp_audio_infoframe dp;
 228         u8 bytes[0];
 229 };
 230
 231 /*
 232  * HDMI routines
 233  */
 234
 235 #define get_pin(spec, idx) \
 236         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 237 #define get_cvt(spec, idx) \
 238         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 239 /* obtain hdmi_pcm object assigned to idx */
 240 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 241 /* obtain hda_pcm object assigned to idx */
 242 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 243
 244 static int pin_id_to_pin_index(struct hda_codec *codec,
 245                                hda_nid_t pin_nid, int dev_id)
 246 {
 247         struct hdmi_spec *spec = codec->spec;
 248         int pin_idx;
 249         struct hdmi_spec_per_pin *per_pin;
 250
 251         /*
 252          * (dev_id == -1) means it is NON-MST pin
 253          * return the first virtual pin on this port
 254          */
 255         if (dev_id == -1)
 256                 dev_id = 0;
 257
 258         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 259                 per_pin = get_pin(spec, pin_idx);
 260                 if ((per_pin->pin_nid == pin_nid) &&
 261                         (per_pin->dev_id == dev_id))
 262                         return pin_idx;
 263         }
 264
 265         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 266         return -EINVAL;
 267 }
 268
 269 static int hinfo_to_pcm_index(struct hda_codec *codec,
 270                         struct hda_pcm_stream *hinfo)
 271 {
 272         struct hdmi_spec *spec = codec->spec;
 273         int pcm_idx;
 274
 275         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 276                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 277                         return pcm_idx;
 278
 279         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 280         return -EINVAL;
 281 }
 282
 283 static int hinfo_to_pin_index(struct hda_codec *codec,
 284                               struct hda_pcm_stream *hinfo)
 285 {
 286         struct hdmi_spec *spec = codec->spec;
 287         struct hdmi_spec_per_pin *per_pin;
 288         int pin_idx;
 289
 290         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 291                 per_pin = get_pin(spec, pin_idx);
 292                 if (per_pin->pcm &&
 293                         per_pin->pcm->pcm->stream == hinfo)
 294                         return pin_idx;
 295         }
 296
 297         codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
 298         return -EINVAL;
 299 }
 300
 301 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 302                                                 int pcm_idx)
 303 {
 304         int i;
 305         struct hdmi_spec_per_pin *per_pin;
 306
 307         for (i = 0; i < spec->num_pins; i++) {
 308                 per_pin = get_pin(spec, i);
 309                 if (per_pin->pcm_idx == pcm_idx)
 310                         return per_pin;
 311         }
 312         return NULL;
 313 }
 314
 315 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 316 {
 317         struct hdmi_spec *spec = codec->spec;
 318         int cvt_idx;
 319
 320         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 321                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 322                         return cvt_idx;
 323
 324         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 325         return -EINVAL;
 326 }
 327
 328 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 329                         struct snd_ctl_elem_info *uinfo)
 330 {
 331         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 332         struct hdmi_spec *spec = codec->spec;
 333         struct hdmi_spec_per_pin *per_pin;
 334         struct hdmi_eld *eld;
 335         int pcm_idx;
 336
 337         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 338
 339         pcm_idx = kcontrol->private_value;
 340         mutex_lock(&spec->pcm_lock);
 341         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 342         if (!per_pin) {
 343                 /* no pin is bound to the pcm */
 344                 uinfo->count = 0;
 345                 goto unlock;
 346         }
 347         eld = &per_pin->sink_eld;
 348         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 349
 350  unlock:
 351         mutex_unlock(&spec->pcm_lock);
 352         return 0;
 353 }
 354
 355 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 356                         struct snd_ctl_elem_value *ucontrol)
 357 {
 358         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 359         struct hdmi_spec *spec = codec->spec;
 360         struct hdmi_spec_per_pin *per_pin;
 361         struct hdmi_eld *eld;
 362         int pcm_idx;
 363         int err = 0;
 364
 365         pcm_idx = kcontrol->private_value;
 366         mutex_lock(&spec->pcm_lock);
 367         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 368         if (!per_pin) {
 369                 /* no pin is bound to the pcm */
 370                 memset(ucontrol->value.bytes.data, 0,
 371                        ARRAY_SIZE(ucontrol->value.bytes.data));
 372                 goto unlock;
 373         }
 374
 375         eld = &per_pin->sink_eld;
 376         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
 377             eld->eld_size > ELD_MAX_SIZE) {
 378                 snd_BUG();
 379                 err = -EINVAL;
 380                 goto unlock;
 381         }
 382
 383         memset(ucontrol->value.bytes.data, 0,
 384                ARRAY_SIZE(ucontrol->value.bytes.data));
 385         if (eld->eld_valid)
 386                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 387                        eld->eld_size);
 388
 389  unlock:
 390         mutex_unlock(&spec->pcm_lock);
 391         return err;
 392 }
 393
 394 static const struct snd_kcontrol_new eld_bytes_ctl = {
 395         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 396         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 397         .name = "ELD",
 398         .info = hdmi_eld_ctl_info,
 399         .get = hdmi_eld_ctl_get,
 400 };
 401
 402 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
 403                         int device)
 404 {
 405         struct snd_kcontrol *kctl;
 406         struct hdmi_spec *spec = codec->spec;
 407         int err;
 408
 409         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 410         if (!kctl)
 411                 return -ENOMEM;
 412         kctl->private_value = pcm_idx;
 413         kctl->id.device = device;
 414
 415         /* no pin nid is associated with the kctl now
 416          * tbd: associate pin nid to eld ctl later
 417          */
 418         err = snd_hda_ctl_add(codec, 0, kctl);
 419         if (err < 0)
 420                 return err;
 421
 422         get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
 423         return 0;
 424 }
 425
 426 #ifdef BE_PARANOID
 427 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 428                                 int *packet_index, int *byte_index)
 429 {
 430         int val;
 431
 432         val = snd_hda_codec_read(codec, pin_nid, 0,
 433                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 434
 435         *packet_index = val >> 5;
 436         *byte_index = val & 0x1f;
 437 }
 438 #endif
 439
 440 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 441                                 int packet_index, int byte_index)
 442 {
 443         int val;
 444
 445         val = (packet_index << 5) | (byte_index & 0x1f);
 446
 447         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 448 }
 449
 450 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 451                                 unsigned char val)
 452 {
 453         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 454 }
 455
 456 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 457 {
 458         struct hdmi_spec *spec = codec->spec;
 459         int pin_out;
 460
 461         /* Unmute */
 462         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 463                 snd_hda_codec_write(codec, pin_nid, 0,
 464                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 465
 466         if (spec->dyn_pin_out)
 467                 /* Disable pin out until stream is active */
 468                 pin_out = 0;
 469         else
 470                 /* Enable pin out: some machines with GM965 gets broken output
 471                  * when the pin is disabled or changed while using with HDMI
 472                  */
 473                 pin_out = PIN_OUT;
 474
 475         snd_hda_codec_write(codec, pin_nid, 0,
 476                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 477 }
 478
 479 /*
 480  * ELD proc files
 481  */
 482
 483 #ifdef CONFIG_SND_PROC_FS
 484 static void print_eld_info(struct snd_info_entry *entry,
 485                            struct snd_info_buffer *buffer)
 486 {
 487         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 488
 489         mutex_lock(&per_pin->lock);
 490         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 491         mutex_unlock(&per_pin->lock);
 492 }
 493
 494 static void write_eld_info(struct snd_info_entry *entry,
 495                            struct snd_info_buffer *buffer)
 496 {
 497         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 498
 499         mutex_lock(&per_pin->lock);
 500         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 501         mutex_unlock(&per_pin->lock);
 502 }
 503
 504 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 505 {
 506         char name[32];
 507         struct hda_codec *codec = per_pin->codec;
 508         struct snd_info_entry *entry;
 509         int err;
 510
 511         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 512         err = snd_card_proc_new(codec->card, name, &entry);
 513         if (err < 0)
 514                 return err;
 515
 516         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 517         entry->c.text.write = write_eld_info;
 518         entry->mode |= 0200;
 519         per_pin->proc_entry = entry;
 520
 521         return 0;
 522 }
 523
 524 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 525 {
 526         if (!per_pin->codec->bus->shutdown) {
 527                 snd_info_free_entry(per_pin->proc_entry);
 528                 per_pin->proc_entry = NULL;
 529         }
 530 }
 531 #else
 532 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 533                                int index)
 534 {
 535         return 0;
 536 }
 537 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 538 {
 539 }
 540 #endif
 541
 542 /*
 543  * Audio InfoFrame routines
 544  */
 545
 546 /*
 547  * Enable Audio InfoFrame Transmission
 548  */
 549 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 550                                        hda_nid_t pin_nid)
 551 {
 552         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 553         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 554                                                 AC_DIPXMIT_BEST);
 555 }
 556
 557 /*
 558  * Disable Audio InfoFrame Transmission
 559  */
 560 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 561                                       hda_nid_t pin_nid)
 562 {
 563         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 564         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 565                                                 AC_DIPXMIT_DISABLE);
 566 }
 567
 568 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 569 {
 570 #ifdef CONFIG_SND_DEBUG_VERBOSE
 571         int i;
 572         int size;
 573
 574         size = snd_hdmi_get_eld_size(codec, pin_nid);
 575         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 576
 577         for (i = 0; i < 8; i++) {
 578                 size = snd_hda_codec_read(codec, pin_nid, 0,
 579                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 580                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 581         }
 582 #endif
 583 }
 584
 585 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 586 {
 587 #ifdef BE_PARANOID
 588         int i, j;
 589         int size;
 590         int pi, bi;
 591         for (i = 0; i < 8; i++) {
 592                 size = snd_hda_codec_read(codec, pin_nid, 0,
 593                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 594                 if (size == 0)
 595                         continue;
 596
 597                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 598                 for (j = 1; j < 1000; j++) {
 599                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 600                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 601                         if (pi != i)
 602                                 codec_dbg(codec, "dip index %d: %d != %d\n",
 603                                                 bi, pi, i);
 604                         if (bi == 0) /* byte index wrapped around */
 605                                 break;
 606                 }
 607                 codec_dbg(codec,
 608                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 609                         i, size, j);
 610         }
 611 #endif
 612 }
 613
 614 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 615 {
 616         u8 *bytes = (u8 *)hdmi_ai;
 617         u8 sum = 0;
 618         int i;
 619
 620         hdmi_ai->checksum = 0;
 621
 622         for (i = 0; i < sizeof(*hdmi_ai); i++)
 623                 sum += bytes[i];
 624
 625         hdmi_ai->checksum = -sum;
 626 }
 627
 628 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 629                                       hda_nid_t pin_nid,
 630                                       u8 *dip, int size)
 631 {
 632         int i;
 633
 634         hdmi_debug_dip_size(codec, pin_nid);
 635         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 636
 637         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 638         for (i = 0; i < size; i++)
 639                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 640 }
 641
 642 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 643                                     u8 *dip, int size)
 644 {
 645         u8 val;
 646         int i;
 647
 648         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 649                                                             != AC_DIPXMIT_BEST)
 650                 return false;
 651
 652         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 653         for (i = 0; i < size; i++) {
 654                 val = snd_hda_codec_read(codec, pin_nid, 0,
 655                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 656                 if (val != dip[i])
 657                         return false;
 658         }
 659
 660         return true;
 661 }
 662
 663 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
 664                                      hda_nid_t pin_nid,
 665                                      int ca, int active_channels,
 666                                      int conn_type)
 667 {
 668         union audio_infoframe ai;
 669
 670         memset(&ai, 0, sizeof(ai));
 671         if (conn_type == 0) { /* HDMI */
 672                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 673
 674                 hdmi_ai->type           = 0x84;
 675                 hdmi_ai->ver            = 0x01;
 676                 hdmi_ai->len            = 0x0a;
 677                 hdmi_ai->CC02_CT47      = active_channels - 1;
 678                 hdmi_ai->CA             = ca;
 679                 hdmi_checksum_audio_infoframe(hdmi_ai);
 680         } else if (conn_type == 1) { /* DisplayPort */
 681                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 682
 683                 dp_ai->type             = 0x84;
 684                 dp_ai->len              = 0x1b;
 685                 dp_ai->ver              = 0x11 << 2;
 686                 dp_ai->CC02_CT47        = active_channels - 1;
 687                 dp_ai->CA               = ca;
 688         } else {
 689                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
 690                             pin_nid);
 691                 return;
 692         }
 693
 694         /*
 695          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 696          * sizeof(*dp_ai) to avoid partial match/update problems when
 697          * the user switches between HDMI/DP monitors.
 698          */
 699         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 700                                         sizeof(ai))) {
 701                 codec_dbg(codec,
 702                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
 703                             pin_nid,
 704                             active_channels, ca);
 705                 hdmi_stop_infoframe_trans(codec, pin_nid);
 706                 hdmi_fill_audio_infoframe(codec, pin_nid,
 707                                             ai.bytes, sizeof(ai));
 708                 hdmi_start_infoframe_trans(codec, pin_nid);
 709         }
 710 }
 711
 712 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
 713                                        struct hdmi_spec_per_pin *per_pin,
 714                                        bool non_pcm)
 715 {
 716         struct hdmi_spec *spec = codec->spec;
 717         struct hdac_chmap *chmap = &spec->chmap;
 718         hda_nid_t pin_nid = per_pin->pin_nid;
 719         int channels = per_pin->channels;
 720         int active_channels;
 721         struct hdmi_eld *eld;
 722         int ca;
 723
 724         if (!channels)
 725                 return;
 726
 727         /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
 728         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 729                 snd_hda_codec_write(codec, pin_nid, 0,
 730                                             AC_VERB_SET_AMP_GAIN_MUTE,
 731                                             AMP_OUT_UNMUTE);
 732
 733         eld = &per_pin->sink_eld;
 734
 735         ca = snd_hdac_channel_allocation(&codec->core,
 736                         eld->info.spk_alloc, channels,
 737                         per_pin->chmap_set, non_pcm, per_pin->chmap);
 738
 739         active_channels = snd_hdac_get_active_channels(ca);
 740
 741         chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
 742                                                 active_channels);
 743
 744         /*
 745          * always configure channel mapping, it may have been changed by the
 746          * user in the meantime
 747          */
 748         snd_hdac_setup_channel_mapping(&spec->chmap,
 749                                 pin_nid, non_pcm, ca, channels,
 750                                 per_pin->chmap, per_pin->chmap_set);
 751
 752         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
 753                                       eld->info.conn_type);
 754
 755         per_pin->non_pcm = non_pcm;
 756 }
 757
 758 /*
 759  * Unsolicited events
 760  */
 761
 762 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 763
 764 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid,
 765                                       int dev_id)
 766 {
 767         struct hdmi_spec *spec = codec->spec;
 768         int pin_idx = pin_id_to_pin_index(codec, nid, dev_id);
 769
 770         if (pin_idx < 0)
 771                 return;
 772         mutex_lock(&spec->pcm_lock);
 773         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
 774                 snd_hda_jack_report_sync(codec);
 775         mutex_unlock(&spec->pcm_lock);
 776 }
 777
 778 static void jack_callback(struct hda_codec *codec,
 779                           struct hda_jack_callback *jack)
 780 {
 781         /* hda_jack don't support DP MST */
 782         check_presence_and_report(codec, jack->nid, 0);
 783 }
 784
 785 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 786 {
 787         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 788         struct hda_jack_tbl *jack;
 789         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 790
 791         /*
 792          * assume DP MST uses dyn_pcm_assign and acomp and
 793          * never comes here
 794          * if DP MST supports unsol event, below code need
 795          * consider dev_entry
 796          */
 797         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
 798         if (!jack)
 799                 return;
 800         jack->jack_dirty = 1;
 801
 802         codec_dbg(codec,
 803                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
 804                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
 805                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 806
 807         /* hda_jack don't support DP MST */
 808         check_presence_and_report(codec, jack->nid, 0);
 809 }
 810
 811 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 812 {
 813         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 814         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 815         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 816         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 817
 818         codec_info(codec,
 819                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 820                 codec->addr,
 821                 tag,
 822                 subtag,
 823                 cp_state,
 824                 cp_ready);
 825
 826         /* TODO */
 827         if (cp_state)
 828                 ;
 829         if (cp_ready)
 830                 ;
 831 }
 832
 833
 834 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 835 {
 836         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 837         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 838
 839         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
 840                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
 841                 return;
 842         }
 843
 844         if (subtag == 0)
 845                 hdmi_intrinsic_event(codec, res);
 846         else
 847                 hdmi_non_intrinsic_event(codec, res);
 848 }
 849
 850 static void haswell_verify_D0(struct hda_codec *codec,
 851                 hda_nid_t cvt_nid, hda_nid_t nid)
 852 {
 853         int pwr;
 854
 855         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
 856          * thus pins could only choose converter 0 for use. Make sure the
 857          * converters are in correct power state */
 858         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
 859                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
 860
 861         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
 862                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
 863                                     AC_PWRST_D0);
 864                 msleep(40);
 865                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
 866                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
 867                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
 868         }
 869 }
 870
 871 /*
 872  * Callbacks
 873  */
 874
 875 /* HBR should be Non-PCM, 8 channels */
 876 #define is_hbr_format(format) \
 877         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 878
 879 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
 880                               bool hbr)
 881 {
 882         int pinctl, new_pinctl;
 883
 884         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 885                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 886                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 887
 888                 if (pinctl < 0)
 889                         return hbr ? -EINVAL : 0;
 890
 891                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 892                 if (hbr)
 893                         new_pinctl |= AC_PINCTL_EPT_HBR;
 894                 else
 895                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 896
 897                 codec_dbg(codec,
 898                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
 899                             pin_nid,
 900                             pinctl == new_pinctl ? "" : "new-",
 901                             new_pinctl);
 902
 903                 if (pinctl != new_pinctl)
 904                         snd_hda_codec_write(codec, pin_nid, 0,
 905                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 906                                             new_pinctl);
 907         } else if (hbr)
 908                 return -EINVAL;
 909
 910         return 0;
 911 }
 912
 913 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 914                               hda_nid_t pin_nid, u32 stream_tag, int format)
 915 {
 916         struct hdmi_spec *spec = codec->spec;
 917         unsigned int param;
 918         int err;
 919
 920         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
 921
 922         if (err) {
 923                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
 924                 return err;
 925         }
 926
 927         if (is_haswell_plus(codec)) {
 928
 929                 /*
 930                  * on recent platforms IEC Coding Type is required for HBR
 931                  * support, read current Digital Converter settings and set
 932                  * ICT bitfield if needed.
 933                  */
 934                 param = snd_hda_codec_read(codec, cvt_nid, 0,
 935                                            AC_VERB_GET_DIGI_CONVERT_1, 0);
 936
 937                 param = (param >> 16) & ~(AC_DIG3_ICT);
 938
 939                 /* on recent platforms ICT mode is required for HBR support */
 940                 if (is_hbr_format(format))
 941                         param |= 0x1;
 942
 943                 snd_hda_codec_write(codec, cvt_nid, 0,
 944                                     AC_VERB_SET_DIGI_CONVERT_3, param);
 945         }
 946
 947         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 948         return 0;
 949 }
 950
 951 /* Try to find an available converter
 952  * If pin_idx is less then zero, just try to find an available converter.
 953  * Otherwise, try to find an available converter and get the cvt mux index
 954  * of the pin.
 955  */
 956 static int hdmi_choose_cvt(struct hda_codec *codec,
 957                            int pin_idx, int *cvt_id)
 958 {
 959         struct hdmi_spec *spec = codec->spec;
 960         struct hdmi_spec_per_pin *per_pin;
 961         struct hdmi_spec_per_cvt *per_cvt = NULL;
 962         int cvt_idx, mux_idx = 0;
 963
 964         /* pin_idx < 0 means no pin will be bound to the converter */
 965         if (pin_idx < 0)
 966                 per_pin = NULL;
 967         else
 968                 per_pin = get_pin(spec, pin_idx);
 969
 970         /* Dynamically assign converter to stream */
 971         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 972                 per_cvt = get_cvt(spec, cvt_idx);
 973
 974                 /* Must not already be assigned */
 975                 if (per_cvt->assigned)
 976                         continue;
 977                 if (per_pin == NULL)
 978                         break;
 979                 /* Must be in pin's mux's list of converters */
 980                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
 981                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
 982                                 break;
 983                 /* Not in mux list */
 984                 if (mux_idx == per_pin->num_mux_nids)
 985                         continue;
 986                 break;
 987         }
 988
 989         /* No free converters */
 990         if (cvt_idx == spec->num_cvts)
 991                 return -EBUSY;
 992
 993         if (per_pin != NULL)
 994                 per_pin->mux_idx = mux_idx;
 995
 996         if (cvt_id)
 997                 *cvt_id = cvt_idx;
 998
 999         return 0;
1000 }
1001
1002 /* Assure the pin select the right convetor */
1003 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1004                         struct hdmi_spec_per_pin *per_pin)
1005 {
1006         hda_nid_t pin_nid = per_pin->pin_nid;
1007         int mux_idx, curr;
1008
1009         mux_idx = per_pin->mux_idx;
1010         curr = snd_hda_codec_read(codec, pin_nid, 0,
1011                                           AC_VERB_GET_CONNECT_SEL, 0);
1012         if (curr != mux_idx)
1013                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1014                                             AC_VERB_SET_CONNECT_SEL,
1015                                             mux_idx);
1016 }
1017
1018 /* get the mux index for the converter of the pins
1019  * converter's mux index is the same for all pins on Intel platform
1020  */
1021 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1022                         hda_nid_t cvt_nid)
1023 {
1024         int i;
1025
1026         for (i = 0; i < spec->num_cvts; i++)
1027                 if (spec->cvt_nids[i] == cvt_nid)
1028                         return i;
1029         return -EINVAL;
1030 }
1031
1032 /* Intel HDMI workaround to fix audio routing issue:
1033  * For some Intel display codecs, pins share the same connection list.
1034  * So a conveter can be selected by multiple pins and playback on any of these
1035  * pins will generate sound on the external display, because audio flows from
1036  * the same converter to the display pipeline. Also muting one pin may make
1037  * other pins have no sound output.
1038  * So this function assures that an assigned converter for a pin is not selected
1039  * by any other pins.
1040  */
1041 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1042                                          hda_nid_t pin_nid,
1043                                          int dev_id, int mux_idx)
1044 {
1045         struct hdmi_spec *spec = codec->spec;
1046         hda_nid_t nid;
1047         int cvt_idx, curr;
1048         struct hdmi_spec_per_cvt *per_cvt;
1049         struct hdmi_spec_per_pin *per_pin;
1050         int pin_idx;
1051
1052         /* configure the pins connections */
1053         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1054                 int dev_id_saved;
1055                 int dev_num;
1056
1057                 per_pin = get_pin(spec, pin_idx);
1058                 /*
1059                  * pin not connected to monitor
1060                  * no need to operate on it
1061                  */
1062                 if (!per_pin->pcm)
1063                         continue;
1064
1065                 if ((per_pin->pin_nid == pin_nid) &&
1066                         (per_pin->dev_id == dev_id))
1067                         continue;
1068
1069                 /*
1070                  * if per_pin->dev_id >= dev_num,
1071                  * snd_hda_get_dev_select() will fail,
1072                  * and the following operation is unpredictable.
1073                  * So skip this situation.
1074                  */
1075                 dev_num = snd_hda_get_num_devices(codec, per_pin->pin_nid) + 1;
1076                 if (per_pin->dev_id >= dev_num)
1077                         continue;
1078
1079                 nid = per_pin->pin_nid;
1080
1081                 /*
1082                  * Calling this function should not impact
1083                  * on the device entry selection
1084                  * So let's save the dev id for each pin,
1085                  * and restore it when return
1086                  */
1087                 dev_id_saved = snd_hda_get_dev_select(codec, nid);
1088                 snd_hda_set_dev_select(codec, nid, per_pin->dev_id);
1089                 curr = snd_hda_codec_read(codec, nid, 0,
1090                                           AC_VERB_GET_CONNECT_SEL, 0);
1091                 if (curr != mux_idx) {
1092                         snd_hda_set_dev_select(codec, nid, dev_id_saved);
1093                         continue;
1094                 }
1095
1096
1097                 /* choose an unassigned converter. The conveters in the
1098                  * connection list are in the same order as in the codec.
1099                  */
1100                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1101                         per_cvt = get_cvt(spec, cvt_idx);
1102                         if (!per_cvt->assigned) {
1103                                 codec_dbg(codec,
1104                                           "choose cvt %d for pin nid %d\n",
1105                                         cvt_idx, nid);
1106                                 snd_hda_codec_write_cache(codec, nid, 0,
1107                                             AC_VERB_SET_CONNECT_SEL,
1108                                             cvt_idx);
1109                                 break;
1110                         }
1111                 }
1112                 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1113         }
1114 }
1115
1116 /* A wrapper of intel_not_share_asigned_cvt() */
1117 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1118                         hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid)
1119 {
1120         int mux_idx;
1121         struct hdmi_spec *spec = codec->spec;
1122
1123         /* On Intel platform, the mapping of converter nid to
1124          * mux index of the pins are always the same.
1125          * The pin nid may be 0, this means all pins will not
1126          * share the converter.
1127          */
1128         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1129         if (mux_idx >= 0)
1130                 intel_not_share_assigned_cvt(codec, pin_nid, dev_id, mux_idx);
1131 }
1132
1133 /* skeleton caller of pin_cvt_fixup ops */
1134 static void pin_cvt_fixup(struct hda_codec *codec,
1135                           struct hdmi_spec_per_pin *per_pin,
1136                           hda_nid_t cvt_nid)
1137 {
1138         struct hdmi_spec *spec = codec->spec;
1139
1140         if (spec->ops.pin_cvt_fixup)
1141                 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid);
1142 }
1143
1144 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1145  * in dyn_pcm_assign mode.
1146  */
1147 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1148                          struct hda_codec *codec,
1149                          struct snd_pcm_substream *substream)
1150 {
1151         struct hdmi_spec *spec = codec->spec;
1152         struct snd_pcm_runtime *runtime = substream->runtime;
1153         int cvt_idx, pcm_idx;
1154         struct hdmi_spec_per_cvt *per_cvt = NULL;
1155         int err;
1156
1157         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1158         if (pcm_idx < 0)
1159                 return -EINVAL;
1160
1161         err = hdmi_choose_cvt(codec, -1, &cvt_idx);
1162         if (err)
1163                 return err;
1164
1165         per_cvt = get_cvt(spec, cvt_idx);
1166         per_cvt->assigned = 1;
1167         hinfo->nid = per_cvt->cvt_nid;
1168
1169         pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid);
1170
1171         set_bit(pcm_idx, &spec->pcm_in_use);
1172         /* todo: setup spdif ctls assign */
1173
1174         /* Initially set the converter's capabilities */
1175         hinfo->channels_min = per_cvt->channels_min;
1176         hinfo->channels_max = per_cvt->channels_max;
1177         hinfo->rates = per_cvt->rates;
1178         hinfo->formats = per_cvt->formats;
1179         hinfo->maxbps = per_cvt->maxbps;
1180
1181         /* Store the updated parameters */
1182         runtime->hw.channels_min = hinfo->channels_min;
1183         runtime->hw.channels_max = hinfo->channels_max;
1184         runtime->hw.formats = hinfo->formats;
1185         runtime->hw.rates = hinfo->rates;
1186
1187         snd_pcm_hw_constraint_step(substream->runtime, 0,
1188                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1189         return 0;
1190 }
1191
1192 /*
1193  * HDA PCM callbacks
1194  */
1195 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1196                          struct hda_codec *codec,
1197                          struct snd_pcm_substream *substream)
1198 {
1199         struct hdmi_spec *spec = codec->spec;
1200         struct snd_pcm_runtime *runtime = substream->runtime;
1201         int pin_idx, cvt_idx, pcm_idx;
1202         struct hdmi_spec_per_pin *per_pin;
1203         struct hdmi_eld *eld;
1204         struct hdmi_spec_per_cvt *per_cvt = NULL;
1205         int err;
1206
1207         /* Validate hinfo */
1208         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1209         if (pcm_idx < 0)
1210                 return -EINVAL;
1211
1212         mutex_lock(&spec->pcm_lock);
1213         pin_idx = hinfo_to_pin_index(codec, hinfo);
1214         if (!spec->dyn_pcm_assign) {
1215                 if (snd_BUG_ON(pin_idx < 0)) {
1216                         err = -EINVAL;
1217                         goto unlock;
1218                 }
1219         } else {
1220                 /* no pin is assigned to the PCM
1221                  * PA need pcm open successfully when probe
1222                  */
1223                 if (pin_idx < 0) {
1224                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1225                         goto unlock;
1226                 }
1227         }
1228
1229         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1230         if (err < 0)
1231                 goto unlock;
1232
1233         per_cvt = get_cvt(spec, cvt_idx);
1234         /* Claim converter */
1235         per_cvt->assigned = 1;
1236
1237         set_bit(pcm_idx, &spec->pcm_in_use);
1238         per_pin = get_pin(spec, pin_idx);
1239         per_pin->cvt_nid = per_cvt->cvt_nid;
1240         hinfo->nid = per_cvt->cvt_nid;
1241
1242         snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1243         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1244                             AC_VERB_SET_CONNECT_SEL,
1245                             per_pin->mux_idx);
1246
1247         /* configure unused pins to choose other converters */
1248         pin_cvt_fixup(codec, per_pin, 0);
1249
1250         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1251
1252         /* Initially set the converter's capabilities */
1253         hinfo->channels_min = per_cvt->channels_min;
1254         hinfo->channels_max = per_cvt->channels_max;
1255         hinfo->rates = per_cvt->rates;
1256         hinfo->formats = per_cvt->formats;
1257         hinfo->maxbps = per_cvt->maxbps;
1258
1259         eld = &per_pin->sink_eld;
1260         /* Restrict capabilities by ELD if this isn't disabled */
1261         if (!static_hdmi_pcm && eld->eld_valid) {
1262                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1263                 if (hinfo->channels_min > hinfo->channels_max ||
1264                     !hinfo->rates || !hinfo->formats) {
1265                         per_cvt->assigned = 0;
1266                         hinfo->nid = 0;
1267                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1268                         err = -ENODEV;
1269                         goto unlock;
1270                 }
1271         }
1272
1273         /* Store the updated parameters */
1274         runtime->hw.channels_min = hinfo->channels_min;
1275         runtime->hw.channels_max = hinfo->channels_max;
1276         runtime->hw.formats = hinfo->formats;
1277         runtime->hw.rates = hinfo->rates;
1278
1279         snd_pcm_hw_constraint_step(substream->runtime, 0,
1280                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1281  unlock:
1282         mutex_unlock(&spec->pcm_lock);
1283         return err;
1284 }
1285
1286 /*
1287  * HDA/HDMI auto parsing
1288  */
1289 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1290 {
1291         struct hdmi_spec *spec = codec->spec;
1292         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1293         hda_nid_t pin_nid = per_pin->pin_nid;
1294
1295         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1296                 codec_warn(codec,
1297                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1298                            pin_nid, get_wcaps(codec, pin_nid));
1299                 return -EINVAL;
1300         }
1301
1302         /* all the device entries on the same pin have the same conn list */
1303         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1304                                                         per_pin->mux_nids,
1305                                                         HDA_MAX_CONNECTIONS);
1306
1307         return 0;
1308 }
1309
1310 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1311                                 struct hdmi_spec_per_pin *per_pin)
1312 {
1313         int i;
1314
1315         /* try the prefer PCM */
1316         if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1317                 return per_pin->pin_nid_idx;
1318
1319         /* have a second try; check the "reserved area" over num_pins */
1320         for (i = spec->num_nids; i < spec->pcm_used; i++) {
1321                 if (!test_bit(i, &spec->pcm_bitmap))
1322                         return i;
1323         }
1324
1325         /* the last try; check the empty slots in pins */
1326         for (i = 0; i < spec->num_nids; i++) {
1327                 if (!test_bit(i, &spec->pcm_bitmap))
1328                         return i;
1329         }
1330         return -EBUSY;
1331 }
1332
1333 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1334                                 struct hdmi_spec_per_pin *per_pin)
1335 {
1336         int idx;
1337
1338         /* pcm already be attached to the pin */
1339         if (per_pin->pcm)
1340                 return;
1341         idx = hdmi_find_pcm_slot(spec, per_pin);
1342         if (idx == -EBUSY)
1343                 return;
1344         per_pin->pcm_idx = idx;
1345         per_pin->pcm = get_hdmi_pcm(spec, idx);
1346         set_bit(idx, &spec->pcm_bitmap);
1347 }
1348
1349 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1350                                 struct hdmi_spec_per_pin *per_pin)
1351 {
1352         int idx;
1353
1354         /* pcm already be detached from the pin */
1355         if (!per_pin->pcm)
1356                 return;
1357         idx = per_pin->pcm_idx;
1358         per_pin->pcm_idx = -1;
1359         per_pin->pcm = NULL;
1360         if (idx >= 0 && idx < spec->pcm_used)
1361                 clear_bit(idx, &spec->pcm_bitmap);
1362 }
1363
1364 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1365                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1366 {
1367         int mux_idx;
1368
1369         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1370                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1371                         break;
1372         return mux_idx;
1373 }
1374
1375 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1376
1377 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1378                            struct hdmi_spec_per_pin *per_pin)
1379 {
1380         struct hda_codec *codec = per_pin->codec;
1381         struct hda_pcm *pcm;
1382         struct hda_pcm_stream *hinfo;
1383         struct snd_pcm_substream *substream;
1384         int mux_idx;
1385         bool non_pcm;
1386
1387         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1388                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1389         else
1390                 return;
1391         if (!pcm->pcm)
1392                 return;
1393         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1394                 return;
1395
1396         /* hdmi audio only uses playback and one substream */
1397         hinfo = pcm->stream;
1398         substream = pcm->pcm->streams[0].substream;
1399
1400         per_pin->cvt_nid = hinfo->nid;
1401
1402         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1403         if (mux_idx < per_pin->num_mux_nids) {
1404                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1405                                    per_pin->dev_id);
1406                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1407                                 AC_VERB_SET_CONNECT_SEL,
1408                                 mux_idx);
1409         }
1410         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1411
1412         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1413         if (substream->runtime)
1414                 per_pin->channels = substream->runtime->channels;
1415         per_pin->setup = true;
1416         per_pin->mux_idx = mux_idx;
1417
1418         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1419 }
1420
1421 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1422                            struct hdmi_spec_per_pin *per_pin)
1423 {
1424         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1425                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1426
1427         per_pin->chmap_set = false;
1428         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1429
1430         per_pin->setup = false;
1431         per_pin->channels = 0;
1432 }
1433
1434 /* update per_pin ELD from the given new ELD;
1435  * setup info frame and notification accordingly
1436  */
1437 static void update_eld(struct hda_codec *codec,
1438                        struct hdmi_spec_per_pin *per_pin,
1439                        struct hdmi_eld *eld)
1440 {
1441         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1442         struct hdmi_spec *spec = codec->spec;
1443         bool old_eld_valid = pin_eld->eld_valid;
1444         bool eld_changed;
1445         int pcm_idx = -1;
1446
1447         /* for monitor disconnection, save pcm_idx firstly */
1448         pcm_idx = per_pin->pcm_idx;
1449         if (spec->dyn_pcm_assign) {
1450                 if (eld->eld_valid) {
1451                         hdmi_attach_hda_pcm(spec, per_pin);
1452                         hdmi_pcm_setup_pin(spec, per_pin);
1453                 } else {
1454                         hdmi_pcm_reset_pin(spec, per_pin);
1455                         hdmi_detach_hda_pcm(spec, per_pin);
1456                 }
1457         }
1458         /* if pcm_idx == -1, it means this is in monitor connection event
1459          * we can get the correct pcm_idx now.
1460          */
1461         if (pcm_idx == -1)
1462                 pcm_idx = per_pin->pcm_idx;
1463
1464         if (eld->eld_valid)
1465                 snd_hdmi_show_eld(codec, &eld->info);
1466
1467         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1468         if (eld->eld_valid && pin_eld->eld_valid)
1469                 if (pin_eld->eld_size != eld->eld_size ||
1470                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1471                            eld->eld_size) != 0)
1472                         eld_changed = true;
1473
1474         pin_eld->monitor_present = eld->monitor_present;
1475         pin_eld->eld_valid = eld->eld_valid;
1476         pin_eld->eld_size = eld->eld_size;
1477         if (eld->eld_valid)
1478                 memcpy(pin_eld->eld_buffer, eld->eld_buffer, eld->eld_size);
1479         pin_eld->info = eld->info;
1480
1481         /*
1482          * Re-setup pin and infoframe. This is needed e.g. when
1483          * - sink is first plugged-in
1484          * - transcoder can change during stream playback on Haswell
1485          *   and this can make HW reset converter selection on a pin.
1486          */
1487         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1488                 pin_cvt_fixup(codec, per_pin, 0);
1489                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1490         }
1491
1492         if (eld_changed && pcm_idx >= 0)
1493                 snd_ctl_notify(codec->card,
1494                                SNDRV_CTL_EVENT_MASK_VALUE |
1495                                SNDRV_CTL_EVENT_MASK_INFO,
1496                                &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1497 }
1498
1499 /* update ELD and jack state via HD-audio verbs */
1500 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1501                                          int repoll)
1502 {
1503         struct hda_jack_tbl *jack;
1504         struct hda_codec *codec = per_pin->codec;
1505         struct hdmi_spec *spec = codec->spec;
1506         struct hdmi_eld *eld = &spec->temp_eld;
1507         hda_nid_t pin_nid = per_pin->pin_nid;
1508         /*
1509          * Always execute a GetPinSense verb here, even when called from
1510          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1511          * response's PD bit is not the real PD value, but indicates that
1512          * the real PD value changed. An older version of the HD-audio
1513          * specification worked this way. Hence, we just ignore the data in
1514          * the unsolicited response to avoid custom WARs.
1515          */
1516         int present;
1517         bool ret;
1518         bool do_repoll = false;
1519
1520         present = snd_hda_pin_sense(codec, pin_nid);
1521
1522         mutex_lock(&per_pin->lock);
1523         eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1524         if (eld->monitor_present)
1525                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1526         else
1527                 eld->eld_valid = false;
1528
1529         codec_dbg(codec,
1530                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1531                 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1532
1533         if (eld->eld_valid) {
1534                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1535                                                      &eld->eld_size) < 0)
1536                         eld->eld_valid = false;
1537                 else {
1538                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1539                                                     eld->eld_size) < 0)
1540                                 eld->eld_valid = false;
1541                 }
1542                 if (!eld->eld_valid && repoll)
1543                         do_repoll = true;
1544         }
1545
1546         if (do_repoll)
1547                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1548         else
1549                 update_eld(codec, per_pin, eld);
1550
1551         ret = !repoll || !eld->monitor_present || eld->eld_valid;
1552
1553         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1554         if (jack)
1555                 jack->block_report = !ret;
1556
1557         mutex_unlock(&per_pin->lock);
1558         return ret;
1559 }
1560
1561 static struct snd_jack *pin_idx_to_jack(struct hda_codec *codec,
1562                                  struct hdmi_spec_per_pin *per_pin)
1563 {
1564         struct hdmi_spec *spec = codec->spec;
1565         struct snd_jack *jack = NULL;
1566         struct hda_jack_tbl *jack_tbl;
1567
1568         /* if !dyn_pcm_assign, get jack from hda_jack_tbl
1569          * in !dyn_pcm_assign case, spec->pcm_rec[].jack is not
1570          * NULL even after snd_hda_jack_tbl_clear() is called to
1571          * free snd_jack. This may cause access invalid memory
1572          * when calling snd_jack_report
1573          */
1574         if (per_pin->pcm_idx >= 0 && spec->dyn_pcm_assign)
1575                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1576         else if (!spec->dyn_pcm_assign) {
1577                 /*
1578                  * jack tbl doesn't support DP MST
1579                  * DP MST will use dyn_pcm_assign,
1580                  * so DP MST will never come here
1581                  */
1582                 jack_tbl = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1583                 if (jack_tbl)
1584                         jack = jack_tbl->jack;
1585         }
1586         return jack;
1587 }
1588
1589 /* update ELD and jack state via audio component */
1590 static void sync_eld_via_acomp(struct hda_codec *codec,
1591                                struct hdmi_spec_per_pin *per_pin)
1592 {
1593         struct hdmi_spec *spec = codec->spec;
1594         struct hdmi_eld *eld = &spec->temp_eld;
1595         struct snd_jack *jack = NULL;
1596         int size;
1597
1598         mutex_lock(&per_pin->lock);
1599         eld->monitor_present = false;
1600         size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid,
1601                                       per_pin->dev_id, &eld->monitor_present,
1602                                       eld->eld_buffer, ELD_MAX_SIZE);
1603         if (size > 0) {
1604                 size = min(size, ELD_MAX_SIZE);
1605                 if (snd_hdmi_parse_eld(codec, &eld->info,
1606                                        eld->eld_buffer, size) < 0)
1607                         size = -EINVAL;
1608         }
1609
1610         if (size > 0) {
1611                 eld->eld_valid = true;
1612                 eld->eld_size = size;
1613         } else {
1614                 eld->eld_valid = false;
1615                 eld->eld_size = 0;
1616         }
1617
1618         /* pcm_idx >=0 before update_eld() means it is in monitor
1619          * disconnected event. Jack must be fetched before update_eld()
1620          */
1621         jack = pin_idx_to_jack(codec, per_pin);
1622         update_eld(codec, per_pin, eld);
1623         if (jack == NULL)
1624                 jack = pin_idx_to_jack(codec, per_pin);
1625         if (jack == NULL)
1626                 goto unlock;
1627         snd_jack_report(jack,
1628                         eld->monitor_present ? SND_JACK_AVOUT : 0);
1629  unlock:
1630         mutex_unlock(&per_pin->lock);
1631 }
1632
1633 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1634 {
1635         struct hda_codec *codec = per_pin->codec;
1636         int ret;
1637
1638         /* no temporary power up/down needed for component notifier */
1639         if (!codec_has_acomp(codec)) {
1640                 ret = snd_hda_power_up_pm(codec);
1641                 if (ret < 0 && pm_runtime_suspended(hda_codec_dev(codec))) {
1642                         snd_hda_power_down_pm(codec);
1643                         return false;
1644                 }
1645         }
1646
1647         if (codec_has_acomp(codec)) {
1648                 sync_eld_via_acomp(codec, per_pin);
1649                 ret = false; /* don't call snd_hda_jack_report_sync() */
1650         } else {
1651                 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
1652         }
1653
1654         if (!codec_has_acomp(codec))
1655                 snd_hda_power_down_pm(codec);
1656
1657         return ret;
1658 }
1659
1660 static void hdmi_repoll_eld(struct work_struct *work)
1661 {
1662         struct hdmi_spec_per_pin *per_pin =
1663         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1664         struct hda_codec *codec = per_pin->codec;
1665         struct hdmi_spec *spec = codec->spec;
1666         struct hda_jack_tbl *jack;
1667
1668         jack = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1669         if (jack)
1670                 jack->jack_dirty = 1;
1671
1672         if (per_pin->repoll_count++ > 6)
1673                 per_pin->repoll_count = 0;
1674
1675         mutex_lock(&spec->pcm_lock);
1676         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1677                 snd_hda_jack_report_sync(per_pin->codec);
1678         mutex_unlock(&spec->pcm_lock);
1679 }
1680
1681 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1682                                              hda_nid_t nid);
1683
1684 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1685 {
1686         struct hdmi_spec *spec = codec->spec;
1687         unsigned int caps, config;
1688         int pin_idx;
1689         struct hdmi_spec_per_pin *per_pin;
1690         int err;
1691         int dev_num, i;
1692
1693         caps = snd_hda_query_pin_caps(codec, pin_nid);
1694         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1695                 return 0;
1696
1697         /*
1698          * For DP MST audio, Configuration Default is the same for
1699          * all device entries on the same pin
1700          */
1701         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1702         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1703                 return 0;
1704
1705         /*
1706          * To simplify the implementation, malloc all
1707          * the virtual pins in the initialization statically
1708          */
1709         if (is_haswell_plus(codec)) {
1710                 /*
1711                  * On Intel platforms, device entries number is
1712                  * changed dynamically. If there is a DP MST
1713                  * hub connected, the device entries number is 3.
1714                  * Otherwise, it is 1.
1715                  * Here we manually set dev_num to 3, so that
1716                  * we can initialize all the device entries when
1717                  * bootup statically.
1718                  */
1719                 dev_num = 3;
1720                 spec->dev_num = 3;
1721         } else if (spec->dyn_pcm_assign && codec->dp_mst) {
1722                 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1;
1723                 /*
1724                  * spec->dev_num is the maxinum number of device entries
1725                  * among all the pins
1726                  */
1727                 spec->dev_num = (spec->dev_num > dev_num) ?
1728                         spec->dev_num : dev_num;
1729         } else {
1730                 /*
1731                  * If the platform doesn't support DP MST,
1732                  * manually set dev_num to 1. This means
1733                  * the pin has only one device entry.
1734                  */
1735                 dev_num = 1;
1736                 spec->dev_num = 1;
1737         }
1738
1739         for (i = 0; i < dev_num; i++) {
1740                 pin_idx = spec->num_pins;
1741                 per_pin = snd_array_new(&spec->pins);
1742
1743                 if (!per_pin)
1744                         return -ENOMEM;
1745
1746                 if (spec->dyn_pcm_assign) {
1747                         per_pin->pcm = NULL;
1748                         per_pin->pcm_idx = -1;
1749                 } else {
1750                         per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1751                         per_pin->pcm_idx = pin_idx;
1752                 }
1753                 per_pin->pin_nid = pin_nid;
1754                 per_pin->pin_nid_idx = spec->num_nids;
1755                 per_pin->dev_id = i;
1756                 per_pin->non_pcm = false;
1757                 snd_hda_set_dev_select(codec, pin_nid, i);
1758                 if (is_haswell_plus(codec))
1759                         intel_haswell_fixup_connect_list(codec, pin_nid);
1760                 err = hdmi_read_pin_conn(codec, pin_idx);
1761                 if (err < 0)
1762                         return err;
1763                 spec->num_pins++;
1764         }
1765         spec->num_nids++;
1766
1767         return 0;
1768 }
1769
1770 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1771 {
1772         struct hdmi_spec *spec = codec->spec;
1773         struct hdmi_spec_per_cvt *per_cvt;
1774         unsigned int chans;
1775         int err;
1776
1777         chans = get_wcaps(codec, cvt_nid);
1778         chans = get_wcaps_channels(chans);
1779
1780         per_cvt = snd_array_new(&spec->cvts);
1781         if (!per_cvt)
1782                 return -ENOMEM;
1783
1784         per_cvt->cvt_nid = cvt_nid;
1785         per_cvt->channels_min = 2;
1786         if (chans <= 16) {
1787                 per_cvt->channels_max = chans;
1788                 if (chans > spec->chmap.channels_max)
1789                         spec->chmap.channels_max = chans;
1790         }
1791
1792         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1793                                           &per_cvt->rates,
1794                                           &per_cvt->formats,
1795                                           &per_cvt->maxbps);
1796         if (err < 0)
1797                 return err;
1798
1799         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1800                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1801         spec->num_cvts++;
1802
1803         return 0;
1804 }
1805
1806 static int hdmi_parse_codec(struct hda_codec *codec)
1807 {
1808         hda_nid_t nid;
1809         int i, nodes;
1810
1811         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
1812         if (!nid || nodes < 0) {
1813                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1814                 return -EINVAL;
1815         }
1816
1817         for (i = 0; i < nodes; i++, nid++) {
1818                 unsigned int caps;
1819                 unsigned int type;
1820
1821                 caps = get_wcaps(codec, nid);
1822                 type = get_wcaps_type(caps);
1823
1824                 if (!(caps & AC_WCAP_DIGITAL))
1825                         continue;
1826
1827                 switch (type) {
1828                 case AC_WID_AUD_OUT:
1829                         hdmi_add_cvt(codec, nid);
1830                         break;
1831                 case AC_WID_PIN:
1832                         hdmi_add_pin(codec, nid);
1833                         break;
1834                 }
1835         }
1836
1837         return 0;
1838 }
1839
1840 /*
1841  */
1842 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1843 {
1844         struct hda_spdif_out *spdif;
1845         bool non_pcm;
1846
1847         mutex_lock(&codec->spdif_mutex);
1848         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1849         /* Add sanity check to pass klockwork check.
1850          * This should never happen.
1851          */
1852         if (WARN_ON(spdif == NULL))
1853                 return true;
1854         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1855         mutex_unlock(&codec->spdif_mutex);
1856         return non_pcm;
1857 }
1858
1859 /*
1860  * HDMI callbacks
1861  */
1862
1863 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1864                                            struct hda_codec *codec,
1865                                            unsigned int stream_tag,
1866                                            unsigned int format,
1867                                            struct snd_pcm_substream *substream)
1868 {
1869         hda_nid_t cvt_nid = hinfo->nid;
1870         struct hdmi_spec *spec = codec->spec;
1871         int pin_idx;
1872         struct hdmi_spec_per_pin *per_pin;
1873         hda_nid_t pin_nid;
1874         struct snd_pcm_runtime *runtime = substream->runtime;
1875         bool non_pcm;
1876         int pinctl, stripe;
1877         int err = 0;
1878
1879         mutex_lock(&spec->pcm_lock);
1880         pin_idx = hinfo_to_pin_index(codec, hinfo);
1881         if (spec->dyn_pcm_assign && pin_idx < 0) {
1882                 /* when dyn_pcm_assign and pcm is not bound to a pin
1883                  * skip pin setup and return 0 to make audio playback
1884                  * be ongoing
1885                  */
1886                 pin_cvt_fixup(codec, NULL, cvt_nid);
1887                 snd_hda_codec_setup_stream(codec, cvt_nid,
1888                                         stream_tag, 0, format);
1889                 goto unlock;
1890         }
1891
1892         if (snd_BUG_ON(pin_idx < 0)) {
1893                 err = -EINVAL;
1894                 goto unlock;
1895         }
1896         per_pin = get_pin(spec, pin_idx);
1897         pin_nid = per_pin->pin_nid;
1898
1899         /* Verify pin:cvt selections to avoid silent audio after S3.
1900          * After S3, the audio driver restores pin:cvt selections
1901          * but this can happen before gfx is ready and such selection
1902          * is overlooked by HW. Thus multiple pins can share a same
1903          * default convertor and mute control will affect each other,
1904          * which can cause a resumed audio playback become silent
1905          * after S3.
1906          */
1907         pin_cvt_fixup(codec, per_pin, 0);
1908
1909         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1910         /* Todo: add DP1.2 MST audio support later */
1911         if (codec_has_acomp(codec))
1912                 snd_hdac_sync_audio_rate(&codec->core, pin_nid, per_pin->dev_id,
1913                                          runtime->rate);
1914
1915         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1916         mutex_lock(&per_pin->lock);
1917         per_pin->channels = substream->runtime->channels;
1918         per_pin->setup = true;
1919
1920         if (get_wcaps(codec, cvt_nid) & AC_WCAP_STRIPE) {
1921                 stripe = snd_hdac_get_stream_stripe_ctl(&codec->bus->core,
1922                                                         substream);
1923                 snd_hda_codec_write(codec, cvt_nid, 0,
1924                                     AC_VERB_SET_STRIPE_CONTROL,
1925                                     stripe);
1926         }
1927
1928         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1929         mutex_unlock(&per_pin->lock);
1930         if (spec->dyn_pin_out) {
1931                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1932                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1933                 snd_hda_codec_write(codec, pin_nid, 0,
1934                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1935                                     pinctl | PIN_OUT);
1936         }
1937
1938         /* snd_hda_set_dev_select() has been called before */
1939         err = spec->ops.setup_stream(codec, cvt_nid, pin_nid,
1940                                  stream_tag, format);
1941  unlock:
1942         mutex_unlock(&spec->pcm_lock);
1943         return err;
1944 }
1945
1946 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1947                                              struct hda_codec *codec,
1948                                              struct snd_pcm_substream *substream)
1949 {
1950         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1951         return 0;
1952 }
1953
1954 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1955                           struct hda_codec *codec,
1956                           struct snd_pcm_substream *substream)
1957 {
1958         struct hdmi_spec *spec = codec->spec;
1959         int cvt_idx, pin_idx, pcm_idx;
1960         struct hdmi_spec_per_cvt *per_cvt;
1961         struct hdmi_spec_per_pin *per_pin;
1962         int pinctl;
1963         int err = 0;
1964
1965         if (hinfo->nid) {
1966                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1967                 if (snd_BUG_ON(pcm_idx < 0))
1968                         return -EINVAL;
1969                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
1970                 if (snd_BUG_ON(cvt_idx < 0))
1971                         return -EINVAL;
1972                 per_cvt = get_cvt(spec, cvt_idx);
1973
1974                 snd_BUG_ON(!per_cvt->assigned);
1975                 per_cvt->assigned = 0;
1976                 hinfo->nid = 0;
1977
1978                 mutex_lock(&spec->pcm_lock);
1979                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1980                 clear_bit(pcm_idx, &spec->pcm_in_use);
1981                 pin_idx = hinfo_to_pin_index(codec, hinfo);
1982                 if (spec->dyn_pcm_assign && pin_idx < 0)
1983                         goto unlock;
1984
1985                 if (snd_BUG_ON(pin_idx < 0)) {
1986                         err = -EINVAL;
1987                         goto unlock;
1988                 }
1989                 per_pin = get_pin(spec, pin_idx);
1990
1991                 if (spec->dyn_pin_out) {
1992                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1993                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1994                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1995                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1996                                             pinctl & ~PIN_OUT);
1997                 }
1998
1999                 mutex_lock(&per_pin->lock);
2000                 per_pin->chmap_set = false;
2001                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2002
2003                 per_pin->setup = false;
2004                 per_pin->channels = 0;
2005                 mutex_unlock(&per_pin->lock);
2006         unlock:
2007                 mutex_unlock(&spec->pcm_lock);
2008         }
2009
2010         return err;
2011 }
2012
2013 static const struct hda_pcm_ops generic_ops = {
2014         .open = hdmi_pcm_open,
2015         .close = hdmi_pcm_close,
2016         .prepare = generic_hdmi_playback_pcm_prepare,
2017         .cleanup = generic_hdmi_playback_pcm_cleanup,
2018 };
2019
2020 static int hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
2021 {
2022         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2023         struct hdmi_spec *spec = codec->spec;
2024         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2025
2026         if (!per_pin)
2027                 return 0;
2028
2029         return per_pin->sink_eld.info.spk_alloc;
2030 }
2031
2032 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
2033                                         unsigned char *chmap)
2034 {
2035         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2036         struct hdmi_spec *spec = codec->spec;
2037         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2038
2039         /* chmap is already set to 0 in caller */
2040         if (!per_pin)
2041                 return;
2042
2043         memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
2044 }
2045
2046 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
2047                                 unsigned char *chmap, int prepared)
2048 {
2049         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2050         struct hdmi_spec *spec = codec->spec;
2051         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2052
2053         if (!per_pin)
2054                 return;
2055         mutex_lock(&per_pin->lock);
2056         per_pin->chmap_set = true;
2057         memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
2058         if (prepared)
2059                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2060         mutex_unlock(&per_pin->lock);
2061 }
2062
2063 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
2064 {
2065         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2066         struct hdmi_spec *spec = codec->spec;
2067         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2068
2069         return per_pin ? true:false;
2070 }
2071
2072 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2073 {
2074         struct hdmi_spec *spec = codec->spec;
2075         int idx;
2076
2077         /*
2078          * for non-mst mode, pcm number is the same as before
2079          * for DP MST mode, pcm number is (nid number + dev_num - 1)
2080          *  dev_num is the device entry number in a pin
2081          *
2082          */
2083         for (idx = 0; idx < spec->num_nids + spec->dev_num - 1; idx++) {
2084                 struct hda_pcm *info;
2085                 struct hda_pcm_stream *pstr;
2086
2087                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", idx);
2088                 if (!info)
2089                         return -ENOMEM;
2090
2091                 spec->pcm_rec[idx].pcm = info;
2092                 spec->pcm_used++;
2093                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2094                 info->own_chmap = true;
2095
2096                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2097                 pstr->substreams = 1;
2098                 pstr->ops = generic_ops;
2099                 /* pcm number is less than 16 */
2100                 if (spec->pcm_used >= 16)
2101                         break;
2102                 /* other pstr fields are set in open */
2103         }
2104
2105         return 0;
2106 }
2107
2108 static void free_hdmi_jack_priv(struct snd_jack *jack)
2109 {
2110         struct hdmi_pcm *pcm = jack->private_data;
2111
2112         pcm->jack = NULL;
2113 }
2114
2115 static int add_hdmi_jack_kctl(struct hda_codec *codec,
2116                                struct hdmi_spec *spec,
2117                                int pcm_idx,
2118                                const char *name)
2119 {
2120         struct snd_jack *jack;
2121         int err;
2122
2123         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
2124                            true, false);
2125         if (err < 0)
2126                 return err;
2127
2128         spec->pcm_rec[pcm_idx].jack = jack;
2129         jack->private_data = &spec->pcm_rec[pcm_idx];
2130         jack->private_free = free_hdmi_jack_priv;
2131         return 0;
2132 }
2133
2134 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2135 {
2136         char hdmi_str[32] = "HDMI/DP";
2137         struct hdmi_spec *spec = codec->spec;
2138         struct hdmi_spec_per_pin *per_pin;
2139         struct hda_jack_tbl *jack;
2140         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2141         bool phantom_jack;
2142         int ret;
2143
2144         if (pcmdev > 0)
2145                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2146
2147         if (spec->dyn_pcm_assign)
2148                 return add_hdmi_jack_kctl(codec, spec, pcm_idx, hdmi_str);
2149
2150         /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
2151         /* if !dyn_pcm_assign, it must be non-MST mode.
2152          * This means pcms and pins are statically mapped.
2153          * And pcm_idx is pin_idx.
2154          */
2155         per_pin = get_pin(spec, pcm_idx);
2156         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
2157         if (phantom_jack)
2158                 strncat(hdmi_str, " Phantom",
2159                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2160         ret = snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str,
2161                                     phantom_jack, 0, NULL);
2162         if (ret < 0)
2163                 return ret;
2164         jack = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
2165         if (jack == NULL)
2166                 return 0;
2167         /* assign jack->jack to pcm_rec[].jack to
2168          * align with dyn_pcm_assign mode
2169          */
2170         spec->pcm_rec[pcm_idx].jack = jack->jack;
2171         return 0;
2172 }
2173
2174 static int generic_hdmi_build_controls(struct hda_codec *codec)
2175 {
2176         struct hdmi_spec *spec = codec->spec;
2177         int dev, err;
2178         int pin_idx, pcm_idx;
2179
2180         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2181                 if (!get_pcm_rec(spec, pcm_idx)->pcm) {
2182                         /* no PCM: mark this for skipping permanently */
2183                         set_bit(pcm_idx, &spec->pcm_bitmap);
2184                         continue;
2185                 }
2186
2187                 err = generic_hdmi_build_jack(codec, pcm_idx);
2188                 if (err < 0)
2189                         return err;
2190
2191                 /* create the spdif for each pcm
2192                  * pin will be bound when monitor is connected
2193                  */
2194                 if (spec->dyn_pcm_assign)
2195                         err = snd_hda_create_dig_out_ctls(codec,
2196                                           0, spec->cvt_nids[0],
2197                                           HDA_PCM_TYPE_HDMI);
2198                 else {
2199                         struct hdmi_spec_per_pin *per_pin =
2200                                 get_pin(spec, pcm_idx);
2201                         err = snd_hda_create_dig_out_ctls(codec,
2202                                                   per_pin->pin_nid,
2203                                                   per_pin->mux_nids[0],
2204                                                   HDA_PCM_TYPE_HDMI);
2205                 }
2206                 if (err < 0)
2207                         return err;
2208                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2209
2210                 dev = get_pcm_rec(spec, pcm_idx)->device;
2211                 if (dev != SNDRV_PCM_INVALID_DEVICE) {
2212                         /* add control for ELD Bytes */
2213                         err = hdmi_create_eld_ctl(codec, pcm_idx, dev);
2214                         if (err < 0)
2215                                 return err;
2216                 }
2217         }
2218
2219         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2220                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2221
2222                 hdmi_present_sense(per_pin, 0);
2223         }
2224
2225         /* add channel maps */
2226         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2227                 struct hda_pcm *pcm;
2228
2229                 pcm = get_pcm_rec(spec, pcm_idx);
2230                 if (!pcm || !pcm->pcm)
2231                         break;
2232                 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2233                 if (err < 0)
2234                         return err;
2235         }
2236
2237         return 0;
2238 }
2239
2240 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2241 {
2242         struct hdmi_spec *spec = codec->spec;
2243         int pin_idx;
2244
2245         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2246                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2247
2248                 per_pin->codec = codec;
2249                 mutex_init(&per_pin->lock);
2250                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2251                 eld_proc_new(per_pin, pin_idx);
2252         }
2253         return 0;
2254 }
2255
2256 static int generic_hdmi_init(struct hda_codec *codec)
2257 {
2258         struct hdmi_spec *spec = codec->spec;
2259         int pin_idx;
2260
2261         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2262                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2263                 hda_nid_t pin_nid = per_pin->pin_nid;
2264                 int dev_id = per_pin->dev_id;
2265
2266                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
2267                 hdmi_init_pin(codec, pin_nid);
2268                 if (!codec_has_acomp(codec))
2269                         snd_hda_jack_detect_enable_callback(codec, pin_nid,
2270                                 codec->jackpoll_interval > 0 ?
2271                                 jack_callback : NULL);
2272         }
2273         return 0;
2274 }
2275
2276 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2277 {
2278         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2279         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2280 }
2281
2282 static void hdmi_array_free(struct hdmi_spec *spec)
2283 {
2284         snd_array_free(&spec->pins);
2285         snd_array_free(&spec->cvts);
2286 }
2287
2288 static void generic_spec_free(struct hda_codec *codec)
2289 {
2290         struct hdmi_spec *spec = codec->spec;
2291
2292         if (spec) {
2293                 hdmi_array_free(spec);
2294                 kfree(spec);
2295                 codec->spec = NULL;
2296         }
2297         codec->dp_mst = false;
2298 }
2299
2300 static void generic_hdmi_free(struct hda_codec *codec)
2301 {
2302         struct hdmi_spec *spec = codec->spec;
2303         int pin_idx, pcm_idx;
2304
2305         if (codec_has_acomp(codec))
2306                 snd_hdac_acomp_register_notifier(&codec->bus->core, NULL);
2307
2308         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2309                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2310                 cancel_delayed_work_sync(&per_pin->work);
2311                 eld_proc_free(per_pin);
2312         }
2313
2314         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2315                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2316                         continue;
2317                 if (spec->dyn_pcm_assign)
2318                         snd_device_free(codec->card,
2319                                         spec->pcm_rec[pcm_idx].jack);
2320                 else
2321                         spec->pcm_rec[pcm_idx].jack = NULL;
2322         }
2323
2324         generic_spec_free(codec);
2325 }
2326
2327 #ifdef CONFIG_PM
2328 static int generic_hdmi_resume(struct hda_codec *codec)
2329 {
2330         struct hdmi_spec *spec = codec->spec;
2331         int pin_idx;
2332
2333         codec->patch_ops.init(codec);
2334         regcache_sync(codec->core.regmap);
2335
2336         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2337                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2338                 hdmi_present_sense(per_pin, 1);
2339         }
2340         return 0;
2341 }
2342 #endif
2343
2344 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2345         .init                   = generic_hdmi_init,
2346         .free                   = generic_hdmi_free,
2347         .build_pcms             = generic_hdmi_build_pcms,
2348         .build_controls         = generic_hdmi_build_controls,
2349         .unsol_event            = hdmi_unsol_event,
2350 #ifdef CONFIG_PM
2351         .resume                 = generic_hdmi_resume,
2352 #endif
2353 };
2354
2355 static const struct hdmi_ops generic_standard_hdmi_ops = {
2356         .pin_get_eld                            = snd_hdmi_get_eld,
2357         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2358         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2359         .setup_stream                           = hdmi_setup_stream,
2360 };
2361
2362 /* allocate codec->spec and assign/initialize generic parser ops */
2363 static int alloc_generic_hdmi(struct hda_codec *codec)
2364 {
2365         struct hdmi_spec *spec;
2366
2367         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2368         if (!spec)
2369                 return -ENOMEM;
2370
2371         spec->ops = generic_standard_hdmi_ops;
2372         spec->dev_num = 1;      /* initialize to 1 */
2373         mutex_init(&spec->pcm_lock);
2374         snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2375
2376         spec->chmap.ops.get_chmap = hdmi_get_chmap;
2377         spec->chmap.ops.set_chmap = hdmi_set_chmap;
2378         spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2379         spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc,
2380
2381         codec->spec = spec;
2382         hdmi_array_init(spec, 4);
2383
2384         codec->patch_ops = generic_hdmi_patch_ops;
2385
2386         return 0;
2387 }
2388
2389 /* generic HDMI parser */
2390 static int patch_generic_hdmi(struct hda_codec *codec)
2391 {
2392         int err;
2393
2394         err = alloc_generic_hdmi(codec);
2395         if (err < 0)
2396                 return err;
2397
2398         err = hdmi_parse_codec(codec);
2399         if (err < 0) {
2400                 generic_spec_free(codec);
2401                 return err;
2402         }
2403
2404         generic_hdmi_init_per_pins(codec);
2405         return 0;
2406 }
2407
2408 /*
2409  * Intel codec parsers and helpers
2410  */
2411
2412 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2413                                              hda_nid_t nid)
2414 {
2415         struct hdmi_spec *spec = codec->spec;
2416         hda_nid_t conns[4];
2417         int nconns;
2418
2419         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2420         if (nconns == spec->num_cvts &&
2421             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2422                 return;
2423
2424         /* override pins connection list */
2425         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2426         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2427 }
2428
2429 #define INTEL_GET_VENDOR_VERB   0xf81
2430 #define INTEL_GET_VENDOR_VERB   0xf81
2431 #define INTEL_SET_VENDOR_VERB   0x781
2432 #define INTEL_EN_DP12           0x02    /* enable DP 1.2 features */
2433 #define INTEL_EN_ALL_PIN_CVTS   0x01    /* enable 2nd & 3rd pins and convertors */
2434
2435 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2436                                           bool update_tree)
2437 {
2438         unsigned int vendor_param;
2439         struct hdmi_spec *spec = codec->spec;
2440
2441         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2442                                 INTEL_GET_VENDOR_VERB, 0);
2443         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2444                 return;
2445
2446         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2447         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2448                                 INTEL_SET_VENDOR_VERB, vendor_param);
2449         if (vendor_param == -1)
2450                 return;
2451
2452         if (update_tree)
2453                 snd_hda_codec_update_widgets(codec);
2454 }
2455
2456 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2457 {
2458         unsigned int vendor_param;
2459         struct hdmi_spec *spec = codec->spec;
2460
2461         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2462                                 INTEL_GET_VENDOR_VERB, 0);
2463         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2464                 return;
2465
2466         /* enable DP1.2 mode */
2467         vendor_param |= INTEL_EN_DP12;
2468         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2469         snd_hda_codec_write_cache(codec, spec->vendor_nid, 0,
2470                                 INTEL_SET_VENDOR_VERB, vendor_param);
2471 }
2472
2473 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2474  * Otherwise you may get severe h/w communication errors.
2475  */
2476 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2477                                 unsigned int power_state)
2478 {
2479         if (power_state == AC_PWRST_D0) {
2480                 intel_haswell_enable_all_pins(codec, false);
2481                 intel_haswell_fixup_enable_dp12(codec);
2482         }
2483
2484         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2485         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2486 }
2487
2488 /* There is a fixed mapping between audio pin node and display port.
2489  * on SNB, IVY, HSW, BSW, SKL, BXT, KBL:
2490  * Pin Widget 5 - PORT B (port = 1 in i915 driver)
2491  * Pin Widget 6 - PORT C (port = 2 in i915 driver)
2492  * Pin Widget 7 - PORT D (port = 3 in i915 driver)
2493  *
2494  * on VLV, ILK:
2495  * Pin Widget 4 - PORT B (port = 1 in i915 driver)
2496  * Pin Widget 5 - PORT C (port = 2 in i915 driver)
2497  * Pin Widget 6 - PORT D (port = 3 in i915 driver)
2498  */
2499 static int intel_base_nid(struct hda_codec *codec)
2500 {
2501         switch (codec->core.vendor_id) {
2502         case 0x80860054: /* ILK */
2503         case 0x80862804: /* ILK */
2504         case 0x80862882: /* VLV */
2505                 return 4;
2506         default:
2507                 return 5;
2508         }
2509 }
2510
2511 static int intel_pin2port(void *audio_ptr, int pin_nid)
2512 {
2513         struct hda_codec *codec = audio_ptr;
2514         struct hdmi_spec *spec = codec->spec;
2515         int base_nid, i;
2516
2517         if (!spec->port_num) {
2518                 base_nid = intel_base_nid(codec);
2519                 if (WARN_ON(pin_nid < base_nid || pin_nid >= base_nid + 3))
2520                         return -1;
2521                 return pin_nid - base_nid + 1; /* intel port is 1-based */
2522         }
2523
2524         /*
2525          * looking for the pin number in the mapping table and return
2526          * the index which indicate the port number
2527          */
2528         for (i = 0; i < spec->port_num; i++) {
2529                 if (pin_nid == spec->port_map[i])
2530                         return i + 1;
2531         }
2532
2533         /* return -1 if pin number exceeds our expectation */
2534         codec_info(codec, "Can't find the HDMI/DP port for pin %d\n", pin_nid);
2535         return -1;
2536 }
2537
2538 static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)
2539 {
2540         struct hda_codec *codec = audio_ptr;
2541         int pin_nid;
2542         int dev_id = pipe;
2543
2544         /* we assume only from port-B to port-D */
2545         if (port < 1 || port > 3)
2546                 return;
2547
2548         pin_nid = port + intel_base_nid(codec) - 1; /* intel port is 1-based */
2549
2550         /* skip notification during system suspend (but not in runtime PM);
2551          * the state will be updated at resume
2552          */
2553         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2554                 return;
2555         /* ditto during suspend/resume process itself */
2556         if (snd_hdac_is_in_pm(&codec->core))
2557                 return;
2558
2559         snd_hdac_i915_set_bclk(&codec->bus->core);
2560         check_presence_and_report(codec, pin_nid, dev_id);
2561 }
2562
2563 /* register i915 component pin_eld_notify callback */
2564 static void register_i915_notifier(struct hda_codec *codec)
2565 {
2566         struct hdmi_spec *spec = codec->spec;
2567
2568         spec->use_acomp_notifier = true;
2569         spec->drm_audio_ops.audio_ptr = codec;
2570         /* intel_audio_codec_enable() or intel_audio_codec_disable()
2571          * will call pin_eld_notify with using audio_ptr pointer
2572          * We need make sure audio_ptr is really setup
2573          */
2574         wmb();
2575         spec->drm_audio_ops.pin2port = intel_pin2port;
2576         spec->drm_audio_ops.pin_eld_notify = intel_pin_eld_notify;
2577         snd_hdac_acomp_register_notifier(&codec->bus->core,
2578                                         &spec->drm_audio_ops);
2579 }
2580
2581 /* setup_stream ops override for HSW+ */
2582 static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
2583                                  hda_nid_t pin_nid, u32 stream_tag, int format)
2584 {
2585         haswell_verify_D0(codec, cvt_nid, pin_nid);
2586         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
2587 }
2588
2589 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2590 static void i915_pin_cvt_fixup(struct hda_codec *codec,
2591                                struct hdmi_spec_per_pin *per_pin,
2592                                hda_nid_t cvt_nid)
2593 {
2594         if (per_pin) {
2595                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2596                                per_pin->dev_id);
2597                 intel_verify_pin_cvt_connect(codec, per_pin);
2598                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
2599                                      per_pin->dev_id, per_pin->mux_idx);
2600         } else {
2601                 intel_not_share_assigned_cvt_nid(codec, 0, 0, cvt_nid);
2602         }
2603 }
2604
2605 /* precondition and allocation for Intel codecs */
2606 static int alloc_intel_hdmi(struct hda_codec *codec)
2607 {
2608         /* requires i915 binding */
2609         if (!codec->bus->core.audio_component) {
2610                 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2611                 /* set probe_id here to prevent generic fallback binding */
2612                 codec->probe_id = HDA_CODEC_ID_SKIP_PROBE;
2613                 return -ENODEV;
2614         }
2615
2616         return alloc_generic_hdmi(codec);
2617 }
2618
2619 /* parse and post-process for Intel codecs */
2620 static int parse_intel_hdmi(struct hda_codec *codec)
2621 {
2622         int err;
2623
2624         err = hdmi_parse_codec(codec);
2625         if (err < 0) {
2626                 generic_spec_free(codec);
2627                 return err;
2628         }
2629
2630         generic_hdmi_init_per_pins(codec);
2631         register_i915_notifier(codec);
2632         return 0;
2633 }
2634
2635 /* Intel Haswell and onwards; audio component with eld notifier */
2636 static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid,
2637                                  const int *port_map, int port_num)
2638 {
2639         struct hdmi_spec *spec;
2640         int err;
2641
2642         err = alloc_intel_hdmi(codec);
2643         if (err < 0)
2644                 return err;
2645         spec = codec->spec;
2646         codec->dp_mst = true;
2647         spec->dyn_pcm_assign = true;
2648         spec->vendor_nid = vendor_nid;
2649         spec->port_map = port_map;
2650         spec->port_num = port_num;
2651
2652         intel_haswell_enable_all_pins(codec, true);
2653         intel_haswell_fixup_enable_dp12(codec);
2654
2655         codec->display_power_control = 1;
2656
2657         codec->patch_ops.set_power_state = haswell_set_power_state;
2658         codec->depop_delay = 0;
2659         codec->auto_runtime_pm = 1;
2660
2661         spec->ops.setup_stream = i915_hsw_setup_stream;
2662         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2663
2664         return parse_intel_hdmi(codec);
2665 }
2666
2667 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2668 {
2669         return intel_hsw_common_init(codec, 0x08, NULL, 0);
2670 }
2671
2672 static int patch_i915_glk_hdmi(struct hda_codec *codec)
2673 {
2674         return intel_hsw_common_init(codec, 0x0b, NULL, 0);
2675 }
2676
2677 static int patch_i915_icl_hdmi(struct hda_codec *codec)
2678 {
2679         /*
2680          * pin to port mapping table where the value indicate the pin number and
2681          * the index indicate the port number with 1 base.
2682          */
2683         static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb};
2684
2685         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2686 }
2687
2688 /* Intel Baytrail and Braswell; with eld notifier */
2689 static int patch_i915_byt_hdmi(struct hda_codec *codec)
2690 {
2691         struct hdmi_spec *spec;
2692         int err;
2693
2694         err = alloc_intel_hdmi(codec);
2695         if (err < 0)
2696                 return err;
2697         spec = codec->spec;
2698
2699         /* For Valleyview/Cherryview, only the display codec is in the display
2700          * power well and can use link_power ops to request/release the power.
2701          */
2702         codec->display_power_control = 1;
2703
2704         codec->depop_delay = 0;
2705         codec->auto_runtime_pm = 1;
2706
2707         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2708
2709         return parse_intel_hdmi(codec);
2710 }
2711
2712 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
2713 static int patch_i915_cpt_hdmi(struct hda_codec *codec)
2714 {
2715         int err;
2716
2717         err = alloc_intel_hdmi(codec);
2718         if (err < 0)
2719                 return err;
2720         return parse_intel_hdmi(codec);
2721 }
2722
2723 /*
2724  * Shared non-generic implementations
2725  */
2726
2727 static int simple_playback_build_pcms(struct hda_codec *codec)
2728 {
2729         struct hdmi_spec *spec = codec->spec;
2730         struct hda_pcm *info;
2731         unsigned int chans;
2732         struct hda_pcm_stream *pstr;
2733         struct hdmi_spec_per_cvt *per_cvt;
2734
2735         per_cvt = get_cvt(spec, 0);
2736         chans = get_wcaps(codec, per_cvt->cvt_nid);
2737         chans = get_wcaps_channels(chans);
2738
2739         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2740         if (!info)
2741                 return -ENOMEM;
2742         spec->pcm_rec[0].pcm = info;
2743         info->pcm_type = HDA_PCM_TYPE_HDMI;
2744         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2745         *pstr = spec->pcm_playback;
2746         pstr->nid = per_cvt->cvt_nid;
2747         if (pstr->channels_max <= 2 && chans && chans <= 16)
2748                 pstr->channels_max = chans;
2749
2750         return 0;
2751 }
2752
2753 /* unsolicited event for jack sensing */
2754 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2755                                     unsigned int res)
2756 {
2757         snd_hda_jack_set_dirty_all(codec);
2758         snd_hda_jack_report_sync(codec);
2759 }
2760
2761 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2762  * as long as spec->pins[] is set correctly
2763  */
2764 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2765
2766 static int simple_playback_build_controls(struct hda_codec *codec)
2767 {
2768         struct hdmi_spec *spec = codec->spec;
2769         struct hdmi_spec_per_cvt *per_cvt;
2770         int err;
2771
2772         per_cvt = get_cvt(spec, 0);
2773         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2774                                           per_cvt->cvt_nid,
2775                                           HDA_PCM_TYPE_HDMI);
2776         if (err < 0)
2777                 return err;
2778         return simple_hdmi_build_jack(codec, 0);
2779 }
2780
2781 static int simple_playback_init(struct hda_codec *codec)
2782 {
2783         struct hdmi_spec *spec = codec->spec;
2784         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2785         hda_nid_t pin = per_pin->pin_nid;
2786
2787         snd_hda_codec_write(codec, pin, 0,
2788                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2789         /* some codecs require to unmute the pin */
2790         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2791                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2792                                     AMP_OUT_UNMUTE);
2793         snd_hda_jack_detect_enable(codec, pin);
2794         return 0;
2795 }
2796
2797 static void simple_playback_free(struct hda_codec *codec)
2798 {
2799         struct hdmi_spec *spec = codec->spec;
2800
2801         hdmi_array_free(spec);
2802         kfree(spec);
2803 }
2804
2805 /*
2806  * Nvidia specific implementations
2807  */
2808
2809 #define Nv_VERB_SET_Channel_Allocation          0xF79
2810 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2811 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2812 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2813
2814 #define nvhdmi_master_con_nid_7x        0x04
2815 #define nvhdmi_master_pin_nid_7x        0x05
2816
2817 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2818         /*front, rear, clfe, rear_surr */
2819         0x6, 0x8, 0xa, 0xc,
2820 };
2821
2822 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2823         /* set audio protect on */
2824         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2825         /* enable digital output on pin widget */
2826         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2827         {} /* terminator */
2828 };
2829
2830 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2831         /* set audio protect on */
2832         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2833         /* enable digital output on pin widget */
2834         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2835         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2836         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2837         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2838         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2839         {} /* terminator */
2840 };
2841
2842 #ifdef LIMITED_RATE_FMT_SUPPORT
2843 /* support only the safe format and rate */
2844 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2845 #define SUPPORTED_MAXBPS        16
2846 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2847 #else
2848 /* support all rates and formats */
2849 #define SUPPORTED_RATES \
2850         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2851         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2852          SNDRV_PCM_RATE_192000)
2853 #define SUPPORTED_MAXBPS        24
2854 #define SUPPORTED_FORMATS \
2855         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2856 #endif
2857
2858 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2859 {
2860         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2861         return 0;
2862 }
2863
2864 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2865 {
2866         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2867         return 0;
2868 }
2869
2870 static const unsigned int channels_2_6_8[] = {
2871         2, 6, 8
2872 };
2873
2874 static const unsigned int channels_2_8[] = {
2875         2, 8
2876 };
2877
2878 static const struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2879         .count = ARRAY_SIZE(channels_2_6_8),
2880         .list = channels_2_6_8,
2881         .mask = 0,
2882 };
2883
2884 static const struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2885         .count = ARRAY_SIZE(channels_2_8),
2886         .list = channels_2_8,
2887         .mask = 0,
2888 };
2889
2890 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2891                                     struct hda_codec *codec,
2892                                     struct snd_pcm_substream *substream)
2893 {
2894         struct hdmi_spec *spec = codec->spec;
2895         const struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2896
2897         switch (codec->preset->vendor_id) {
2898         case 0x10de0002:
2899         case 0x10de0003:
2900         case 0x10de0005:
2901         case 0x10de0006:
2902                 hw_constraints_channels = &hw_constraints_2_8_channels;
2903                 break;
2904         case 0x10de0007:
2905                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2906                 break;
2907         default:
2908                 break;
2909         }
2910
2911         if (hw_constraints_channels != NULL) {
2912                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2913                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2914                                 hw_constraints_channels);
2915         } else {
2916                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2917                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2918         }
2919
2920         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2921 }
2922
2923 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2924                                      struct hda_codec *codec,
2925                                      struct snd_pcm_substream *substream)
2926 {
2927         struct hdmi_spec *spec = codec->spec;
2928         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2929 }
2930
2931 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2932                                        struct hda_codec *codec,
2933                                        unsigned int stream_tag,
2934                                        unsigned int format,
2935                                        struct snd_pcm_substream *substream)
2936 {
2937         struct hdmi_spec *spec = codec->spec;
2938         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2939                                              stream_tag, format, substream);
2940 }
2941
2942 static const struct hda_pcm_stream simple_pcm_playback = {
2943         .substreams = 1,
2944         .channels_min = 2,
2945         .channels_max = 2,
2946         .ops = {
2947                 .open = simple_playback_pcm_open,
2948                 .close = simple_playback_pcm_close,
2949                 .prepare = simple_playback_pcm_prepare
2950         },
2951 };
2952
2953 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2954         .build_controls = simple_playback_build_controls,
2955         .build_pcms = simple_playback_build_pcms,
2956         .init = simple_playback_init,
2957         .free = simple_playback_free,
2958         .unsol_event = simple_hdmi_unsol_event,
2959 };
2960
2961 static int patch_simple_hdmi(struct hda_codec *codec,
2962                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2963 {
2964         struct hdmi_spec *spec;
2965         struct hdmi_spec_per_cvt *per_cvt;
2966         struct hdmi_spec_per_pin *per_pin;
2967
2968         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2969         if (!spec)
2970                 return -ENOMEM;
2971
2972         codec->spec = spec;
2973         hdmi_array_init(spec, 1);
2974
2975         spec->multiout.num_dacs = 0;  /* no analog */
2976         spec->multiout.max_channels = 2;
2977         spec->multiout.dig_out_nid = cvt_nid;
2978         spec->num_cvts = 1;
2979         spec->num_pins = 1;
2980         per_pin = snd_array_new(&spec->pins);
2981         per_cvt = snd_array_new(&spec->cvts);
2982         if (!per_pin || !per_cvt) {
2983                 simple_playback_free(codec);
2984                 return -ENOMEM;
2985         }
2986         per_cvt->cvt_nid = cvt_nid;
2987         per_pin->pin_nid = pin_nid;
2988         spec->pcm_playback = simple_pcm_playback;
2989
2990         codec->patch_ops = simple_hdmi_patch_ops;
2991
2992         return 0;
2993 }
2994
2995 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2996                                                     int channels)
2997 {
2998         unsigned int chanmask;
2999         int chan = channels ? (channels - 1) : 1;
3000
3001         switch (channels) {
3002         default:
3003         case 0:
3004         case 2:
3005                 chanmask = 0x00;
3006                 break;
3007         case 4:
3008                 chanmask = 0x08;
3009                 break;
3010         case 6:
3011                 chanmask = 0x0b;
3012                 break;
3013         case 8:
3014                 chanmask = 0x13;
3015                 break;
3016         }
3017
3018         /* Set the audio infoframe channel allocation and checksum fields.  The
3019          * channel count is computed implicitly by the hardware. */
3020         snd_hda_codec_write(codec, 0x1, 0,
3021                         Nv_VERB_SET_Channel_Allocation, chanmask);
3022
3023         snd_hda_codec_write(codec, 0x1, 0,
3024                         Nv_VERB_SET_Info_Frame_Checksum,
3025                         (0x71 - chan - chanmask));
3026 }
3027
3028 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3029                                    struct hda_codec *codec,
3030                                    struct snd_pcm_substream *substream)
3031 {
3032         struct hdmi_spec *spec = codec->spec;
3033         int i;
3034
3035         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3036                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3037         for (i = 0; i < 4; i++) {
3038                 /* set the stream id */
3039                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3040                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
3041                 /* set the stream format */
3042                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3043                                 AC_VERB_SET_STREAM_FORMAT, 0);
3044         }
3045
3046         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3047          * streams are disabled. */
3048         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3049
3050         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3051 }
3052
3053 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3054                                      struct hda_codec *codec,
3055                                      unsigned int stream_tag,
3056                                      unsigned int format,
3057                                      struct snd_pcm_substream *substream)
3058 {
3059         int chs;
3060         unsigned int dataDCC2, channel_id;
3061         int i;
3062         struct hdmi_spec *spec = codec->spec;
3063         struct hda_spdif_out *spdif;
3064         struct hdmi_spec_per_cvt *per_cvt;
3065
3066         mutex_lock(&codec->spdif_mutex);
3067         per_cvt = get_cvt(spec, 0);
3068         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3069
3070         chs = substream->runtime->channels;
3071
3072         dataDCC2 = 0x2;
3073
3074         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3075         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3076                 snd_hda_codec_write(codec,
3077                                 nvhdmi_master_con_nid_7x,
3078                                 0,
3079                                 AC_VERB_SET_DIGI_CONVERT_1,
3080                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3081
3082         /* set the stream id */
3083         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3084                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3085
3086         /* set the stream format */
3087         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3088                         AC_VERB_SET_STREAM_FORMAT, format);
3089
3090         /* turn on again (if needed) */
3091         /* enable and set the channel status audio/data flag */
3092         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3093                 snd_hda_codec_write(codec,
3094                                 nvhdmi_master_con_nid_7x,
3095                                 0,
3096                                 AC_VERB_SET_DIGI_CONVERT_1,
3097                                 spdif->ctls & 0xff);
3098                 snd_hda_codec_write(codec,
3099                                 nvhdmi_master_con_nid_7x,
3100                                 0,
3101                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3102         }
3103
3104         for (i = 0; i < 4; i++) {
3105                 if (chs == 2)
3106                         channel_id = 0;
3107                 else
3108                         channel_id = i * 2;
3109
3110                 /* turn off SPDIF once;
3111                  *otherwise the IEC958 bits won't be updated
3112                  */
3113                 if (codec->spdif_status_reset &&
3114                 (spdif->ctls & AC_DIG1_ENABLE))
3115                         snd_hda_codec_write(codec,
3116                                 nvhdmi_con_nids_7x[i],
3117                                 0,
3118                                 AC_VERB_SET_DIGI_CONVERT_1,
3119                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3120                 /* set the stream id */
3121                 snd_hda_codec_write(codec,
3122                                 nvhdmi_con_nids_7x[i],
3123                                 0,
3124                                 AC_VERB_SET_CHANNEL_STREAMID,
3125                                 (stream_tag << 4) | channel_id);
3126                 /* set the stream format */
3127                 snd_hda_codec_write(codec,
3128                                 nvhdmi_con_nids_7x[i],
3129                                 0,
3130                                 AC_VERB_SET_STREAM_FORMAT,
3131                                 format);
3132                 /* turn on again (if needed) */
3133                 /* enable and set the channel status audio/data flag */
3134                 if (codec->spdif_status_reset &&
3135                 (spdif->ctls & AC_DIG1_ENABLE)) {
3136                         snd_hda_codec_write(codec,
3137                                         nvhdmi_con_nids_7x[i],
3138                                         0,
3139                                         AC_VERB_SET_DIGI_CONVERT_1,
3140                                         spdif->ctls & 0xff);
3141                         snd_hda_codec_write(codec,
3142                                         nvhdmi_con_nids_7x[i],
3143                                         0,
3144                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3145                 }
3146         }
3147
3148         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3149
3150         mutex_unlock(&codec->spdif_mutex);
3151         return 0;
3152 }
3153
3154 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3155         .substreams = 1,
3156         .channels_min = 2,
3157         .channels_max = 8,
3158         .nid = nvhdmi_master_con_nid_7x,
3159         .rates = SUPPORTED_RATES,
3160         .maxbps = SUPPORTED_MAXBPS,
3161         .formats = SUPPORTED_FORMATS,
3162         .ops = {
3163                 .open = simple_playback_pcm_open,
3164                 .close = nvhdmi_8ch_7x_pcm_close,
3165                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3166         },
3167 };
3168
3169 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3170 {
3171         struct hdmi_spec *spec;
3172         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3173                                     nvhdmi_master_pin_nid_7x);
3174         if (err < 0)
3175                 return err;
3176
3177         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3178         /* override the PCM rates, etc, as the codec doesn't give full list */
3179         spec = codec->spec;
3180         spec->pcm_playback.rates = SUPPORTED_RATES;
3181         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3182         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3183         return 0;
3184 }
3185
3186 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3187 {
3188         struct hdmi_spec *spec = codec->spec;
3189         int err = simple_playback_build_pcms(codec);
3190         if (!err) {
3191                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3192                 info->own_chmap = true;
3193         }
3194         return err;
3195 }
3196
3197 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3198 {
3199         struct hdmi_spec *spec = codec->spec;
3200         struct hda_pcm *info;
3201         struct snd_pcm_chmap *chmap;
3202         int err;
3203
3204         err = simple_playback_build_controls(codec);
3205         if (err < 0)
3206                 return err;
3207
3208         /* add channel maps */
3209         info = get_pcm_rec(spec, 0);
3210         err = snd_pcm_add_chmap_ctls(info->pcm,
3211                                      SNDRV_PCM_STREAM_PLAYBACK,
3212                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3213         if (err < 0)
3214                 return err;
3215         switch (codec->preset->vendor_id) {
3216         case 0x10de0002:
3217         case 0x10de0003:
3218         case 0x10de0005:
3219         case 0x10de0006:
3220                 chmap->channel_mask = (1U << 2) | (1U << 8);
3221                 break;
3222         case 0x10de0007:
3223                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3224         }
3225         return 0;
3226 }
3227
3228 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3229 {
3230         struct hdmi_spec *spec;
3231         int err = patch_nvhdmi_2ch(codec);
3232         if (err < 0)
3233                 return err;
3234         spec = codec->spec;
3235         spec->multiout.max_channels = 8;
3236         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3237         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3238         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3239         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3240
3241         /* Initialize the audio infoframe channel mask and checksum to something
3242          * valid */
3243         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3244
3245         return 0;
3246 }
3247
3248 /*
3249  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3250  * - 0x10de0015
3251  * - 0x10de0040
3252  */
3253 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
3254                 struct hdac_cea_channel_speaker_allocation *cap, int channels)
3255 {
3256         if (cap->ca_index == 0x00 && channels == 2)
3257                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3258
3259         /* If the speaker allocation matches the channel count, it is OK. */
3260         if (cap->channels != channels)
3261                 return -1;
3262
3263         /* all channels are remappable freely */
3264         return SNDRV_CTL_TLVT_CHMAP_VAR;
3265 }
3266
3267 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
3268                 int ca, int chs, unsigned char *map)
3269 {
3270         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3271                 return -EINVAL;
3272
3273         return 0;
3274 }
3275
3276 static int patch_nvhdmi(struct hda_codec *codec)
3277 {
3278         struct hdmi_spec *spec;
3279         int err;
3280
3281         err = patch_generic_hdmi(codec);
3282         if (err)
3283                 return err;
3284
3285         spec = codec->spec;
3286         spec->dyn_pin_out = true;
3287
3288         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3289                 nvhdmi_chmap_cea_alloc_validate_get_type;
3290         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3291
3292         return 0;
3293 }
3294
3295 /*
3296  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3297  * accessed using vendor-defined verbs. These registers can be used for
3298  * interoperability between the HDA and HDMI drivers.
3299  */
3300
3301 /* Audio Function Group node */
3302 #define NVIDIA_AFG_NID 0x01
3303
3304 /*
3305  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3306  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3307  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3308  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3309  * additional bit (at position 30) to signal the validity of the format.
3310  *
3311  * | 31      | 30    | 29  16 | 15   0 |
3312  * +---------+-------+--------+--------+
3313  * | TRIGGER | VALID | UNUSED | FORMAT |
3314  * +-----------------------------------|
3315  *
3316  * Note that for the trigger bit to take effect it needs to change value
3317  * (i.e. it needs to be toggled).
3318  */
3319 #define NVIDIA_GET_SCRATCH0             0xfa6
3320 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3321 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3322 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3323 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3324 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3325 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3326
3327 #define NVIDIA_GET_SCRATCH1             0xfab
3328 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3329 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3330 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3331 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3332
3333 /*
3334  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3335  * the format is invalidated so that the HDMI codec can be disabled.
3336  */
3337 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3338 {
3339         unsigned int value;
3340
3341         /* bits [31:30] contain the trigger and valid bits */
3342         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3343                                    NVIDIA_GET_SCRATCH0, 0);
3344         value = (value >> 24) & 0xff;
3345
3346         /* bits [15:0] are used to store the HDA format */
3347         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3348                             NVIDIA_SET_SCRATCH0_BYTE0,
3349                             (format >> 0) & 0xff);
3350         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3351                             NVIDIA_SET_SCRATCH0_BYTE1,
3352                             (format >> 8) & 0xff);
3353
3354         /* bits [16:24] are unused */
3355         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3356                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3357
3358         /*
3359          * Bit 30 signals that the data is valid and hence that HDMI audio can
3360          * be enabled.
3361          */
3362         if (format == 0)
3363                 value &= ~NVIDIA_SCRATCH_VALID;
3364         else
3365                 value |= NVIDIA_SCRATCH_VALID;
3366
3367         /*
3368          * Whenever the trigger bit is toggled, an interrupt is raised in the
3369          * HDMI codec. The HDMI driver will use that as trigger to update its
3370          * configuration.
3371          */
3372         value ^= NVIDIA_SCRATCH_TRIGGER;
3373
3374         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3375                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3376 }
3377
3378 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3379                                   struct hda_codec *codec,
3380                                   unsigned int stream_tag,
3381                                   unsigned int format,
3382                                   struct snd_pcm_substream *substream)
3383 {
3384         int err;
3385
3386         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3387                                                 format, substream);
3388         if (err < 0)
3389                 return err;
3390
3391         /* notify the HDMI codec of the format change */
3392         tegra_hdmi_set_format(codec, format);
3393
3394         return 0;
3395 }
3396
3397 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3398                                   struct hda_codec *codec,
3399                                   struct snd_pcm_substream *substream)
3400 {
3401         /* invalidate the format in the HDMI codec */
3402         tegra_hdmi_set_format(codec, 0);
3403
3404         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3405 }
3406
3407 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3408 {
3409         struct hdmi_spec *spec = codec->spec;
3410         unsigned int i;
3411
3412         for (i = 0; i < spec->num_pins; i++) {
3413                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3414
3415                 if (pcm->pcm_type == type)
3416                         return pcm;
3417         }
3418
3419         return NULL;
3420 }
3421
3422 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3423 {
3424         struct hda_pcm_stream *stream;
3425         struct hda_pcm *pcm;
3426         int err;
3427
3428         err = generic_hdmi_build_pcms(codec);
3429         if (err < 0)
3430                 return err;
3431
3432         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3433         if (!pcm)
3434                 return -ENODEV;
3435
3436         /*
3437          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3438          * codec about format changes.
3439          */
3440         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3441         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3442         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3443
3444         return 0;
3445 }
3446
3447 static int patch_tegra_hdmi(struct hda_codec *codec)
3448 {
3449         int err;
3450
3451         err = patch_generic_hdmi(codec);
3452         if (err)
3453                 return err;
3454
3455         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3456
3457         return 0;
3458 }
3459
3460 /*
3461  * ATI/AMD-specific implementations
3462  */
3463
3464 #define is_amdhdmi_rev3_or_later(codec) \
3465         ((codec)->core.vendor_id == 0x1002aa01 && \
3466          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3467 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3468
3469 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3470 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3471 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3472 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3473 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3474 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3475 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3476 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3477 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3478 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3479 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3480 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3481 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3482 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3483 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3484 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3485 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3486 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3487 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3488 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3489 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3490 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3491 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3492 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3493 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3494
3495 /* AMD specific HDA cvt verbs */
3496 #define ATI_VERB_SET_RAMP_RATE          0x770
3497 #define ATI_VERB_GET_RAMP_RATE          0xf70
3498
3499 #define ATI_OUT_ENABLE 0x1
3500
3501 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3502 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3503
3504 #define ATI_HBR_CAPABLE 0x01
3505 #define ATI_HBR_ENABLE 0x10
3506
3507 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3508                            unsigned char *buf, int *eld_size)
3509 {
3510         /* call hda_eld.c ATI/AMD-specific function */
3511         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3512                                     is_amdhdmi_rev3_or_later(codec));
3513 }
3514
3515 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
3516                                         int active_channels, int conn_type)
3517 {
3518         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3519 }
3520
3521 static int atihdmi_paired_swap_fc_lfe(int pos)
3522 {
3523         /*
3524          * ATI/AMD have automatic FC/LFE swap built-in
3525          * when in pairwise mapping mode.
3526          */
3527
3528         switch (pos) {
3529                 /* see channel_allocations[].speakers[] */
3530                 case 2: return 3;
3531                 case 3: return 2;
3532                 default: break;
3533         }
3534
3535         return pos;
3536 }
3537
3538 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3539                         int ca, int chs, unsigned char *map)
3540 {
3541         struct hdac_cea_channel_speaker_allocation *cap;
3542         int i, j;
3543
3544         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3545
3546         cap = snd_hdac_get_ch_alloc_from_ca(ca);
3547         for (i = 0; i < chs; ++i) {
3548                 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3549                 bool ok = false;
3550                 bool companion_ok = false;
3551
3552                 if (!mask)
3553                         continue;
3554
3555                 for (j = 0 + i % 2; j < 8; j += 2) {
3556                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3557                         if (cap->speakers[chan_idx] == mask) {
3558                                 /* channel is in a supported position */
3559                                 ok = true;
3560
3561                                 if (i % 2 == 0 && i + 1 < chs) {
3562                                         /* even channel, check the odd companion */
3563                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3564                                         int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3565                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3566
3567                                         if (comp_mask_req == comp_mask_act)
3568                                                 companion_ok = true;
3569                                         else
3570                                                 return -EINVAL;
3571                                 }
3572                                 break;
3573                         }
3574                 }
3575
3576                 if (!ok)
3577                         return -EINVAL;
3578
3579                 if (companion_ok)
3580                         i++; /* companion channel already checked */
3581         }
3582
3583         return 0;
3584 }
3585
3586 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3587                 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3588 {
3589         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3590         int verb;
3591         int ati_channel_setup = 0;
3592
3593         if (hdmi_slot > 7)
3594                 return -EINVAL;
3595
3596         if (!has_amd_full_remap_support(codec)) {
3597                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3598
3599                 /* In case this is an odd slot but without stream channel, do not
3600                  * disable the slot since the corresponding even slot could have a
3601                  * channel. In case neither have a channel, the slot pair will be
3602                  * disabled when this function is called for the even slot. */
3603                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3604                         return 0;
3605
3606                 hdmi_slot -= hdmi_slot % 2;
3607
3608                 if (stream_channel != 0xf)
3609                         stream_channel -= stream_channel % 2;
3610         }
3611
3612         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3613
3614         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3615
3616         if (stream_channel != 0xf)
3617                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3618
3619         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3620 }
3621
3622 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
3623                                 hda_nid_t pin_nid, int asp_slot)
3624 {
3625         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3626         bool was_odd = false;
3627         int ati_asp_slot = asp_slot;
3628         int verb;
3629         int ati_channel_setup;
3630
3631         if (asp_slot > 7)
3632                 return -EINVAL;
3633
3634         if (!has_amd_full_remap_support(codec)) {
3635                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3636                 if (ati_asp_slot % 2 != 0) {
3637                         ati_asp_slot -= 1;
3638                         was_odd = true;
3639                 }
3640         }
3641
3642         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3643
3644         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3645
3646         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3647                 return 0xf;
3648
3649         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3650 }
3651
3652 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3653                 struct hdac_chmap *chmap,
3654                 struct hdac_cea_channel_speaker_allocation *cap,
3655                 int channels)
3656 {
3657         int c;
3658
3659         /*
3660          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3661          * we need to take that into account (a single channel may take 2
3662          * channel slots if we need to carry a silent channel next to it).
3663          * On Rev3+ AMD codecs this function is not used.
3664          */
3665         int chanpairs = 0;
3666
3667         /* We only produce even-numbered channel count TLVs */
3668         if ((channels % 2) != 0)
3669                 return -1;
3670
3671         for (c = 0; c < 7; c += 2) {
3672                 if (cap->speakers[c] || cap->speakers[c+1])
3673                         chanpairs++;
3674         }
3675
3676         if (chanpairs * 2 != channels)
3677                 return -1;
3678
3679         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3680 }
3681
3682 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
3683                 struct hdac_cea_channel_speaker_allocation *cap,
3684                 unsigned int *chmap, int channels)
3685 {
3686         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3687         int count = 0;
3688         int c;
3689
3690         for (c = 7; c >= 0; c--) {
3691                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3692                 int spk = cap->speakers[chan];
3693                 if (!spk) {
3694                         /* add N/A channel if the companion channel is occupied */
3695                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3696                                 chmap[count++] = SNDRV_CHMAP_NA;
3697
3698                         continue;
3699                 }
3700
3701                 chmap[count++] = snd_hdac_spk_to_chmap(spk);
3702         }
3703
3704         WARN_ON(count != channels);
3705 }
3706
3707 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3708                                  bool hbr)
3709 {
3710         int hbr_ctl, hbr_ctl_new;
3711
3712         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3713         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3714                 if (hbr)
3715                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3716                 else
3717                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3718
3719                 codec_dbg(codec,
3720                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3721                                 pin_nid,
3722                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3723                                 hbr_ctl_new);
3724
3725                 if (hbr_ctl != hbr_ctl_new)
3726                         snd_hda_codec_write(codec, pin_nid, 0,
3727                                                 ATI_VERB_SET_HBR_CONTROL,
3728                                                 hbr_ctl_new);
3729
3730         } else if (hbr)
3731                 return -EINVAL;
3732
3733         return 0;
3734 }
3735
3736 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3737                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3738 {
3739
3740         if (is_amdhdmi_rev3_or_later(codec)) {
3741                 int ramp_rate = 180; /* default as per AMD spec */
3742                 /* disable ramp-up/down for non-pcm as per AMD spec */
3743                 if (format & AC_FMT_TYPE_NON_PCM)
3744                         ramp_rate = 0;
3745
3746                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3747         }
3748
3749         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3750 }
3751
3752
3753 static int atihdmi_init(struct hda_codec *codec)
3754 {
3755         struct hdmi_spec *spec = codec->spec;
3756         int pin_idx, err;
3757
3758         err = generic_hdmi_init(codec);
3759
3760         if (err)
3761                 return err;
3762
3763         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3764                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3765
3766                 /* make sure downmix information in infoframe is zero */
3767                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3768
3769                 /* enable channel-wise remap mode if supported */
3770                 if (has_amd_full_remap_support(codec))
3771                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3772                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3773                                             ATI_MULTICHANNEL_MODE_SINGLE);
3774         }
3775
3776         return 0;
3777 }
3778
3779 static int patch_atihdmi(struct hda_codec *codec)
3780 {
3781         struct hdmi_spec *spec;
3782         struct hdmi_spec_per_cvt *per_cvt;
3783         int err, cvt_idx;
3784
3785         err = patch_generic_hdmi(codec);
3786
3787         if (err)
3788                 return err;
3789
3790         codec->patch_ops.init = atihdmi_init;
3791
3792         spec = codec->spec;
3793
3794         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3795         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3796         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3797         spec->ops.setup_stream = atihdmi_setup_stream;
3798
3799         spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3800         spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3801
3802         if (!has_amd_full_remap_support(codec)) {
3803                 /* override to ATI/AMD-specific versions with pairwise mapping */
3804                 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3805                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3806                 spec->chmap.ops.cea_alloc_to_tlv_chmap =
3807                                 atihdmi_paired_cea_alloc_to_tlv_chmap;
3808                 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
3809         }
3810
3811         /* ATI/AMD converters do not advertise all of their capabilities */
3812         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3813                 per_cvt = get_cvt(spec, cvt_idx);
3814                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3815                 per_cvt->rates |= SUPPORTED_RATES;
3816                 per_cvt->formats |= SUPPORTED_FORMATS;
3817                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3818         }
3819
3820         spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
3821
3822         /* AMD GPUs have neither EPSS nor CLKSTOP bits, hence preventing
3823          * the link-down as is.  Tell the core to allow it.
3824          */
3825         codec->link_down_at_suspend = 1;
3826
3827         return 0;
3828 }
3829
3830 /* VIA HDMI Implementation */
3831 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3832 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3833
3834 static int patch_via_hdmi(struct hda_codec *codec)
3835 {
3836         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3837 }
3838
3839 /*
3840  * patch entries
3841  */
3842 static const struct hda_device_id snd_hda_id_hdmi[] = {
3843 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
3844 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
3845 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
3846 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
3847 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
3848 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
3849 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
3850 HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI",       patch_nvhdmi_2ch),
3851 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3852 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3853 HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI",      patch_nvhdmi_8ch_7x),
3854 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3855 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3856 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
3857 HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP",   patch_nvhdmi),
3858 HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP",   patch_nvhdmi),
3859 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi),
3860 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi),
3861 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi),
3862 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi),
3863 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi),
3864 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi),
3865 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi),
3866 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi),
3867 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi),
3868 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi),
3869 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi),
3870 /* 17 is known to be absent */
3871 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi),
3872 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi),
3873 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi),
3874 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi),
3875 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi),
3876 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
3877 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
3878 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
3879 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
3880 HDA_CODEC_ENTRY(0x10de002d, "Tegra186 HDMI/DP0", patch_tegra_hdmi),
3881 HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi),
3882 HDA_CODEC_ENTRY(0x10de002f, "Tegra194 HDMI/DP2", patch_tegra_hdmi),
3883 HDA_CODEC_ENTRY(0x10de0030, "Tegra194 HDMI/DP3", patch_tegra_hdmi),
3884 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
3885 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
3886 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
3887 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
3888 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
3889 HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP",   patch_nvhdmi),
3890 HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP",   patch_nvhdmi),
3891 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
3892 HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP",   patch_nvhdmi),
3893 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
3894 HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP",   patch_nvhdmi),
3895 HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP",   patch_nvhdmi),
3896 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
3897 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
3898 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
3899 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
3900 HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP",   patch_nvhdmi),
3901 HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP",   patch_nvhdmi),
3902 HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP",   patch_nvhdmi),
3903 HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP",   patch_nvhdmi),
3904 HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP",   patch_nvhdmi),
3905 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
3906 HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP",   patch_nvhdmi),
3907 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP",   patch_nvhdmi),
3908 HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP",   patch_nvhdmi),
3909 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP",   patch_nvhdmi),
3910 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
3911 HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP",   patch_nvhdmi),
3912 HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP",   patch_nvhdmi),
3913 HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP",   patch_nvhdmi),
3914 HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP",   patch_nvhdmi),
3915 HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP",   patch_nvhdmi),
3916 HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP",   patch_nvhdmi),
3917 HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP",   patch_nvhdmi),
3918 HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP",   patch_nvhdmi),
3919 HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP",   patch_nvhdmi),
3920 HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP",   patch_nvhdmi),
3921 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
3922 HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI",    patch_nvhdmi_2ch),
3923 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
3924 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
3925 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
3926 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
3927 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
3928 HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI",  patch_i915_glk_hdmi),
3929 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
3930 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
3931 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
3932 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
3933 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
3934 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
3935 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_i915_hsw_hdmi),
3936 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_i915_hsw_hdmi),
3937 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_i915_hsw_hdmi),
3938 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_i915_hsw_hdmi),
3939 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_i915_hsw_hdmi),
3940 HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI",  patch_i915_glk_hdmi),
3941 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI",  patch_i915_glk_hdmi),
3942 HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI",     patch_i915_icl_hdmi),
3943 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
3944 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
3945 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_i915_byt_hdmi),
3946 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
3947 /* special ID for generic HDMI */
3948 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
3949 {} /* terminator */
3950 };
3951 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
3952
3953 MODULE_LICENSE("GPL");
3954 MODULE_DESCRIPTION("HDMI HD-audio codec");
3955 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3956 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3957 MODULE_ALIAS("snd-hda-codec-atihdmi");
3958
3959 static struct hda_codec_driver hdmi_driver = {
3960         .id = snd_hda_id_hdmi,
3961 };
3962
3963 module_hda_codec_driver(hdmi_driver);