sound/pci/hda/patch_hdmi.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *
   4  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   5  *
   6  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   7  *  Copyright (c) 2006 ATI Technologies Inc.
   8  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   9  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  10  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  11  *
  12  *  Authors:
  13  *                      Wu Fengguang <wfg@linux.intel.com>
  14  *
  15  *  Maintained by:
  16  *                      Wu Fengguang <wfg@linux.intel.com>
  17  */
  18
  19 #include <linux/init.h>
  20 #include <linux/delay.h>
  21 #include <linux/pci.h>
  22 #include <linux/slab.h>
  23 #include <linux/module.h>
  24 #include <linux/pm_runtime.h>
  25 #include <sound/core.h>
  26 #include <sound/jack.h>
  27 #include <sound/asoundef.h>
  28 #include <sound/tlv.h>
  29 #include <sound/hdaudio.h>
  30 #include <sound/hda_i915.h>
  31 #include <sound/hda_chmap.h>
  32 #include <sound/hda_codec.h>
  33 #include "hda_local.h"
  34 #include "hda_jack.h"
  35 #include "hda_controller.h"
  36
  37 static bool static_hdmi_pcm;
  38 module_param(static_hdmi_pcm, bool, 0644);
  39 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  40
  41 static bool enable_acomp = true;
  42 module_param(enable_acomp, bool, 0444);
  43 MODULE_PARM_DESC(enable_acomp, "Enable audio component binding (default=yes)");
  44
  45 static bool enable_silent_stream =
  46 IS_ENABLED(CONFIG_SND_HDA_INTEL_HDMI_SILENT_STREAM);
  47 module_param(enable_silent_stream, bool, 0644);
  48 MODULE_PARM_DESC(enable_silent_stream, "Enable Silent Stream for HDMI devices");
  49
  50 struct hdmi_spec_per_cvt {
  51         hda_nid_t cvt_nid;
  52         int assigned;
  53         unsigned int channels_min;
  54         unsigned int channels_max;
  55         u32 rates;
  56         u64 formats;
  57         unsigned int maxbps;
  58 };
  59
  60 /* max. connections to a widget */
  61 #define HDA_MAX_CONNECTIONS     32
  62
  63 struct hdmi_spec_per_pin {
  64         hda_nid_t pin_nid;
  65         int dev_id;
  66         /* pin idx, different device entries on the same pin use the same idx */
  67         int pin_nid_idx;
  68         int num_mux_nids;
  69         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  70         int mux_idx;
  71         hda_nid_t cvt_nid;
  72
  73         struct hda_codec *codec;
  74         struct hdmi_eld sink_eld;
  75         struct mutex lock;
  76         struct delayed_work work;
  77         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  78         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  79         int repoll_count;
  80         bool setup; /* the stream has been set up by prepare callback */
  81         bool silent_stream;
  82         int channels; /* current number of channels */
  83         bool non_pcm;
  84         bool chmap_set;         /* channel-map override by ALSA API? */
  85         unsigned char chmap[8]; /* ALSA API channel-map */
  86 #ifdef CONFIG_SND_PROC_FS
  87         struct snd_info_entry *proc_entry;
  88 #endif
  89 };
  90
  91 /* operations used by generic code that can be overridden by patches */
  92 struct hdmi_ops {
  93         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
  94                            int dev_id, unsigned char *buf, int *eld_size);
  95
  96         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
  97                                     int dev_id,
  98                                     int ca, int active_channels, int conn_type);
  99
 100         /* enable/disable HBR (HD passthrough) */
 101         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid,
 102                              int dev_id, bool hbr);
 103
 104         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 105                             hda_nid_t pin_nid, int dev_id, u32 stream_tag,
 106                             int format);
 107
 108         void (*pin_cvt_fixup)(struct hda_codec *codec,
 109                               struct hdmi_spec_per_pin *per_pin,
 110                               hda_nid_t cvt_nid);
 111 };
 112
 113 struct hdmi_pcm {
 114         struct hda_pcm *pcm;
 115         struct snd_jack *jack;
 116         struct snd_kcontrol *eld_ctl;
 117 };
 118
 119 struct hdmi_spec {
 120         struct hda_codec *codec;
 121         int num_cvts;
 122         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 123         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 124
 125         /*
 126          * num_pins is the number of virtual pins
 127          * for example, there are 3 pins, and each pin
 128          * has 4 device entries, then the num_pins is 12
 129          */
 130         int num_pins;
 131         /*
 132          * num_nids is the number of real pins
 133          * In the above example, num_nids is 3
 134          */
 135         int num_nids;
 136         /*
 137          * dev_num is the number of device entries
 138          * on each pin.
 139          * In the above example, dev_num is 4
 140          */
 141         int dev_num;
 142         struct snd_array pins; /* struct hdmi_spec_per_pin */
 143         struct hdmi_pcm pcm_rec[16];
 144         struct mutex pcm_lock;
 145         struct mutex bind_lock; /* for audio component binding */
 146         /* pcm_bitmap means which pcms have been assigned to pins*/
 147         unsigned long pcm_bitmap;
 148         int pcm_used;   /* counter of pcm_rec[] */
 149         /* bitmap shows whether the pcm is opened in user space
 150          * bit 0 means the first playback PCM (PCM3);
 151          * bit 1 means the second playback PCM, and so on.
 152          */
 153         unsigned long pcm_in_use;
 154
 155         struct hdmi_eld temp_eld;
 156         struct hdmi_ops ops;
 157
 158         bool dyn_pin_out;
 159         bool dyn_pcm_assign;
 160         bool intel_hsw_fixup;   /* apply Intel platform-specific fixups */
 161         /*
 162          * Non-generic VIA/NVIDIA specific
 163          */
 164         struct hda_multi_out multiout;
 165         struct hda_pcm_stream pcm_playback;
 166
 167         bool use_acomp_notifier; /* use eld_notify callback for hotplug */
 168         bool acomp_registered; /* audio component registered in this driver */
 169         bool force_connect; /* force connectivity */
 170         struct drm_audio_component_audio_ops drm_audio_ops;
 171         int (*port2pin)(struct hda_codec *, int); /* reverse port/pin mapping */
 172
 173         struct hdac_chmap chmap;
 174         hda_nid_t vendor_nid;
 175         const int *port_map;
 176         int port_num;
 177         bool send_silent_stream; /* Flag to enable silent stream feature */
 178 };
 179
 180 #ifdef CONFIG_SND_HDA_COMPONENT
 181 static inline bool codec_has_acomp(struct hda_codec *codec)
 182 {
 183         struct hdmi_spec *spec = codec->spec;
 184         return spec->use_acomp_notifier;
 185 }
 186 #else
 187 #define codec_has_acomp(codec)  false
 188 #endif
 189
 190 struct hdmi_audio_infoframe {
 191         u8 type; /* 0x84 */
 192         u8 ver;  /* 0x01 */
 193         u8 len;  /* 0x0a */
 194
 195         u8 checksum;
 196
 197         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 198         u8 SS01_SF24;
 199         u8 CXT04;
 200         u8 CA;
 201         u8 LFEPBL01_LSV36_DM_INH7;
 202 };
 203
 204 struct dp_audio_infoframe {
 205         u8 type; /* 0x84 */
 206         u8 len;  /* 0x1b */
 207         u8 ver;  /* 0x11 << 2 */
 208
 209         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 210         u8 SS01_SF24;
 211         u8 CXT04;
 212         u8 CA;
 213         u8 LFEPBL01_LSV36_DM_INH7;
 214 };
 215
 216 union audio_infoframe {
 217         struct hdmi_audio_infoframe hdmi;
 218         struct dp_audio_infoframe dp;
 219         u8 bytes[0];
 220 };
 221
 222 /*
 223  * HDMI routines
 224  */
 225
 226 #define get_pin(spec, idx) \
 227         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 228 #define get_cvt(spec, idx) \
 229         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 230 /* obtain hdmi_pcm object assigned to idx */
 231 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 232 /* obtain hda_pcm object assigned to idx */
 233 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 234
 235 static int pin_id_to_pin_index(struct hda_codec *codec,
 236                                hda_nid_t pin_nid, int dev_id)
 237 {
 238         struct hdmi_spec *spec = codec->spec;
 239         int pin_idx;
 240         struct hdmi_spec_per_pin *per_pin;
 241
 242         /*
 243          * (dev_id == -1) means it is NON-MST pin
 244          * return the first virtual pin on this port
 245          */
 246         if (dev_id == -1)
 247                 dev_id = 0;
 248
 249         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 250                 per_pin = get_pin(spec, pin_idx);
 251                 if ((per_pin->pin_nid == pin_nid) &&
 252                         (per_pin->dev_id == dev_id))
 253                         return pin_idx;
 254         }
 255
 256         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 257         return -EINVAL;
 258 }
 259
 260 static int hinfo_to_pcm_index(struct hda_codec *codec,
 261                         struct hda_pcm_stream *hinfo)
 262 {
 263         struct hdmi_spec *spec = codec->spec;
 264         int pcm_idx;
 265
 266         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 267                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 268                         return pcm_idx;
 269
 270         codec_warn(codec, "HDMI: hinfo %p not tied to a PCM\n", hinfo);
 271         return -EINVAL;
 272 }
 273
 274 static int hinfo_to_pin_index(struct hda_codec *codec,
 275                               struct hda_pcm_stream *hinfo)
 276 {
 277         struct hdmi_spec *spec = codec->spec;
 278         struct hdmi_spec_per_pin *per_pin;
 279         int pin_idx;
 280
 281         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 282                 per_pin = get_pin(spec, pin_idx);
 283                 if (per_pin->pcm &&
 284                         per_pin->pcm->pcm->stream == hinfo)
 285                         return pin_idx;
 286         }
 287
 288         codec_dbg(codec, "HDMI: hinfo %p (pcm %d) not registered\n", hinfo,
 289                   hinfo_to_pcm_index(codec, hinfo));
 290         return -EINVAL;
 291 }
 292
 293 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 294                                                 int pcm_idx)
 295 {
 296         int i;
 297         struct hdmi_spec_per_pin *per_pin;
 298
 299         for (i = 0; i < spec->num_pins; i++) {
 300                 per_pin = get_pin(spec, i);
 301                 if (per_pin->pcm_idx == pcm_idx)
 302                         return per_pin;
 303         }
 304         return NULL;
 305 }
 306
 307 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 308 {
 309         struct hdmi_spec *spec = codec->spec;
 310         int cvt_idx;
 311
 312         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 313                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 314                         return cvt_idx;
 315
 316         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 317         return -EINVAL;
 318 }
 319
 320 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 321                         struct snd_ctl_elem_info *uinfo)
 322 {
 323         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 324         struct hdmi_spec *spec = codec->spec;
 325         struct hdmi_spec_per_pin *per_pin;
 326         struct hdmi_eld *eld;
 327         int pcm_idx;
 328
 329         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 330
 331         pcm_idx = kcontrol->private_value;
 332         mutex_lock(&spec->pcm_lock);
 333         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 334         if (!per_pin) {
 335                 /* no pin is bound to the pcm */
 336                 uinfo->count = 0;
 337                 goto unlock;
 338         }
 339         eld = &per_pin->sink_eld;
 340         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 341
 342  unlock:
 343         mutex_unlock(&spec->pcm_lock);
 344         return 0;
 345 }
 346
 347 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 348                         struct snd_ctl_elem_value *ucontrol)
 349 {
 350         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 351         struct hdmi_spec *spec = codec->spec;
 352         struct hdmi_spec_per_pin *per_pin;
 353         struct hdmi_eld *eld;
 354         int pcm_idx;
 355         int err = 0;
 356
 357         pcm_idx = kcontrol->private_value;
 358         mutex_lock(&spec->pcm_lock);
 359         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 360         if (!per_pin) {
 361                 /* no pin is bound to the pcm */
 362                 memset(ucontrol->value.bytes.data, 0,
 363                        ARRAY_SIZE(ucontrol->value.bytes.data));
 364                 goto unlock;
 365         }
 366
 367         eld = &per_pin->sink_eld;
 368         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
 369             eld->eld_size > ELD_MAX_SIZE) {
 370                 snd_BUG();
 371                 err = -EINVAL;
 372                 goto unlock;
 373         }
 374
 375         memset(ucontrol->value.bytes.data, 0,
 376                ARRAY_SIZE(ucontrol->value.bytes.data));
 377         if (eld->eld_valid)
 378                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 379                        eld->eld_size);
 380
 381  unlock:
 382         mutex_unlock(&spec->pcm_lock);
 383         return err;
 384 }
 385
 386 static const struct snd_kcontrol_new eld_bytes_ctl = {
 387         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE |
 388                 SNDRV_CTL_ELEM_ACCESS_SKIP_CHECK,
 389         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 390         .name = "ELD",
 391         .info = hdmi_eld_ctl_info,
 392         .get = hdmi_eld_ctl_get,
 393 };
 394
 395 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
 396                         int device)
 397 {
 398         struct snd_kcontrol *kctl;
 399         struct hdmi_spec *spec = codec->spec;
 400         int err;
 401
 402         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 403         if (!kctl)
 404                 return -ENOMEM;
 405         kctl->private_value = pcm_idx;
 406         kctl->id.device = device;
 407
 408         /* no pin nid is associated with the kctl now
 409          * tbd: associate pin nid to eld ctl later
 410          */
 411         err = snd_hda_ctl_add(codec, 0, kctl);
 412         if (err < 0)
 413                 return err;
 414
 415         get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
 416         return 0;
 417 }
 418
 419 #ifdef BE_PARANOID
 420 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 421                                 int *packet_index, int *byte_index)
 422 {
 423         int val;
 424
 425         val = snd_hda_codec_read(codec, pin_nid, 0,
 426                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 427
 428         *packet_index = val >> 5;
 429         *byte_index = val & 0x1f;
 430 }
 431 #endif
 432
 433 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 434                                 int packet_index, int byte_index)
 435 {
 436         int val;
 437
 438         val = (packet_index << 5) | (byte_index & 0x1f);
 439
 440         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 441 }
 442
 443 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 444                                 unsigned char val)
 445 {
 446         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 447 }
 448
 449 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 450 {
 451         struct hdmi_spec *spec = codec->spec;
 452         int pin_out;
 453
 454         /* Unmute */
 455         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 456                 snd_hda_codec_write(codec, pin_nid, 0,
 457                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 458
 459         if (spec->dyn_pin_out)
 460                 /* Disable pin out until stream is active */
 461                 pin_out = 0;
 462         else
 463                 /* Enable pin out: some machines with GM965 gets broken output
 464                  * when the pin is disabled or changed while using with HDMI
 465                  */
 466                 pin_out = PIN_OUT;
 467
 468         snd_hda_codec_write(codec, pin_nid, 0,
 469                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 470 }
 471
 472 /*
 473  * ELD proc files
 474  */
 475
 476 #ifdef CONFIG_SND_PROC_FS
 477 static void print_eld_info(struct snd_info_entry *entry,
 478                            struct snd_info_buffer *buffer)
 479 {
 480         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 481
 482         mutex_lock(&per_pin->lock);
 483         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 484         mutex_unlock(&per_pin->lock);
 485 }
 486
 487 static void write_eld_info(struct snd_info_entry *entry,
 488                            struct snd_info_buffer *buffer)
 489 {
 490         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 491
 492         mutex_lock(&per_pin->lock);
 493         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 494         mutex_unlock(&per_pin->lock);
 495 }
 496
 497 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 498 {
 499         char name[32];
 500         struct hda_codec *codec = per_pin->codec;
 501         struct snd_info_entry *entry;
 502         int err;
 503
 504         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 505         err = snd_card_proc_new(codec->card, name, &entry);
 506         if (err < 0)
 507                 return err;
 508
 509         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 510         entry->c.text.write = write_eld_info;
 511         entry->mode |= 0200;
 512         per_pin->proc_entry = entry;
 513
 514         return 0;
 515 }
 516
 517 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 518 {
 519         if (!per_pin->codec->bus->shutdown) {
 520                 snd_info_free_entry(per_pin->proc_entry);
 521                 per_pin->proc_entry = NULL;
 522         }
 523 }
 524 #else
 525 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 526                                int index)
 527 {
 528         return 0;
 529 }
 530 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 531 {
 532 }
 533 #endif
 534
 535 /*
 536  * Audio InfoFrame routines
 537  */
 538
 539 /*
 540  * Enable Audio InfoFrame Transmission
 541  */
 542 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 543                                        hda_nid_t pin_nid)
 544 {
 545         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 546         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 547                                                 AC_DIPXMIT_BEST);
 548 }
 549
 550 /*
 551  * Disable Audio InfoFrame Transmission
 552  */
 553 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 554                                       hda_nid_t pin_nid)
 555 {
 556         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 557         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 558                                                 AC_DIPXMIT_DISABLE);
 559 }
 560
 561 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 562 {
 563 #ifdef CONFIG_SND_DEBUG_VERBOSE
 564         int i;
 565         int size;
 566
 567         size = snd_hdmi_get_eld_size(codec, pin_nid);
 568         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 569
 570         for (i = 0; i < 8; i++) {
 571                 size = snd_hda_codec_read(codec, pin_nid, 0,
 572                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 573                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 574         }
 575 #endif
 576 }
 577
 578 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 579 {
 580 #ifdef BE_PARANOID
 581         int i, j;
 582         int size;
 583         int pi, bi;
 584         for (i = 0; i < 8; i++) {
 585                 size = snd_hda_codec_read(codec, pin_nid, 0,
 586                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 587                 if (size == 0)
 588                         continue;
 589
 590                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 591                 for (j = 1; j < 1000; j++) {
 592                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 593                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 594                         if (pi != i)
 595                                 codec_dbg(codec, "dip index %d: %d != %d\n",
 596                                                 bi, pi, i);
 597                         if (bi == 0) /* byte index wrapped around */
 598                                 break;
 599                 }
 600                 codec_dbg(codec,
 601                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 602                         i, size, j);
 603         }
 604 #endif
 605 }
 606
 607 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 608 {
 609         u8 *bytes = (u8 *)hdmi_ai;
 610         u8 sum = 0;
 611         int i;
 612
 613         hdmi_ai->checksum = 0;
 614
 615         for (i = 0; i < sizeof(*hdmi_ai); i++)
 616                 sum += bytes[i];
 617
 618         hdmi_ai->checksum = -sum;
 619 }
 620
 621 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 622                                       hda_nid_t pin_nid,
 623                                       u8 *dip, int size)
 624 {
 625         int i;
 626
 627         hdmi_debug_dip_size(codec, pin_nid);
 628         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 629
 630         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 631         for (i = 0; i < size; i++)
 632                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 633 }
 634
 635 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 636                                     u8 *dip, int size)
 637 {
 638         u8 val;
 639         int i;
 640
 641         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 642                                                             != AC_DIPXMIT_BEST)
 643                 return false;
 644
 645         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 646         for (i = 0; i < size; i++) {
 647                 val = snd_hda_codec_read(codec, pin_nid, 0,
 648                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 649                 if (val != dip[i])
 650                         return false;
 651         }
 652
 653         return true;
 654 }
 655
 656 static int hdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
 657                             int dev_id, unsigned char *buf, int *eld_size)
 658 {
 659         snd_hda_set_dev_select(codec, nid, dev_id);
 660
 661         return snd_hdmi_get_eld(codec, nid, buf, eld_size);
 662 }
 663
 664 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
 665                                      hda_nid_t pin_nid, int dev_id,
 666                                      int ca, int active_channels,
 667                                      int conn_type)
 668 {
 669         union audio_infoframe ai;
 670
 671         memset(&ai, 0, sizeof(ai));
 672         if (conn_type == 0) { /* HDMI */
 673                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 674
 675                 hdmi_ai->type           = 0x84;
 676                 hdmi_ai->ver            = 0x01;
 677                 hdmi_ai->len            = 0x0a;
 678                 hdmi_ai->CC02_CT47      = active_channels - 1;
 679                 hdmi_ai->CA             = ca;
 680                 hdmi_checksum_audio_infoframe(hdmi_ai);
 681         } else if (conn_type == 1) { /* DisplayPort */
 682                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 683
 684                 dp_ai->type             = 0x84;
 685                 dp_ai->len              = 0x1b;
 686                 dp_ai->ver              = 0x11 << 2;
 687                 dp_ai->CC02_CT47        = active_channels - 1;
 688                 dp_ai->CA               = ca;
 689         } else {
 690                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
 691                             pin_nid);
 692                 return;
 693         }
 694
 695         snd_hda_set_dev_select(codec, pin_nid, dev_id);
 696
 697         /*
 698          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 699          * sizeof(*dp_ai) to avoid partial match/update problems when
 700          * the user switches between HDMI/DP monitors.
 701          */
 702         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 703                                         sizeof(ai))) {
 704                 codec_dbg(codec,
 705                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
 706                             pin_nid,
 707                             active_channels, ca);
 708                 hdmi_stop_infoframe_trans(codec, pin_nid);
 709                 hdmi_fill_audio_infoframe(codec, pin_nid,
 710                                             ai.bytes, sizeof(ai));
 711                 hdmi_start_infoframe_trans(codec, pin_nid);
 712         }
 713 }
 714
 715 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
 716                                        struct hdmi_spec_per_pin *per_pin,
 717                                        bool non_pcm)
 718 {
 719         struct hdmi_spec *spec = codec->spec;
 720         struct hdac_chmap *chmap = &spec->chmap;
 721         hda_nid_t pin_nid = per_pin->pin_nid;
 722         int dev_id = per_pin->dev_id;
 723         int channels = per_pin->channels;
 724         int active_channels;
 725         struct hdmi_eld *eld;
 726         int ca;
 727
 728         if (!channels)
 729                 return;
 730
 731         snd_hda_set_dev_select(codec, pin_nid, dev_id);
 732
 733         /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
 734         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 735                 snd_hda_codec_write(codec, pin_nid, 0,
 736                                             AC_VERB_SET_AMP_GAIN_MUTE,
 737                                             AMP_OUT_UNMUTE);
 738
 739         eld = &per_pin->sink_eld;
 740
 741         ca = snd_hdac_channel_allocation(&codec->core,
 742                         eld->info.spk_alloc, channels,
 743                         per_pin->chmap_set, non_pcm, per_pin->chmap);
 744
 745         active_channels = snd_hdac_get_active_channels(ca);
 746
 747         chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
 748                                                 active_channels);
 749
 750         /*
 751          * always configure channel mapping, it may have been changed by the
 752          * user in the meantime
 753          */
 754         snd_hdac_setup_channel_mapping(&spec->chmap,
 755                                 pin_nid, non_pcm, ca, channels,
 756                                 per_pin->chmap, per_pin->chmap_set);
 757
 758         spec->ops.pin_setup_infoframe(codec, pin_nid, dev_id,
 759                                       ca, active_channels, eld->info.conn_type);
 760
 761         per_pin->non_pcm = non_pcm;
 762 }
 763
 764 /*
 765  * Unsolicited events
 766  */
 767
 768 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 769
 770 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid,
 771                                       int dev_id)
 772 {
 773         struct hdmi_spec *spec = codec->spec;
 774         int pin_idx = pin_id_to_pin_index(codec, nid, dev_id);
 775
 776         if (pin_idx < 0)
 777                 return;
 778         mutex_lock(&spec->pcm_lock);
 779         hdmi_present_sense(get_pin(spec, pin_idx), 1);
 780         mutex_unlock(&spec->pcm_lock);
 781 }
 782
 783 static void jack_callback(struct hda_codec *codec,
 784                           struct hda_jack_callback *jack)
 785 {
 786         /* stop polling when notification is enabled */
 787         if (codec_has_acomp(codec))
 788                 return;
 789
 790         check_presence_and_report(codec, jack->nid, jack->dev_id);
 791 }
 792
 793 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res,
 794                                  struct hda_jack_tbl *jack)
 795 {
 796         jack->jack_dirty = 1;
 797
 798         codec_dbg(codec,
 799                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
 800                 codec->addr, jack->nid, jack->dev_id, !!(res & AC_UNSOL_RES_IA),
 801                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 802
 803         check_presence_and_report(codec, jack->nid, jack->dev_id);
 804 }
 805
 806 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 807 {
 808         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 809         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 810         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 811         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 812
 813         codec_info(codec,
 814                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 815                 codec->addr,
 816                 tag,
 817                 subtag,
 818                 cp_state,
 819                 cp_ready);
 820
 821         /* TODO */
 822         if (cp_state) {
 823                 ;
 824         }
 825         if (cp_ready) {
 826                 ;
 827         }
 828 }
 829
 830
 831 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 832 {
 833         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 834         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 835         struct hda_jack_tbl *jack;
 836
 837         if (codec_has_acomp(codec))
 838                 return;
 839
 840         if (codec->dp_mst) {
 841                 int dev_entry =
 842                         (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 843
 844                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, dev_entry);
 845         } else {
 846                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, 0);
 847         }
 848
 849         if (!jack) {
 850                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
 851                 return;
 852         }
 853
 854         if (subtag == 0)
 855                 hdmi_intrinsic_event(codec, res, jack);
 856         else
 857                 hdmi_non_intrinsic_event(codec, res);
 858 }
 859
 860 static void haswell_verify_D0(struct hda_codec *codec,
 861                 hda_nid_t cvt_nid, hda_nid_t nid)
 862 {
 863         int pwr;
 864
 865         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
 866          * thus pins could only choose converter 0 for use. Make sure the
 867          * converters are in correct power state */
 868         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
 869                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
 870
 871         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
 872                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
 873                                     AC_PWRST_D0);
 874                 msleep(40);
 875                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
 876                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
 877                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
 878         }
 879 }
 880
 881 /*
 882  * Callbacks
 883  */
 884
 885 /* HBR should be Non-PCM, 8 channels */
 886 #define is_hbr_format(format) \
 887         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 888
 889 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
 890                               int dev_id, bool hbr)
 891 {
 892         int pinctl, new_pinctl;
 893
 894         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 895                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
 896                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 897                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 898
 899                 if (pinctl < 0)
 900                         return hbr ? -EINVAL : 0;
 901
 902                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 903                 if (hbr)
 904                         new_pinctl |= AC_PINCTL_EPT_HBR;
 905                 else
 906                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 907
 908                 codec_dbg(codec,
 909                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
 910                             pin_nid,
 911                             pinctl == new_pinctl ? "" : "new-",
 912                             new_pinctl);
 913
 914                 if (pinctl != new_pinctl)
 915                         snd_hda_codec_write(codec, pin_nid, 0,
 916                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 917                                             new_pinctl);
 918         } else if (hbr)
 919                 return -EINVAL;
 920
 921         return 0;
 922 }
 923
 924 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 925                               hda_nid_t pin_nid, int dev_id,
 926                               u32 stream_tag, int format)
 927 {
 928         struct hdmi_spec *spec = codec->spec;
 929         unsigned int param;
 930         int err;
 931
 932         err = spec->ops.pin_hbr_setup(codec, pin_nid, dev_id,
 933                                       is_hbr_format(format));
 934
 935         if (err) {
 936                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
 937                 return err;
 938         }
 939
 940         if (spec->intel_hsw_fixup) {
 941
 942                 /*
 943                  * on recent platforms IEC Coding Type is required for HBR
 944                  * support, read current Digital Converter settings and set
 945                  * ICT bitfield if needed.
 946                  */
 947                 param = snd_hda_codec_read(codec, cvt_nid, 0,
 948                                            AC_VERB_GET_DIGI_CONVERT_1, 0);
 949
 950                 param = (param >> 16) & ~(AC_DIG3_ICT);
 951
 952                 /* on recent platforms ICT mode is required for HBR support */
 953                 if (is_hbr_format(format))
 954                         param |= 0x1;
 955
 956                 snd_hda_codec_write(codec, cvt_nid, 0,
 957                                     AC_VERB_SET_DIGI_CONVERT_3, param);
 958         }
 959
 960         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 961         return 0;
 962 }
 963
 964 /* Try to find an available converter
 965  * If pin_idx is less then zero, just try to find an available converter.
 966  * Otherwise, try to find an available converter and get the cvt mux index
 967  * of the pin.
 968  */
 969 static int hdmi_choose_cvt(struct hda_codec *codec,
 970                            int pin_idx, int *cvt_id)
 971 {
 972         struct hdmi_spec *spec = codec->spec;
 973         struct hdmi_spec_per_pin *per_pin;
 974         struct hdmi_spec_per_cvt *per_cvt = NULL;
 975         int cvt_idx, mux_idx = 0;
 976
 977         /* pin_idx < 0 means no pin will be bound to the converter */
 978         if (pin_idx < 0)
 979                 per_pin = NULL;
 980         else
 981                 per_pin = get_pin(spec, pin_idx);
 982
 983         if (per_pin && per_pin->silent_stream) {
 984                 cvt_idx = cvt_nid_to_cvt_index(codec, per_pin->cvt_nid);
 985                 if (cvt_id)
 986                         *cvt_id = cvt_idx;
 987                 return 0;
 988         }
 989
 990         /* Dynamically assign converter to stream */
 991         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 992                 per_cvt = get_cvt(spec, cvt_idx);
 993
 994                 /* Must not already be assigned */
 995                 if (per_cvt->assigned)
 996                         continue;
 997                 if (per_pin == NULL)
 998                         break;
 999                 /* Must be in pin's mux's list of converters */
1000                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1001                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1002                                 break;
1003                 /* Not in mux list */
1004                 if (mux_idx == per_pin->num_mux_nids)
1005                         continue;
1006                 break;
1007         }
1008
1009         /* No free converters */
1010         if (cvt_idx == spec->num_cvts)
1011                 return -EBUSY;
1012
1013         if (per_pin != NULL)
1014                 per_pin->mux_idx = mux_idx;
1015
1016         if (cvt_id)
1017                 *cvt_id = cvt_idx;
1018
1019         return 0;
1020 }
1021
1022 /* Assure the pin select the right convetor */
1023 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1024                         struct hdmi_spec_per_pin *per_pin)
1025 {
1026         hda_nid_t pin_nid = per_pin->pin_nid;
1027         int mux_idx, curr;
1028
1029         mux_idx = per_pin->mux_idx;
1030         curr = snd_hda_codec_read(codec, pin_nid, 0,
1031                                           AC_VERB_GET_CONNECT_SEL, 0);
1032         if (curr != mux_idx)
1033                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1034                                             AC_VERB_SET_CONNECT_SEL,
1035                                             mux_idx);
1036 }
1037
1038 /* get the mux index for the converter of the pins
1039  * converter's mux index is the same for all pins on Intel platform
1040  */
1041 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1042                         hda_nid_t cvt_nid)
1043 {
1044         int i;
1045
1046         for (i = 0; i < spec->num_cvts; i++)
1047                 if (spec->cvt_nids[i] == cvt_nid)
1048                         return i;
1049         return -EINVAL;
1050 }
1051
1052 /* Intel HDMI workaround to fix audio routing issue:
1053  * For some Intel display codecs, pins share the same connection list.
1054  * So a conveter can be selected by multiple pins and playback on any of these
1055  * pins will generate sound on the external display, because audio flows from
1056  * the same converter to the display pipeline. Also muting one pin may make
1057  * other pins have no sound output.
1058  * So this function assures that an assigned converter for a pin is not selected
1059  * by any other pins.
1060  */
1061 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1062                                          hda_nid_t pin_nid,
1063                                          int dev_id, int mux_idx)
1064 {
1065         struct hdmi_spec *spec = codec->spec;
1066         hda_nid_t nid;
1067         int cvt_idx, curr;
1068         struct hdmi_spec_per_cvt *per_cvt;
1069         struct hdmi_spec_per_pin *per_pin;
1070         int pin_idx;
1071
1072         /* configure the pins connections */
1073         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1074                 int dev_id_saved;
1075                 int dev_num;
1076
1077                 per_pin = get_pin(spec, pin_idx);
1078                 /*
1079                  * pin not connected to monitor
1080                  * no need to operate on it
1081                  */
1082                 if (!per_pin->pcm)
1083                         continue;
1084
1085                 if ((per_pin->pin_nid == pin_nid) &&
1086                         (per_pin->dev_id == dev_id))
1087                         continue;
1088
1089                 /*
1090                  * if per_pin->dev_id >= dev_num,
1091                  * snd_hda_get_dev_select() will fail,
1092                  * and the following operation is unpredictable.
1093                  * So skip this situation.
1094                  */
1095                 dev_num = snd_hda_get_num_devices(codec, per_pin->pin_nid) + 1;
1096                 if (per_pin->dev_id >= dev_num)
1097                         continue;
1098
1099                 nid = per_pin->pin_nid;
1100
1101                 /*
1102                  * Calling this function should not impact
1103                  * on the device entry selection
1104                  * So let's save the dev id for each pin,
1105                  * and restore it when return
1106                  */
1107                 dev_id_saved = snd_hda_get_dev_select(codec, nid);
1108                 snd_hda_set_dev_select(codec, nid, per_pin->dev_id);
1109                 curr = snd_hda_codec_read(codec, nid, 0,
1110                                           AC_VERB_GET_CONNECT_SEL, 0);
1111                 if (curr != mux_idx) {
1112                         snd_hda_set_dev_select(codec, nid, dev_id_saved);
1113                         continue;
1114                 }
1115
1116
1117                 /* choose an unassigned converter. The conveters in the
1118                  * connection list are in the same order as in the codec.
1119                  */
1120                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1121                         per_cvt = get_cvt(spec, cvt_idx);
1122                         if (!per_cvt->assigned) {
1123                                 codec_dbg(codec,
1124                                           "choose cvt %d for pin nid %d\n",
1125                                         cvt_idx, nid);
1126                                 snd_hda_codec_write_cache(codec, nid, 0,
1127                                             AC_VERB_SET_CONNECT_SEL,
1128                                             cvt_idx);
1129                                 break;
1130                         }
1131                 }
1132                 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1133         }
1134 }
1135
1136 /* A wrapper of intel_not_share_asigned_cvt() */
1137 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1138                         hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid)
1139 {
1140         int mux_idx;
1141         struct hdmi_spec *spec = codec->spec;
1142
1143         /* On Intel platform, the mapping of converter nid to
1144          * mux index of the pins are always the same.
1145          * The pin nid may be 0, this means all pins will not
1146          * share the converter.
1147          */
1148         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1149         if (mux_idx >= 0)
1150                 intel_not_share_assigned_cvt(codec, pin_nid, dev_id, mux_idx);
1151 }
1152
1153 /* skeleton caller of pin_cvt_fixup ops */
1154 static void pin_cvt_fixup(struct hda_codec *codec,
1155                           struct hdmi_spec_per_pin *per_pin,
1156                           hda_nid_t cvt_nid)
1157 {
1158         struct hdmi_spec *spec = codec->spec;
1159
1160         if (spec->ops.pin_cvt_fixup)
1161                 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid);
1162 }
1163
1164 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1165  * in dyn_pcm_assign mode.
1166  */
1167 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1168                          struct hda_codec *codec,
1169                          struct snd_pcm_substream *substream)
1170 {
1171         struct hdmi_spec *spec = codec->spec;
1172         struct snd_pcm_runtime *runtime = substream->runtime;
1173         int cvt_idx, pcm_idx;
1174         struct hdmi_spec_per_cvt *per_cvt = NULL;
1175         int err;
1176
1177         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1178         if (pcm_idx < 0)
1179                 return -EINVAL;
1180
1181         err = hdmi_choose_cvt(codec, -1, &cvt_idx);
1182         if (err)
1183                 return err;
1184
1185         per_cvt = get_cvt(spec, cvt_idx);
1186         per_cvt->assigned = 1;
1187         hinfo->nid = per_cvt->cvt_nid;
1188
1189         pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid);
1190
1191         set_bit(pcm_idx, &spec->pcm_in_use);
1192         /* todo: setup spdif ctls assign */
1193
1194         /* Initially set the converter's capabilities */
1195         hinfo->channels_min = per_cvt->channels_min;
1196         hinfo->channels_max = per_cvt->channels_max;
1197         hinfo->rates = per_cvt->rates;
1198         hinfo->formats = per_cvt->formats;
1199         hinfo->maxbps = per_cvt->maxbps;
1200
1201         /* Store the updated parameters */
1202         runtime->hw.channels_min = hinfo->channels_min;
1203         runtime->hw.channels_max = hinfo->channels_max;
1204         runtime->hw.formats = hinfo->formats;
1205         runtime->hw.rates = hinfo->rates;
1206
1207         snd_pcm_hw_constraint_step(substream->runtime, 0,
1208                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1209         return 0;
1210 }
1211
1212 /*
1213  * HDA PCM callbacks
1214  */
1215 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1216                          struct hda_codec *codec,
1217                          struct snd_pcm_substream *substream)
1218 {
1219         struct hdmi_spec *spec = codec->spec;
1220         struct snd_pcm_runtime *runtime = substream->runtime;
1221         int pin_idx, cvt_idx, pcm_idx;
1222         struct hdmi_spec_per_pin *per_pin;
1223         struct hdmi_eld *eld;
1224         struct hdmi_spec_per_cvt *per_cvt = NULL;
1225         int err;
1226
1227         /* Validate hinfo */
1228         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1229         if (pcm_idx < 0)
1230                 return -EINVAL;
1231
1232         mutex_lock(&spec->pcm_lock);
1233         pin_idx = hinfo_to_pin_index(codec, hinfo);
1234         if (!spec->dyn_pcm_assign) {
1235                 if (snd_BUG_ON(pin_idx < 0)) {
1236                         err = -EINVAL;
1237                         goto unlock;
1238                 }
1239         } else {
1240                 /* no pin is assigned to the PCM
1241                  * PA need pcm open successfully when probe
1242                  */
1243                 if (pin_idx < 0) {
1244                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1245                         goto unlock;
1246                 }
1247         }
1248
1249         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1250         if (err < 0)
1251                 goto unlock;
1252
1253         per_cvt = get_cvt(spec, cvt_idx);
1254         /* Claim converter */
1255         per_cvt->assigned = 1;
1256
1257         set_bit(pcm_idx, &spec->pcm_in_use);
1258         per_pin = get_pin(spec, pin_idx);
1259         per_pin->cvt_nid = per_cvt->cvt_nid;
1260         hinfo->nid = per_cvt->cvt_nid;
1261
1262         /* flip stripe flag for the assigned stream if supported */
1263         if (get_wcaps(codec, per_cvt->cvt_nid) & AC_WCAP_STRIPE)
1264                 azx_stream(get_azx_dev(substream))->stripe = 1;
1265
1266         snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1267         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1268                             AC_VERB_SET_CONNECT_SEL,
1269                             per_pin->mux_idx);
1270
1271         /* configure unused pins to choose other converters */
1272         pin_cvt_fixup(codec, per_pin, 0);
1273
1274         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1275
1276         /* Initially set the converter's capabilities */
1277         hinfo->channels_min = per_cvt->channels_min;
1278         hinfo->channels_max = per_cvt->channels_max;
1279         hinfo->rates = per_cvt->rates;
1280         hinfo->formats = per_cvt->formats;
1281         hinfo->maxbps = per_cvt->maxbps;
1282
1283         eld = &per_pin->sink_eld;
1284         /* Restrict capabilities by ELD if this isn't disabled */
1285         if (!static_hdmi_pcm && eld->eld_valid) {
1286                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1287                 if (hinfo->channels_min > hinfo->channels_max ||
1288                     !hinfo->rates || !hinfo->formats) {
1289                         per_cvt->assigned = 0;
1290                         hinfo->nid = 0;
1291                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1292                         err = -ENODEV;
1293                         goto unlock;
1294                 }
1295         }
1296
1297         /* Store the updated parameters */
1298         runtime->hw.channels_min = hinfo->channels_min;
1299         runtime->hw.channels_max = hinfo->channels_max;
1300         runtime->hw.formats = hinfo->formats;
1301         runtime->hw.rates = hinfo->rates;
1302
1303         snd_pcm_hw_constraint_step(substream->runtime, 0,
1304                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1305  unlock:
1306         mutex_unlock(&spec->pcm_lock);
1307         return err;
1308 }
1309
1310 /*
1311  * HDA/HDMI auto parsing
1312  */
1313 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1314 {
1315         struct hdmi_spec *spec = codec->spec;
1316         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1317         hda_nid_t pin_nid = per_pin->pin_nid;
1318         int dev_id = per_pin->dev_id;
1319         int conns;
1320
1321         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1322                 codec_warn(codec,
1323                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1324                            pin_nid, get_wcaps(codec, pin_nid));
1325                 return -EINVAL;
1326         }
1327
1328         snd_hda_set_dev_select(codec, pin_nid, dev_id);
1329
1330         if (spec->intel_hsw_fixup) {
1331                 conns = spec->num_cvts;
1332                 memcpy(per_pin->mux_nids, spec->cvt_nids,
1333                        sizeof(hda_nid_t) * conns);
1334         } else {
1335                 conns = snd_hda_get_raw_connections(codec, pin_nid,
1336                                                     per_pin->mux_nids,
1337                                                     HDA_MAX_CONNECTIONS);
1338         }
1339
1340         /* all the device entries on the same pin have the same conn list */
1341         per_pin->num_mux_nids = conns;
1342
1343         return 0;
1344 }
1345
1346 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1347                               struct hdmi_spec_per_pin *per_pin)
1348 {
1349         int i;
1350
1351         /*
1352          * generic_hdmi_build_pcms() may allocate extra PCMs on some
1353          * platforms (with maximum of 'num_nids + dev_num - 1')
1354          *
1355          * The per_pin of pin_nid_idx=n and dev_id=m prefers to get pcm-n
1356          * if m==0. This guarantees that dynamic pcm assignments are compatible
1357          * with the legacy static per_pin-pcm assignment that existed in the
1358          * days before DP-MST.
1359          *
1360          * Intel DP-MST prefers this legacy behavior for compatibility, too.
1361          *
1362          * per_pin of m!=0 prefers to get pcm=(num_nids + (m - 1)).
1363          */
1364
1365         if (per_pin->dev_id == 0 || spec->intel_hsw_fixup) {
1366                 if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1367                         return per_pin->pin_nid_idx;
1368         } else {
1369                 i = spec->num_nids + (per_pin->dev_id - 1);
1370                 if (i < spec->pcm_used && !(test_bit(i, &spec->pcm_bitmap)))
1371                         return i;
1372         }
1373
1374         /* have a second try; check the area over num_nids */
1375         for (i = spec->num_nids; i < spec->pcm_used; i++) {
1376                 if (!test_bit(i, &spec->pcm_bitmap))
1377                         return i;
1378         }
1379
1380         /* the last try; check the empty slots in pins */
1381         for (i = 0; i < spec->num_nids; i++) {
1382                 if (!test_bit(i, &spec->pcm_bitmap))
1383                         return i;
1384         }
1385         return -EBUSY;
1386 }
1387
1388 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1389                                 struct hdmi_spec_per_pin *per_pin)
1390 {
1391         int idx;
1392
1393         /* pcm already be attached to the pin */
1394         if (per_pin->pcm)
1395                 return;
1396         idx = hdmi_find_pcm_slot(spec, per_pin);
1397         if (idx == -EBUSY)
1398                 return;
1399         per_pin->pcm_idx = idx;
1400         per_pin->pcm = get_hdmi_pcm(spec, idx);
1401         set_bit(idx, &spec->pcm_bitmap);
1402 }
1403
1404 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1405                                 struct hdmi_spec_per_pin *per_pin)
1406 {
1407         int idx;
1408
1409         /* pcm already be detached from the pin */
1410         if (!per_pin->pcm)
1411                 return;
1412         idx = per_pin->pcm_idx;
1413         per_pin->pcm_idx = -1;
1414         per_pin->pcm = NULL;
1415         if (idx >= 0 && idx < spec->pcm_used)
1416                 clear_bit(idx, &spec->pcm_bitmap);
1417 }
1418
1419 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1420                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1421 {
1422         int mux_idx;
1423
1424         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1425                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1426                         break;
1427         return mux_idx;
1428 }
1429
1430 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1431
1432 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1433                            struct hdmi_spec_per_pin *per_pin)
1434 {
1435         struct hda_codec *codec = per_pin->codec;
1436         struct hda_pcm *pcm;
1437         struct hda_pcm_stream *hinfo;
1438         struct snd_pcm_substream *substream;
1439         int mux_idx;
1440         bool non_pcm;
1441
1442         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1443                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1444         else
1445                 return;
1446         if (!pcm->pcm)
1447                 return;
1448         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1449                 return;
1450
1451         /* hdmi audio only uses playback and one substream */
1452         hinfo = pcm->stream;
1453         substream = pcm->pcm->streams[0].substream;
1454
1455         per_pin->cvt_nid = hinfo->nid;
1456
1457         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1458         if (mux_idx < per_pin->num_mux_nids) {
1459                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1460                                    per_pin->dev_id);
1461                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1462                                 AC_VERB_SET_CONNECT_SEL,
1463                                 mux_idx);
1464         }
1465         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1466
1467         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1468         if (substream->runtime)
1469                 per_pin->channels = substream->runtime->channels;
1470         per_pin->setup = true;
1471         per_pin->mux_idx = mux_idx;
1472
1473         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1474 }
1475
1476 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1477                            struct hdmi_spec_per_pin *per_pin)
1478 {
1479         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1480                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1481
1482         per_pin->chmap_set = false;
1483         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1484
1485         per_pin->setup = false;
1486         per_pin->channels = 0;
1487 }
1488
1489 static struct snd_jack *pin_idx_to_pcm_jack(struct hda_codec *codec,
1490                                             struct hdmi_spec_per_pin *per_pin)
1491 {
1492         struct hdmi_spec *spec = codec->spec;
1493
1494         if (per_pin->pcm_idx >= 0)
1495                 return spec->pcm_rec[per_pin->pcm_idx].jack;
1496         else
1497                 return NULL;
1498 }
1499
1500 /* update per_pin ELD from the given new ELD;
1501  * setup info frame and notification accordingly
1502  * also notify ELD kctl and report jack status changes
1503  */
1504 static void update_eld(struct hda_codec *codec,
1505                        struct hdmi_spec_per_pin *per_pin,
1506                        struct hdmi_eld *eld,
1507                        int repoll)
1508 {
1509         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1510         struct hdmi_spec *spec = codec->spec;
1511         struct snd_jack *pcm_jack;
1512         bool old_eld_valid = pin_eld->eld_valid;
1513         bool eld_changed;
1514         int pcm_idx;
1515
1516         if (eld->eld_valid) {
1517                 if (eld->eld_size <= 0 ||
1518                     snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1519                                        eld->eld_size) < 0) {
1520                         eld->eld_valid = false;
1521                         if (repoll) {
1522                                 schedule_delayed_work(&per_pin->work,
1523                                                       msecs_to_jiffies(300));
1524                                 return;
1525                         }
1526                 }
1527         }
1528
1529         if (!eld->eld_valid || eld->eld_size <= 0) {
1530                 eld->eld_valid = false;
1531                 eld->eld_size = 0;
1532         }
1533
1534         /* for monitor disconnection, save pcm_idx firstly */
1535         pcm_idx = per_pin->pcm_idx;
1536
1537         /*
1538          * pcm_idx >=0 before update_eld() means it is in monitor
1539          * disconnected event. Jack must be fetched before update_eld().
1540          */
1541         pcm_jack = pin_idx_to_pcm_jack(codec, per_pin);
1542
1543         if (spec->dyn_pcm_assign) {
1544                 if (eld->eld_valid) {
1545                         hdmi_attach_hda_pcm(spec, per_pin);
1546                         hdmi_pcm_setup_pin(spec, per_pin);
1547                 } else {
1548                         hdmi_pcm_reset_pin(spec, per_pin);
1549                         hdmi_detach_hda_pcm(spec, per_pin);
1550                 }
1551         }
1552         /* if pcm_idx == -1, it means this is in monitor connection event
1553          * we can get the correct pcm_idx now.
1554          */
1555         if (pcm_idx == -1)
1556                 pcm_idx = per_pin->pcm_idx;
1557         if (!pcm_jack)
1558                 pcm_jack = pin_idx_to_pcm_jack(codec, per_pin);
1559
1560         if (eld->eld_valid)
1561                 snd_hdmi_show_eld(codec, &eld->info);
1562
1563         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1564         eld_changed |= (pin_eld->monitor_present != eld->monitor_present);
1565         if (!eld_changed && eld->eld_valid && pin_eld->eld_valid)
1566                 if (pin_eld->eld_size != eld->eld_size ||
1567                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1568                            eld->eld_size) != 0)
1569                         eld_changed = true;
1570
1571         if (eld_changed) {
1572                 pin_eld->monitor_present = eld->monitor_present;
1573                 pin_eld->eld_valid = eld->eld_valid;
1574                 pin_eld->eld_size = eld->eld_size;
1575                 if (eld->eld_valid)
1576                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1577                                eld->eld_size);
1578                 pin_eld->info = eld->info;
1579         }
1580
1581         /*
1582          * Re-setup pin and infoframe. This is needed e.g. when
1583          * - sink is first plugged-in
1584          * - transcoder can change during stream playback on Haswell
1585          *   and this can make HW reset converter selection on a pin.
1586          */
1587         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1588                 pin_cvt_fixup(codec, per_pin, 0);
1589                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1590         }
1591
1592         if (eld_changed && pcm_idx >= 0)
1593                 snd_ctl_notify(codec->card,
1594                                SNDRV_CTL_EVENT_MASK_VALUE |
1595                                SNDRV_CTL_EVENT_MASK_INFO,
1596                                &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1597
1598         if (eld_changed && pcm_jack)
1599                 snd_jack_report(pcm_jack,
1600                                 (eld->monitor_present && eld->eld_valid) ?
1601                                 SND_JACK_AVOUT : 0);
1602 }
1603
1604 /* update ELD and jack state via HD-audio verbs */
1605 static void hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1606                                          int repoll)
1607 {
1608         struct hda_codec *codec = per_pin->codec;
1609         struct hdmi_spec *spec = codec->spec;
1610         struct hdmi_eld *eld = &spec->temp_eld;
1611         hda_nid_t pin_nid = per_pin->pin_nid;
1612         int dev_id = per_pin->dev_id;
1613         /*
1614          * Always execute a GetPinSense verb here, even when called from
1615          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1616          * response's PD bit is not the real PD value, but indicates that
1617          * the real PD value changed. An older version of the HD-audio
1618          * specification worked this way. Hence, we just ignore the data in
1619          * the unsolicited response to avoid custom WARs.
1620          */
1621         int present;
1622         int ret;
1623
1624         ret = snd_hda_power_up_pm(codec);
1625         if (ret < 0 && pm_runtime_suspended(hda_codec_dev(codec)))
1626                 goto out;
1627
1628         present = snd_hda_jack_pin_sense(codec, pin_nid, dev_id);
1629
1630         mutex_lock(&per_pin->lock);
1631         eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1632         if (eld->monitor_present)
1633                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1634         else
1635                 eld->eld_valid = false;
1636
1637         codec_dbg(codec,
1638                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1639                 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1640
1641         if (eld->eld_valid) {
1642                 if (spec->ops.pin_get_eld(codec, pin_nid, dev_id,
1643                                           eld->eld_buffer, &eld->eld_size) < 0)
1644                         eld->eld_valid = false;
1645         }
1646
1647         update_eld(codec, per_pin, eld, repoll);
1648         mutex_unlock(&per_pin->lock);
1649  out:
1650         snd_hda_power_down_pm(codec);
1651 }
1652
1653 #define I915_SILENT_RATE                48000
1654 #define I915_SILENT_CHANNELS            2
1655 #define I915_SILENT_FORMAT              SNDRV_PCM_FORMAT_S16_LE
1656 #define I915_SILENT_FORMAT_BITS 16
1657 #define I915_SILENT_FMT_MASK            0xf
1658
1659 static void silent_stream_enable(struct hda_codec *codec,
1660                                  struct hdmi_spec_per_pin *per_pin)
1661 {
1662         struct hdmi_spec *spec = codec->spec;
1663         struct hdmi_spec_per_cvt *per_cvt;
1664         int cvt_idx, pin_idx, err;
1665         unsigned int format;
1666
1667         mutex_lock(&per_pin->lock);
1668
1669         if (per_pin->setup) {
1670                 codec_dbg(codec, "hdmi: PCM already open, no silent stream\n");
1671                 goto unlock_out;
1672         }
1673
1674         pin_idx = pin_id_to_pin_index(codec, per_pin->pin_nid, per_pin->dev_id);
1675         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1676         if (err) {
1677                 codec_err(codec, "hdmi: no free converter to enable silent mode\n");
1678                 goto unlock_out;
1679         }
1680
1681         per_cvt = get_cvt(spec, cvt_idx);
1682         per_cvt->assigned = 1;
1683         per_pin->cvt_nid = per_cvt->cvt_nid;
1684         per_pin->silent_stream = true;
1685
1686         codec_dbg(codec, "hdmi: enabling silent stream pin-NID=0x%x cvt-NID=0x%x\n",
1687                   per_pin->pin_nid, per_cvt->cvt_nid);
1688
1689         snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1690         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1691                                   AC_VERB_SET_CONNECT_SEL,
1692                                   per_pin->mux_idx);
1693
1694         /* configure unused pins to choose other converters */
1695         pin_cvt_fixup(codec, per_pin, 0);
1696
1697         snd_hdac_sync_audio_rate(&codec->core, per_pin->pin_nid,
1698                                  per_pin->dev_id, I915_SILENT_RATE);
1699
1700         /* trigger silent stream generation in hw */
1701         format = snd_hdac_calc_stream_format(I915_SILENT_RATE, I915_SILENT_CHANNELS,
1702                                              I915_SILENT_FORMAT, I915_SILENT_FORMAT_BITS, 0);
1703         snd_hda_codec_setup_stream(codec, per_pin->cvt_nid,
1704                                    I915_SILENT_FMT_MASK, I915_SILENT_FMT_MASK, format);
1705         usleep_range(100, 200);
1706         snd_hda_codec_setup_stream(codec, per_pin->cvt_nid, I915_SILENT_FMT_MASK, 0, format);
1707
1708         per_pin->channels = I915_SILENT_CHANNELS;
1709         hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1710
1711  unlock_out:
1712         mutex_unlock(&per_pin->lock);
1713 }
1714
1715 static void silent_stream_disable(struct hda_codec *codec,
1716                                   struct hdmi_spec_per_pin *per_pin)
1717 {
1718         struct hdmi_spec *spec = codec->spec;
1719         struct hdmi_spec_per_cvt *per_cvt;
1720         int cvt_idx;
1721
1722         mutex_lock(&per_pin->lock);
1723         if (!per_pin->silent_stream)
1724                 goto unlock_out;
1725
1726         codec_dbg(codec, "HDMI: disable silent stream on pin-NID=0x%x cvt-NID=0x%x\n",
1727                   per_pin->pin_nid, per_pin->cvt_nid);
1728
1729         cvt_idx = cvt_nid_to_cvt_index(codec, per_pin->cvt_nid);
1730         if (cvt_idx >= 0 && cvt_idx < spec->num_cvts) {
1731                 per_cvt = get_cvt(spec, cvt_idx);
1732                 per_cvt->assigned = 0;
1733         }
1734
1735         per_pin->cvt_nid = 0;
1736         per_pin->silent_stream = false;
1737
1738  unlock_out:
1739         mutex_unlock(&spec->pcm_lock);
1740 }
1741
1742 /* update ELD and jack state via audio component */
1743 static void sync_eld_via_acomp(struct hda_codec *codec,
1744                                struct hdmi_spec_per_pin *per_pin)
1745 {
1746         struct hdmi_spec *spec = codec->spec;
1747         struct hdmi_eld *eld = &spec->temp_eld;
1748         bool monitor_prev, monitor_next;
1749
1750         mutex_lock(&per_pin->lock);
1751         eld->monitor_present = false;
1752         monitor_prev = per_pin->sink_eld.monitor_present;
1753         eld->eld_size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid,
1754                                       per_pin->dev_id, &eld->monitor_present,
1755                                       eld->eld_buffer, ELD_MAX_SIZE);
1756         eld->eld_valid = (eld->eld_size > 0);
1757         update_eld(codec, per_pin, eld, 0);
1758         monitor_next = per_pin->sink_eld.monitor_present;
1759         mutex_unlock(&per_pin->lock);
1760
1761         /*
1762          * Power-up will call hdmi_present_sense, so the PM calls
1763          * have to be done without mutex held.
1764          */
1765
1766         if (spec->send_silent_stream) {
1767                 int pm_ret;
1768
1769                 if (!monitor_prev && monitor_next) {
1770                         pm_ret = snd_hda_power_up_pm(codec);
1771                         if (pm_ret < 0)
1772                                 codec_err(codec,
1773                                 "Monitor plugged-in, Failed to power up codec ret=[%d]\n",
1774                                 pm_ret);
1775                         silent_stream_enable(codec, per_pin);
1776                 } else if (monitor_prev && !monitor_next) {
1777                         silent_stream_disable(codec, per_pin);
1778                         pm_ret = snd_hda_power_down_pm(codec);
1779                         if (pm_ret < 0)
1780                                 codec_err(codec,
1781                                 "Monitor plugged-out, Failed to power down codec ret=[%d]\n",
1782                                 pm_ret);
1783                 }
1784         }
1785 }
1786
1787 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1788 {
1789         struct hda_codec *codec = per_pin->codec;
1790
1791         if (!codec_has_acomp(codec))
1792                 hdmi_present_sense_via_verbs(per_pin, repoll);
1793         else
1794                 sync_eld_via_acomp(codec, per_pin);
1795 }
1796
1797 static void hdmi_repoll_eld(struct work_struct *work)
1798 {
1799         struct hdmi_spec_per_pin *per_pin =
1800         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1801         struct hda_codec *codec = per_pin->codec;
1802         struct hdmi_spec *spec = codec->spec;
1803         struct hda_jack_tbl *jack;
1804
1805         jack = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
1806                                         per_pin->dev_id);
1807         if (jack)
1808                 jack->jack_dirty = 1;
1809
1810         if (per_pin->repoll_count++ > 6)
1811                 per_pin->repoll_count = 0;
1812
1813         mutex_lock(&spec->pcm_lock);
1814         hdmi_present_sense(per_pin, per_pin->repoll_count);
1815         mutex_unlock(&spec->pcm_lock);
1816 }
1817
1818 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1819 {
1820         struct hdmi_spec *spec = codec->spec;
1821         unsigned int caps, config;
1822         int pin_idx;
1823         struct hdmi_spec_per_pin *per_pin;
1824         int err;
1825         int dev_num, i;
1826
1827         caps = snd_hda_query_pin_caps(codec, pin_nid);
1828         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1829                 return 0;
1830
1831         /*
1832          * For DP MST audio, Configuration Default is the same for
1833          * all device entries on the same pin
1834          */
1835         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1836         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE &&
1837             !spec->force_connect)
1838                 return 0;
1839
1840         /*
1841          * To simplify the implementation, malloc all
1842          * the virtual pins in the initialization statically
1843          */
1844         if (spec->intel_hsw_fixup) {
1845                 /*
1846                  * On Intel platforms, device entries number is
1847                  * changed dynamically. If there is a DP MST
1848                  * hub connected, the device entries number is 3.
1849                  * Otherwise, it is 1.
1850                  * Here we manually set dev_num to 3, so that
1851                  * we can initialize all the device entries when
1852                  * bootup statically.
1853                  */
1854                 dev_num = 3;
1855                 spec->dev_num = 3;
1856         } else if (spec->dyn_pcm_assign && codec->dp_mst) {
1857                 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1;
1858                 /*
1859                  * spec->dev_num is the maxinum number of device entries
1860                  * among all the pins
1861                  */
1862                 spec->dev_num = (spec->dev_num > dev_num) ?
1863                         spec->dev_num : dev_num;
1864         } else {
1865                 /*
1866                  * If the platform doesn't support DP MST,
1867                  * manually set dev_num to 1. This means
1868                  * the pin has only one device entry.
1869                  */
1870                 dev_num = 1;
1871                 spec->dev_num = 1;
1872         }
1873
1874         for (i = 0; i < dev_num; i++) {
1875                 pin_idx = spec->num_pins;
1876                 per_pin = snd_array_new(&spec->pins);
1877
1878                 if (!per_pin)
1879                         return -ENOMEM;
1880
1881                 if (spec->dyn_pcm_assign) {
1882                         per_pin->pcm = NULL;
1883                         per_pin->pcm_idx = -1;
1884                 } else {
1885                         per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1886                         per_pin->pcm_idx = pin_idx;
1887                 }
1888                 per_pin->pin_nid = pin_nid;
1889                 per_pin->pin_nid_idx = spec->num_nids;
1890                 per_pin->dev_id = i;
1891                 per_pin->non_pcm = false;
1892                 snd_hda_set_dev_select(codec, pin_nid, i);
1893                 err = hdmi_read_pin_conn(codec, pin_idx);
1894                 if (err < 0)
1895                         return err;
1896                 spec->num_pins++;
1897         }
1898         spec->num_nids++;
1899
1900         return 0;
1901 }
1902
1903 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1904 {
1905         struct hdmi_spec *spec = codec->spec;
1906         struct hdmi_spec_per_cvt *per_cvt;
1907         unsigned int chans;
1908         int err;
1909
1910         chans = get_wcaps(codec, cvt_nid);
1911         chans = get_wcaps_channels(chans);
1912
1913         per_cvt = snd_array_new(&spec->cvts);
1914         if (!per_cvt)
1915                 return -ENOMEM;
1916
1917         per_cvt->cvt_nid = cvt_nid;
1918         per_cvt->channels_min = 2;
1919         if (chans <= 16) {
1920                 per_cvt->channels_max = chans;
1921                 if (chans > spec->chmap.channels_max)
1922                         spec->chmap.channels_max = chans;
1923         }
1924
1925         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1926                                           &per_cvt->rates,
1927                                           &per_cvt->formats,
1928                                           &per_cvt->maxbps);
1929         if (err < 0)
1930                 return err;
1931
1932         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1933                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1934         spec->num_cvts++;
1935
1936         return 0;
1937 }
1938
1939 static const struct snd_pci_quirk force_connect_list[] = {
1940         SND_PCI_QUIRK(0x103c, 0x870f, "HP", 1),
1941         SND_PCI_QUIRK(0x103c, 0x871a, "HP", 1),
1942         {}
1943 };
1944
1945 static int hdmi_parse_codec(struct hda_codec *codec)
1946 {
1947         struct hdmi_spec *spec = codec->spec;
1948         hda_nid_t start_nid;
1949         unsigned int caps;
1950         int i, nodes;
1951         const struct snd_pci_quirk *q;
1952
1953         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &start_nid);
1954         if (!start_nid || nodes < 0) {
1955                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1956                 return -EINVAL;
1957         }
1958
1959         q = snd_pci_quirk_lookup(codec->bus->pci, force_connect_list);
1960
1961         if (q && q->value)
1962                 spec->force_connect = true;
1963
1964         /*
1965          * hdmi_add_pin() assumes total amount of converters to
1966          * be known, so first discover all converters
1967          */
1968         for (i = 0; i < nodes; i++) {
1969                 hda_nid_t nid = start_nid + i;
1970
1971                 caps = get_wcaps(codec, nid);
1972
1973                 if (!(caps & AC_WCAP_DIGITAL))
1974                         continue;
1975
1976                 if (get_wcaps_type(caps) == AC_WID_AUD_OUT)
1977                         hdmi_add_cvt(codec, nid);
1978         }
1979
1980         /* discover audio pins */
1981         for (i = 0; i < nodes; i++) {
1982                 hda_nid_t nid = start_nid + i;
1983
1984                 caps = get_wcaps(codec, nid);
1985
1986                 if (!(caps & AC_WCAP_DIGITAL))
1987                         continue;
1988
1989                 if (get_wcaps_type(caps) == AC_WID_PIN)
1990                         hdmi_add_pin(codec, nid);
1991         }
1992
1993         return 0;
1994 }
1995
1996 /*
1997  */
1998 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1999 {
2000         struct hda_spdif_out *spdif;
2001         bool non_pcm;
2002
2003         mutex_lock(&codec->spdif_mutex);
2004         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
2005         /* Add sanity check to pass klockwork check.
2006          * This should never happen.
2007          */
2008         if (WARN_ON(spdif == NULL)) {
2009                 mutex_unlock(&codec->spdif_mutex);
2010                 return true;
2011         }
2012         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
2013         mutex_unlock(&codec->spdif_mutex);
2014         return non_pcm;
2015 }
2016
2017 /*
2018  * HDMI callbacks
2019  */
2020
2021 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2022                                            struct hda_codec *codec,
2023                                            unsigned int stream_tag,
2024                                            unsigned int format,
2025                                            struct snd_pcm_substream *substream)
2026 {
2027         hda_nid_t cvt_nid = hinfo->nid;
2028         struct hdmi_spec *spec = codec->spec;
2029         int pin_idx;
2030         struct hdmi_spec_per_pin *per_pin;
2031         struct snd_pcm_runtime *runtime = substream->runtime;
2032         bool non_pcm;
2033         int pinctl, stripe;
2034         int err = 0;
2035
2036         mutex_lock(&spec->pcm_lock);
2037         pin_idx = hinfo_to_pin_index(codec, hinfo);
2038         if (spec->dyn_pcm_assign && pin_idx < 0) {
2039                 /* when dyn_pcm_assign and pcm is not bound to a pin
2040                  * skip pin setup and return 0 to make audio playback
2041                  * be ongoing
2042                  */
2043                 pin_cvt_fixup(codec, NULL, cvt_nid);
2044                 snd_hda_codec_setup_stream(codec, cvt_nid,
2045                                         stream_tag, 0, format);
2046                 goto unlock;
2047         }
2048
2049         if (snd_BUG_ON(pin_idx < 0)) {
2050                 err = -EINVAL;
2051                 goto unlock;
2052         }
2053         per_pin = get_pin(spec, pin_idx);
2054
2055         /* Verify pin:cvt selections to avoid silent audio after S3.
2056          * After S3, the audio driver restores pin:cvt selections
2057          * but this can happen before gfx is ready and such selection
2058          * is overlooked by HW. Thus multiple pins can share a same
2059          * default convertor and mute control will affect each other,
2060          * which can cause a resumed audio playback become silent
2061          * after S3.
2062          */
2063         pin_cvt_fixup(codec, per_pin, 0);
2064
2065         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
2066         /* Todo: add DP1.2 MST audio support later */
2067         if (codec_has_acomp(codec))
2068                 snd_hdac_sync_audio_rate(&codec->core, per_pin->pin_nid,
2069                                          per_pin->dev_id, runtime->rate);
2070
2071         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
2072         mutex_lock(&per_pin->lock);
2073         per_pin->channels = substream->runtime->channels;
2074         per_pin->setup = true;
2075
2076         if (get_wcaps(codec, cvt_nid) & AC_WCAP_STRIPE) {
2077                 stripe = snd_hdac_get_stream_stripe_ctl(&codec->bus->core,
2078                                                         substream);
2079                 snd_hda_codec_write(codec, cvt_nid, 0,
2080                                     AC_VERB_SET_STRIPE_CONTROL,
2081                                     stripe);
2082         }
2083
2084         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
2085         mutex_unlock(&per_pin->lock);
2086         if (spec->dyn_pin_out) {
2087                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2088                                        per_pin->dev_id);
2089                 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2090                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2091                 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2092                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
2093                                     pinctl | PIN_OUT);
2094         }
2095
2096         /* snd_hda_set_dev_select() has been called before */
2097         err = spec->ops.setup_stream(codec, cvt_nid, per_pin->pin_nid,
2098                                      per_pin->dev_id, stream_tag, format);
2099  unlock:
2100         mutex_unlock(&spec->pcm_lock);
2101         return err;
2102 }
2103
2104 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2105                                              struct hda_codec *codec,
2106                                              struct snd_pcm_substream *substream)
2107 {
2108         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
2109         return 0;
2110 }
2111
2112 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
2113                           struct hda_codec *codec,
2114                           struct snd_pcm_substream *substream)
2115 {
2116         struct hdmi_spec *spec = codec->spec;
2117         int cvt_idx, pin_idx, pcm_idx;
2118         struct hdmi_spec_per_cvt *per_cvt;
2119         struct hdmi_spec_per_pin *per_pin;
2120         int pinctl;
2121         int err = 0;
2122
2123         mutex_lock(&spec->pcm_lock);
2124         if (hinfo->nid) {
2125                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
2126                 if (snd_BUG_ON(pcm_idx < 0)) {
2127                         err = -EINVAL;
2128                         goto unlock;
2129                 }
2130                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
2131                 if (snd_BUG_ON(cvt_idx < 0)) {
2132                         err = -EINVAL;
2133                         goto unlock;
2134                 }
2135                 per_cvt = get_cvt(spec, cvt_idx);
2136                 snd_BUG_ON(!per_cvt->assigned);
2137                 per_cvt->assigned = 0;
2138                 hinfo->nid = 0;
2139
2140                 azx_stream(get_azx_dev(substream))->stripe = 0;
2141
2142                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2143                 clear_bit(pcm_idx, &spec->pcm_in_use);
2144                 pin_idx = hinfo_to_pin_index(codec, hinfo);
2145                 if (spec->dyn_pcm_assign && pin_idx < 0)
2146                         goto unlock;
2147
2148                 if (snd_BUG_ON(pin_idx < 0)) {
2149                         err = -EINVAL;
2150                         goto unlock;
2151                 }
2152                 per_pin = get_pin(spec, pin_idx);
2153
2154                 if (spec->dyn_pin_out) {
2155                         snd_hda_set_dev_select(codec, per_pin->pin_nid,
2156                                                per_pin->dev_id);
2157                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2158                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2159                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2160                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
2161                                             pinctl & ~PIN_OUT);
2162                 }
2163
2164                 mutex_lock(&per_pin->lock);
2165                 per_pin->chmap_set = false;
2166                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2167
2168                 per_pin->setup = false;
2169                 per_pin->channels = 0;
2170                 mutex_unlock(&per_pin->lock);
2171         }
2172
2173 unlock:
2174         mutex_unlock(&spec->pcm_lock);
2175
2176         return err;
2177 }
2178
2179 static const struct hda_pcm_ops generic_ops = {
2180         .open = hdmi_pcm_open,
2181         .close = hdmi_pcm_close,
2182         .prepare = generic_hdmi_playback_pcm_prepare,
2183         .cleanup = generic_hdmi_playback_pcm_cleanup,
2184 };
2185
2186 static int hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
2187 {
2188         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2189         struct hdmi_spec *spec = codec->spec;
2190         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2191
2192         if (!per_pin)
2193                 return 0;
2194
2195         return per_pin->sink_eld.info.spk_alloc;
2196 }
2197
2198 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
2199                                         unsigned char *chmap)
2200 {
2201         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2202         struct hdmi_spec *spec = codec->spec;
2203         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2204
2205         /* chmap is already set to 0 in caller */
2206         if (!per_pin)
2207                 return;
2208
2209         memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
2210 }
2211
2212 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
2213                                 unsigned char *chmap, int prepared)
2214 {
2215         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2216         struct hdmi_spec *spec = codec->spec;
2217         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2218
2219         if (!per_pin)
2220                 return;
2221         mutex_lock(&per_pin->lock);
2222         per_pin->chmap_set = true;
2223         memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
2224         if (prepared)
2225                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2226         mutex_unlock(&per_pin->lock);
2227 }
2228
2229 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
2230 {
2231         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2232         struct hdmi_spec *spec = codec->spec;
2233         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2234
2235         return per_pin ? true:false;
2236 }
2237
2238 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2239 {
2240         struct hdmi_spec *spec = codec->spec;
2241         int idx, pcm_num;
2242
2243         /*
2244          * for non-mst mode, pcm number is the same as before
2245          * for DP MST mode without extra PCM, pcm number is same
2246          * for DP MST mode with extra PCMs, pcm number is
2247          *  (nid number + dev_num - 1)
2248          * dev_num is the device entry number in a pin
2249          */
2250
2251         if (codec->mst_no_extra_pcms)
2252                 pcm_num = spec->num_nids;
2253         else
2254                 pcm_num = spec->num_nids + spec->dev_num - 1;
2255
2256         codec_dbg(codec, "hdmi: pcm_num set to %d\n", pcm_num);
2257
2258         for (idx = 0; idx < pcm_num; idx++) {
2259                 struct hda_pcm *info;
2260                 struct hda_pcm_stream *pstr;
2261
2262                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", idx);
2263                 if (!info)
2264                         return -ENOMEM;
2265
2266                 spec->pcm_rec[idx].pcm = info;
2267                 spec->pcm_used++;
2268                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2269                 info->own_chmap = true;
2270
2271                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2272                 pstr->substreams = 1;
2273                 pstr->ops = generic_ops;
2274                 /* pcm number is less than 16 */
2275                 if (spec->pcm_used >= 16)
2276                         break;
2277                 /* other pstr fields are set in open */
2278         }
2279
2280         return 0;
2281 }
2282
2283 static void free_hdmi_jack_priv(struct snd_jack *jack)
2284 {
2285         struct hdmi_pcm *pcm = jack->private_data;
2286
2287         pcm->jack = NULL;
2288 }
2289
2290 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2291 {
2292         char hdmi_str[32] = "HDMI/DP";
2293         struct hdmi_spec *spec = codec->spec;
2294         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pcm_idx);
2295         struct snd_jack *jack;
2296         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2297         int err;
2298
2299         if (pcmdev > 0)
2300                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2301         if (!spec->dyn_pcm_assign &&
2302             !is_jack_detectable(codec, per_pin->pin_nid))
2303                 strncat(hdmi_str, " Phantom",
2304                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2305
2306         err = snd_jack_new(codec->card, hdmi_str, SND_JACK_AVOUT, &jack,
2307                            true, false);
2308         if (err < 0)
2309                 return err;
2310
2311         spec->pcm_rec[pcm_idx].jack = jack;
2312         jack->private_data = &spec->pcm_rec[pcm_idx];
2313         jack->private_free = free_hdmi_jack_priv;
2314         return 0;
2315 }
2316
2317 static int generic_hdmi_build_controls(struct hda_codec *codec)
2318 {
2319         struct hdmi_spec *spec = codec->spec;
2320         int dev, err;
2321         int pin_idx, pcm_idx;
2322
2323         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2324                 if (!get_pcm_rec(spec, pcm_idx)->pcm) {
2325                         /* no PCM: mark this for skipping permanently */
2326                         set_bit(pcm_idx, &spec->pcm_bitmap);
2327                         continue;
2328                 }
2329
2330                 err = generic_hdmi_build_jack(codec, pcm_idx);
2331                 if (err < 0)
2332                         return err;
2333
2334                 /* create the spdif for each pcm
2335                  * pin will be bound when monitor is connected
2336                  */
2337                 if (spec->dyn_pcm_assign)
2338                         err = snd_hda_create_dig_out_ctls(codec,
2339                                           0, spec->cvt_nids[0],
2340                                           HDA_PCM_TYPE_HDMI);
2341                 else {
2342                         struct hdmi_spec_per_pin *per_pin =
2343                                 get_pin(spec, pcm_idx);
2344                         err = snd_hda_create_dig_out_ctls(codec,
2345                                                   per_pin->pin_nid,
2346                                                   per_pin->mux_nids[0],
2347                                                   HDA_PCM_TYPE_HDMI);
2348                 }
2349                 if (err < 0)
2350                         return err;
2351                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2352
2353                 dev = get_pcm_rec(spec, pcm_idx)->device;
2354                 if (dev != SNDRV_PCM_INVALID_DEVICE) {
2355                         /* add control for ELD Bytes */
2356                         err = hdmi_create_eld_ctl(codec, pcm_idx, dev);
2357                         if (err < 0)
2358                                 return err;
2359                 }
2360         }
2361
2362         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2363                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2364                 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
2365
2366                 pin_eld->eld_valid = false;
2367                 hdmi_present_sense(per_pin, 0);
2368         }
2369
2370         /* add channel maps */
2371         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2372                 struct hda_pcm *pcm;
2373
2374                 pcm = get_pcm_rec(spec, pcm_idx);
2375                 if (!pcm || !pcm->pcm)
2376                         break;
2377                 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2378                 if (err < 0)
2379                         return err;
2380         }
2381
2382         return 0;
2383 }
2384
2385 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2386 {
2387         struct hdmi_spec *spec = codec->spec;
2388         int pin_idx;
2389
2390         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2391                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2392
2393                 per_pin->codec = codec;
2394                 mutex_init(&per_pin->lock);
2395                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2396                 eld_proc_new(per_pin, pin_idx);
2397         }
2398         return 0;
2399 }
2400
2401 static int generic_hdmi_init(struct hda_codec *codec)
2402 {
2403         struct hdmi_spec *spec = codec->spec;
2404         int pin_idx;
2405
2406         mutex_lock(&spec->bind_lock);
2407         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2408                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2409                 hda_nid_t pin_nid = per_pin->pin_nid;
2410                 int dev_id = per_pin->dev_id;
2411
2412                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
2413                 hdmi_init_pin(codec, pin_nid);
2414                 if (codec_has_acomp(codec))
2415                         continue;
2416                 snd_hda_jack_detect_enable_callback_mst(codec, pin_nid, dev_id,
2417                                                         jack_callback);
2418         }
2419         mutex_unlock(&spec->bind_lock);
2420         return 0;
2421 }
2422
2423 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2424 {
2425         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2426         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2427 }
2428
2429 static void hdmi_array_free(struct hdmi_spec *spec)
2430 {
2431         snd_array_free(&spec->pins);
2432         snd_array_free(&spec->cvts);
2433 }
2434
2435 static void generic_spec_free(struct hda_codec *codec)
2436 {
2437         struct hdmi_spec *spec = codec->spec;
2438
2439         if (spec) {
2440                 hdmi_array_free(spec);
2441                 kfree(spec);
2442                 codec->spec = NULL;
2443         }
2444         codec->dp_mst = false;
2445 }
2446
2447 static void generic_hdmi_free(struct hda_codec *codec)
2448 {
2449         struct hdmi_spec *spec = codec->spec;
2450         int pin_idx, pcm_idx;
2451
2452         if (spec->acomp_registered) {
2453                 snd_hdac_acomp_exit(&codec->bus->core);
2454         } else if (codec_has_acomp(codec)) {
2455                 snd_hdac_acomp_register_notifier(&codec->bus->core, NULL);
2456         }
2457         codec->relaxed_resume = 0;
2458
2459         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2460                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2461                 cancel_delayed_work_sync(&per_pin->work);
2462                 eld_proc_free(per_pin);
2463         }
2464
2465         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2466                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2467                         continue;
2468                 if (spec->dyn_pcm_assign)
2469                         snd_device_free(codec->card,
2470                                         spec->pcm_rec[pcm_idx].jack);
2471                 else
2472                         spec->pcm_rec[pcm_idx].jack = NULL;
2473         }
2474
2475         generic_spec_free(codec);
2476 }
2477
2478 #ifdef CONFIG_PM
2479 static int generic_hdmi_resume(struct hda_codec *codec)
2480 {
2481         struct hdmi_spec *spec = codec->spec;
2482         int pin_idx;
2483
2484         codec->patch_ops.init(codec);
2485         snd_hda_regmap_sync(codec);
2486
2487         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2488                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2489                 hdmi_present_sense(per_pin, 1);
2490         }
2491         return 0;
2492 }
2493 #endif
2494
2495 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2496         .init                   = generic_hdmi_init,
2497         .free                   = generic_hdmi_free,
2498         .build_pcms             = generic_hdmi_build_pcms,
2499         .build_controls         = generic_hdmi_build_controls,
2500         .unsol_event            = hdmi_unsol_event,
2501 #ifdef CONFIG_PM
2502         .resume                 = generic_hdmi_resume,
2503 #endif
2504 };
2505
2506 static const struct hdmi_ops generic_standard_hdmi_ops = {
2507         .pin_get_eld                            = hdmi_pin_get_eld,
2508         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2509         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2510         .setup_stream                           = hdmi_setup_stream,
2511 };
2512
2513 /* allocate codec->spec and assign/initialize generic parser ops */
2514 static int alloc_generic_hdmi(struct hda_codec *codec)
2515 {
2516         struct hdmi_spec *spec;
2517
2518         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2519         if (!spec)
2520                 return -ENOMEM;
2521
2522         spec->codec = codec;
2523         spec->ops = generic_standard_hdmi_ops;
2524         spec->dev_num = 1;      /* initialize to 1 */
2525         mutex_init(&spec->pcm_lock);
2526         mutex_init(&spec->bind_lock);
2527         snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2528
2529         spec->chmap.ops.get_chmap = hdmi_get_chmap;
2530         spec->chmap.ops.set_chmap = hdmi_set_chmap;
2531         spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2532         spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc;
2533
2534         codec->spec = spec;
2535         hdmi_array_init(spec, 4);
2536
2537         codec->patch_ops = generic_hdmi_patch_ops;
2538
2539         return 0;
2540 }
2541
2542 /* generic HDMI parser */
2543 static int patch_generic_hdmi(struct hda_codec *codec)
2544 {
2545         int err;
2546
2547         err = alloc_generic_hdmi(codec);
2548         if (err < 0)
2549                 return err;
2550
2551         err = hdmi_parse_codec(codec);
2552         if (err < 0) {
2553                 generic_spec_free(codec);
2554                 return err;
2555         }
2556
2557         generic_hdmi_init_per_pins(codec);
2558         return 0;
2559 }
2560
2561 /*
2562  * generic audio component binding
2563  */
2564
2565 /* turn on / off the unsol event jack detection dynamically */
2566 static void reprogram_jack_detect(struct hda_codec *codec, hda_nid_t nid,
2567                                   int dev_id, bool use_acomp)
2568 {
2569         struct hda_jack_tbl *tbl;
2570
2571         tbl = snd_hda_jack_tbl_get_mst(codec, nid, dev_id);
2572         if (tbl) {
2573                 /* clear unsol even if component notifier is used, or re-enable
2574                  * if notifier is cleared
2575                  */
2576                 unsigned int val = use_acomp ? 0 : (AC_USRSP_EN | tbl->tag);
2577                 snd_hda_codec_write_cache(codec, nid, 0,
2578                                           AC_VERB_SET_UNSOLICITED_ENABLE, val);
2579         }
2580 }
2581
2582 /* set up / clear component notifier dynamically */
2583 static void generic_acomp_notifier_set(struct drm_audio_component *acomp,
2584                                        bool use_acomp)
2585 {
2586         struct hdmi_spec *spec;
2587         int i;
2588
2589         spec = container_of(acomp->audio_ops, struct hdmi_spec, drm_audio_ops);
2590         mutex_lock(&spec->bind_lock);
2591         spec->use_acomp_notifier = use_acomp;
2592         spec->codec->relaxed_resume = use_acomp;
2593         spec->codec->bus->keep_power = 0;
2594         /* reprogram each jack detection logic depending on the notifier */
2595         for (i = 0; i < spec->num_pins; i++)
2596                 reprogram_jack_detect(spec->codec,
2597                                       get_pin(spec, i)->pin_nid,
2598                                       get_pin(spec, i)->dev_id,
2599                                       use_acomp);
2600         mutex_unlock(&spec->bind_lock);
2601 }
2602
2603 /* enable / disable the notifier via master bind / unbind */
2604 static int generic_acomp_master_bind(struct device *dev,
2605                                      struct drm_audio_component *acomp)
2606 {
2607         generic_acomp_notifier_set(acomp, true);
2608         return 0;
2609 }
2610
2611 static void generic_acomp_master_unbind(struct device *dev,
2612                                         struct drm_audio_component *acomp)
2613 {
2614         generic_acomp_notifier_set(acomp, false);
2615 }
2616
2617 /* check whether both HD-audio and DRM PCI devices belong to the same bus */
2618 static int match_bound_vga(struct device *dev, int subtype, void *data)
2619 {
2620         struct hdac_bus *bus = data;
2621         struct pci_dev *pci, *master;
2622
2623         if (!dev_is_pci(dev) || !dev_is_pci(bus->dev))
2624                 return 0;
2625         master = to_pci_dev(bus->dev);
2626         pci = to_pci_dev(dev);
2627         return master->bus == pci->bus;
2628 }
2629
2630 /* audio component notifier for AMD/Nvidia HDMI codecs */
2631 static void generic_acomp_pin_eld_notify(void *audio_ptr, int port, int dev_id)
2632 {
2633         struct hda_codec *codec = audio_ptr;
2634         struct hdmi_spec *spec = codec->spec;
2635         hda_nid_t pin_nid = spec->port2pin(codec, port);
2636
2637         if (!pin_nid)
2638                 return;
2639         if (get_wcaps_type(get_wcaps(codec, pin_nid)) != AC_WID_PIN)
2640                 return;
2641         /* skip notification during system suspend (but not in runtime PM);
2642          * the state will be updated at resume
2643          */
2644         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2645                 return;
2646         /* ditto during suspend/resume process itself */
2647         if (snd_hdac_is_in_pm(&codec->core))
2648                 return;
2649
2650         check_presence_and_report(codec, pin_nid, dev_id);
2651 }
2652
2653 /* set up the private drm_audio_ops from the template */
2654 static void setup_drm_audio_ops(struct hda_codec *codec,
2655                                 const struct drm_audio_component_audio_ops *ops)
2656 {
2657         struct hdmi_spec *spec = codec->spec;
2658
2659         spec->drm_audio_ops.audio_ptr = codec;
2660         /* intel_audio_codec_enable() or intel_audio_codec_disable()
2661          * will call pin_eld_notify with using audio_ptr pointer
2662          * We need make sure audio_ptr is really setup
2663          */
2664         wmb();
2665         spec->drm_audio_ops.pin2port = ops->pin2port;
2666         spec->drm_audio_ops.pin_eld_notify = ops->pin_eld_notify;
2667         spec->drm_audio_ops.master_bind = ops->master_bind;
2668         spec->drm_audio_ops.master_unbind = ops->master_unbind;
2669 }
2670
2671 /* initialize the generic HDMI audio component */
2672 static void generic_acomp_init(struct hda_codec *codec,
2673                                const struct drm_audio_component_audio_ops *ops,
2674                                int (*port2pin)(struct hda_codec *, int))
2675 {
2676         struct hdmi_spec *spec = codec->spec;
2677
2678         if (!enable_acomp) {
2679                 codec_info(codec, "audio component disabled by module option\n");
2680                 return;
2681         }
2682
2683         spec->port2pin = port2pin;
2684         setup_drm_audio_ops(codec, ops);
2685         if (!snd_hdac_acomp_init(&codec->bus->core, &spec->drm_audio_ops,
2686                                  match_bound_vga, 0)) {
2687                 spec->acomp_registered = true;
2688         }
2689 }
2690
2691 /*
2692  * Intel codec parsers and helpers
2693  */
2694
2695 #define INTEL_GET_VENDOR_VERB   0xf81
2696 #define INTEL_SET_VENDOR_VERB   0x781
2697 #define INTEL_EN_DP12           0x02    /* enable DP 1.2 features */
2698 #define INTEL_EN_ALL_PIN_CVTS   0x01    /* enable 2nd & 3rd pins and convertors */
2699
2700 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2701                                           bool update_tree)
2702 {
2703         unsigned int vendor_param;
2704         struct hdmi_spec *spec = codec->spec;
2705
2706         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2707                                 INTEL_GET_VENDOR_VERB, 0);
2708         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2709                 return;
2710
2711         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2712         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2713                                 INTEL_SET_VENDOR_VERB, vendor_param);
2714         if (vendor_param == -1)
2715                 return;
2716
2717         if (update_tree)
2718                 snd_hda_codec_update_widgets(codec);
2719 }
2720
2721 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2722 {
2723         unsigned int vendor_param;
2724         struct hdmi_spec *spec = codec->spec;
2725
2726         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2727                                 INTEL_GET_VENDOR_VERB, 0);
2728         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2729                 return;
2730
2731         /* enable DP1.2 mode */
2732         vendor_param |= INTEL_EN_DP12;
2733         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2734         snd_hda_codec_write_cache(codec, spec->vendor_nid, 0,
2735                                 INTEL_SET_VENDOR_VERB, vendor_param);
2736 }
2737
2738 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2739  * Otherwise you may get severe h/w communication errors.
2740  */
2741 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2742                                 unsigned int power_state)
2743 {
2744         if (power_state == AC_PWRST_D0) {
2745                 intel_haswell_enable_all_pins(codec, false);
2746                 intel_haswell_fixup_enable_dp12(codec);
2747         }
2748
2749         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2750         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2751 }
2752
2753 /* There is a fixed mapping between audio pin node and display port.
2754  * on SNB, IVY, HSW, BSW, SKL, BXT, KBL:
2755  * Pin Widget 5 - PORT B (port = 1 in i915 driver)
2756  * Pin Widget 6 - PORT C (port = 2 in i915 driver)
2757  * Pin Widget 7 - PORT D (port = 3 in i915 driver)
2758  *
2759  * on VLV, ILK:
2760  * Pin Widget 4 - PORT B (port = 1 in i915 driver)
2761  * Pin Widget 5 - PORT C (port = 2 in i915 driver)
2762  * Pin Widget 6 - PORT D (port = 3 in i915 driver)
2763  */
2764 static int intel_base_nid(struct hda_codec *codec)
2765 {
2766         switch (codec->core.vendor_id) {
2767         case 0x80860054: /* ILK */
2768         case 0x80862804: /* ILK */
2769         case 0x80862882: /* VLV */
2770                 return 4;
2771         default:
2772                 return 5;
2773         }
2774 }
2775
2776 static int intel_pin2port(void *audio_ptr, int pin_nid)
2777 {
2778         struct hda_codec *codec = audio_ptr;
2779         struct hdmi_spec *spec = codec->spec;
2780         int base_nid, i;
2781
2782         if (!spec->port_num) {
2783                 base_nid = intel_base_nid(codec);
2784                 if (WARN_ON(pin_nid < base_nid || pin_nid >= base_nid + 3))
2785                         return -1;
2786                 return pin_nid - base_nid + 1;
2787         }
2788
2789         /*
2790          * looking for the pin number in the mapping table and return
2791          * the index which indicate the port number
2792          */
2793         for (i = 0; i < spec->port_num; i++) {
2794                 if (pin_nid == spec->port_map[i])
2795                         return i;
2796         }
2797
2798         codec_info(codec, "Can't find the HDMI/DP port for pin %d\n", pin_nid);
2799         return -1;
2800 }
2801
2802 static int intel_port2pin(struct hda_codec *codec, int port)
2803 {
2804         struct hdmi_spec *spec = codec->spec;
2805
2806         if (!spec->port_num) {
2807                 /* we assume only from port-B to port-D */
2808                 if (port < 1 || port > 3)
2809                         return 0;
2810                 return port + intel_base_nid(codec) - 1;
2811         }
2812
2813         if (port < 0 || port >= spec->port_num)
2814                 return 0;
2815         return spec->port_map[port];
2816 }
2817
2818 static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)
2819 {
2820         struct hda_codec *codec = audio_ptr;
2821         int pin_nid;
2822         int dev_id = pipe;
2823
2824         pin_nid = intel_port2pin(codec, port);
2825         if (!pin_nid)
2826                 return;
2827         /* skip notification during system suspend (but not in runtime PM);
2828          * the state will be updated at resume
2829          */
2830         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2831                 return;
2832         /* ditto during suspend/resume process itself */
2833         if (snd_hdac_is_in_pm(&codec->core))
2834                 return;
2835
2836         snd_hdac_i915_set_bclk(&codec->bus->core);
2837         check_presence_and_report(codec, pin_nid, dev_id);
2838 }
2839
2840 static const struct drm_audio_component_audio_ops intel_audio_ops = {
2841         .pin2port = intel_pin2port,
2842         .pin_eld_notify = intel_pin_eld_notify,
2843 };
2844
2845 /* register i915 component pin_eld_notify callback */
2846 static void register_i915_notifier(struct hda_codec *codec)
2847 {
2848         struct hdmi_spec *spec = codec->spec;
2849
2850         spec->use_acomp_notifier = true;
2851         spec->port2pin = intel_port2pin;
2852         setup_drm_audio_ops(codec, &intel_audio_ops);
2853         snd_hdac_acomp_register_notifier(&codec->bus->core,
2854                                         &spec->drm_audio_ops);
2855         /* no need for forcible resume for jack check thanks to notifier */
2856         codec->relaxed_resume = 1;
2857 }
2858
2859 /* setup_stream ops override for HSW+ */
2860 static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
2861                                  hda_nid_t pin_nid, int dev_id, u32 stream_tag,
2862                                  int format)
2863 {
2864         haswell_verify_D0(codec, cvt_nid, pin_nid);
2865         return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
2866                                  stream_tag, format);
2867 }
2868
2869 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2870 static void i915_pin_cvt_fixup(struct hda_codec *codec,
2871                                struct hdmi_spec_per_pin *per_pin,
2872                                hda_nid_t cvt_nid)
2873 {
2874         if (per_pin) {
2875                 haswell_verify_D0(codec, per_pin->cvt_nid, per_pin->pin_nid);
2876                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2877                                per_pin->dev_id);
2878                 intel_verify_pin_cvt_connect(codec, per_pin);
2879                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
2880                                      per_pin->dev_id, per_pin->mux_idx);
2881         } else {
2882                 intel_not_share_assigned_cvt_nid(codec, 0, 0, cvt_nid);
2883         }
2884 }
2885
2886 /* precondition and allocation for Intel codecs */
2887 static int alloc_intel_hdmi(struct hda_codec *codec)
2888 {
2889         int err;
2890
2891         /* requires i915 binding */
2892         if (!codec->bus->core.audio_component) {
2893                 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2894                 /* set probe_id here to prevent generic fallback binding */
2895                 codec->probe_id = HDA_CODEC_ID_SKIP_PROBE;
2896                 return -ENODEV;
2897         }
2898
2899         err = alloc_generic_hdmi(codec);
2900         if (err < 0)
2901                 return err;
2902         /* no need to handle unsol events */
2903         codec->patch_ops.unsol_event = NULL;
2904         return 0;
2905 }
2906
2907 /* parse and post-process for Intel codecs */
2908 static int parse_intel_hdmi(struct hda_codec *codec)
2909 {
2910         int err, retries = 3;
2911
2912         do {
2913                 err = hdmi_parse_codec(codec);
2914         } while (err < 0 && retries--);
2915
2916         if (err < 0) {
2917                 generic_spec_free(codec);
2918                 return err;
2919         }
2920
2921         generic_hdmi_init_per_pins(codec);
2922         register_i915_notifier(codec);
2923         return 0;
2924 }
2925
2926 /* Intel Haswell and onwards; audio component with eld notifier */
2927 static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid,
2928                                  const int *port_map, int port_num)
2929 {
2930         struct hdmi_spec *spec;
2931         int err;
2932
2933         err = alloc_intel_hdmi(codec);
2934         if (err < 0)
2935                 return err;
2936         spec = codec->spec;
2937         codec->dp_mst = true;
2938         spec->dyn_pcm_assign = true;
2939         spec->vendor_nid = vendor_nid;
2940         spec->port_map = port_map;
2941         spec->port_num = port_num;
2942         spec->intel_hsw_fixup = true;
2943
2944         intel_haswell_enable_all_pins(codec, true);
2945         intel_haswell_fixup_enable_dp12(codec);
2946
2947         codec->display_power_control = 1;
2948
2949         codec->patch_ops.set_power_state = haswell_set_power_state;
2950         codec->depop_delay = 0;
2951         codec->auto_runtime_pm = 1;
2952
2953         spec->ops.setup_stream = i915_hsw_setup_stream;
2954         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2955
2956         /*
2957          * Enable silent stream feature, if it is enabled via
2958          * module param or Kconfig option
2959          */
2960         if (enable_silent_stream)
2961                 spec->send_silent_stream = true;
2962
2963         return parse_intel_hdmi(codec);
2964 }
2965
2966 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2967 {
2968         return intel_hsw_common_init(codec, 0x08, NULL, 0);
2969 }
2970
2971 static int patch_i915_glk_hdmi(struct hda_codec *codec)
2972 {
2973         return intel_hsw_common_init(codec, 0x0b, NULL, 0);
2974 }
2975
2976 static int patch_i915_icl_hdmi(struct hda_codec *codec)
2977 {
2978         /*
2979          * pin to port mapping table where the value indicate the pin number and
2980          * the index indicate the port number.
2981          */
2982         static const int map[] = {0x0, 0x4, 0x6, 0x8, 0xa, 0xb};
2983
2984         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2985 }
2986
2987 static int patch_i915_tgl_hdmi(struct hda_codec *codec)
2988 {
2989         /*
2990          * pin to port mapping table where the value indicate the pin number and
2991          * the index indicate the port number.
2992          */
2993         static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
2994
2995         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2996 }
2997
2998 /* Intel Baytrail and Braswell; with eld notifier */
2999 static int patch_i915_byt_hdmi(struct hda_codec *codec)
3000 {
3001         struct hdmi_spec *spec;
3002         int err;
3003
3004         err = alloc_intel_hdmi(codec);
3005         if (err < 0)
3006                 return err;
3007         spec = codec->spec;
3008
3009         /* For Valleyview/Cherryview, only the display codec is in the display
3010          * power well and can use link_power ops to request/release the power.
3011          */
3012         codec->display_power_control = 1;
3013
3014         codec->depop_delay = 0;
3015         codec->auto_runtime_pm = 1;
3016
3017         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
3018
3019         return parse_intel_hdmi(codec);
3020 }
3021
3022 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
3023 static int patch_i915_cpt_hdmi(struct hda_codec *codec)
3024 {
3025         int err;
3026
3027         err = alloc_intel_hdmi(codec);
3028         if (err < 0)
3029                 return err;
3030         return parse_intel_hdmi(codec);
3031 }
3032
3033 /*
3034  * Shared non-generic implementations
3035  */
3036
3037 static int simple_playback_build_pcms(struct hda_codec *codec)
3038 {
3039         struct hdmi_spec *spec = codec->spec;
3040         struct hda_pcm *info;
3041         unsigned int chans;
3042         struct hda_pcm_stream *pstr;
3043         struct hdmi_spec_per_cvt *per_cvt;
3044
3045         per_cvt = get_cvt(spec, 0);
3046         chans = get_wcaps(codec, per_cvt->cvt_nid);
3047         chans = get_wcaps_channels(chans);
3048
3049         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
3050         if (!info)
3051                 return -ENOMEM;
3052         spec->pcm_rec[0].pcm = info;
3053         info->pcm_type = HDA_PCM_TYPE_HDMI;
3054         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
3055         *pstr = spec->pcm_playback;
3056         pstr->nid = per_cvt->cvt_nid;
3057         if (pstr->channels_max <= 2 && chans && chans <= 16)
3058                 pstr->channels_max = chans;
3059
3060         return 0;
3061 }
3062
3063 /* unsolicited event for jack sensing */
3064 static void simple_hdmi_unsol_event(struct hda_codec *codec,
3065                                     unsigned int res)
3066 {
3067         snd_hda_jack_set_dirty_all(codec);
3068         snd_hda_jack_report_sync(codec);
3069 }
3070
3071 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
3072  * as long as spec->pins[] is set correctly
3073  */
3074 #define simple_hdmi_build_jack  generic_hdmi_build_jack
3075
3076 static int simple_playback_build_controls(struct hda_codec *codec)
3077 {
3078         struct hdmi_spec *spec = codec->spec;
3079         struct hdmi_spec_per_cvt *per_cvt;
3080         int err;
3081
3082         per_cvt = get_cvt(spec, 0);
3083         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
3084                                           per_cvt->cvt_nid,
3085                                           HDA_PCM_TYPE_HDMI);
3086         if (err < 0)
3087                 return err;
3088         return simple_hdmi_build_jack(codec, 0);
3089 }
3090
3091 static int simple_playback_init(struct hda_codec *codec)
3092 {
3093         struct hdmi_spec *spec = codec->spec;
3094         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
3095         hda_nid_t pin = per_pin->pin_nid;
3096
3097         snd_hda_codec_write(codec, pin, 0,
3098                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
3099         /* some codecs require to unmute the pin */
3100         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
3101                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
3102                                     AMP_OUT_UNMUTE);
3103         snd_hda_jack_detect_enable(codec, pin, per_pin->dev_id);
3104         return 0;
3105 }
3106
3107 static void simple_playback_free(struct hda_codec *codec)
3108 {
3109         struct hdmi_spec *spec = codec->spec;
3110
3111         hdmi_array_free(spec);
3112         kfree(spec);
3113 }
3114
3115 /*
3116  * Nvidia specific implementations
3117  */
3118
3119 #define Nv_VERB_SET_Channel_Allocation          0xF79
3120 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
3121 #define Nv_VERB_SET_Audio_Protection_On         0xF98
3122 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
3123
3124 #define nvhdmi_master_con_nid_7x        0x04
3125 #define nvhdmi_master_pin_nid_7x        0x05
3126
3127 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
3128         /*front, rear, clfe, rear_surr */
3129         0x6, 0x8, 0xa, 0xc,
3130 };
3131
3132 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
3133         /* set audio protect on */
3134         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3135         /* enable digital output on pin widget */
3136         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3137         {} /* terminator */
3138 };
3139
3140 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
3141         /* set audio protect on */
3142         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3143         /* enable digital output on pin widget */
3144         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3145         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3146         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3147         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3148         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3149         {} /* terminator */
3150 };
3151
3152 #ifdef LIMITED_RATE_FMT_SUPPORT
3153 /* support only the safe format and rate */
3154 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
3155 #define SUPPORTED_MAXBPS        16
3156 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
3157 #else
3158 /* support all rates and formats */
3159 #define SUPPORTED_RATES \
3160         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
3161         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
3162          SNDRV_PCM_RATE_192000)
3163 #define SUPPORTED_MAXBPS        24
3164 #define SUPPORTED_FORMATS \
3165         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
3166 #endif
3167
3168 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
3169 {
3170         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
3171         return 0;
3172 }
3173
3174 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
3175 {
3176         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
3177         return 0;
3178 }
3179
3180 static const unsigned int channels_2_6_8[] = {
3181         2, 6, 8
3182 };
3183
3184 static const unsigned int channels_2_8[] = {
3185         2, 8
3186 };
3187
3188 static const struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
3189         .count = ARRAY_SIZE(channels_2_6_8),
3190         .list = channels_2_6_8,
3191         .mask = 0,
3192 };
3193
3194 static const struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
3195         .count = ARRAY_SIZE(channels_2_8),
3196         .list = channels_2_8,
3197         .mask = 0,
3198 };
3199
3200 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
3201                                     struct hda_codec *codec,
3202                                     struct snd_pcm_substream *substream)
3203 {
3204         struct hdmi_spec *spec = codec->spec;
3205         const struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
3206
3207         switch (codec->preset->vendor_id) {
3208         case 0x10de0002:
3209         case 0x10de0003:
3210         case 0x10de0005:
3211         case 0x10de0006:
3212                 hw_constraints_channels = &hw_constraints_2_8_channels;
3213                 break;
3214         case 0x10de0007:
3215                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
3216                 break;
3217         default:
3218                 break;
3219         }
3220
3221         if (hw_constraints_channels != NULL) {
3222                 snd_pcm_hw_constraint_list(substream->runtime, 0,
3223                                 SNDRV_PCM_HW_PARAM_CHANNELS,
3224                                 hw_constraints_channels);
3225         } else {
3226                 snd_pcm_hw_constraint_step(substream->runtime, 0,
3227                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
3228         }
3229
3230         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3231 }
3232
3233 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
3234                                      struct hda_codec *codec,
3235                                      struct snd_pcm_substream *substream)
3236 {
3237         struct hdmi_spec *spec = codec->spec;
3238         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3239 }
3240
3241 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3242                                        struct hda_codec *codec,
3243                                        unsigned int stream_tag,
3244                                        unsigned int format,
3245                                        struct snd_pcm_substream *substream)
3246 {
3247         struct hdmi_spec *spec = codec->spec;
3248         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3249                                              stream_tag, format, substream);
3250 }
3251
3252 static const struct hda_pcm_stream simple_pcm_playback = {
3253         .substreams = 1,
3254         .channels_min = 2,
3255         .channels_max = 2,
3256         .ops = {
3257                 .open = simple_playback_pcm_open,
3258                 .close = simple_playback_pcm_close,
3259                 .prepare = simple_playback_pcm_prepare
3260         },
3261 };
3262
3263 static const struct hda_codec_ops simple_hdmi_patch_ops = {
3264         .build_controls = simple_playback_build_controls,
3265         .build_pcms = simple_playback_build_pcms,
3266         .init = simple_playback_init,
3267         .free = simple_playback_free,
3268         .unsol_event = simple_hdmi_unsol_event,
3269 };
3270
3271 static int patch_simple_hdmi(struct hda_codec *codec,
3272                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
3273 {
3274         struct hdmi_spec *spec;
3275         struct hdmi_spec_per_cvt *per_cvt;
3276         struct hdmi_spec_per_pin *per_pin;
3277
3278         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3279         if (!spec)
3280                 return -ENOMEM;
3281
3282         spec->codec = codec;
3283         codec->spec = spec;
3284         hdmi_array_init(spec, 1);
3285
3286         spec->multiout.num_dacs = 0;  /* no analog */
3287         spec->multiout.max_channels = 2;
3288         spec->multiout.dig_out_nid = cvt_nid;
3289         spec->num_cvts = 1;
3290         spec->num_pins = 1;
3291         per_pin = snd_array_new(&spec->pins);
3292         per_cvt = snd_array_new(&spec->cvts);
3293         if (!per_pin || !per_cvt) {
3294                 simple_playback_free(codec);
3295                 return -ENOMEM;
3296         }
3297         per_cvt->cvt_nid = cvt_nid;
3298         per_pin->pin_nid = pin_nid;
3299         spec->pcm_playback = simple_pcm_playback;
3300
3301         codec->patch_ops = simple_hdmi_patch_ops;
3302
3303         return 0;
3304 }
3305
3306 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3307                                                     int channels)
3308 {
3309         unsigned int chanmask;
3310         int chan = channels ? (channels - 1) : 1;
3311
3312         switch (channels) {
3313         default:
3314         case 0:
3315         case 2:
3316                 chanmask = 0x00;
3317                 break;
3318         case 4:
3319                 chanmask = 0x08;
3320                 break;
3321         case 6:
3322                 chanmask = 0x0b;
3323                 break;
3324         case 8:
3325                 chanmask = 0x13;
3326                 break;
3327         }
3328
3329         /* Set the audio infoframe channel allocation and checksum fields.  The
3330          * channel count is computed implicitly by the hardware. */
3331         snd_hda_codec_write(codec, 0x1, 0,
3332                         Nv_VERB_SET_Channel_Allocation, chanmask);
3333
3334         snd_hda_codec_write(codec, 0x1, 0,
3335                         Nv_VERB_SET_Info_Frame_Checksum,
3336                         (0x71 - chan - chanmask));
3337 }
3338
3339 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3340                                    struct hda_codec *codec,
3341                                    struct snd_pcm_substream *substream)
3342 {
3343         struct hdmi_spec *spec = codec->spec;
3344         int i;
3345
3346         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3347                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3348         for (i = 0; i < 4; i++) {
3349                 /* set the stream id */
3350                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3351                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
3352                 /* set the stream format */
3353                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3354                                 AC_VERB_SET_STREAM_FORMAT, 0);
3355         }
3356
3357         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3358          * streams are disabled. */
3359         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3360
3361         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3362 }
3363
3364 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3365                                      struct hda_codec *codec,
3366                                      unsigned int stream_tag,
3367                                      unsigned int format,
3368                                      struct snd_pcm_substream *substream)
3369 {
3370         int chs;
3371         unsigned int dataDCC2, channel_id;
3372         int i;
3373         struct hdmi_spec *spec = codec->spec;
3374         struct hda_spdif_out *spdif;
3375         struct hdmi_spec_per_cvt *per_cvt;
3376
3377         mutex_lock(&codec->spdif_mutex);
3378         per_cvt = get_cvt(spec, 0);
3379         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3380
3381         chs = substream->runtime->channels;
3382
3383         dataDCC2 = 0x2;
3384
3385         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3386         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3387                 snd_hda_codec_write(codec,
3388                                 nvhdmi_master_con_nid_7x,
3389                                 0,
3390                                 AC_VERB_SET_DIGI_CONVERT_1,
3391                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3392
3393         /* set the stream id */
3394         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3395                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3396
3397         /* set the stream format */
3398         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3399                         AC_VERB_SET_STREAM_FORMAT, format);
3400
3401         /* turn on again (if needed) */
3402         /* enable and set the channel status audio/data flag */
3403         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3404                 snd_hda_codec_write(codec,
3405                                 nvhdmi_master_con_nid_7x,
3406                                 0,
3407                                 AC_VERB_SET_DIGI_CONVERT_1,
3408                                 spdif->ctls & 0xff);
3409                 snd_hda_codec_write(codec,
3410                                 nvhdmi_master_con_nid_7x,
3411                                 0,
3412                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3413         }
3414
3415         for (i = 0; i < 4; i++) {
3416                 if (chs == 2)
3417                         channel_id = 0;
3418                 else
3419                         channel_id = i * 2;
3420
3421                 /* turn off SPDIF once;
3422                  *otherwise the IEC958 bits won't be updated
3423                  */
3424                 if (codec->spdif_status_reset &&
3425                 (spdif->ctls & AC_DIG1_ENABLE))
3426                         snd_hda_codec_write(codec,
3427                                 nvhdmi_con_nids_7x[i],
3428                                 0,
3429                                 AC_VERB_SET_DIGI_CONVERT_1,
3430                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3431                 /* set the stream id */
3432                 snd_hda_codec_write(codec,
3433                                 nvhdmi_con_nids_7x[i],
3434                                 0,
3435                                 AC_VERB_SET_CHANNEL_STREAMID,
3436                                 (stream_tag << 4) | channel_id);
3437                 /* set the stream format */
3438                 snd_hda_codec_write(codec,
3439                                 nvhdmi_con_nids_7x[i],
3440                                 0,
3441                                 AC_VERB_SET_STREAM_FORMAT,
3442                                 format);
3443                 /* turn on again (if needed) */
3444                 /* enable and set the channel status audio/data flag */
3445                 if (codec->spdif_status_reset &&
3446                 (spdif->ctls & AC_DIG1_ENABLE)) {
3447                         snd_hda_codec_write(codec,
3448                                         nvhdmi_con_nids_7x[i],
3449                                         0,
3450                                         AC_VERB_SET_DIGI_CONVERT_1,
3451                                         spdif->ctls & 0xff);
3452                         snd_hda_codec_write(codec,
3453                                         nvhdmi_con_nids_7x[i],
3454                                         0,
3455                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3456                 }
3457         }
3458
3459         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3460
3461         mutex_unlock(&codec->spdif_mutex);
3462         return 0;
3463 }
3464
3465 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3466         .substreams = 1,
3467         .channels_min = 2,
3468         .channels_max = 8,
3469         .nid = nvhdmi_master_con_nid_7x,
3470         .rates = SUPPORTED_RATES,
3471         .maxbps = SUPPORTED_MAXBPS,
3472         .formats = SUPPORTED_FORMATS,
3473         .ops = {
3474                 .open = simple_playback_pcm_open,
3475                 .close = nvhdmi_8ch_7x_pcm_close,
3476                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3477         },
3478 };
3479
3480 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3481 {
3482         struct hdmi_spec *spec;
3483         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3484                                     nvhdmi_master_pin_nid_7x);
3485         if (err < 0)
3486                 return err;
3487
3488         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3489         /* override the PCM rates, etc, as the codec doesn't give full list */
3490         spec = codec->spec;
3491         spec->pcm_playback.rates = SUPPORTED_RATES;
3492         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3493         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3494         return 0;
3495 }
3496
3497 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3498 {
3499         struct hdmi_spec *spec = codec->spec;
3500         int err = simple_playback_build_pcms(codec);
3501         if (!err) {
3502                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3503                 info->own_chmap = true;
3504         }
3505         return err;
3506 }
3507
3508 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3509 {
3510         struct hdmi_spec *spec = codec->spec;
3511         struct hda_pcm *info;
3512         struct snd_pcm_chmap *chmap;
3513         int err;
3514
3515         err = simple_playback_build_controls(codec);
3516         if (err < 0)
3517                 return err;
3518
3519         /* add channel maps */
3520         info = get_pcm_rec(spec, 0);
3521         err = snd_pcm_add_chmap_ctls(info->pcm,
3522                                      SNDRV_PCM_STREAM_PLAYBACK,
3523                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3524         if (err < 0)
3525                 return err;
3526         switch (codec->preset->vendor_id) {
3527         case 0x10de0002:
3528         case 0x10de0003:
3529         case 0x10de0005:
3530         case 0x10de0006:
3531                 chmap->channel_mask = (1U << 2) | (1U << 8);
3532                 break;
3533         case 0x10de0007:
3534                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3535         }
3536         return 0;
3537 }
3538
3539 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3540 {
3541         struct hdmi_spec *spec;
3542         int err = patch_nvhdmi_2ch(codec);
3543         if (err < 0)
3544                 return err;
3545         spec = codec->spec;
3546         spec->multiout.max_channels = 8;
3547         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3548         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3549         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3550         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3551
3552         /* Initialize the audio infoframe channel mask and checksum to something
3553          * valid */
3554         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3555
3556         return 0;
3557 }
3558
3559 /*
3560  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3561  * - 0x10de0015
3562  * - 0x10de0040
3563  */
3564 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
3565                 struct hdac_cea_channel_speaker_allocation *cap, int channels)
3566 {
3567         if (cap->ca_index == 0x00 && channels == 2)
3568                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3569
3570         /* If the speaker allocation matches the channel count, it is OK. */
3571         if (cap->channels != channels)
3572                 return -1;
3573
3574         /* all channels are remappable freely */
3575         return SNDRV_CTL_TLVT_CHMAP_VAR;
3576 }
3577
3578 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
3579                 int ca, int chs, unsigned char *map)
3580 {
3581         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3582                 return -EINVAL;
3583
3584         return 0;
3585 }
3586
3587 /* map from pin NID to port; port is 0-based */
3588 /* for Nvidia: assume widget NID starting from 4, with step 1 (4, 5, 6, ...) */
3589 static int nvhdmi_pin2port(void *audio_ptr, int pin_nid)
3590 {
3591         return pin_nid - 4;
3592 }
3593
3594 /* reverse-map from port to pin NID: see above */
3595 static int nvhdmi_port2pin(struct hda_codec *codec, int port)
3596 {
3597         return port + 4;
3598 }
3599
3600 static const struct drm_audio_component_audio_ops nvhdmi_audio_ops = {
3601         .pin2port = nvhdmi_pin2port,
3602         .pin_eld_notify = generic_acomp_pin_eld_notify,
3603         .master_bind = generic_acomp_master_bind,
3604         .master_unbind = generic_acomp_master_unbind,
3605 };
3606
3607 static int patch_nvhdmi(struct hda_codec *codec)
3608 {
3609         struct hdmi_spec *spec;
3610         int err;
3611
3612         err = alloc_generic_hdmi(codec);
3613         if (err < 0)
3614                 return err;
3615         codec->dp_mst = true;
3616
3617         spec = codec->spec;
3618         spec->dyn_pcm_assign = true;
3619
3620         err = hdmi_parse_codec(codec);
3621         if (err < 0) {
3622                 generic_spec_free(codec);
3623                 return err;
3624         }
3625
3626         generic_hdmi_init_per_pins(codec);
3627
3628         spec->dyn_pin_out = true;
3629
3630         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3631                 nvhdmi_chmap_cea_alloc_validate_get_type;
3632         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3633
3634         codec->link_down_at_suspend = 1;
3635
3636         generic_acomp_init(codec, &nvhdmi_audio_ops, nvhdmi_port2pin);
3637
3638         return 0;
3639 }
3640
3641 static int patch_nvhdmi_legacy(struct hda_codec *codec)
3642 {
3643         struct hdmi_spec *spec;
3644         int err;
3645
3646         err = patch_generic_hdmi(codec);
3647         if (err)
3648                 return err;
3649
3650         spec = codec->spec;
3651         spec->dyn_pin_out = true;
3652
3653         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3654                 nvhdmi_chmap_cea_alloc_validate_get_type;
3655         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3656
3657         codec->link_down_at_suspend = 1;
3658
3659         return 0;
3660 }
3661
3662 /*
3663  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3664  * accessed using vendor-defined verbs. These registers can be used for
3665  * interoperability between the HDA and HDMI drivers.
3666  */
3667
3668 /* Audio Function Group node */
3669 #define NVIDIA_AFG_NID 0x01
3670
3671 /*
3672  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3673  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3674  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3675  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3676  * additional bit (at position 30) to signal the validity of the format.
3677  *
3678  * | 31      | 30    | 29  16 | 15   0 |
3679  * +---------+-------+--------+--------+
3680  * | TRIGGER | VALID | UNUSED | FORMAT |
3681  * +-----------------------------------|
3682  *
3683  * Note that for the trigger bit to take effect it needs to change value
3684  * (i.e. it needs to be toggled).
3685  */
3686 #define NVIDIA_GET_SCRATCH0             0xfa6
3687 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3688 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3689 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3690 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3691 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3692 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3693
3694 #define NVIDIA_GET_SCRATCH1             0xfab
3695 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3696 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3697 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3698 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3699
3700 /*
3701  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3702  * the format is invalidated so that the HDMI codec can be disabled.
3703  */
3704 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3705 {
3706         unsigned int value;
3707
3708         /* bits [31:30] contain the trigger and valid bits */
3709         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3710                                    NVIDIA_GET_SCRATCH0, 0);
3711         value = (value >> 24) & 0xff;
3712
3713         /* bits [15:0] are used to store the HDA format */
3714         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3715                             NVIDIA_SET_SCRATCH0_BYTE0,
3716                             (format >> 0) & 0xff);
3717         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3718                             NVIDIA_SET_SCRATCH0_BYTE1,
3719                             (format >> 8) & 0xff);
3720
3721         /* bits [16:24] are unused */
3722         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3723                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3724
3725         /*
3726          * Bit 30 signals that the data is valid and hence that HDMI audio can
3727          * be enabled.
3728          */
3729         if (format == 0)
3730                 value &= ~NVIDIA_SCRATCH_VALID;
3731         else
3732                 value |= NVIDIA_SCRATCH_VALID;
3733
3734         /*
3735          * Whenever the trigger bit is toggled, an interrupt is raised in the
3736          * HDMI codec. The HDMI driver will use that as trigger to update its
3737          * configuration.
3738          */
3739         value ^= NVIDIA_SCRATCH_TRIGGER;
3740
3741         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3742                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3743 }
3744
3745 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3746                                   struct hda_codec *codec,
3747                                   unsigned int stream_tag,
3748                                   unsigned int format,
3749                                   struct snd_pcm_substream *substream)
3750 {
3751         int err;
3752
3753         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3754                                                 format, substream);
3755         if (err < 0)
3756                 return err;
3757
3758         /* notify the HDMI codec of the format change */
3759         tegra_hdmi_set_format(codec, format);
3760
3761         return 0;
3762 }
3763
3764 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3765                                   struct hda_codec *codec,
3766                                   struct snd_pcm_substream *substream)
3767 {
3768         /* invalidate the format in the HDMI codec */
3769         tegra_hdmi_set_format(codec, 0);
3770
3771         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3772 }
3773
3774 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3775 {
3776         struct hdmi_spec *spec = codec->spec;
3777         unsigned int i;
3778
3779         for (i = 0; i < spec->num_pins; i++) {
3780                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3781
3782                 if (pcm->pcm_type == type)
3783                         return pcm;
3784         }
3785
3786         return NULL;
3787 }
3788
3789 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3790 {
3791         struct hda_pcm_stream *stream;
3792         struct hda_pcm *pcm;
3793         int err;
3794
3795         err = generic_hdmi_build_pcms(codec);
3796         if (err < 0)
3797                 return err;
3798
3799         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3800         if (!pcm)
3801                 return -ENODEV;
3802
3803         /*
3804          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3805          * codec about format changes.
3806          */
3807         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3808         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3809         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3810
3811         return 0;
3812 }
3813
3814 static int patch_tegra_hdmi(struct hda_codec *codec)
3815 {
3816         struct hdmi_spec *spec;
3817         int err;
3818
3819         err = patch_generic_hdmi(codec);
3820         if (err)
3821                 return err;
3822
3823         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3824         spec = codec->spec;
3825         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3826                 nvhdmi_chmap_cea_alloc_validate_get_type;
3827         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3828
3829         return 0;
3830 }
3831
3832 /*
3833  * ATI/AMD-specific implementations
3834  */
3835
3836 #define is_amdhdmi_rev3_or_later(codec) \
3837         ((codec)->core.vendor_id == 0x1002aa01 && \
3838          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3839 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3840
3841 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3842 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3843 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3844 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3845 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3846 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3847 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3848 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3849 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3850 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3851 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3852 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3853 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3854 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3855 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3856 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3857 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3858 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3859 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3860 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3861 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3862 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3863 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3864 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3865 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3866
3867 /* AMD specific HDA cvt verbs */
3868 #define ATI_VERB_SET_RAMP_RATE          0x770
3869 #define ATI_VERB_GET_RAMP_RATE          0xf70
3870
3871 #define ATI_OUT_ENABLE 0x1
3872
3873 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3874 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3875
3876 #define ATI_HBR_CAPABLE 0x01
3877 #define ATI_HBR_ENABLE 0x10
3878
3879 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3880                                int dev_id, unsigned char *buf, int *eld_size)
3881 {
3882         WARN_ON(dev_id != 0);
3883         /* call hda_eld.c ATI/AMD-specific function */
3884         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3885                                     is_amdhdmi_rev3_or_later(codec));
3886 }
3887
3888 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec,
3889                                         hda_nid_t pin_nid, int dev_id, int ca,
3890                                         int active_channels, int conn_type)
3891 {
3892         WARN_ON(dev_id != 0);
3893         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3894 }
3895
3896 static int atihdmi_paired_swap_fc_lfe(int pos)
3897 {
3898         /*
3899          * ATI/AMD have automatic FC/LFE swap built-in
3900          * when in pairwise mapping mode.
3901          */
3902
3903         switch (pos) {
3904                 /* see channel_allocations[].speakers[] */
3905                 case 2: return 3;
3906                 case 3: return 2;
3907                 default: break;
3908         }
3909
3910         return pos;
3911 }
3912
3913 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3914                         int ca, int chs, unsigned char *map)
3915 {
3916         struct hdac_cea_channel_speaker_allocation *cap;
3917         int i, j;
3918
3919         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3920
3921         cap = snd_hdac_get_ch_alloc_from_ca(ca);
3922         for (i = 0; i < chs; ++i) {
3923                 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3924                 bool ok = false;
3925                 bool companion_ok = false;
3926
3927                 if (!mask)
3928                         continue;
3929
3930                 for (j = 0 + i % 2; j < 8; j += 2) {
3931                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3932                         if (cap->speakers[chan_idx] == mask) {
3933                                 /* channel is in a supported position */
3934                                 ok = true;
3935
3936                                 if (i % 2 == 0 && i + 1 < chs) {
3937                                         /* even channel, check the odd companion */
3938                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3939                                         int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3940                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3941
3942                                         if (comp_mask_req == comp_mask_act)
3943                                                 companion_ok = true;
3944                                         else
3945                                                 return -EINVAL;
3946                                 }
3947                                 break;
3948                         }
3949                 }
3950
3951                 if (!ok)
3952                         return -EINVAL;
3953
3954                 if (companion_ok)
3955                         i++; /* companion channel already checked */
3956         }
3957
3958         return 0;
3959 }
3960
3961 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3962                 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3963 {
3964         struct hda_codec *codec = hdac_to_hda_codec(hdac);
3965         int verb;
3966         int ati_channel_setup = 0;
3967
3968         if (hdmi_slot > 7)
3969                 return -EINVAL;
3970
3971         if (!has_amd_full_remap_support(codec)) {
3972                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3973
3974                 /* In case this is an odd slot but without stream channel, do not
3975                  * disable the slot since the corresponding even slot could have a
3976                  * channel. In case neither have a channel, the slot pair will be
3977                  * disabled when this function is called for the even slot. */
3978                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3979                         return 0;
3980
3981                 hdmi_slot -= hdmi_slot % 2;
3982
3983                 if (stream_channel != 0xf)
3984                         stream_channel -= stream_channel % 2;
3985         }
3986
3987         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3988
3989         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3990
3991         if (stream_channel != 0xf)
3992                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3993
3994         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3995 }
3996
3997 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
3998                                 hda_nid_t pin_nid, int asp_slot)
3999 {
4000         struct hda_codec *codec = hdac_to_hda_codec(hdac);
4001         bool was_odd = false;
4002         int ati_asp_slot = asp_slot;
4003         int verb;
4004         int ati_channel_setup;
4005
4006         if (asp_slot > 7)
4007                 return -EINVAL;
4008
4009         if (!has_amd_full_remap_support(codec)) {
4010                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
4011                 if (ati_asp_slot % 2 != 0) {
4012                         ati_asp_slot -= 1;
4013                         was_odd = true;
4014                 }
4015         }
4016
4017         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
4018
4019         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
4020
4021         if (!(ati_channel_setup & ATI_OUT_ENABLE))
4022                 return 0xf;
4023
4024         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
4025 }
4026
4027 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
4028                 struct hdac_chmap *chmap,
4029                 struct hdac_cea_channel_speaker_allocation *cap,
4030                 int channels)
4031 {
4032         int c;
4033
4034         /*
4035          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
4036          * we need to take that into account (a single channel may take 2
4037          * channel slots if we need to carry a silent channel next to it).
4038          * On Rev3+ AMD codecs this function is not used.
4039          */
4040         int chanpairs = 0;
4041
4042         /* We only produce even-numbered channel count TLVs */
4043         if ((channels % 2) != 0)
4044                 return -1;
4045
4046         for (c = 0; c < 7; c += 2) {
4047                 if (cap->speakers[c] || cap->speakers[c+1])
4048                         chanpairs++;
4049         }
4050
4051         if (chanpairs * 2 != channels)
4052                 return -1;
4053
4054         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
4055 }
4056
4057 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
4058                 struct hdac_cea_channel_speaker_allocation *cap,
4059                 unsigned int *chmap, int channels)
4060 {
4061         /* produce paired maps for pre-rev3 ATI/AMD codecs */
4062         int count = 0;
4063         int c;
4064
4065         for (c = 7; c >= 0; c--) {
4066                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
4067                 int spk = cap->speakers[chan];
4068                 if (!spk) {
4069                         /* add N/A channel if the companion channel is occupied */
4070                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
4071                                 chmap[count++] = SNDRV_CHMAP_NA;
4072
4073                         continue;
4074                 }
4075
4076                 chmap[count++] = snd_hdac_spk_to_chmap(spk);
4077         }
4078
4079         WARN_ON(count != channels);
4080 }
4081
4082 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
4083                                  int dev_id, bool hbr)
4084 {
4085         int hbr_ctl, hbr_ctl_new;
4086
4087         WARN_ON(dev_id != 0);
4088
4089         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
4090         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
4091                 if (hbr)
4092                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
4093                 else
4094                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
4095
4096                 codec_dbg(codec,
4097                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
4098                                 pin_nid,
4099                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
4100                                 hbr_ctl_new);
4101
4102                 if (hbr_ctl != hbr_ctl_new)
4103                         snd_hda_codec_write(codec, pin_nid, 0,
4104                                                 ATI_VERB_SET_HBR_CONTROL,
4105                                                 hbr_ctl_new);
4106
4107         } else if (hbr)
4108                 return -EINVAL;
4109
4110         return 0;
4111 }
4112
4113 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
4114                                 hda_nid_t pin_nid, int dev_id,
4115                                 u32 stream_tag, int format)
4116 {
4117         if (is_amdhdmi_rev3_or_later(codec)) {
4118                 int ramp_rate = 180; /* default as per AMD spec */
4119                 /* disable ramp-up/down for non-pcm as per AMD spec */
4120                 if (format & AC_FMT_TYPE_NON_PCM)
4121                         ramp_rate = 0;
4122
4123                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
4124         }
4125
4126         return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
4127                                  stream_tag, format);
4128 }
4129
4130
4131 static int atihdmi_init(struct hda_codec *codec)
4132 {
4133         struct hdmi_spec *spec = codec->spec;
4134         int pin_idx, err;
4135
4136         err = generic_hdmi_init(codec);
4137
4138         if (err)
4139                 return err;
4140
4141         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
4142                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
4143
4144                 /* make sure downmix information in infoframe is zero */
4145                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
4146
4147                 /* enable channel-wise remap mode if supported */
4148                 if (has_amd_full_remap_support(codec))
4149                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
4150                                             ATI_VERB_SET_MULTICHANNEL_MODE,
4151                                             ATI_MULTICHANNEL_MODE_SINGLE);
4152         }
4153         codec->auto_runtime_pm = 1;
4154
4155         return 0;
4156 }
4157
4158 /* map from pin NID to port; port is 0-based */
4159 /* for AMD: assume widget NID starting from 3, with step 2 (3, 5, 7, ...) */
4160 static int atihdmi_pin2port(void *audio_ptr, int pin_nid)
4161 {
4162         return pin_nid / 2 - 1;
4163 }
4164
4165 /* reverse-map from port to pin NID: see above */
4166 static int atihdmi_port2pin(struct hda_codec *codec, int port)
4167 {
4168         return port * 2 + 3;
4169 }
4170
4171 static const struct drm_audio_component_audio_ops atihdmi_audio_ops = {
4172         .pin2port = atihdmi_pin2port,
4173         .pin_eld_notify = generic_acomp_pin_eld_notify,
4174         .master_bind = generic_acomp_master_bind,
4175         .master_unbind = generic_acomp_master_unbind,
4176 };
4177
4178 static int patch_atihdmi(struct hda_codec *codec)
4179 {
4180         struct hdmi_spec *spec;
4181         struct hdmi_spec_per_cvt *per_cvt;
4182         int err, cvt_idx;
4183
4184         err = patch_generic_hdmi(codec);
4185
4186         if (err)
4187                 return err;
4188
4189         codec->patch_ops.init = atihdmi_init;
4190
4191         spec = codec->spec;
4192
4193         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
4194         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
4195         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
4196         spec->ops.setup_stream = atihdmi_setup_stream;
4197
4198         spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
4199         spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
4200
4201         if (!has_amd_full_remap_support(codec)) {
4202                 /* override to ATI/AMD-specific versions with pairwise mapping */
4203                 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
4204                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
4205                 spec->chmap.ops.cea_alloc_to_tlv_chmap =
4206                                 atihdmi_paired_cea_alloc_to_tlv_chmap;
4207                 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
4208         }
4209
4210         /* ATI/AMD converters do not advertise all of their capabilities */
4211         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
4212                 per_cvt = get_cvt(spec, cvt_idx);
4213                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
4214                 per_cvt->rates |= SUPPORTED_RATES;
4215                 per_cvt->formats |= SUPPORTED_FORMATS;
4216                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
4217         }
4218
4219         spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
4220
4221         /* AMD GPUs have neither EPSS nor CLKSTOP bits, hence preventing
4222          * the link-down as is.  Tell the core to allow it.
4223          */
4224         codec->link_down_at_suspend = 1;
4225
4226         generic_acomp_init(codec, &atihdmi_audio_ops, atihdmi_port2pin);
4227
4228         return 0;
4229 }
4230
4231 /* VIA HDMI Implementation */
4232 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
4233 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
4234
4235 static int patch_via_hdmi(struct hda_codec *codec)
4236 {
4237         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
4238 }
4239
4240 /*
4241  * patch entries
4242  */
4243 static const struct hda_device_id snd_hda_id_hdmi[] = {
4244 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
4245 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
4246 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
4247 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
4248 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
4249 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
4250 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
4251 HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4252 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4253 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4254 HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI",      patch_nvhdmi_8ch_7x),
4255 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4256 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4257 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
4258 HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP",   patch_nvhdmi_legacy),
4259 HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP",   patch_nvhdmi_legacy),
4260 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi_legacy),
4261 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi_legacy),
4262 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi_legacy),
4263 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi_legacy),
4264 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi_legacy),
4265 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi_legacy),
4266 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi_legacy),
4267 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi_legacy),
4268 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi_legacy),
4269 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi_legacy),
4270 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi_legacy),
4271 /* 17 is known to be absent */
4272 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi_legacy),
4273 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi_legacy),
4274 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi_legacy),
4275 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi_legacy),
4276 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi_legacy),
4277 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
4278 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
4279 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
4280 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
4281 HDA_CODEC_ENTRY(0x10de002d, "Tegra186 HDMI/DP0", patch_tegra_hdmi),
4282 HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi),
4283 HDA_CODEC_ENTRY(0x10de002f, "Tegra194 HDMI/DP2", patch_tegra_hdmi),
4284 HDA_CODEC_ENTRY(0x10de0030, "Tegra194 HDMI/DP3", patch_tegra_hdmi),
4285 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
4286 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
4287 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
4288 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
4289 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
4290 HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP",   patch_nvhdmi),
4291 HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP",   patch_nvhdmi),
4292 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
4293 HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP",   patch_nvhdmi),
4294 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
4295 HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP",   patch_nvhdmi),
4296 HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP",   patch_nvhdmi),
4297 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
4298 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
4299 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
4300 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
4301 HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP",   patch_nvhdmi),
4302 HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP",   patch_nvhdmi),
4303 HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP",   patch_nvhdmi),
4304 HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP",   patch_nvhdmi),
4305 HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP",   patch_nvhdmi),
4306 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
4307 HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP",   patch_nvhdmi),
4308 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP",   patch_nvhdmi),
4309 HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP",   patch_nvhdmi),
4310 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP",   patch_nvhdmi),
4311 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
4312 HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP",   patch_nvhdmi),
4313 HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP",   patch_nvhdmi),
4314 HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP",   patch_nvhdmi),
4315 HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP",   patch_nvhdmi),
4316 HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP",   patch_nvhdmi),
4317 HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP",   patch_nvhdmi),
4318 HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP",   patch_nvhdmi),
4319 HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP",   patch_nvhdmi),
4320 HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP",   patch_nvhdmi),
4321 HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP",   patch_nvhdmi),
4322 HDA_CODEC_ENTRY(0x10de009a, "GPU 9a HDMI/DP",   patch_nvhdmi),
4323 HDA_CODEC_ENTRY(0x10de009d, "GPU 9d HDMI/DP",   patch_nvhdmi),
4324 HDA_CODEC_ENTRY(0x10de009e, "GPU 9e HDMI/DP",   patch_nvhdmi),
4325 HDA_CODEC_ENTRY(0x10de009f, "GPU 9f HDMI/DP",   patch_nvhdmi),
4326 HDA_CODEC_ENTRY(0x10de00a0, "GPU a0 HDMI/DP",   patch_nvhdmi),
4327 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4328 HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI",    patch_nvhdmi_2ch),
4329 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
4330 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
4331 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
4332 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
4333 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4334 HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI",  patch_i915_glk_hdmi),
4335 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
4336 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
4337 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
4338 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4339 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
4340 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
4341 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_i915_hsw_hdmi),
4342 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_i915_hsw_hdmi),
4343 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_i915_hsw_hdmi),
4344 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_i915_hsw_hdmi),
4345 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_i915_hsw_hdmi),
4346 HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI",  patch_i915_glk_hdmi),
4347 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI",  patch_i915_glk_hdmi),
4348 HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI",     patch_i915_icl_hdmi),
4349 HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI",   patch_i915_tgl_hdmi),
4350 HDA_CODEC_ENTRY(0x80862814, "DG1 HDMI", patch_i915_tgl_hdmi),
4351 HDA_CODEC_ENTRY(0x80862815, "Alderlake HDMI",   patch_i915_tgl_hdmi),
4352 HDA_CODEC_ENTRY(0x80862816, "Rocketlake HDMI",  patch_i915_tgl_hdmi),
4353 HDA_CODEC_ENTRY(0x8086281a, "Jasperlake HDMI",  patch_i915_icl_hdmi),
4354 HDA_CODEC_ENTRY(0x8086281b, "Elkhartlake HDMI", patch_i915_icl_hdmi),
4355 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
4356 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
4357 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_i915_byt_hdmi),
4358 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
4359 /* special ID for generic HDMI */
4360 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
4361 {} /* terminator */
4362 };
4363 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
4364
4365 MODULE_LICENSE("GPL");
4366 MODULE_DESCRIPTION("HDMI HD-audio codec");
4367 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4368 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4369 MODULE_ALIAS("snd-hda-codec-atihdmi");
4370
4371 static struct hda_codec_driver hdmi_driver = {
4372         .id = snd_hda_id_hdmi,
4373 };
4374
4375 module_hda_codec_driver(hdmi_driver);