sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  10  *
  11  *  Authors:
  12  *                      Wu Fengguang <wfg@linux.intel.com>
  13  *
  14  *  Maintained by:
  15  *                      Wu Fengguang <wfg@linux.intel.com>
  16  *
  17  *  This program is free software; you can redistribute it and/or modify it
  18  *  under the terms of the GNU General Public License as published by the Free
  19  *  Software Foundation; either version 2 of the License, or (at your option)
  20  *  any later version.
  21  *
  22  *  This program is distributed in the hope that it will be useful, but
  23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  25  *  for more details.
  26  *
  27  *  You should have received a copy of the GNU General Public License
  28  *  along with this program; if not, write to the Free Software Foundation,
  29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  30  */
  31
  32 #include <linux/init.h>
  33 #include <linux/delay.h>
  34 #include <linux/slab.h>
  35 #include <linux/module.h>
  36 #include <sound/core.h>
  37 #include <sound/jack.h>
  38 #include <sound/asoundef.h>
  39 #include <sound/tlv.h>
  40 #include <sound/hdaudio.h>
  41 #include <sound/hda_i915.h>
  42 #include "hda_codec.h"
  43 #include "hda_local.h"
  44 #include "hda_jack.h"
  45
  46 static bool static_hdmi_pcm;
  47 module_param(static_hdmi_pcm, bool, 0644);
  48 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  49
  50 #define is_haswell(codec)  ((codec)->core.vendor_id == 0x80862807)
  51 #define is_broadwell(codec)    ((codec)->core.vendor_id == 0x80862808)
  52 #define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
  53 #define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
  54 #define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
  55 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
  56                                 || is_skylake(codec) || is_broxton(codec) \
  57                                 || is_kabylake(codec))
  58
  59 #define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
  60 #define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
  61 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
  62
  63 struct hdmi_spec_per_cvt {
  64         hda_nid_t cvt_nid;
  65         int assigned;
  66         unsigned int channels_min;
  67         unsigned int channels_max;
  68         u32 rates;
  69         u64 formats;
  70         unsigned int maxbps;
  71 };
  72
  73 /* max. connections to a widget */
  74 #define HDA_MAX_CONNECTIONS     32
  75
  76 struct hdmi_spec_per_pin {
  77         hda_nid_t pin_nid;
  78         /* pin idx, different device entries on the same pin use the same idx */
  79         int pin_nid_idx;
  80         int num_mux_nids;
  81         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  82         int mux_idx;
  83         hda_nid_t cvt_nid;
  84
  85         struct hda_codec *codec;
  86         struct hdmi_eld sink_eld;
  87         struct mutex lock;
  88         struct delayed_work work;
  89         struct snd_kcontrol *eld_ctl;
  90         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  91         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  92         int repoll_count;
  93         bool setup; /* the stream has been set up by prepare callback */
  94         int channels; /* current number of channels */
  95         bool non_pcm;
  96         bool chmap_set;         /* channel-map override by ALSA API? */
  97         unsigned char chmap[8]; /* ALSA API channel-map */
  98 #ifdef CONFIG_SND_PROC_FS
  99         struct snd_info_entry *proc_entry;
 100 #endif
 101 };
 102
 103 struct cea_channel_speaker_allocation;
 104
 105 /* operations used by generic code that can be overridden by patches */
 106 struct hdmi_ops {
 107         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
 108                            unsigned char *buf, int *eld_size);
 109
 110         /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
 111         int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 112                                     int asp_slot);
 113         int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 114                                     int asp_slot, int channel);
 115
 116         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 117                                     int ca, int active_channels, int conn_type);
 118
 119         /* enable/disable HBR (HD passthrough) */
 120         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 121
 122         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 123                             hda_nid_t pin_nid, u32 stream_tag, int format);
 124
 125         /* Helpers for producing the channel map TLVs. These can be overridden
 126          * for devices that have non-standard mapping requirements. */
 127         int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
 128                                                  int channels);
 129         void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
 130                                        unsigned int *chmap, int channels);
 131
 132         /* check that the user-given chmap is supported */
 133         int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
 134 };
 135
 136 struct hdmi_pcm {
 137         struct hda_pcm *pcm;
 138         struct snd_jack *jack;
 139 };
 140
 141 struct hdmi_spec {
 142         int num_cvts;
 143         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 144         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 145
 146         int num_pins;
 147         struct snd_array pins; /* struct hdmi_spec_per_pin */
 148         struct hdmi_pcm pcm_rec[16];
 149         struct mutex pcm_lock;
 150         /* pcm_bitmap means which pcms have been assigned to pins*/
 151         unsigned long pcm_bitmap;
 152         int pcm_used;   /* counter of pcm_rec[] */
 153         /* bitmap shows whether the pcm is opened in user space
 154          * bit 0 means the first playback PCM (PCM3);
 155          * bit 1 means the second playback PCM, and so on.
 156          */
 157         unsigned long pcm_in_use;
 158         unsigned int channels_max; /* max over all cvts */
 159
 160         struct hdmi_eld temp_eld;
 161         struct hdmi_ops ops;
 162
 163         bool dyn_pin_out;
 164         bool dyn_pcm_assign;
 165         /*
 166          * Non-generic VIA/NVIDIA specific
 167          */
 168         struct hda_multi_out multiout;
 169         struct hda_pcm_stream pcm_playback;
 170
 171         /* i915/powerwell (Haswell+/Valleyview+) specific */
 172         struct i915_audio_component_audio_ops i915_audio_ops;
 173         bool i915_bound; /* was i915 bound in this driver? */
 174 };
 175
 176 #ifdef CONFIG_SND_HDA_I915
 177 #define codec_has_acomp(codec) \
 178         ((codec)->bus->core.audio_component != NULL)
 179 #else
 180 #define codec_has_acomp(codec)  false
 181 #endif
 182
 183 struct hdmi_audio_infoframe {
 184         u8 type; /* 0x84 */
 185         u8 ver;  /* 0x01 */
 186         u8 len;  /* 0x0a */
 187
 188         u8 checksum;
 189
 190         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 191         u8 SS01_SF24;
 192         u8 CXT04;
 193         u8 CA;
 194         u8 LFEPBL01_LSV36_DM_INH7;
 195 };
 196
 197 struct dp_audio_infoframe {
 198         u8 type; /* 0x84 */
 199         u8 len;  /* 0x1b */
 200         u8 ver;  /* 0x11 << 2 */
 201
 202         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 203         u8 SS01_SF24;
 204         u8 CXT04;
 205         u8 CA;
 206         u8 LFEPBL01_LSV36_DM_INH7;
 207 };
 208
 209 union audio_infoframe {
 210         struct hdmi_audio_infoframe hdmi;
 211         struct dp_audio_infoframe dp;
 212         u8 bytes[0];
 213 };
 214
 215 /*
 216  * CEA speaker placement:
 217  *
 218  *        FLH       FCH        FRH
 219  *  FLW    FL  FLC   FC   FRC   FR   FRW
 220  *
 221  *                                  LFE
 222  *                     TC
 223  *
 224  *          RL  RLC   RC   RRC   RR
 225  *
 226  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 227  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 228  */
 229 enum cea_speaker_placement {
 230         FL  = (1 <<  0),        /* Front Left           */
 231         FC  = (1 <<  1),        /* Front Center         */
 232         FR  = (1 <<  2),        /* Front Right          */
 233         FLC = (1 <<  3),        /* Front Left Center    */
 234         FRC = (1 <<  4),        /* Front Right Center   */
 235         RL  = (1 <<  5),        /* Rear Left            */
 236         RC  = (1 <<  6),        /* Rear Center          */
 237         RR  = (1 <<  7),        /* Rear Right           */
 238         RLC = (1 <<  8),        /* Rear Left Center     */
 239         RRC = (1 <<  9),        /* Rear Right Center    */
 240         LFE = (1 << 10),        /* Low Frequency Effect */
 241         FLW = (1 << 11),        /* Front Left Wide      */
 242         FRW = (1 << 12),        /* Front Right Wide     */
 243         FLH = (1 << 13),        /* Front Left High      */
 244         FCH = (1 << 14),        /* Front Center High    */
 245         FRH = (1 << 15),        /* Front Right High     */
 246         TC  = (1 << 16),        /* Top Center           */
 247 };
 248
 249 /*
 250  * ELD SA bits in the CEA Speaker Allocation data block
 251  */
 252 static int eld_speaker_allocation_bits[] = {
 253         [0] = FL | FR,
 254         [1] = LFE,
 255         [2] = FC,
 256         [3] = RL | RR,
 257         [4] = RC,
 258         [5] = FLC | FRC,
 259         [6] = RLC | RRC,
 260         /* the following are not defined in ELD yet */
 261         [7] = FLW | FRW,
 262         [8] = FLH | FRH,
 263         [9] = TC,
 264         [10] = FCH,
 265 };
 266
 267 struct cea_channel_speaker_allocation {
 268         int ca_index;
 269         int speakers[8];
 270
 271         /* derived values, just for convenience */
 272         int channels;
 273         int spk_mask;
 274 };
 275
 276 /*
 277  * ALSA sequence is:
 278  *
 279  *       surround40   surround41   surround50   surround51   surround71
 280  * ch0   front left   =            =            =            =
 281  * ch1   front right  =            =            =            =
 282  * ch2   rear left    =            =            =            =
 283  * ch3   rear right   =            =            =            =
 284  * ch4                LFE          center       center       center
 285  * ch5                                          LFE          LFE
 286  * ch6                                                       side left
 287  * ch7                                                       side right
 288  *
 289  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 290  */
 291 static int hdmi_channel_mapping[0x32][8] = {
 292         /* stereo */
 293         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 294         /* 2.1 */
 295         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 296         /* Dolby Surround */
 297         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 298         /* surround40 */
 299         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 300         /* 4ch */
 301         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 302         /* surround41 */
 303         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 304         /* surround50 */
 305         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 306         /* surround51 */
 307         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 308         /* 7.1 */
 309         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 310 };
 311
 312 /*
 313  * This is an ordered list!
 314  *
 315  * The preceding ones have better chances to be selected by
 316  * hdmi_channel_allocation().
 317  */
 318 static struct cea_channel_speaker_allocation channel_allocations[] = {
 319 /*                        channel:   7     6    5    4    3     2    1    0  */
 320 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 321                                  /* 2.1 */
 322 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 323                                  /* Dolby Surround */
 324 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 325                                  /* surround40 */
 326 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 327                                  /* surround41 */
 328 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 329                                  /* surround50 */
 330 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 331                                  /* surround51 */
 332 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 333                                  /* 6.1 */
 334 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 335                                  /* surround71 */
 336 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 337
 338 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 339 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 340 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 341 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 342 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 343 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 344 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 345 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 346 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 347 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 348 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 349 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 350 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 351 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 352 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 353 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 354 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 355 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 356 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 357 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 358 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 359 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 360 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 361 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 362 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 363 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 364 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 365 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 366 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 367 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 368 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 369 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 370 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 371 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 372 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 373 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 374 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 375 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 376 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 377 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 378 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 379 };
 380
 381
 382 /*
 383  * HDMI routines
 384  */
 385
 386 #define get_pin(spec, idx) \
 387         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 388 #define get_cvt(spec, idx) \
 389         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 390 /* obtain hdmi_pcm object assigned to idx */
 391 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 392 /* obtain hda_pcm object assigned to idx */
 393 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 394
 395 static int pin_nid_to_pin_index(struct hda_codec *codec, hda_nid_t pin_nid)
 396 {
 397         struct hdmi_spec *spec = codec->spec;
 398         int pin_idx;
 399
 400         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 401                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
 402                         return pin_idx;
 403
 404         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 405         return -EINVAL;
 406 }
 407
 408 static int hinfo_to_pcm_index(struct hda_codec *codec,
 409                         struct hda_pcm_stream *hinfo)
 410 {
 411         struct hdmi_spec *spec = codec->spec;
 412         int pcm_idx;
 413
 414         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 415                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 416                         return pcm_idx;
 417
 418         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 419         return -EINVAL;
 420 }
 421
 422 static int hinfo_to_pin_index(struct hda_codec *codec,
 423                               struct hda_pcm_stream *hinfo)
 424 {
 425         struct hdmi_spec *spec = codec->spec;
 426         struct hdmi_spec_per_pin *per_pin;
 427         int pin_idx;
 428
 429         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 430                 per_pin = get_pin(spec, pin_idx);
 431                 if (per_pin->pcm &&
 432                         per_pin->pcm->pcm->stream == hinfo)
 433                         return pin_idx;
 434         }
 435
 436         codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
 437         return -EINVAL;
 438 }
 439
 440 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 441 {
 442         struct hdmi_spec *spec = codec->spec;
 443         int cvt_idx;
 444
 445         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 446                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 447                         return cvt_idx;
 448
 449         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 450         return -EINVAL;
 451 }
 452
 453 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 454                         struct snd_ctl_elem_info *uinfo)
 455 {
 456         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 457         struct hdmi_spec *spec = codec->spec;
 458         struct hdmi_spec_per_pin *per_pin;
 459         struct hdmi_eld *eld;
 460         int pin_idx;
 461
 462         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 463
 464         pin_idx = kcontrol->private_value;
 465         per_pin = get_pin(spec, pin_idx);
 466         eld = &per_pin->sink_eld;
 467
 468         mutex_lock(&per_pin->lock);
 469         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 470         mutex_unlock(&per_pin->lock);
 471
 472         return 0;
 473 }
 474
 475 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 476                         struct snd_ctl_elem_value *ucontrol)
 477 {
 478         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 479         struct hdmi_spec *spec = codec->spec;
 480         struct hdmi_spec_per_pin *per_pin;
 481         struct hdmi_eld *eld;
 482         int pin_idx;
 483
 484         pin_idx = kcontrol->private_value;
 485         per_pin = get_pin(spec, pin_idx);
 486         eld = &per_pin->sink_eld;
 487
 488         mutex_lock(&per_pin->lock);
 489         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
 490                 mutex_unlock(&per_pin->lock);
 491                 snd_BUG();
 492                 return -EINVAL;
 493         }
 494
 495         memset(ucontrol->value.bytes.data, 0,
 496                ARRAY_SIZE(ucontrol->value.bytes.data));
 497         if (eld->eld_valid)
 498                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 499                        eld->eld_size);
 500         mutex_unlock(&per_pin->lock);
 501
 502         return 0;
 503 }
 504
 505 static struct snd_kcontrol_new eld_bytes_ctl = {
 506         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 507         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 508         .name = "ELD",
 509         .info = hdmi_eld_ctl_info,
 510         .get = hdmi_eld_ctl_get,
 511 };
 512
 513 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
 514                         int device)
 515 {
 516         struct snd_kcontrol *kctl;
 517         struct hdmi_spec *spec = codec->spec;
 518         int err;
 519
 520         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 521         if (!kctl)
 522                 return -ENOMEM;
 523         kctl->private_value = pin_idx;
 524         kctl->id.device = device;
 525
 526         err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
 527         if (err < 0)
 528                 return err;
 529
 530         get_pin(spec, pin_idx)->eld_ctl = kctl;
 531         return 0;
 532 }
 533
 534 #ifdef BE_PARANOID
 535 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 536                                 int *packet_index, int *byte_index)
 537 {
 538         int val;
 539
 540         val = snd_hda_codec_read(codec, pin_nid, 0,
 541                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 542
 543         *packet_index = val >> 5;
 544         *byte_index = val & 0x1f;
 545 }
 546 #endif
 547
 548 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 549                                 int packet_index, int byte_index)
 550 {
 551         int val;
 552
 553         val = (packet_index << 5) | (byte_index & 0x1f);
 554
 555         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 556 }
 557
 558 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 559                                 unsigned char val)
 560 {
 561         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 562 }
 563
 564 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 565 {
 566         struct hdmi_spec *spec = codec->spec;
 567         int pin_out;
 568
 569         /* Unmute */
 570         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 571                 snd_hda_codec_write(codec, pin_nid, 0,
 572                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 573
 574         if (spec->dyn_pin_out)
 575                 /* Disable pin out until stream is active */
 576                 pin_out = 0;
 577         else
 578                 /* Enable pin out: some machines with GM965 gets broken output
 579                  * when the pin is disabled or changed while using with HDMI
 580                  */
 581                 pin_out = PIN_OUT;
 582
 583         snd_hda_codec_write(codec, pin_nid, 0,
 584                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 585 }
 586
 587 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
 588 {
 589         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
 590                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 591 }
 592
 593 static void hdmi_set_channel_count(struct hda_codec *codec,
 594                                    hda_nid_t cvt_nid, int chs)
 595 {
 596         if (chs != hdmi_get_channel_count(codec, cvt_nid))
 597                 snd_hda_codec_write(codec, cvt_nid, 0,
 598                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 599 }
 600
 601 /*
 602  * ELD proc files
 603  */
 604
 605 #ifdef CONFIG_SND_PROC_FS
 606 static void print_eld_info(struct snd_info_entry *entry,
 607                            struct snd_info_buffer *buffer)
 608 {
 609         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 610
 611         mutex_lock(&per_pin->lock);
 612         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 613         mutex_unlock(&per_pin->lock);
 614 }
 615
 616 static void write_eld_info(struct snd_info_entry *entry,
 617                            struct snd_info_buffer *buffer)
 618 {
 619         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 620
 621         mutex_lock(&per_pin->lock);
 622         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 623         mutex_unlock(&per_pin->lock);
 624 }
 625
 626 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 627 {
 628         char name[32];
 629         struct hda_codec *codec = per_pin->codec;
 630         struct snd_info_entry *entry;
 631         int err;
 632
 633         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 634         err = snd_card_proc_new(codec->card, name, &entry);
 635         if (err < 0)
 636                 return err;
 637
 638         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 639         entry->c.text.write = write_eld_info;
 640         entry->mode |= S_IWUSR;
 641         per_pin->proc_entry = entry;
 642
 643         return 0;
 644 }
 645
 646 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 647 {
 648         if (!per_pin->codec->bus->shutdown) {
 649                 snd_info_free_entry(per_pin->proc_entry);
 650                 per_pin->proc_entry = NULL;
 651         }
 652 }
 653 #else
 654 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 655                                int index)
 656 {
 657         return 0;
 658 }
 659 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 660 {
 661 }
 662 #endif
 663
 664 /*
 665  * Channel mapping routines
 666  */
 667
 668 /*
 669  * Compute derived values in channel_allocations[].
 670  */
 671 static void init_channel_allocations(void)
 672 {
 673         int i, j;
 674         struct cea_channel_speaker_allocation *p;
 675
 676         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 677                 p = channel_allocations + i;
 678                 p->channels = 0;
 679                 p->spk_mask = 0;
 680                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 681                         if (p->speakers[j]) {
 682                                 p->channels++;
 683                                 p->spk_mask |= p->speakers[j];
 684                         }
 685         }
 686 }
 687
 688 static int get_channel_allocation_order(int ca)
 689 {
 690         int i;
 691
 692         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 693                 if (channel_allocations[i].ca_index == ca)
 694                         break;
 695         }
 696         return i;
 697 }
 698
 699 /*
 700  * The transformation takes two steps:
 701  *
 702  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 703  *            spk_mask => (channel_allocations[])         => ai->CA
 704  *
 705  * TODO: it could select the wrong CA from multiple candidates.
 706 */
 707 static int hdmi_channel_allocation(struct hda_codec *codec,
 708                                    struct hdmi_eld *eld, int channels)
 709 {
 710         int i;
 711         int ca = 0;
 712         int spk_mask = 0;
 713         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 714
 715         /*
 716          * CA defaults to 0 for basic stereo audio
 717          */
 718         if (channels <= 2)
 719                 return 0;
 720
 721         /*
 722          * expand ELD's speaker allocation mask
 723          *
 724          * ELD tells the speaker mask in a compact(paired) form,
 725          * expand ELD's notions to match the ones used by Audio InfoFrame.
 726          */
 727         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 728                 if (eld->info.spk_alloc & (1 << i))
 729                         spk_mask |= eld_speaker_allocation_bits[i];
 730         }
 731
 732         /* search for the first working match in the CA table */
 733         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 734                 if (channels == channel_allocations[i].channels &&
 735                     (spk_mask & channel_allocations[i].spk_mask) ==
 736                                 channel_allocations[i].spk_mask) {
 737                         ca = channel_allocations[i].ca_index;
 738                         break;
 739                 }
 740         }
 741
 742         if (!ca) {
 743                 /* if there was no match, select the regular ALSA channel
 744                  * allocation with the matching number of channels */
 745                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 746                         if (channels == channel_allocations[i].channels) {
 747                                 ca = channel_allocations[i].ca_index;
 748                                 break;
 749                         }
 750                 }
 751         }
 752
 753         snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
 754         codec_dbg(codec, "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 755                     ca, channels, buf);
 756
 757         return ca;
 758 }
 759
 760 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 761                                        hda_nid_t pin_nid)
 762 {
 763 #ifdef CONFIG_SND_DEBUG_VERBOSE
 764         struct hdmi_spec *spec = codec->spec;
 765         int i;
 766         int channel;
 767
 768         for (i = 0; i < 8; i++) {
 769                 channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
 770                 codec_dbg(codec, "HDMI: ASP channel %d => slot %d\n",
 771                                                 channel, i);
 772         }
 773 #endif
 774 }
 775
 776 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
 777                                        hda_nid_t pin_nid,
 778                                        bool non_pcm,
 779                                        int ca)
 780 {
 781         struct hdmi_spec *spec = codec->spec;
 782         struct cea_channel_speaker_allocation *ch_alloc;
 783         int i;
 784         int err;
 785         int order;
 786         int non_pcm_mapping[8];
 787
 788         order = get_channel_allocation_order(ca);
 789         ch_alloc = &channel_allocations[order];
 790
 791         if (hdmi_channel_mapping[ca][1] == 0) {
 792                 int hdmi_slot = 0;
 793                 /* fill actual channel mappings in ALSA channel (i) order */
 794                 for (i = 0; i < ch_alloc->channels; i++) {
 795                         while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
 796                                 hdmi_slot++; /* skip zero slots */
 797
 798                         hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
 799                 }
 800                 /* fill the rest of the slots with ALSA channel 0xf */
 801                 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
 802                         if (!ch_alloc->speakers[7 - hdmi_slot])
 803                                 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
 804         }
 805
 806         if (non_pcm) {
 807                 for (i = 0; i < ch_alloc->channels; i++)
 808                         non_pcm_mapping[i] = (i << 4) | i;
 809                 for (; i < 8; i++)
 810                         non_pcm_mapping[i] = (0xf << 4) | i;
 811         }
 812
 813         for (i = 0; i < 8; i++) {
 814                 int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
 815                 int hdmi_slot = slotsetup & 0x0f;
 816                 int channel = (slotsetup & 0xf0) >> 4;
 817                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
 818                 if (err) {
 819                         codec_dbg(codec, "HDMI: channel mapping failed\n");
 820                         break;
 821                 }
 822         }
 823 }
 824
 825 struct channel_map_table {
 826         unsigned char map;              /* ALSA API channel map position */
 827         int spk_mask;                   /* speaker position bit mask */
 828 };
 829
 830 static struct channel_map_table map_tables[] = {
 831         { SNDRV_CHMAP_FL,       FL },
 832         { SNDRV_CHMAP_FR,       FR },
 833         { SNDRV_CHMAP_RL,       RL },
 834         { SNDRV_CHMAP_RR,       RR },
 835         { SNDRV_CHMAP_LFE,      LFE },
 836         { SNDRV_CHMAP_FC,       FC },
 837         { SNDRV_CHMAP_RLC,      RLC },
 838         { SNDRV_CHMAP_RRC,      RRC },
 839         { SNDRV_CHMAP_RC,       RC },
 840         { SNDRV_CHMAP_FLC,      FLC },
 841         { SNDRV_CHMAP_FRC,      FRC },
 842         { SNDRV_CHMAP_TFL,      FLH },
 843         { SNDRV_CHMAP_TFR,      FRH },
 844         { SNDRV_CHMAP_FLW,      FLW },
 845         { SNDRV_CHMAP_FRW,      FRW },
 846         { SNDRV_CHMAP_TC,       TC },
 847         { SNDRV_CHMAP_TFC,      FCH },
 848         {} /* terminator */
 849 };
 850
 851 /* from ALSA API channel position to speaker bit mask */
 852 static int to_spk_mask(unsigned char c)
 853 {
 854         struct channel_map_table *t = map_tables;
 855         for (; t->map; t++) {
 856                 if (t->map == c)
 857                         return t->spk_mask;
 858         }
 859         return 0;
 860 }
 861
 862 /* from ALSA API channel position to CEA slot */
 863 static int to_cea_slot(int ordered_ca, unsigned char pos)
 864 {
 865         int mask = to_spk_mask(pos);
 866         int i;
 867
 868         if (mask) {
 869                 for (i = 0; i < 8; i++) {
 870                         if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
 871                                 return i;
 872                 }
 873         }
 874
 875         return -1;
 876 }
 877
 878 /* from speaker bit mask to ALSA API channel position */
 879 static int spk_to_chmap(int spk)
 880 {
 881         struct channel_map_table *t = map_tables;
 882         for (; t->map; t++) {
 883                 if (t->spk_mask == spk)
 884                         return t->map;
 885         }
 886         return 0;
 887 }
 888
 889 /* from CEA slot to ALSA API channel position */
 890 static int from_cea_slot(int ordered_ca, unsigned char slot)
 891 {
 892         int mask = channel_allocations[ordered_ca].speakers[7 - slot];
 893
 894         return spk_to_chmap(mask);
 895 }
 896
 897 /* get the CA index corresponding to the given ALSA API channel map */
 898 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
 899 {
 900         int i, spks = 0, spk_mask = 0;
 901
 902         for (i = 0; i < chs; i++) {
 903                 int mask = to_spk_mask(map[i]);
 904                 if (mask) {
 905                         spk_mask |= mask;
 906                         spks++;
 907                 }
 908         }
 909
 910         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 911                 if ((chs == channel_allocations[i].channels ||
 912                      spks == channel_allocations[i].channels) &&
 913                     (spk_mask & channel_allocations[i].spk_mask) ==
 914                                 channel_allocations[i].spk_mask)
 915                         return channel_allocations[i].ca_index;
 916         }
 917         return -1;
 918 }
 919
 920 /* set up the channel slots for the given ALSA API channel map */
 921 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
 922                                              hda_nid_t pin_nid,
 923                                              int chs, unsigned char *map,
 924                                              int ca)
 925 {
 926         struct hdmi_spec *spec = codec->spec;
 927         int ordered_ca = get_channel_allocation_order(ca);
 928         int alsa_pos, hdmi_slot;
 929         int assignments[8] = {[0 ... 7] = 0xf};
 930
 931         for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
 932
 933                 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
 934
 935                 if (hdmi_slot < 0)
 936                         continue; /* unassigned channel */
 937
 938                 assignments[hdmi_slot] = alsa_pos;
 939         }
 940
 941         for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
 942                 int err;
 943
 944                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
 945                                                      assignments[hdmi_slot]);
 946                 if (err)
 947                         return -EINVAL;
 948         }
 949         return 0;
 950 }
 951
 952 /* store ALSA API channel map from the current default map */
 953 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
 954 {
 955         int i;
 956         int ordered_ca = get_channel_allocation_order(ca);
 957         for (i = 0; i < 8; i++) {
 958                 if (i < channel_allocations[ordered_ca].channels)
 959                         map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
 960                 else
 961                         map[i] = 0;
 962         }
 963 }
 964
 965 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 966                                        hda_nid_t pin_nid, bool non_pcm, int ca,
 967                                        int channels, unsigned char *map,
 968                                        bool chmap_set)
 969 {
 970         if (!non_pcm && chmap_set) {
 971                 hdmi_manual_setup_channel_mapping(codec, pin_nid,
 972                                                   channels, map, ca);
 973         } else {
 974                 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
 975                 hdmi_setup_fake_chmap(map, ca);
 976         }
 977
 978         hdmi_debug_channel_mapping(codec, pin_nid);
 979 }
 980
 981 static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 982                                      int asp_slot, int channel)
 983 {
 984         return snd_hda_codec_write(codec, pin_nid, 0,
 985                                    AC_VERB_SET_HDMI_CHAN_SLOT,
 986                                    (channel << 4) | asp_slot);
 987 }
 988
 989 static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 990                                      int asp_slot)
 991 {
 992         return (snd_hda_codec_read(codec, pin_nid, 0,
 993                                    AC_VERB_GET_HDMI_CHAN_SLOT,
 994                                    asp_slot) & 0xf0) >> 4;
 995 }
 996
 997 /*
 998  * Audio InfoFrame routines
 999  */
1000
1001 /*
1002  * Enable Audio InfoFrame Transmission
1003  */
1004 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
1005                                        hda_nid_t pin_nid)
1006 {
1007         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1008         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
1009                                                 AC_DIPXMIT_BEST);
1010 }
1011
1012 /*
1013  * Disable Audio InfoFrame Transmission
1014  */
1015 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
1016                                       hda_nid_t pin_nid)
1017 {
1018         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1019         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
1020                                                 AC_DIPXMIT_DISABLE);
1021 }
1022
1023 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
1024 {
1025 #ifdef CONFIG_SND_DEBUG_VERBOSE
1026         int i;
1027         int size;
1028
1029         size = snd_hdmi_get_eld_size(codec, pin_nid);
1030         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
1031
1032         for (i = 0; i < 8; i++) {
1033                 size = snd_hda_codec_read(codec, pin_nid, 0,
1034                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
1035                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
1036         }
1037 #endif
1038 }
1039
1040 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
1041 {
1042 #ifdef BE_PARANOID
1043         int i, j;
1044         int size;
1045         int pi, bi;
1046         for (i = 0; i < 8; i++) {
1047                 size = snd_hda_codec_read(codec, pin_nid, 0,
1048                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
1049                 if (size == 0)
1050                         continue;
1051
1052                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
1053                 for (j = 1; j < 1000; j++) {
1054                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
1055                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
1056                         if (pi != i)
1057                                 codec_dbg(codec, "dip index %d: %d != %d\n",
1058                                                 bi, pi, i);
1059                         if (bi == 0) /* byte index wrapped around */
1060                                 break;
1061                 }
1062                 codec_dbg(codec,
1063                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
1064                         i, size, j);
1065         }
1066 #endif
1067 }
1068
1069 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
1070 {
1071         u8 *bytes = (u8 *)hdmi_ai;
1072         u8 sum = 0;
1073         int i;
1074
1075         hdmi_ai->checksum = 0;
1076
1077         for (i = 0; i < sizeof(*hdmi_ai); i++)
1078                 sum += bytes[i];
1079
1080         hdmi_ai->checksum = -sum;
1081 }
1082
1083 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
1084                                       hda_nid_t pin_nid,
1085                                       u8 *dip, int size)
1086 {
1087         int i;
1088
1089         hdmi_debug_dip_size(codec, pin_nid);
1090         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
1091
1092         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1093         for (i = 0; i < size; i++)
1094                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
1095 }
1096
1097 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
1098                                     u8 *dip, int size)
1099 {
1100         u8 val;
1101         int i;
1102
1103         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
1104                                                             != AC_DIPXMIT_BEST)
1105                 return false;
1106
1107         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1108         for (i = 0; i < size; i++) {
1109                 val = snd_hda_codec_read(codec, pin_nid, 0,
1110                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
1111                 if (val != dip[i])
1112                         return false;
1113         }
1114
1115         return true;
1116 }
1117
1118 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
1119                                      hda_nid_t pin_nid,
1120                                      int ca, int active_channels,
1121                                      int conn_type)
1122 {
1123         union audio_infoframe ai;
1124
1125         memset(&ai, 0, sizeof(ai));
1126         if (conn_type == 0) { /* HDMI */
1127                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1128
1129                 hdmi_ai->type           = 0x84;
1130                 hdmi_ai->ver            = 0x01;
1131                 hdmi_ai->len            = 0x0a;
1132                 hdmi_ai->CC02_CT47      = active_channels - 1;
1133                 hdmi_ai->CA             = ca;
1134                 hdmi_checksum_audio_infoframe(hdmi_ai);
1135         } else if (conn_type == 1) { /* DisplayPort */
1136                 struct dp_audio_infoframe *dp_ai = &ai.dp;
1137
1138                 dp_ai->type             = 0x84;
1139                 dp_ai->len              = 0x1b;
1140                 dp_ai->ver              = 0x11 << 2;
1141                 dp_ai->CC02_CT47        = active_channels - 1;
1142                 dp_ai->CA               = ca;
1143         } else {
1144                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
1145                             pin_nid);
1146                 return;
1147         }
1148
1149         /*
1150          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1151          * sizeof(*dp_ai) to avoid partial match/update problems when
1152          * the user switches between HDMI/DP monitors.
1153          */
1154         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1155                                         sizeof(ai))) {
1156                 codec_dbg(codec,
1157                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
1158                             pin_nid,
1159                             active_channels, ca);
1160                 hdmi_stop_infoframe_trans(codec, pin_nid);
1161                 hdmi_fill_audio_infoframe(codec, pin_nid,
1162                                             ai.bytes, sizeof(ai));
1163                 hdmi_start_infoframe_trans(codec, pin_nid);
1164         }
1165 }
1166
1167 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1168                                        struct hdmi_spec_per_pin *per_pin,
1169                                        bool non_pcm)
1170 {
1171         struct hdmi_spec *spec = codec->spec;
1172         hda_nid_t pin_nid = per_pin->pin_nid;
1173         int channels = per_pin->channels;
1174         int active_channels;
1175         struct hdmi_eld *eld;
1176         int ca, ordered_ca;
1177
1178         if (!channels)
1179                 return;
1180
1181         if (is_haswell_plus(codec))
1182                 snd_hda_codec_write(codec, pin_nid, 0,
1183                                             AC_VERB_SET_AMP_GAIN_MUTE,
1184                                             AMP_OUT_UNMUTE);
1185
1186         eld = &per_pin->sink_eld;
1187
1188         if (!non_pcm && per_pin->chmap_set)
1189                 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1190         else
1191                 ca = hdmi_channel_allocation(codec, eld, channels);
1192         if (ca < 0)
1193                 ca = 0;
1194
1195         ordered_ca = get_channel_allocation_order(ca);
1196         active_channels = channel_allocations[ordered_ca].channels;
1197
1198         hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1199
1200         /*
1201          * always configure channel mapping, it may have been changed by the
1202          * user in the meantime
1203          */
1204         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1205                                    channels, per_pin->chmap,
1206                                    per_pin->chmap_set);
1207
1208         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
1209                                       eld->info.conn_type);
1210
1211         per_pin->non_pcm = non_pcm;
1212 }
1213
1214 /*
1215  * Unsolicited events
1216  */
1217
1218 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1219
1220 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid)
1221 {
1222         struct hdmi_spec *spec = codec->spec;
1223         int pin_idx = pin_nid_to_pin_index(codec, nid);
1224
1225         if (pin_idx < 0)
1226                 return;
1227         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
1228                 snd_hda_jack_report_sync(codec);
1229 }
1230
1231 static void jack_callback(struct hda_codec *codec,
1232                           struct hda_jack_callback *jack)
1233 {
1234         check_presence_and_report(codec, jack->tbl->nid);
1235 }
1236
1237 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1238 {
1239         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1240         struct hda_jack_tbl *jack;
1241         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1242
1243         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1244         if (!jack)
1245                 return;
1246         jack->jack_dirty = 1;
1247
1248         codec_dbg(codec,
1249                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1250                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1251                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1252
1253         check_presence_and_report(codec, jack->nid);
1254 }
1255
1256 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1257 {
1258         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1259         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1260         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1261         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1262
1263         codec_info(codec,
1264                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1265                 codec->addr,
1266                 tag,
1267                 subtag,
1268                 cp_state,
1269                 cp_ready);
1270
1271         /* TODO */
1272         if (cp_state)
1273                 ;
1274         if (cp_ready)
1275                 ;
1276 }
1277
1278
1279 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1280 {
1281         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1282         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1283
1284         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1285                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
1286                 return;
1287         }
1288
1289         if (subtag == 0)
1290                 hdmi_intrinsic_event(codec, res);
1291         else
1292                 hdmi_non_intrinsic_event(codec, res);
1293 }
1294
1295 static void haswell_verify_D0(struct hda_codec *codec,
1296                 hda_nid_t cvt_nid, hda_nid_t nid)
1297 {
1298         int pwr;
1299
1300         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1301          * thus pins could only choose converter 0 for use. Make sure the
1302          * converters are in correct power state */
1303         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1304                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1305
1306         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1307                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1308                                     AC_PWRST_D0);
1309                 msleep(40);
1310                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1311                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1312                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1313         }
1314 }
1315
1316 /*
1317  * Callbacks
1318  */
1319
1320 /* HBR should be Non-PCM, 8 channels */
1321 #define is_hbr_format(format) \
1322         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1323
1324 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
1325                               bool hbr)
1326 {
1327         int pinctl, new_pinctl;
1328
1329         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1330                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1331                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1332
1333                 if (pinctl < 0)
1334                         return hbr ? -EINVAL : 0;
1335
1336                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1337                 if (hbr)
1338                         new_pinctl |= AC_PINCTL_EPT_HBR;
1339                 else
1340                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
1341
1342                 codec_dbg(codec,
1343                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
1344                             pin_nid,
1345                             pinctl == new_pinctl ? "" : "new-",
1346                             new_pinctl);
1347
1348                 if (pinctl != new_pinctl)
1349                         snd_hda_codec_write(codec, pin_nid, 0,
1350                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1351                                             new_pinctl);
1352         } else if (hbr)
1353                 return -EINVAL;
1354
1355         return 0;
1356 }
1357
1358 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1359                               hda_nid_t pin_nid, u32 stream_tag, int format)
1360 {
1361         struct hdmi_spec *spec = codec->spec;
1362         int err;
1363
1364         if (is_haswell_plus(codec))
1365                 haswell_verify_D0(codec, cvt_nid, pin_nid);
1366
1367         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
1368
1369         if (err) {
1370                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
1371                 return err;
1372         }
1373
1374         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1375         return 0;
1376 }
1377
1378 /* Try to find an available converter
1379  * If pin_idx is less then zero, just try to find an available converter.
1380  * Otherwise, try to find an available converter and get the cvt mux index
1381  * of the pin.
1382  */
1383 static int hdmi_choose_cvt(struct hda_codec *codec,
1384                         int pin_idx, int *cvt_id, int *mux_id)
1385 {
1386         struct hdmi_spec *spec = codec->spec;
1387         struct hdmi_spec_per_pin *per_pin;
1388         struct hdmi_spec_per_cvt *per_cvt = NULL;
1389         int cvt_idx, mux_idx = 0;
1390
1391         /* pin_idx < 0 means no pin will be bound to the converter */
1392         if (pin_idx < 0)
1393                 per_pin = NULL;
1394         else
1395                 per_pin = get_pin(spec, pin_idx);
1396
1397         /* Dynamically assign converter to stream */
1398         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1399                 per_cvt = get_cvt(spec, cvt_idx);
1400
1401                 /* Must not already be assigned */
1402                 if (per_cvt->assigned)
1403                         continue;
1404                 if (per_pin == NULL)
1405                         break;
1406                 /* Must be in pin's mux's list of converters */
1407                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1408                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1409                                 break;
1410                 /* Not in mux list */
1411                 if (mux_idx == per_pin->num_mux_nids)
1412                         continue;
1413                 break;
1414         }
1415
1416         /* No free converters */
1417         if (cvt_idx == spec->num_cvts)
1418                 return -EBUSY;
1419
1420         if (per_pin != NULL)
1421                 per_pin->mux_idx = mux_idx;
1422
1423         if (cvt_id)
1424                 *cvt_id = cvt_idx;
1425         if (mux_id)
1426                 *mux_id = mux_idx;
1427
1428         return 0;
1429 }
1430
1431 /* Assure the pin select the right convetor */
1432 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1433                         struct hdmi_spec_per_pin *per_pin)
1434 {
1435         hda_nid_t pin_nid = per_pin->pin_nid;
1436         int mux_idx, curr;
1437
1438         mux_idx = per_pin->mux_idx;
1439         curr = snd_hda_codec_read(codec, pin_nid, 0,
1440                                           AC_VERB_GET_CONNECT_SEL, 0);
1441         if (curr != mux_idx)
1442                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1443                                             AC_VERB_SET_CONNECT_SEL,
1444                                             mux_idx);
1445 }
1446
1447 /* get the mux index for the converter of the pins
1448  * converter's mux index is the same for all pins on Intel platform
1449  */
1450 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1451                         hda_nid_t cvt_nid)
1452 {
1453         int i;
1454
1455         for (i = 0; i < spec->num_cvts; i++)
1456                 if (spec->cvt_nids[i] == cvt_nid)
1457                         return i;
1458         return -EINVAL;
1459 }
1460
1461 /* Intel HDMI workaround to fix audio routing issue:
1462  * For some Intel display codecs, pins share the same connection list.
1463  * So a conveter can be selected by multiple pins and playback on any of these
1464  * pins will generate sound on the external display, because audio flows from
1465  * the same converter to the display pipeline. Also muting one pin may make
1466  * other pins have no sound output.
1467  * So this function assures that an assigned converter for a pin is not selected
1468  * by any other pins.
1469  */
1470 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1471                         hda_nid_t pin_nid, int mux_idx)
1472 {
1473         struct hdmi_spec *spec = codec->spec;
1474         hda_nid_t nid;
1475         int cvt_idx, curr;
1476         struct hdmi_spec_per_cvt *per_cvt;
1477
1478         /* configure all pins, including "no physical connection" ones */
1479         for_each_hda_codec_node(nid, codec) {
1480                 unsigned int wid_caps = get_wcaps(codec, nid);
1481                 unsigned int wid_type = get_wcaps_type(wid_caps);
1482
1483                 if (wid_type != AC_WID_PIN)
1484                         continue;
1485
1486                 if (nid == pin_nid)
1487                         continue;
1488
1489                 curr = snd_hda_codec_read(codec, nid, 0,
1490                                           AC_VERB_GET_CONNECT_SEL, 0);
1491                 if (curr != mux_idx)
1492                         continue;
1493
1494                 /* choose an unassigned converter. The conveters in the
1495                  * connection list are in the same order as in the codec.
1496                  */
1497                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1498                         per_cvt = get_cvt(spec, cvt_idx);
1499                         if (!per_cvt->assigned) {
1500                                 codec_dbg(codec,
1501                                           "choose cvt %d for pin nid %d\n",
1502                                         cvt_idx, nid);
1503                                 snd_hda_codec_write_cache(codec, nid, 0,
1504                                             AC_VERB_SET_CONNECT_SEL,
1505                                             cvt_idx);
1506                                 break;
1507                         }
1508                 }
1509         }
1510 }
1511
1512 /* A wrapper of intel_not_share_asigned_cvt() */
1513 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1514                         hda_nid_t pin_nid, hda_nid_t cvt_nid)
1515 {
1516         int mux_idx;
1517         struct hdmi_spec *spec = codec->spec;
1518
1519         if (!is_haswell_plus(codec) && !is_valleyview_plus(codec))
1520                 return;
1521
1522         /* On Intel platform, the mapping of converter nid to
1523          * mux index of the pins are always the same.
1524          * The pin nid may be 0, this means all pins will not
1525          * share the converter.
1526          */
1527         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1528         if (mux_idx >= 0)
1529                 intel_not_share_assigned_cvt(codec, pin_nid, mux_idx);
1530 }
1531
1532 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1533  * in dyn_pcm_assign mode.
1534  */
1535 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1536                          struct hda_codec *codec,
1537                          struct snd_pcm_substream *substream)
1538 {
1539         struct hdmi_spec *spec = codec->spec;
1540         struct snd_pcm_runtime *runtime = substream->runtime;
1541         int cvt_idx, pcm_idx;
1542         struct hdmi_spec_per_cvt *per_cvt = NULL;
1543         int err;
1544
1545         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1546         if (pcm_idx < 0)
1547                 return -EINVAL;
1548
1549         err = hdmi_choose_cvt(codec, -1, &cvt_idx, NULL);
1550         if (err)
1551                 return err;
1552
1553         per_cvt = get_cvt(spec, cvt_idx);
1554         per_cvt->assigned = 1;
1555         hinfo->nid = per_cvt->cvt_nid;
1556
1557         intel_not_share_assigned_cvt_nid(codec, 0, per_cvt->cvt_nid);
1558
1559         set_bit(pcm_idx, &spec->pcm_in_use);
1560         /* todo: setup spdif ctls assign */
1561
1562         /* Initially set the converter's capabilities */
1563         hinfo->channels_min = per_cvt->channels_min;
1564         hinfo->channels_max = per_cvt->channels_max;
1565         hinfo->rates = per_cvt->rates;
1566         hinfo->formats = per_cvt->formats;
1567         hinfo->maxbps = per_cvt->maxbps;
1568
1569         /* Store the updated parameters */
1570         runtime->hw.channels_min = hinfo->channels_min;
1571         runtime->hw.channels_max = hinfo->channels_max;
1572         runtime->hw.formats = hinfo->formats;
1573         runtime->hw.rates = hinfo->rates;
1574
1575         snd_pcm_hw_constraint_step(substream->runtime, 0,
1576                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1577         return 0;
1578 }
1579
1580 /*
1581  * HDA PCM callbacks
1582  */
1583 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1584                          struct hda_codec *codec,
1585                          struct snd_pcm_substream *substream)
1586 {
1587         struct hdmi_spec *spec = codec->spec;
1588         struct snd_pcm_runtime *runtime = substream->runtime;
1589         int pin_idx, cvt_idx, pcm_idx, mux_idx = 0;
1590         struct hdmi_spec_per_pin *per_pin;
1591         struct hdmi_eld *eld;
1592         struct hdmi_spec_per_cvt *per_cvt = NULL;
1593         int err;
1594
1595         /* Validate hinfo */
1596         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1597         if (pcm_idx < 0)
1598                 return -EINVAL;
1599
1600         mutex_lock(&spec->pcm_lock);
1601         pin_idx = hinfo_to_pin_index(codec, hinfo);
1602         if (!spec->dyn_pcm_assign) {
1603                 if (snd_BUG_ON(pin_idx < 0)) {
1604                         mutex_unlock(&spec->pcm_lock);
1605                         return -EINVAL;
1606                 }
1607         } else {
1608                 /* no pin is assigned to the PCM
1609                  * PA need pcm open successfully when probe
1610                  */
1611                 if (pin_idx < 0) {
1612                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1613                         mutex_unlock(&spec->pcm_lock);
1614                         return err;
1615                 }
1616         }
1617
1618         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1619         if (err < 0) {
1620                 mutex_unlock(&spec->pcm_lock);
1621                 return err;
1622         }
1623
1624         per_cvt = get_cvt(spec, cvt_idx);
1625         /* Claim converter */
1626         per_cvt->assigned = 1;
1627
1628         set_bit(pcm_idx, &spec->pcm_in_use);
1629         per_pin = get_pin(spec, pin_idx);
1630         per_pin->cvt_nid = per_cvt->cvt_nid;
1631         hinfo->nid = per_cvt->cvt_nid;
1632
1633         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1634                             AC_VERB_SET_CONNECT_SEL,
1635                             mux_idx);
1636
1637         /* configure unused pins to choose other converters */
1638         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
1639                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1640
1641         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1642
1643         /* Initially set the converter's capabilities */
1644         hinfo->channels_min = per_cvt->channels_min;
1645         hinfo->channels_max = per_cvt->channels_max;
1646         hinfo->rates = per_cvt->rates;
1647         hinfo->formats = per_cvt->formats;
1648         hinfo->maxbps = per_cvt->maxbps;
1649
1650         eld = &per_pin->sink_eld;
1651         /* Restrict capabilities by ELD if this isn't disabled */
1652         if (!static_hdmi_pcm && eld->eld_valid) {
1653                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1654                 if (hinfo->channels_min > hinfo->channels_max ||
1655                     !hinfo->rates || !hinfo->formats) {
1656                         per_cvt->assigned = 0;
1657                         hinfo->nid = 0;
1658                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1659                         mutex_unlock(&spec->pcm_lock);
1660                         return -ENODEV;
1661                 }
1662         }
1663
1664         mutex_unlock(&spec->pcm_lock);
1665         /* Store the updated parameters */
1666         runtime->hw.channels_min = hinfo->channels_min;
1667         runtime->hw.channels_max = hinfo->channels_max;
1668         runtime->hw.formats = hinfo->formats;
1669         runtime->hw.rates = hinfo->rates;
1670
1671         snd_pcm_hw_constraint_step(substream->runtime, 0,
1672                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1673         return 0;
1674 }
1675
1676 /*
1677  * HDA/HDMI auto parsing
1678  */
1679 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1680 {
1681         struct hdmi_spec *spec = codec->spec;
1682         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1683         hda_nid_t pin_nid = per_pin->pin_nid;
1684
1685         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1686                 codec_warn(codec,
1687                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1688                            pin_nid, get_wcaps(codec, pin_nid));
1689                 return -EINVAL;
1690         }
1691
1692         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1693                                                         per_pin->mux_nids,
1694                                                         HDA_MAX_CONNECTIONS);
1695
1696         return 0;
1697 }
1698
1699 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1700                                 struct hdmi_spec_per_pin *per_pin)
1701 {
1702         int i;
1703
1704         /* try the prefer PCM */
1705         if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1706                 return per_pin->pin_nid_idx;
1707
1708         /* have a second try; check the "reserved area" over num_pins */
1709         for (i = spec->num_pins; i < spec->pcm_used; i++) {
1710                 if (!test_bit(i, &spec->pcm_bitmap))
1711                         return i;
1712         }
1713
1714         /* the last try; check the empty slots in pins */
1715         for (i = 0; i < spec->num_pins; i++) {
1716                 if (!test_bit(i, &spec->pcm_bitmap))
1717                         return i;
1718         }
1719         return -EBUSY;
1720 }
1721
1722 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1723                                 struct hdmi_spec_per_pin *per_pin)
1724 {
1725         int idx;
1726
1727         /* pcm already be attached to the pin */
1728         if (per_pin->pcm)
1729                 return;
1730         idx = hdmi_find_pcm_slot(spec, per_pin);
1731         if (idx == -ENODEV)
1732                 return;
1733         per_pin->pcm_idx = idx;
1734         per_pin->pcm = get_hdmi_pcm(spec, idx);
1735         set_bit(idx, &spec->pcm_bitmap);
1736 }
1737
1738 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1739                                 struct hdmi_spec_per_pin *per_pin)
1740 {
1741         int idx;
1742
1743         /* pcm already be detached from the pin */
1744         if (!per_pin->pcm)
1745                 return;
1746         idx = per_pin->pcm_idx;
1747         per_pin->pcm_idx = -1;
1748         per_pin->pcm = NULL;
1749         if (idx >= 0 && idx < spec->pcm_used)
1750                 clear_bit(idx, &spec->pcm_bitmap);
1751 }
1752
1753 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1754                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1755 {
1756         int mux_idx;
1757
1758         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1759                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1760                         break;
1761         return mux_idx;
1762 }
1763
1764 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1765
1766 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1767                            struct hdmi_spec_per_pin *per_pin)
1768 {
1769         struct hda_codec *codec = per_pin->codec;
1770         struct hda_pcm *pcm;
1771         struct hda_pcm_stream *hinfo;
1772         struct snd_pcm_substream *substream;
1773         int mux_idx;
1774         bool non_pcm;
1775
1776         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1777                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1778         else
1779                 return;
1780         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1781                 return;
1782
1783         /* hdmi audio only uses playback and one substream */
1784         hinfo = pcm->stream;
1785         substream = pcm->pcm->streams[0].substream;
1786
1787         per_pin->cvt_nid = hinfo->nid;
1788
1789         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1790         if (mux_idx < per_pin->num_mux_nids)
1791                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1792                                 AC_VERB_SET_CONNECT_SEL,
1793                                 mux_idx);
1794         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1795
1796         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1797         if (substream->runtime)
1798                 per_pin->channels = substream->runtime->channels;
1799         per_pin->setup = true;
1800         per_pin->mux_idx = mux_idx;
1801
1802         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1803 }
1804
1805 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1806                            struct hdmi_spec_per_pin *per_pin)
1807 {
1808         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1809                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1810
1811         per_pin->chmap_set = false;
1812         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1813
1814         per_pin->setup = false;
1815         per_pin->channels = 0;
1816 }
1817
1818 /* update per_pin ELD from the given new ELD;
1819  * setup info frame and notification accordingly
1820  */
1821 static void update_eld(struct hda_codec *codec,
1822                        struct hdmi_spec_per_pin *per_pin,
1823                        struct hdmi_eld *eld)
1824 {
1825         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1826         struct hdmi_spec *spec = codec->spec;
1827         bool old_eld_valid = pin_eld->eld_valid;
1828         bool eld_changed;
1829
1830         if (spec->dyn_pcm_assign) {
1831                 if (eld->eld_valid) {
1832                         hdmi_attach_hda_pcm(spec, per_pin);
1833                         hdmi_pcm_setup_pin(spec, per_pin);
1834                 } else {
1835                         hdmi_pcm_reset_pin(spec, per_pin);
1836                         hdmi_detach_hda_pcm(spec, per_pin);
1837                 }
1838         }
1839
1840         if (eld->eld_valid)
1841                 snd_hdmi_show_eld(codec, &eld->info);
1842
1843         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1844         if (eld->eld_valid && pin_eld->eld_valid)
1845                 if (pin_eld->eld_size != eld->eld_size ||
1846                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1847                            eld->eld_size) != 0)
1848                         eld_changed = true;
1849
1850         pin_eld->eld_valid = eld->eld_valid;
1851         pin_eld->eld_size = eld->eld_size;
1852         if (eld->eld_valid)
1853                 memcpy(pin_eld->eld_buffer, eld->eld_buffer, eld->eld_size);
1854         pin_eld->info = eld->info;
1855
1856         /*
1857          * Re-setup pin and infoframe. This is needed e.g. when
1858          * - sink is first plugged-in
1859          * - transcoder can change during stream playback on Haswell
1860          *   and this can make HW reset converter selection on a pin.
1861          */
1862         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1863                 if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
1864                         intel_verify_pin_cvt_connect(codec, per_pin);
1865                         intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
1866                                                      per_pin->mux_idx);
1867                 }
1868
1869                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1870         }
1871
1872         if (eld_changed)
1873                 snd_ctl_notify(codec->card,
1874                                SNDRV_CTL_EVENT_MASK_VALUE |
1875                                SNDRV_CTL_EVENT_MASK_INFO,
1876                                &per_pin->eld_ctl->id);
1877 }
1878
1879 /* update ELD and jack state via HD-audio verbs */
1880 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1881                                          int repoll)
1882 {
1883         struct hda_jack_tbl *jack;
1884         struct hda_codec *codec = per_pin->codec;
1885         struct hdmi_spec *spec = codec->spec;
1886         struct hdmi_eld *eld = &spec->temp_eld;
1887         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1888         hda_nid_t pin_nid = per_pin->pin_nid;
1889         /*
1890          * Always execute a GetPinSense verb here, even when called from
1891          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1892          * response's PD bit is not the real PD value, but indicates that
1893          * the real PD value changed. An older version of the HD-audio
1894          * specification worked this way. Hence, we just ignore the data in
1895          * the unsolicited response to avoid custom WARs.
1896          */
1897         int present;
1898         bool ret;
1899         bool do_repoll = false;
1900
1901         snd_hda_power_up_pm(codec);
1902         present = snd_hda_pin_sense(codec, pin_nid);
1903
1904         mutex_lock(&per_pin->lock);
1905         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1906         if (pin_eld->monitor_present)
1907                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1908         else
1909                 eld->eld_valid = false;
1910
1911         codec_dbg(codec,
1912                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1913                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1914
1915         if (eld->eld_valid) {
1916                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1917                                                      &eld->eld_size) < 0)
1918                         eld->eld_valid = false;
1919                 else {
1920                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1921                                                     eld->eld_size) < 0)
1922                                 eld->eld_valid = false;
1923                 }
1924                 if (!eld->eld_valid && repoll)
1925                         do_repoll = true;
1926         }
1927
1928         if (do_repoll)
1929                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1930         else
1931                 update_eld(codec, per_pin, eld);
1932
1933         ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1934
1935         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1936         if (jack)
1937                 jack->block_report = !ret;
1938
1939         mutex_unlock(&per_pin->lock);
1940         snd_hda_power_down_pm(codec);
1941         return ret;
1942 }
1943
1944 /* update ELD and jack state via audio component */
1945 static void sync_eld_via_acomp(struct hda_codec *codec,
1946                                struct hdmi_spec_per_pin *per_pin)
1947 {
1948         struct hdmi_spec *spec = codec->spec;
1949         struct hdmi_eld *eld = &spec->temp_eld;
1950         struct snd_jack *jack = NULL;
1951         int size;
1952
1953         mutex_lock(&per_pin->lock);
1954         size = snd_hdac_acomp_get_eld(&codec->bus->core, per_pin->pin_nid,
1955                                       &eld->monitor_present, eld->eld_buffer,
1956                                       ELD_MAX_SIZE);
1957         if (size < 0)
1958                 goto unlock;
1959         if (size > 0) {
1960                 size = min(size, ELD_MAX_SIZE);
1961                 if (snd_hdmi_parse_eld(codec, &eld->info,
1962                                        eld->eld_buffer, size) < 0)
1963                         size = -EINVAL;
1964         }
1965
1966         if (size > 0) {
1967                 eld->eld_valid = true;
1968                 eld->eld_size = size;
1969         } else {
1970                 eld->eld_valid = false;
1971                 eld->eld_size = 0;
1972         }
1973
1974         /* pcm_idx >=0 before update_eld() means it is in monitor
1975          * disconnected event. Jack must be fetched before update_eld()
1976          */
1977         if (per_pin->pcm_idx >= 0)
1978                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1979         update_eld(codec, per_pin, eld);
1980         if (jack == NULL && per_pin->pcm_idx >= 0)
1981                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1982         if (jack == NULL)
1983                 goto unlock;
1984         snd_jack_report(jack,
1985                         eld->monitor_present ? SND_JACK_AVOUT : 0);
1986  unlock:
1987         mutex_unlock(&per_pin->lock);
1988 }
1989
1990 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1991 {
1992         struct hda_codec *codec = per_pin->codec;
1993         struct hdmi_spec *spec = codec->spec;
1994         int ret;
1995
1996         mutex_lock(&spec->pcm_lock);
1997         if (codec_has_acomp(codec)) {
1998                 sync_eld_via_acomp(codec, per_pin);
1999                 ret = false; /* don't call snd_hda_jack_report_sync() */
2000         } else {
2001                 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
2002         }
2003         mutex_unlock(&spec->pcm_lock);
2004
2005         return ret;
2006 }
2007
2008 static void hdmi_repoll_eld(struct work_struct *work)
2009 {
2010         struct hdmi_spec_per_pin *per_pin =
2011         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
2012
2013         if (per_pin->repoll_count++ > 6)
2014                 per_pin->repoll_count = 0;
2015
2016         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
2017                 snd_hda_jack_report_sync(per_pin->codec);
2018 }
2019
2020 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2021                                              hda_nid_t nid);
2022
2023 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
2024 {
2025         struct hdmi_spec *spec = codec->spec;
2026         unsigned int caps, config;
2027         int pin_idx;
2028         struct hdmi_spec_per_pin *per_pin;
2029         int err;
2030
2031         caps = snd_hda_query_pin_caps(codec, pin_nid);
2032         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
2033                 return 0;
2034
2035         config = snd_hda_codec_get_pincfg(codec, pin_nid);
2036         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
2037                 return 0;
2038
2039         if (is_haswell_plus(codec))
2040                 intel_haswell_fixup_connect_list(codec, pin_nid);
2041
2042         pin_idx = spec->num_pins;
2043         per_pin = snd_array_new(&spec->pins);
2044         if (!per_pin)
2045                 return -ENOMEM;
2046
2047         per_pin->pin_nid = pin_nid;
2048         per_pin->non_pcm = false;
2049         if (spec->dyn_pcm_assign)
2050                 per_pin->pcm_idx = -1;
2051         else {
2052                 per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
2053                 per_pin->pcm_idx = pin_idx;
2054         }
2055         per_pin->pin_nid_idx = pin_idx;
2056
2057         err = hdmi_read_pin_conn(codec, pin_idx);
2058         if (err < 0)
2059                 return err;
2060
2061         spec->num_pins++;
2062
2063         return 0;
2064 }
2065
2066 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
2067 {
2068         struct hdmi_spec *spec = codec->spec;
2069         struct hdmi_spec_per_cvt *per_cvt;
2070         unsigned int chans;
2071         int err;
2072
2073         chans = get_wcaps(codec, cvt_nid);
2074         chans = get_wcaps_channels(chans);
2075
2076         per_cvt = snd_array_new(&spec->cvts);
2077         if (!per_cvt)
2078                 return -ENOMEM;
2079
2080         per_cvt->cvt_nid = cvt_nid;
2081         per_cvt->channels_min = 2;
2082         if (chans <= 16) {
2083                 per_cvt->channels_max = chans;
2084                 if (chans > spec->channels_max)
2085                         spec->channels_max = chans;
2086         }
2087
2088         err = snd_hda_query_supported_pcm(codec, cvt_nid,
2089                                           &per_cvt->rates,
2090                                           &per_cvt->formats,
2091                                           &per_cvt->maxbps);
2092         if (err < 0)
2093                 return err;
2094
2095         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
2096                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
2097         spec->num_cvts++;
2098
2099         return 0;
2100 }
2101
2102 static int hdmi_parse_codec(struct hda_codec *codec)
2103 {
2104         hda_nid_t nid;
2105         int i, nodes;
2106
2107         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
2108         if (!nid || nodes < 0) {
2109                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
2110                 return -EINVAL;
2111         }
2112
2113         for (i = 0; i < nodes; i++, nid++) {
2114                 unsigned int caps;
2115                 unsigned int type;
2116
2117                 caps = get_wcaps(codec, nid);
2118                 type = get_wcaps_type(caps);
2119
2120                 if (!(caps & AC_WCAP_DIGITAL))
2121                         continue;
2122
2123                 switch (type) {
2124                 case AC_WID_AUD_OUT:
2125                         hdmi_add_cvt(codec, nid);
2126                         break;
2127                 case AC_WID_PIN:
2128                         hdmi_add_pin(codec, nid);
2129                         break;
2130                 }
2131         }
2132
2133         return 0;
2134 }
2135
2136 /*
2137  */
2138 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
2139 {
2140         struct hda_spdif_out *spdif;
2141         bool non_pcm;
2142
2143         mutex_lock(&codec->spdif_mutex);
2144         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
2145         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
2146         mutex_unlock(&codec->spdif_mutex);
2147         return non_pcm;
2148 }
2149
2150 /*
2151  * HDMI callbacks
2152  */
2153
2154 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2155                                            struct hda_codec *codec,
2156                                            unsigned int stream_tag,
2157                                            unsigned int format,
2158                                            struct snd_pcm_substream *substream)
2159 {
2160         hda_nid_t cvt_nid = hinfo->nid;
2161         struct hdmi_spec *spec = codec->spec;
2162         int pin_idx;
2163         struct hdmi_spec_per_pin *per_pin;
2164         hda_nid_t pin_nid;
2165         struct snd_pcm_runtime *runtime = substream->runtime;
2166         bool non_pcm;
2167         int pinctl;
2168         int err;
2169
2170         mutex_lock(&spec->pcm_lock);
2171         pin_idx = hinfo_to_pin_index(codec, hinfo);
2172         if (spec->dyn_pcm_assign && pin_idx < 0) {
2173                 /* when dyn_pcm_assign and pcm is not bound to a pin
2174                  * skip pin setup and return 0 to make audio playback
2175                  * be ongoing
2176                  */
2177                 intel_not_share_assigned_cvt_nid(codec, 0, cvt_nid);
2178                 snd_hda_codec_setup_stream(codec, cvt_nid,
2179                                         stream_tag, 0, format);
2180                 mutex_unlock(&spec->pcm_lock);
2181                 return 0;
2182         }
2183
2184         if (snd_BUG_ON(pin_idx < 0)) {
2185                 mutex_unlock(&spec->pcm_lock);
2186                 return -EINVAL;
2187         }
2188         per_pin = get_pin(spec, pin_idx);
2189         pin_nid = per_pin->pin_nid;
2190         if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
2191                 /* Verify pin:cvt selections to avoid silent audio after S3.
2192                  * After S3, the audio driver restores pin:cvt selections
2193                  * but this can happen before gfx is ready and such selection
2194                  * is overlooked by HW. Thus multiple pins can share a same
2195                  * default convertor and mute control will affect each other,
2196                  * which can cause a resumed audio playback become silent
2197                  * after S3.
2198                  */
2199                 intel_verify_pin_cvt_connect(codec, per_pin);
2200                 intel_not_share_assigned_cvt(codec, pin_nid, per_pin->mux_idx);
2201         }
2202
2203         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
2204         /* Todo: add DP1.2 MST audio support later */
2205         snd_hdac_sync_audio_rate(&codec->bus->core, pin_nid, runtime->rate);
2206
2207         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
2208         mutex_lock(&per_pin->lock);
2209         per_pin->channels = substream->runtime->channels;
2210         per_pin->setup = true;
2211
2212         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
2213         mutex_unlock(&per_pin->lock);
2214         if (spec->dyn_pin_out) {
2215                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
2216                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2217                 snd_hda_codec_write(codec, pin_nid, 0,
2218                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
2219                                     pinctl | PIN_OUT);
2220         }
2221
2222         err = spec->ops.setup_stream(codec, cvt_nid, pin_nid,
2223                                  stream_tag, format);
2224         mutex_unlock(&spec->pcm_lock);
2225         return err;
2226 }
2227
2228 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2229                                              struct hda_codec *codec,
2230                                              struct snd_pcm_substream *substream)
2231 {
2232         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
2233         return 0;
2234 }
2235
2236 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
2237                           struct hda_codec *codec,
2238                           struct snd_pcm_substream *substream)
2239 {
2240         struct hdmi_spec *spec = codec->spec;
2241         int cvt_idx, pin_idx, pcm_idx;
2242         struct hdmi_spec_per_cvt *per_cvt;
2243         struct hdmi_spec_per_pin *per_pin;
2244         int pinctl;
2245
2246         if (hinfo->nid) {
2247                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
2248                 if (snd_BUG_ON(pcm_idx < 0))
2249                         return -EINVAL;
2250                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
2251                 if (snd_BUG_ON(cvt_idx < 0))
2252                         return -EINVAL;
2253                 per_cvt = get_cvt(spec, cvt_idx);
2254
2255                 snd_BUG_ON(!per_cvt->assigned);
2256                 per_cvt->assigned = 0;
2257                 hinfo->nid = 0;
2258
2259                 mutex_lock(&spec->pcm_lock);
2260                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2261                 clear_bit(pcm_idx, &spec->pcm_in_use);
2262                 pin_idx = hinfo_to_pin_index(codec, hinfo);
2263                 if (spec->dyn_pcm_assign && pin_idx < 0) {
2264                         mutex_unlock(&spec->pcm_lock);
2265                         return 0;
2266                 }
2267
2268                 if (snd_BUG_ON(pin_idx < 0)) {
2269                         mutex_unlock(&spec->pcm_lock);
2270                         return -EINVAL;
2271                 }
2272                 per_pin = get_pin(spec, pin_idx);
2273
2274                 if (spec->dyn_pin_out) {
2275                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2276                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2277                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2278                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
2279                                             pinctl & ~PIN_OUT);
2280                 }
2281
2282                 mutex_lock(&per_pin->lock);
2283                 per_pin->chmap_set = false;
2284                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2285
2286                 per_pin->setup = false;
2287                 per_pin->channels = 0;
2288                 mutex_unlock(&per_pin->lock);
2289                 mutex_unlock(&spec->pcm_lock);
2290         }
2291
2292         return 0;
2293 }
2294
2295 static const struct hda_pcm_ops generic_ops = {
2296         .open = hdmi_pcm_open,
2297         .close = hdmi_pcm_close,
2298         .prepare = generic_hdmi_playback_pcm_prepare,
2299         .cleanup = generic_hdmi_playback_pcm_cleanup,
2300 };
2301
2302 /*
2303  * ALSA API channel-map control callbacks
2304  */
2305 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
2306                                struct snd_ctl_elem_info *uinfo)
2307 {
2308         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2309         struct hda_codec *codec = info->private_data;
2310         struct hdmi_spec *spec = codec->spec;
2311         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2312         uinfo->count = spec->channels_max;
2313         uinfo->value.integer.min = 0;
2314         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
2315         return 0;
2316 }
2317
2318 static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
2319                                                   int channels)
2320 {
2321         /* If the speaker allocation matches the channel count, it is OK.*/
2322         if (cap->channels != channels)
2323                 return -1;
2324
2325         /* all channels are remappable freely */
2326         return SNDRV_CTL_TLVT_CHMAP_VAR;
2327 }
2328
2329 static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
2330                                         unsigned int *chmap, int channels)
2331 {
2332         int count = 0;
2333         int c;
2334
2335         for (c = 7; c >= 0; c--) {
2336                 int spk = cap->speakers[c];
2337                 if (!spk)
2338                         continue;
2339
2340                 chmap[count++] = spk_to_chmap(spk);
2341         }
2342
2343         WARN_ON(count != channels);
2344 }
2345
2346 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
2347                               unsigned int size, unsigned int __user *tlv)
2348 {
2349         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2350         struct hda_codec *codec = info->private_data;
2351         struct hdmi_spec *spec = codec->spec;
2352         unsigned int __user *dst;
2353         int chs, count = 0;
2354
2355         if (size < 8)
2356                 return -ENOMEM;
2357         if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
2358                 return -EFAULT;
2359         size -= 8;
2360         dst = tlv + 2;
2361         for (chs = 2; chs <= spec->channels_max; chs++) {
2362                 int i;
2363                 struct cea_channel_speaker_allocation *cap;
2364                 cap = channel_allocations;
2365                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
2366                         int chs_bytes = chs * 4;
2367                         int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
2368                         unsigned int tlv_chmap[8];
2369
2370                         if (type < 0)
2371                                 continue;
2372                         if (size < 8)
2373                                 return -ENOMEM;
2374                         if (put_user(type, dst) ||
2375                             put_user(chs_bytes, dst + 1))
2376                                 return -EFAULT;
2377                         dst += 2;
2378                         size -= 8;
2379                         count += 8;
2380                         if (size < chs_bytes)
2381                                 return -ENOMEM;
2382                         size -= chs_bytes;
2383                         count += chs_bytes;
2384                         spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
2385                         if (copy_to_user(dst, tlv_chmap, chs_bytes))
2386                                 return -EFAULT;
2387                         dst += chs;
2388                 }
2389         }
2390         if (put_user(count, tlv + 1))
2391                 return -EFAULT;
2392         return 0;
2393 }
2394
2395 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
2396                               struct snd_ctl_elem_value *ucontrol)
2397 {
2398         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2399         struct hda_codec *codec = info->private_data;
2400         struct hdmi_spec *spec = codec->spec;
2401         int pin_idx = kcontrol->private_value;
2402         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2403         int i;
2404
2405         for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
2406                 ucontrol->value.integer.value[i] = per_pin->chmap[i];
2407         return 0;
2408 }
2409
2410 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
2411                               struct snd_ctl_elem_value *ucontrol)
2412 {
2413         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2414         struct hda_codec *codec = info->private_data;
2415         struct hdmi_spec *spec = codec->spec;
2416         int pin_idx = kcontrol->private_value;
2417         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2418         unsigned int ctl_idx;
2419         struct snd_pcm_substream *substream;
2420         unsigned char chmap[8];
2421         int i, err, ca, prepared = 0;
2422
2423         ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2424         substream = snd_pcm_chmap_substream(info, ctl_idx);
2425         if (!substream || !substream->runtime)
2426                 return 0; /* just for avoiding error from alsactl restore */
2427         switch (substream->runtime->status->state) {
2428         case SNDRV_PCM_STATE_OPEN:
2429         case SNDRV_PCM_STATE_SETUP:
2430                 break;
2431         case SNDRV_PCM_STATE_PREPARED:
2432                 prepared = 1;
2433                 break;
2434         default:
2435                 return -EBUSY;
2436         }
2437         memset(chmap, 0, sizeof(chmap));
2438         for (i = 0; i < ARRAY_SIZE(chmap); i++)
2439                 chmap[i] = ucontrol->value.integer.value[i];
2440         if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
2441                 return 0;
2442         ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
2443         if (ca < 0)
2444                 return -EINVAL;
2445         if (spec->ops.chmap_validate) {
2446                 err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
2447                 if (err)
2448                         return err;
2449         }
2450         mutex_lock(&per_pin->lock);
2451         per_pin->chmap_set = true;
2452         memcpy(per_pin->chmap, chmap, sizeof(chmap));
2453         if (prepared)
2454                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2455         mutex_unlock(&per_pin->lock);
2456
2457         return 0;
2458 }
2459
2460 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2461 {
2462         struct hdmi_spec *spec = codec->spec;
2463         int pin_idx;
2464
2465         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2466                 struct hda_pcm *info;
2467                 struct hda_pcm_stream *pstr;
2468
2469                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", pin_idx);
2470                 if (!info)
2471                         return -ENOMEM;
2472
2473                 spec->pcm_rec[pin_idx].pcm = info;
2474                 spec->pcm_used++;
2475                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2476                 info->own_chmap = true;
2477
2478                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2479                 pstr->substreams = 1;
2480                 pstr->ops = generic_ops;
2481                 /* other pstr fields are set in open */
2482         }
2483
2484         return 0;
2485 }
2486
2487 static void free_hdmi_jack_priv(struct snd_jack *jack)
2488 {
2489         struct hdmi_pcm *pcm = jack->private_data;
2490
2491         pcm->jack = NULL;
2492 }
2493
2494 static int add_hdmi_jack_kctl(struct hda_codec *codec,
2495                                struct hdmi_spec *spec,
2496                                int pcm_idx,
2497                                const char *name)
2498 {
2499         struct snd_jack *jack;
2500         int err;
2501
2502         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
2503                            true, false);
2504         if (err < 0)
2505                 return err;
2506
2507         spec->pcm_rec[pcm_idx].jack = jack;
2508         jack->private_data = &spec->pcm_rec[pcm_idx];
2509         jack->private_free = free_hdmi_jack_priv;
2510         return 0;
2511 }
2512
2513 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2514 {
2515         char hdmi_str[32] = "HDMI/DP";
2516         struct hdmi_spec *spec = codec->spec;
2517         struct hdmi_spec_per_pin *per_pin;
2518         struct hda_jack_tbl *jack;
2519         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2520         bool phantom_jack;
2521         int ret;
2522
2523         if (pcmdev > 0)
2524                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2525
2526         if (spec->dyn_pcm_assign)
2527                 return add_hdmi_jack_kctl(codec, spec, pcm_idx, hdmi_str);
2528
2529         /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
2530         /* if !dyn_pcm_assign, it must be non-MST mode.
2531          * This means pcms and pins are statically mapped.
2532          * And pcm_idx is pin_idx.
2533          */
2534         per_pin = get_pin(spec, pcm_idx);
2535         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
2536         if (phantom_jack)
2537                 strncat(hdmi_str, " Phantom",
2538                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2539         ret = snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str,
2540                                     phantom_jack);
2541         if (ret < 0)
2542                 return ret;
2543         jack = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
2544         if (jack == NULL)
2545                 return 0;
2546         /* assign jack->jack to pcm_rec[].jack to
2547          * align with dyn_pcm_assign mode
2548          */
2549         spec->pcm_rec[pcm_idx].jack = jack->jack;
2550         return 0;
2551 }
2552
2553 static int generic_hdmi_build_controls(struct hda_codec *codec)
2554 {
2555         struct hdmi_spec *spec = codec->spec;
2556         int err;
2557         int pin_idx, pcm_idx;
2558
2559
2560         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2561                 err = generic_hdmi_build_jack(codec, pcm_idx);
2562                 if (err < 0)
2563                         return err;
2564
2565                 /* create the spdif for each pcm
2566                  * pin will be bound when monitor is connected
2567                  */
2568                 if (spec->dyn_pcm_assign)
2569                         err = snd_hda_create_dig_out_ctls(codec,
2570                                           0, spec->cvt_nids[0],
2571                                           HDA_PCM_TYPE_HDMI);
2572                 else {
2573                         struct hdmi_spec_per_pin *per_pin =
2574                                 get_pin(spec, pcm_idx);
2575                         err = snd_hda_create_dig_out_ctls(codec,
2576                                                   per_pin->pin_nid,
2577                                                   per_pin->mux_nids[0],
2578                                                   HDA_PCM_TYPE_HDMI);
2579                 }
2580                 if (err < 0)
2581                         return err;
2582                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2583         }
2584
2585         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2586                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2587
2588                 /* add control for ELD Bytes */
2589                 err = hdmi_create_eld_ctl(codec, pin_idx,
2590                                 get_pcm_rec(spec, pin_idx)->device);
2591
2592                 if (err < 0)
2593                         return err;
2594
2595                 hdmi_present_sense(per_pin, 0);
2596         }
2597
2598         /* add channel maps */
2599         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2600                 struct hda_pcm *pcm;
2601                 struct snd_pcm_chmap *chmap;
2602                 struct snd_kcontrol *kctl;
2603                 int i;
2604
2605                 pcm = get_pcm_rec(spec, pin_idx);
2606                 if (!pcm || !pcm->pcm)
2607                         break;
2608                 err = snd_pcm_add_chmap_ctls(pcm->pcm,
2609                                              SNDRV_PCM_STREAM_PLAYBACK,
2610                                              NULL, 0, pin_idx, &chmap);
2611                 if (err < 0)
2612                         return err;
2613                 /* override handlers */
2614                 chmap->private_data = codec;
2615                 kctl = chmap->kctl;
2616                 for (i = 0; i < kctl->count; i++)
2617                         kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
2618                 kctl->info = hdmi_chmap_ctl_info;
2619                 kctl->get = hdmi_chmap_ctl_get;
2620                 kctl->put = hdmi_chmap_ctl_put;
2621                 kctl->tlv.c = hdmi_chmap_ctl_tlv;
2622         }
2623
2624         return 0;
2625 }
2626
2627 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2628 {
2629         struct hdmi_spec *spec = codec->spec;
2630         int pin_idx;
2631
2632         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2633                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2634
2635                 per_pin->codec = codec;
2636                 mutex_init(&per_pin->lock);
2637                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2638                 eld_proc_new(per_pin, pin_idx);
2639         }
2640         return 0;
2641 }
2642
2643 static int generic_hdmi_init(struct hda_codec *codec)
2644 {
2645         struct hdmi_spec *spec = codec->spec;
2646         int pin_idx;
2647
2648         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2649                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2650                 hda_nid_t pin_nid = per_pin->pin_nid;
2651
2652                 hdmi_init_pin(codec, pin_nid);
2653                 if (!codec_has_acomp(codec))
2654                         snd_hda_jack_detect_enable_callback(codec, pin_nid,
2655                                 codec->jackpoll_interval > 0 ?
2656                                 jack_callback : NULL);
2657         }
2658         return 0;
2659 }
2660
2661 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2662 {
2663         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2664         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2665 }
2666
2667 static void hdmi_array_free(struct hdmi_spec *spec)
2668 {
2669         snd_array_free(&spec->pins);
2670         snd_array_free(&spec->cvts);
2671 }
2672
2673 static void generic_hdmi_free(struct hda_codec *codec)
2674 {
2675         struct hdmi_spec *spec = codec->spec;
2676         int pin_idx, pcm_idx;
2677
2678         if (codec_has_acomp(codec))
2679                 snd_hdac_i915_register_notifier(NULL);
2680
2681         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2682                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2683                 cancel_delayed_work_sync(&per_pin->work);
2684                 eld_proc_free(per_pin);
2685         }
2686
2687         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2688                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2689                         continue;
2690                 if (spec->dyn_pcm_assign)
2691                         snd_device_free(codec->card,
2692                                         spec->pcm_rec[pcm_idx].jack);
2693                 else
2694                         spec->pcm_rec[pcm_idx].jack = NULL;
2695         }
2696
2697         if (spec->i915_bound)
2698                 snd_hdac_i915_exit(&codec->bus->core);
2699         hdmi_array_free(spec);
2700         kfree(spec);
2701 }
2702
2703 #ifdef CONFIG_PM
2704 static int generic_hdmi_resume(struct hda_codec *codec)
2705 {
2706         struct hdmi_spec *spec = codec->spec;
2707         int pin_idx;
2708
2709         codec->patch_ops.init(codec);
2710         regcache_sync(codec->core.regmap);
2711
2712         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2713                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2714                 hdmi_present_sense(per_pin, 1);
2715         }
2716         return 0;
2717 }
2718 #endif
2719
2720 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2721         .init                   = generic_hdmi_init,
2722         .free                   = generic_hdmi_free,
2723         .build_pcms             = generic_hdmi_build_pcms,
2724         .build_controls         = generic_hdmi_build_controls,
2725         .unsol_event            = hdmi_unsol_event,
2726 #ifdef CONFIG_PM
2727         .resume                 = generic_hdmi_resume,
2728 #endif
2729 };
2730
2731 static const struct hdmi_ops generic_standard_hdmi_ops = {
2732         .pin_get_eld                            = snd_hdmi_get_eld,
2733         .pin_get_slot_channel                   = hdmi_pin_get_slot_channel,
2734         .pin_set_slot_channel                   = hdmi_pin_set_slot_channel,
2735         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2736         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2737         .setup_stream                           = hdmi_setup_stream,
2738         .chmap_cea_alloc_validate_get_type      = hdmi_chmap_cea_alloc_validate_get_type,
2739         .cea_alloc_to_tlv_chmap                 = hdmi_cea_alloc_to_tlv_chmap,
2740 };
2741
2742
2743 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2744                                              hda_nid_t nid)
2745 {
2746         struct hdmi_spec *spec = codec->spec;
2747         hda_nid_t conns[4];
2748         int nconns;
2749
2750         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2751         if (nconns == spec->num_cvts &&
2752             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2753                 return;
2754
2755         /* override pins connection list */
2756         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2757         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2758 }
2759
2760 #define INTEL_VENDOR_NID 0x08
2761 #define INTEL_GET_VENDOR_VERB 0xf81
2762 #define INTEL_SET_VENDOR_VERB 0x781
2763 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2764 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2765
2766 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2767                                           bool update_tree)
2768 {
2769         unsigned int vendor_param;
2770
2771         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2772                                 INTEL_GET_VENDOR_VERB, 0);
2773         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2774                 return;
2775
2776         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2777         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2778                                 INTEL_SET_VENDOR_VERB, vendor_param);
2779         if (vendor_param == -1)
2780                 return;
2781
2782         if (update_tree)
2783                 snd_hda_codec_update_widgets(codec);
2784 }
2785
2786 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2787 {
2788         unsigned int vendor_param;
2789
2790         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2791                                 INTEL_GET_VENDOR_VERB, 0);
2792         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2793                 return;
2794
2795         /* enable DP1.2 mode */
2796         vendor_param |= INTEL_EN_DP12;
2797         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2798         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2799                                 INTEL_SET_VENDOR_VERB, vendor_param);
2800 }
2801
2802 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2803  * Otherwise you may get severe h/w communication errors.
2804  */
2805 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2806                                 unsigned int power_state)
2807 {
2808         if (power_state == AC_PWRST_D0) {
2809                 intel_haswell_enable_all_pins(codec, false);
2810                 intel_haswell_fixup_enable_dp12(codec);
2811         }
2812
2813         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2814         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2815 }
2816
2817 static void intel_pin_eld_notify(void *audio_ptr, int port)
2818 {
2819         struct hda_codec *codec = audio_ptr;
2820         int pin_nid = port + 0x04;
2821
2822         /* skip notification during system suspend (but not in runtime PM);
2823          * the state will be updated at resume
2824          */
2825         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2826                 return;
2827         /* ditto during suspend/resume process itself */
2828         if (atomic_read(&(codec)->core.in_pm))
2829                 return;
2830
2831         check_presence_and_report(codec, pin_nid);
2832 }
2833
2834 static int patch_generic_hdmi(struct hda_codec *codec)
2835 {
2836         struct hdmi_spec *spec;
2837
2838         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2839         if (spec == NULL)
2840                 return -ENOMEM;
2841
2842         spec->ops = generic_standard_hdmi_ops;
2843         mutex_init(&spec->pcm_lock);
2844         codec->spec = spec;
2845         hdmi_array_init(spec, 4);
2846
2847         /* Try to bind with i915 for any Intel codecs (if not done yet) */
2848         if (!codec_has_acomp(codec) &&
2849             (codec->core.vendor_id >> 16) == 0x8086)
2850                 if (!snd_hdac_i915_init(&codec->bus->core))
2851                         spec->i915_bound = true;
2852
2853         if (is_haswell_plus(codec)) {
2854                 intel_haswell_enable_all_pins(codec, true);
2855                 intel_haswell_fixup_enable_dp12(codec);
2856         }
2857
2858         /* For Valleyview/Cherryview, only the display codec is in the display
2859          * power well and can use link_power ops to request/release the power.
2860          * For Haswell/Broadwell, the controller is also in the power well and
2861          * can cover the codec power request, and so need not set this flag.
2862          * For previous platforms, there is no such power well feature.
2863          */
2864         if (is_valleyview_plus(codec) || is_skylake(codec) ||
2865                         is_broxton(codec))
2866                 codec->core.link_power_control = 1;
2867
2868         if (codec_has_acomp(codec)) {
2869                 codec->depop_delay = 0;
2870                 spec->i915_audio_ops.audio_ptr = codec;
2871                 spec->i915_audio_ops.pin_eld_notify = intel_pin_eld_notify;
2872                 snd_hdac_i915_register_notifier(&spec->i915_audio_ops);
2873         }
2874
2875         if (hdmi_parse_codec(codec) < 0) {
2876                 if (spec->i915_bound)
2877                         snd_hdac_i915_exit(&codec->bus->core);
2878                 codec->spec = NULL;
2879                 kfree(spec);
2880                 return -EINVAL;
2881         }
2882         codec->patch_ops = generic_hdmi_patch_ops;
2883         if (is_haswell_plus(codec)) {
2884                 codec->patch_ops.set_power_state = haswell_set_power_state;
2885                 codec->dp_mst = true;
2886         }
2887
2888         /* Enable runtime pm for HDMI audio codec of HSW/BDW/SKL/BYT/BSW */
2889         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
2890                 codec->auto_runtime_pm = 1;
2891
2892         generic_hdmi_init_per_pins(codec);
2893
2894         init_channel_allocations();
2895
2896         WARN_ON(spec->dyn_pcm_assign && !codec_has_acomp(codec));
2897         return 0;
2898 }
2899
2900 /*
2901  * Shared non-generic implementations
2902  */
2903
2904 static int simple_playback_build_pcms(struct hda_codec *codec)
2905 {
2906         struct hdmi_spec *spec = codec->spec;
2907         struct hda_pcm *info;
2908         unsigned int chans;
2909         struct hda_pcm_stream *pstr;
2910         struct hdmi_spec_per_cvt *per_cvt;
2911
2912         per_cvt = get_cvt(spec, 0);
2913         chans = get_wcaps(codec, per_cvt->cvt_nid);
2914         chans = get_wcaps_channels(chans);
2915
2916         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2917         if (!info)
2918                 return -ENOMEM;
2919         spec->pcm_rec[0].pcm = info;
2920         info->pcm_type = HDA_PCM_TYPE_HDMI;
2921         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2922         *pstr = spec->pcm_playback;
2923         pstr->nid = per_cvt->cvt_nid;
2924         if (pstr->channels_max <= 2 && chans && chans <= 16)
2925                 pstr->channels_max = chans;
2926
2927         return 0;
2928 }
2929
2930 /* unsolicited event for jack sensing */
2931 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2932                                     unsigned int res)
2933 {
2934         snd_hda_jack_set_dirty_all(codec);
2935         snd_hda_jack_report_sync(codec);
2936 }
2937
2938 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2939  * as long as spec->pins[] is set correctly
2940  */
2941 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2942
2943 static int simple_playback_build_controls(struct hda_codec *codec)
2944 {
2945         struct hdmi_spec *spec = codec->spec;
2946         struct hdmi_spec_per_cvt *per_cvt;
2947         int err;
2948
2949         per_cvt = get_cvt(spec, 0);
2950         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2951                                           per_cvt->cvt_nid,
2952                                           HDA_PCM_TYPE_HDMI);
2953         if (err < 0)
2954                 return err;
2955         return simple_hdmi_build_jack(codec, 0);
2956 }
2957
2958 static int simple_playback_init(struct hda_codec *codec)
2959 {
2960         struct hdmi_spec *spec = codec->spec;
2961         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2962         hda_nid_t pin = per_pin->pin_nid;
2963
2964         snd_hda_codec_write(codec, pin, 0,
2965                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2966         /* some codecs require to unmute the pin */
2967         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2968                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2969                                     AMP_OUT_UNMUTE);
2970         snd_hda_jack_detect_enable(codec, pin);
2971         return 0;
2972 }
2973
2974 static void simple_playback_free(struct hda_codec *codec)
2975 {
2976         struct hdmi_spec *spec = codec->spec;
2977
2978         hdmi_array_free(spec);
2979         kfree(spec);
2980 }
2981
2982 /*
2983  * Nvidia specific implementations
2984  */
2985
2986 #define Nv_VERB_SET_Channel_Allocation          0xF79
2987 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2988 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2989 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2990
2991 #define nvhdmi_master_con_nid_7x        0x04
2992 #define nvhdmi_master_pin_nid_7x        0x05
2993
2994 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2995         /*front, rear, clfe, rear_surr */
2996         0x6, 0x8, 0xa, 0xc,
2997 };
2998
2999 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
3000         /* set audio protect on */
3001         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3002         /* enable digital output on pin widget */
3003         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3004         {} /* terminator */
3005 };
3006
3007 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
3008         /* set audio protect on */
3009         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3010         /* enable digital output on pin widget */
3011         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3012         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3013         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3014         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3015         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3016         {} /* terminator */
3017 };
3018
3019 #ifdef LIMITED_RATE_FMT_SUPPORT
3020 /* support only the safe format and rate */
3021 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
3022 #define SUPPORTED_MAXBPS        16
3023 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
3024 #else
3025 /* support all rates and formats */
3026 #define SUPPORTED_RATES \
3027         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
3028         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
3029          SNDRV_PCM_RATE_192000)
3030 #define SUPPORTED_MAXBPS        24
3031 #define SUPPORTED_FORMATS \
3032         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
3033 #endif
3034
3035 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
3036 {
3037         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
3038         return 0;
3039 }
3040
3041 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
3042 {
3043         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
3044         return 0;
3045 }
3046
3047 static unsigned int channels_2_6_8[] = {
3048         2, 6, 8
3049 };
3050
3051 static unsigned int channels_2_8[] = {
3052         2, 8
3053 };
3054
3055 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
3056         .count = ARRAY_SIZE(channels_2_6_8),
3057         .list = channels_2_6_8,
3058         .mask = 0,
3059 };
3060
3061 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
3062         .count = ARRAY_SIZE(channels_2_8),
3063         .list = channels_2_8,
3064         .mask = 0,
3065 };
3066
3067 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
3068                                     struct hda_codec *codec,
3069                                     struct snd_pcm_substream *substream)
3070 {
3071         struct hdmi_spec *spec = codec->spec;
3072         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
3073
3074         switch (codec->preset->vendor_id) {
3075         case 0x10de0002:
3076         case 0x10de0003:
3077         case 0x10de0005:
3078         case 0x10de0006:
3079                 hw_constraints_channels = &hw_constraints_2_8_channels;
3080                 break;
3081         case 0x10de0007:
3082                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
3083                 break;
3084         default:
3085                 break;
3086         }
3087
3088         if (hw_constraints_channels != NULL) {
3089                 snd_pcm_hw_constraint_list(substream->runtime, 0,
3090                                 SNDRV_PCM_HW_PARAM_CHANNELS,
3091                                 hw_constraints_channels);
3092         } else {
3093                 snd_pcm_hw_constraint_step(substream->runtime, 0,
3094                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
3095         }
3096
3097         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3098 }
3099
3100 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
3101                                      struct hda_codec *codec,
3102                                      struct snd_pcm_substream *substream)
3103 {
3104         struct hdmi_spec *spec = codec->spec;
3105         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3106 }
3107
3108 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3109                                        struct hda_codec *codec,
3110                                        unsigned int stream_tag,
3111                                        unsigned int format,
3112                                        struct snd_pcm_substream *substream)
3113 {
3114         struct hdmi_spec *spec = codec->spec;
3115         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3116                                              stream_tag, format, substream);
3117 }
3118
3119 static const struct hda_pcm_stream simple_pcm_playback = {
3120         .substreams = 1,
3121         .channels_min = 2,
3122         .channels_max = 2,
3123         .ops = {
3124                 .open = simple_playback_pcm_open,
3125                 .close = simple_playback_pcm_close,
3126                 .prepare = simple_playback_pcm_prepare
3127         },
3128 };
3129
3130 static const struct hda_codec_ops simple_hdmi_patch_ops = {
3131         .build_controls = simple_playback_build_controls,
3132         .build_pcms = simple_playback_build_pcms,
3133         .init = simple_playback_init,
3134         .free = simple_playback_free,
3135         .unsol_event = simple_hdmi_unsol_event,
3136 };
3137
3138 static int patch_simple_hdmi(struct hda_codec *codec,
3139                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
3140 {
3141         struct hdmi_spec *spec;
3142         struct hdmi_spec_per_cvt *per_cvt;
3143         struct hdmi_spec_per_pin *per_pin;
3144
3145         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3146         if (!spec)
3147                 return -ENOMEM;
3148
3149         codec->spec = spec;
3150         hdmi_array_init(spec, 1);
3151
3152         spec->multiout.num_dacs = 0;  /* no analog */
3153         spec->multiout.max_channels = 2;
3154         spec->multiout.dig_out_nid = cvt_nid;
3155         spec->num_cvts = 1;
3156         spec->num_pins = 1;
3157         per_pin = snd_array_new(&spec->pins);
3158         per_cvt = snd_array_new(&spec->cvts);
3159         if (!per_pin || !per_cvt) {
3160                 simple_playback_free(codec);
3161                 return -ENOMEM;
3162         }
3163         per_cvt->cvt_nid = cvt_nid;
3164         per_pin->pin_nid = pin_nid;
3165         spec->pcm_playback = simple_pcm_playback;
3166
3167         codec->patch_ops = simple_hdmi_patch_ops;
3168
3169         return 0;
3170 }
3171
3172 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3173                                                     int channels)
3174 {
3175         unsigned int chanmask;
3176         int chan = channels ? (channels - 1) : 1;
3177
3178         switch (channels) {
3179         default:
3180         case 0:
3181         case 2:
3182                 chanmask = 0x00;
3183                 break;
3184         case 4:
3185                 chanmask = 0x08;
3186                 break;
3187         case 6:
3188                 chanmask = 0x0b;
3189                 break;
3190         case 8:
3191                 chanmask = 0x13;
3192                 break;
3193         }
3194
3195         /* Set the audio infoframe channel allocation and checksum fields.  The
3196          * channel count is computed implicitly by the hardware. */
3197         snd_hda_codec_write(codec, 0x1, 0,
3198                         Nv_VERB_SET_Channel_Allocation, chanmask);
3199
3200         snd_hda_codec_write(codec, 0x1, 0,
3201                         Nv_VERB_SET_Info_Frame_Checksum,
3202                         (0x71 - chan - chanmask));
3203 }
3204
3205 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3206                                    struct hda_codec *codec,
3207                                    struct snd_pcm_substream *substream)
3208 {
3209         struct hdmi_spec *spec = codec->spec;
3210         int i;
3211
3212         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3213                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3214         for (i = 0; i < 4; i++) {
3215                 /* set the stream id */
3216                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3217                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
3218                 /* set the stream format */
3219                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3220                                 AC_VERB_SET_STREAM_FORMAT, 0);
3221         }
3222
3223         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3224          * streams are disabled. */
3225         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3226
3227         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3228 }
3229
3230 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3231                                      struct hda_codec *codec,
3232                                      unsigned int stream_tag,
3233                                      unsigned int format,
3234                                      struct snd_pcm_substream *substream)
3235 {
3236         int chs;
3237         unsigned int dataDCC2, channel_id;
3238         int i;
3239         struct hdmi_spec *spec = codec->spec;
3240         struct hda_spdif_out *spdif;
3241         struct hdmi_spec_per_cvt *per_cvt;
3242
3243         mutex_lock(&codec->spdif_mutex);
3244         per_cvt = get_cvt(spec, 0);
3245         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3246
3247         chs = substream->runtime->channels;
3248
3249         dataDCC2 = 0x2;
3250
3251         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3252         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3253                 snd_hda_codec_write(codec,
3254                                 nvhdmi_master_con_nid_7x,
3255                                 0,
3256                                 AC_VERB_SET_DIGI_CONVERT_1,
3257                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3258
3259         /* set the stream id */
3260         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3261                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3262
3263         /* set the stream format */
3264         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3265                         AC_VERB_SET_STREAM_FORMAT, format);
3266
3267         /* turn on again (if needed) */
3268         /* enable and set the channel status audio/data flag */
3269         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3270                 snd_hda_codec_write(codec,
3271                                 nvhdmi_master_con_nid_7x,
3272                                 0,
3273                                 AC_VERB_SET_DIGI_CONVERT_1,
3274                                 spdif->ctls & 0xff);
3275                 snd_hda_codec_write(codec,
3276                                 nvhdmi_master_con_nid_7x,
3277                                 0,
3278                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3279         }
3280
3281         for (i = 0; i < 4; i++) {
3282                 if (chs == 2)
3283                         channel_id = 0;
3284                 else
3285                         channel_id = i * 2;
3286
3287                 /* turn off SPDIF once;
3288                  *otherwise the IEC958 bits won't be updated
3289                  */
3290                 if (codec->spdif_status_reset &&
3291                 (spdif->ctls & AC_DIG1_ENABLE))
3292                         snd_hda_codec_write(codec,
3293                                 nvhdmi_con_nids_7x[i],
3294                                 0,
3295                                 AC_VERB_SET_DIGI_CONVERT_1,
3296                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3297                 /* set the stream id */
3298                 snd_hda_codec_write(codec,
3299                                 nvhdmi_con_nids_7x[i],
3300                                 0,
3301                                 AC_VERB_SET_CHANNEL_STREAMID,
3302                                 (stream_tag << 4) | channel_id);
3303                 /* set the stream format */
3304                 snd_hda_codec_write(codec,
3305                                 nvhdmi_con_nids_7x[i],
3306                                 0,
3307                                 AC_VERB_SET_STREAM_FORMAT,
3308                                 format);
3309                 /* turn on again (if needed) */
3310                 /* enable and set the channel status audio/data flag */
3311                 if (codec->spdif_status_reset &&
3312                 (spdif->ctls & AC_DIG1_ENABLE)) {
3313                         snd_hda_codec_write(codec,
3314                                         nvhdmi_con_nids_7x[i],
3315                                         0,
3316                                         AC_VERB_SET_DIGI_CONVERT_1,
3317                                         spdif->ctls & 0xff);
3318                         snd_hda_codec_write(codec,
3319                                         nvhdmi_con_nids_7x[i],
3320                                         0,
3321                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3322                 }
3323         }
3324
3325         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3326
3327         mutex_unlock(&codec->spdif_mutex);
3328         return 0;
3329 }
3330
3331 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3332         .substreams = 1,
3333         .channels_min = 2,
3334         .channels_max = 8,
3335         .nid = nvhdmi_master_con_nid_7x,
3336         .rates = SUPPORTED_RATES,
3337         .maxbps = SUPPORTED_MAXBPS,
3338         .formats = SUPPORTED_FORMATS,
3339         .ops = {
3340                 .open = simple_playback_pcm_open,
3341                 .close = nvhdmi_8ch_7x_pcm_close,
3342                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3343         },
3344 };
3345
3346 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3347 {
3348         struct hdmi_spec *spec;
3349         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3350                                     nvhdmi_master_pin_nid_7x);
3351         if (err < 0)
3352                 return err;
3353
3354         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3355         /* override the PCM rates, etc, as the codec doesn't give full list */
3356         spec = codec->spec;
3357         spec->pcm_playback.rates = SUPPORTED_RATES;
3358         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3359         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3360         return 0;
3361 }
3362
3363 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3364 {
3365         struct hdmi_spec *spec = codec->spec;
3366         int err = simple_playback_build_pcms(codec);
3367         if (!err) {
3368                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3369                 info->own_chmap = true;
3370         }
3371         return err;
3372 }
3373
3374 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3375 {
3376         struct hdmi_spec *spec = codec->spec;
3377         struct hda_pcm *info;
3378         struct snd_pcm_chmap *chmap;
3379         int err;
3380
3381         err = simple_playback_build_controls(codec);
3382         if (err < 0)
3383                 return err;
3384
3385         /* add channel maps */
3386         info = get_pcm_rec(spec, 0);
3387         err = snd_pcm_add_chmap_ctls(info->pcm,
3388                                      SNDRV_PCM_STREAM_PLAYBACK,
3389                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3390         if (err < 0)
3391                 return err;
3392         switch (codec->preset->vendor_id) {
3393         case 0x10de0002:
3394         case 0x10de0003:
3395         case 0x10de0005:
3396         case 0x10de0006:
3397                 chmap->channel_mask = (1U << 2) | (1U << 8);
3398                 break;
3399         case 0x10de0007:
3400                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3401         }
3402         return 0;
3403 }
3404
3405 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3406 {
3407         struct hdmi_spec *spec;
3408         int err = patch_nvhdmi_2ch(codec);
3409         if (err < 0)
3410                 return err;
3411         spec = codec->spec;
3412         spec->multiout.max_channels = 8;
3413         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3414         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3415         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3416         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3417
3418         /* Initialize the audio infoframe channel mask and checksum to something
3419          * valid */
3420         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3421
3422         return 0;
3423 }
3424
3425 /*
3426  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3427  * - 0x10de0015
3428  * - 0x10de0040
3429  */
3430 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3431                                                     int channels)
3432 {
3433         if (cap->ca_index == 0x00 && channels == 2)
3434                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3435
3436         return hdmi_chmap_cea_alloc_validate_get_type(cap, channels);
3437 }
3438
3439 static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map)
3440 {
3441         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3442                 return -EINVAL;
3443
3444         return 0;
3445 }
3446
3447 static int patch_nvhdmi(struct hda_codec *codec)
3448 {
3449         struct hdmi_spec *spec;
3450         int err;
3451
3452         err = patch_generic_hdmi(codec);
3453         if (err)
3454                 return err;
3455
3456         spec = codec->spec;
3457         spec->dyn_pin_out = true;
3458
3459         spec->ops.chmap_cea_alloc_validate_get_type =
3460                 nvhdmi_chmap_cea_alloc_validate_get_type;
3461         spec->ops.chmap_validate = nvhdmi_chmap_validate;
3462
3463         return 0;
3464 }
3465
3466 /*
3467  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3468  * accessed using vendor-defined verbs. These registers can be used for
3469  * interoperability between the HDA and HDMI drivers.
3470  */
3471
3472 /* Audio Function Group node */
3473 #define NVIDIA_AFG_NID 0x01
3474
3475 /*
3476  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3477  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3478  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3479  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3480  * additional bit (at position 30) to signal the validity of the format.
3481  *
3482  * | 31      | 30    | 29  16 | 15   0 |
3483  * +---------+-------+--------+--------+
3484  * | TRIGGER | VALID | UNUSED | FORMAT |
3485  * +-----------------------------------|
3486  *
3487  * Note that for the trigger bit to take effect it needs to change value
3488  * (i.e. it needs to be toggled).
3489  */
3490 #define NVIDIA_GET_SCRATCH0             0xfa6
3491 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3492 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3493 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3494 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3495 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3496 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3497
3498 #define NVIDIA_GET_SCRATCH1             0xfab
3499 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3500 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3501 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3502 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3503
3504 /*
3505  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3506  * the format is invalidated so that the HDMI codec can be disabled.
3507  */
3508 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3509 {
3510         unsigned int value;
3511
3512         /* bits [31:30] contain the trigger and valid bits */
3513         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3514                                    NVIDIA_GET_SCRATCH0, 0);
3515         value = (value >> 24) & 0xff;
3516
3517         /* bits [15:0] are used to store the HDA format */
3518         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3519                             NVIDIA_SET_SCRATCH0_BYTE0,
3520                             (format >> 0) & 0xff);
3521         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3522                             NVIDIA_SET_SCRATCH0_BYTE1,
3523                             (format >> 8) & 0xff);
3524
3525         /* bits [16:24] are unused */
3526         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3527                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3528
3529         /*
3530          * Bit 30 signals that the data is valid and hence that HDMI audio can
3531          * be enabled.
3532          */
3533         if (format == 0)
3534                 value &= ~NVIDIA_SCRATCH_VALID;
3535         else
3536                 value |= NVIDIA_SCRATCH_VALID;
3537
3538         /*
3539          * Whenever the trigger bit is toggled, an interrupt is raised in the
3540          * HDMI codec. The HDMI driver will use that as trigger to update its
3541          * configuration.
3542          */
3543         value ^= NVIDIA_SCRATCH_TRIGGER;
3544
3545         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3546                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3547 }
3548
3549 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3550                                   struct hda_codec *codec,
3551                                   unsigned int stream_tag,
3552                                   unsigned int format,
3553                                   struct snd_pcm_substream *substream)
3554 {
3555         int err;
3556
3557         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3558                                                 format, substream);
3559         if (err < 0)
3560                 return err;
3561
3562         /* notify the HDMI codec of the format change */
3563         tegra_hdmi_set_format(codec, format);
3564
3565         return 0;
3566 }
3567
3568 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3569                                   struct hda_codec *codec,
3570                                   struct snd_pcm_substream *substream)
3571 {
3572         /* invalidate the format in the HDMI codec */
3573         tegra_hdmi_set_format(codec, 0);
3574
3575         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3576 }
3577
3578 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3579 {
3580         struct hdmi_spec *spec = codec->spec;
3581         unsigned int i;
3582
3583         for (i = 0; i < spec->num_pins; i++) {
3584                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3585
3586                 if (pcm->pcm_type == type)
3587                         return pcm;
3588         }
3589
3590         return NULL;
3591 }
3592
3593 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3594 {
3595         struct hda_pcm_stream *stream;
3596         struct hda_pcm *pcm;
3597         int err;
3598
3599         err = generic_hdmi_build_pcms(codec);
3600         if (err < 0)
3601                 return err;
3602
3603         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3604         if (!pcm)
3605                 return -ENODEV;
3606
3607         /*
3608          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3609          * codec about format changes.
3610          */
3611         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3612         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3613         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3614
3615         return 0;
3616 }
3617
3618 static int patch_tegra_hdmi(struct hda_codec *codec)
3619 {
3620         int err;
3621
3622         err = patch_generic_hdmi(codec);
3623         if (err)
3624                 return err;
3625
3626         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3627
3628         return 0;
3629 }
3630
3631 /*
3632  * ATI/AMD-specific implementations
3633  */
3634
3635 #define is_amdhdmi_rev3_or_later(codec) \
3636         ((codec)->core.vendor_id == 0x1002aa01 && \
3637          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3638 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3639
3640 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3641 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3642 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3643 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3644 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3645 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3646 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3647 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3648 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3649 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3650 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3651 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3652 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3653 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3654 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3655 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3656 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3657 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3658 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3659 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3660 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3661 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3662 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3663 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3664 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3665
3666 /* AMD specific HDA cvt verbs */
3667 #define ATI_VERB_SET_RAMP_RATE          0x770
3668 #define ATI_VERB_GET_RAMP_RATE          0xf70
3669
3670 #define ATI_OUT_ENABLE 0x1
3671
3672 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3673 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3674
3675 #define ATI_HBR_CAPABLE 0x01
3676 #define ATI_HBR_ENABLE 0x10
3677
3678 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3679                            unsigned char *buf, int *eld_size)
3680 {
3681         /* call hda_eld.c ATI/AMD-specific function */
3682         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3683                                     is_amdhdmi_rev3_or_later(codec));
3684 }
3685
3686 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
3687                                         int active_channels, int conn_type)
3688 {
3689         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3690 }
3691
3692 static int atihdmi_paired_swap_fc_lfe(int pos)
3693 {
3694         /*
3695          * ATI/AMD have automatic FC/LFE swap built-in
3696          * when in pairwise mapping mode.
3697          */
3698
3699         switch (pos) {
3700                 /* see channel_allocations[].speakers[] */
3701                 case 2: return 3;
3702                 case 3: return 2;
3703                 default: break;
3704         }
3705
3706         return pos;
3707 }
3708
3709 static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
3710 {
3711         struct cea_channel_speaker_allocation *cap;
3712         int i, j;
3713
3714         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3715
3716         cap = &channel_allocations[get_channel_allocation_order(ca)];
3717         for (i = 0; i < chs; ++i) {
3718                 int mask = to_spk_mask(map[i]);
3719                 bool ok = false;
3720                 bool companion_ok = false;
3721
3722                 if (!mask)
3723                         continue;
3724
3725                 for (j = 0 + i % 2; j < 8; j += 2) {
3726                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3727                         if (cap->speakers[chan_idx] == mask) {
3728                                 /* channel is in a supported position */
3729                                 ok = true;
3730
3731                                 if (i % 2 == 0 && i + 1 < chs) {
3732                                         /* even channel, check the odd companion */
3733                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3734                                         int comp_mask_req = to_spk_mask(map[i+1]);
3735                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3736
3737                                         if (comp_mask_req == comp_mask_act)
3738                                                 companion_ok = true;
3739                                         else
3740                                                 return -EINVAL;
3741                                 }
3742                                 break;
3743                         }
3744                 }
3745
3746                 if (!ok)
3747                         return -EINVAL;
3748
3749                 if (companion_ok)
3750                         i++; /* companion channel already checked */
3751         }
3752
3753         return 0;
3754 }
3755
3756 static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3757                                         int hdmi_slot, int stream_channel)
3758 {
3759         int verb;
3760         int ati_channel_setup = 0;
3761
3762         if (hdmi_slot > 7)
3763                 return -EINVAL;
3764
3765         if (!has_amd_full_remap_support(codec)) {
3766                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3767
3768                 /* In case this is an odd slot but without stream channel, do not
3769                  * disable the slot since the corresponding even slot could have a
3770                  * channel. In case neither have a channel, the slot pair will be
3771                  * disabled when this function is called for the even slot. */
3772                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3773                         return 0;
3774
3775                 hdmi_slot -= hdmi_slot % 2;
3776
3777                 if (stream_channel != 0xf)
3778                         stream_channel -= stream_channel % 2;
3779         }
3780
3781         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3782
3783         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3784
3785         if (stream_channel != 0xf)
3786                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3787
3788         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3789 }
3790
3791 static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3792                                         int asp_slot)
3793 {
3794         bool was_odd = false;
3795         int ati_asp_slot = asp_slot;
3796         int verb;
3797         int ati_channel_setup;
3798
3799         if (asp_slot > 7)
3800                 return -EINVAL;
3801
3802         if (!has_amd_full_remap_support(codec)) {
3803                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3804                 if (ati_asp_slot % 2 != 0) {
3805                         ati_asp_slot -= 1;
3806                         was_odd = true;
3807                 }
3808         }
3809
3810         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3811
3812         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3813
3814         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3815                 return 0xf;
3816
3817         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3818 }
3819
3820 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3821                                                             int channels)
3822 {
3823         int c;
3824
3825         /*
3826          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3827          * we need to take that into account (a single channel may take 2
3828          * channel slots if we need to carry a silent channel next to it).
3829          * On Rev3+ AMD codecs this function is not used.
3830          */
3831         int chanpairs = 0;
3832
3833         /* We only produce even-numbered channel count TLVs */
3834         if ((channels % 2) != 0)
3835                 return -1;
3836
3837         for (c = 0; c < 7; c += 2) {
3838                 if (cap->speakers[c] || cap->speakers[c+1])
3839                         chanpairs++;
3840         }
3841
3842         if (chanpairs * 2 != channels)
3843                 return -1;
3844
3845         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3846 }
3847
3848 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
3849                                                   unsigned int *chmap, int channels)
3850 {
3851         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3852         int count = 0;
3853         int c;
3854
3855         for (c = 7; c >= 0; c--) {
3856                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3857                 int spk = cap->speakers[chan];
3858                 if (!spk) {
3859                         /* add N/A channel if the companion channel is occupied */
3860                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3861                                 chmap[count++] = SNDRV_CHMAP_NA;
3862
3863                         continue;
3864                 }
3865
3866                 chmap[count++] = spk_to_chmap(spk);
3867         }
3868
3869         WARN_ON(count != channels);
3870 }
3871
3872 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3873                                  bool hbr)
3874 {
3875         int hbr_ctl, hbr_ctl_new;
3876
3877         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3878         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3879                 if (hbr)
3880                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3881                 else
3882                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3883
3884                 codec_dbg(codec,
3885                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3886                                 pin_nid,
3887                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3888                                 hbr_ctl_new);
3889
3890                 if (hbr_ctl != hbr_ctl_new)
3891                         snd_hda_codec_write(codec, pin_nid, 0,
3892                                                 ATI_VERB_SET_HBR_CONTROL,
3893                                                 hbr_ctl_new);
3894
3895         } else if (hbr)
3896                 return -EINVAL;
3897
3898         return 0;
3899 }
3900
3901 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3902                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3903 {
3904
3905         if (is_amdhdmi_rev3_or_later(codec)) {
3906                 int ramp_rate = 180; /* default as per AMD spec */
3907                 /* disable ramp-up/down for non-pcm as per AMD spec */
3908                 if (format & AC_FMT_TYPE_NON_PCM)
3909                         ramp_rate = 0;
3910
3911                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3912         }
3913
3914         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3915 }
3916
3917
3918 static int atihdmi_init(struct hda_codec *codec)
3919 {
3920         struct hdmi_spec *spec = codec->spec;
3921         int pin_idx, err;
3922
3923         err = generic_hdmi_init(codec);
3924
3925         if (err)
3926                 return err;
3927
3928         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3929                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3930
3931                 /* make sure downmix information in infoframe is zero */
3932                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3933
3934                 /* enable channel-wise remap mode if supported */
3935                 if (has_amd_full_remap_support(codec))
3936                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3937                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3938                                             ATI_MULTICHANNEL_MODE_SINGLE);
3939         }
3940
3941         return 0;
3942 }
3943
3944 static int patch_atihdmi(struct hda_codec *codec)
3945 {
3946         struct hdmi_spec *spec;
3947         struct hdmi_spec_per_cvt *per_cvt;
3948         int err, cvt_idx;
3949
3950         err = patch_generic_hdmi(codec);
3951
3952         if (err)
3953                 return err;
3954
3955         codec->patch_ops.init = atihdmi_init;
3956
3957         spec = codec->spec;
3958
3959         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3960         spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3961         spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3962         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3963         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3964         spec->ops.setup_stream = atihdmi_setup_stream;
3965
3966         if (!has_amd_full_remap_support(codec)) {
3967                 /* override to ATI/AMD-specific versions with pairwise mapping */
3968                 spec->ops.chmap_cea_alloc_validate_get_type =
3969                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3970                 spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
3971                 spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
3972         }
3973
3974         /* ATI/AMD converters do not advertise all of their capabilities */
3975         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3976                 per_cvt = get_cvt(spec, cvt_idx);
3977                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3978                 per_cvt->rates |= SUPPORTED_RATES;
3979                 per_cvt->formats |= SUPPORTED_FORMATS;
3980                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3981         }
3982
3983         spec->channels_max = max(spec->channels_max, 8u);
3984
3985         return 0;
3986 }
3987
3988 /* VIA HDMI Implementation */
3989 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3990 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3991
3992 static int patch_via_hdmi(struct hda_codec *codec)
3993 {
3994         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3995 }
3996
3997 /*
3998  * patch entries
3999  */
4000 static const struct hda_device_id snd_hda_id_hdmi[] = {
4001 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
4002 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
4003 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
4004 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
4005 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
4006 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
4007 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
4008 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4009 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4010 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4011 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4012 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
4013 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi),
4014 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi),
4015 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi),
4016 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi),
4017 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi),
4018 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi),
4019 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi),
4020 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi),
4021 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi),
4022 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi),
4023 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi),
4024 /* 17 is known to be absent */
4025 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi),
4026 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi),
4027 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi),
4028 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi),
4029 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi),
4030 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
4031 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
4032 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
4033 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
4034 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
4035 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
4036 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
4037 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
4038 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
4039 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
4040 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
4041 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
4042 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
4043 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
4044 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
4045 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
4046 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4047 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
4048 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
4049 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
4050 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
4051 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_generic_hdmi),
4052 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
4053 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
4054 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
4055 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_generic_hdmi),
4056 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_generic_hdmi),
4057 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_generic_hdmi),
4058 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_generic_hdmi),
4059 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_generic_hdmi),
4060 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_generic_hdmi),
4061 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_generic_hdmi),
4062 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_generic_hdmi),
4063 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
4064 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_generic_hdmi),
4065 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_generic_hdmi),
4066 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
4067 /* special ID for generic HDMI */
4068 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
4069 {} /* terminator */
4070 };
4071 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
4072
4073 MODULE_LICENSE("GPL");
4074 MODULE_DESCRIPTION("HDMI HD-audio codec");
4075 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4076 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4077 MODULE_ALIAS("snd-hda-codec-atihdmi");
4078
4079 static struct hda_codec_driver hdmi_driver = {
4080         .id = snd_hda_id_hdmi,
4081 };
4082
4083 module_hda_codec_driver(hdmi_driver);