sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  10  *
  11  *  Authors:
  12  *                      Wu Fengguang <wfg@linux.intel.com>
  13  *
  14  *  Maintained by:
  15  *                      Wu Fengguang <wfg@linux.intel.com>
  16  *
  17  *  This program is free software; you can redistribute it and/or modify it
  18  *  under the terms of the GNU General Public License as published by the Free
  19  *  Software Foundation; either version 2 of the License, or (at your option)
  20  *  any later version.
  21  *
  22  *  This program is distributed in the hope that it will be useful, but
  23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  25  *  for more details.
  26  *
  27  *  You should have received a copy of the GNU General Public License
  28  *  along with this program; if not, write to the Free Software Foundation,
  29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  30  */
  31
  32 #include <linux/init.h>
  33 #include <linux/delay.h>
  34 #include <linux/slab.h>
  35 #include <linux/module.h>
  36 #include <sound/core.h>
  37 #include <sound/jack.h>
  38 #include <sound/asoundef.h>
  39 #include <sound/tlv.h>
  40 #include <sound/hdaudio.h>
  41 #include <sound/hda_i915.h>
  42 #include "hda_codec.h"
  43 #include "hda_local.h"
  44 #include "hda_jack.h"
  45
  46 static bool static_hdmi_pcm;
  47 module_param(static_hdmi_pcm, bool, 0644);
  48 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  49
  50 #define is_haswell(codec)  ((codec)->core.vendor_id == 0x80862807)
  51 #define is_broadwell(codec)    ((codec)->core.vendor_id == 0x80862808)
  52 #define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
  53 #define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
  54 #define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
  55 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
  56                                 || is_skylake(codec) || is_broxton(codec) \
  57                                 || is_kabylake(codec))
  58
  59 #define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
  60 #define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
  61 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
  62
  63 struct hdmi_spec_per_cvt {
  64         hda_nid_t cvt_nid;
  65         int assigned;
  66         unsigned int channels_min;
  67         unsigned int channels_max;
  68         u32 rates;
  69         u64 formats;
  70         unsigned int maxbps;
  71 };
  72
  73 /* max. connections to a widget */
  74 #define HDA_MAX_CONNECTIONS     32
  75
  76 struct hdmi_spec_per_pin {
  77         hda_nid_t pin_nid;
  78         /* pin idx, different device entries on the same pin use the same idx */
  79         int pin_nid_idx;
  80         int num_mux_nids;
  81         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  82         int mux_idx;
  83         hda_nid_t cvt_nid;
  84
  85         struct hda_codec *codec;
  86         struct hdmi_eld sink_eld;
  87         struct mutex lock;
  88         struct delayed_work work;
  89         struct snd_kcontrol *eld_ctl;
  90         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  91         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  92         int repoll_count;
  93         bool setup; /* the stream has been set up by prepare callback */
  94         int channels; /* current number of channels */
  95         bool non_pcm;
  96         bool chmap_set;         /* channel-map override by ALSA API? */
  97         unsigned char chmap[8]; /* ALSA API channel-map */
  98 #ifdef CONFIG_SND_PROC_FS
  99         struct snd_info_entry *proc_entry;
 100 #endif
 101 };
 102
 103 struct cea_channel_speaker_allocation;
 104
 105 /* operations used by generic code that can be overridden by patches */
 106 struct hdmi_ops {
 107         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
 108                            unsigned char *buf, int *eld_size);
 109
 110         /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
 111         int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 112                                     int asp_slot);
 113         int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 114                                     int asp_slot, int channel);
 115
 116         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 117                                     int ca, int active_channels, int conn_type);
 118
 119         /* enable/disable HBR (HD passthrough) */
 120         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 121
 122         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 123                             hda_nid_t pin_nid, u32 stream_tag, int format);
 124
 125         /* Helpers for producing the channel map TLVs. These can be overridden
 126          * for devices that have non-standard mapping requirements. */
 127         int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
 128                                                  int channels);
 129         void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
 130                                        unsigned int *chmap, int channels);
 131
 132         /* check that the user-given chmap is supported */
 133         int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
 134 };
 135
 136 struct hdmi_pcm {
 137         struct hda_pcm *pcm;
 138         struct snd_jack *jack;
 139 };
 140
 141 struct hdmi_spec {
 142         int num_cvts;
 143         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 144         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 145
 146         int num_pins;
 147         struct snd_array pins; /* struct hdmi_spec_per_pin */
 148         struct hdmi_pcm pcm_rec[16];
 149         struct mutex pcm_lock;
 150         /* pcm_bitmap means which pcms have been assigned to pins*/
 151         unsigned long pcm_bitmap;
 152         int pcm_used;   /* counter of pcm_rec[] */
 153         /* bitmap shows whether the pcm is opened in user space
 154          * bit 0 means the first playback PCM (PCM3);
 155          * bit 1 means the second playback PCM, and so on.
 156          */
 157         unsigned long pcm_in_use;
 158         unsigned int channels_max; /* max over all cvts */
 159
 160         struct hdmi_eld temp_eld;
 161         struct hdmi_ops ops;
 162
 163         bool dyn_pin_out;
 164         bool dyn_pcm_assign;
 165         /*
 166          * Non-generic VIA/NVIDIA specific
 167          */
 168         struct hda_multi_out multiout;
 169         struct hda_pcm_stream pcm_playback;
 170
 171         /* i915/powerwell (Haswell+/Valleyview+) specific */
 172         struct i915_audio_component_audio_ops i915_audio_ops;
 173         bool i915_bound; /* was i915 bound in this driver? */
 174 };
 175
 176 #ifdef CONFIG_SND_HDA_I915
 177 #define codec_has_acomp(codec) \
 178         ((codec)->bus->core.audio_component != NULL)
 179 #else
 180 #define codec_has_acomp(codec)  false
 181 #endif
 182
 183 struct hdmi_audio_infoframe {
 184         u8 type; /* 0x84 */
 185         u8 ver;  /* 0x01 */
 186         u8 len;  /* 0x0a */
 187
 188         u8 checksum;
 189
 190         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 191         u8 SS01_SF24;
 192         u8 CXT04;
 193         u8 CA;
 194         u8 LFEPBL01_LSV36_DM_INH7;
 195 };
 196
 197 struct dp_audio_infoframe {
 198         u8 type; /* 0x84 */
 199         u8 len;  /* 0x1b */
 200         u8 ver;  /* 0x11 << 2 */
 201
 202         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 203         u8 SS01_SF24;
 204         u8 CXT04;
 205         u8 CA;
 206         u8 LFEPBL01_LSV36_DM_INH7;
 207 };
 208
 209 union audio_infoframe {
 210         struct hdmi_audio_infoframe hdmi;
 211         struct dp_audio_infoframe dp;
 212         u8 bytes[0];
 213 };
 214
 215 /*
 216  * CEA speaker placement:
 217  *
 218  *        FLH       FCH        FRH
 219  *  FLW    FL  FLC   FC   FRC   FR   FRW
 220  *
 221  *                                  LFE
 222  *                     TC
 223  *
 224  *          RL  RLC   RC   RRC   RR
 225  *
 226  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 227  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 228  */
 229 enum cea_speaker_placement {
 230         FL  = (1 <<  0),        /* Front Left           */
 231         FC  = (1 <<  1),        /* Front Center         */
 232         FR  = (1 <<  2),        /* Front Right          */
 233         FLC = (1 <<  3),        /* Front Left Center    */
 234         FRC = (1 <<  4),        /* Front Right Center   */
 235         RL  = (1 <<  5),        /* Rear Left            */
 236         RC  = (1 <<  6),        /* Rear Center          */
 237         RR  = (1 <<  7),        /* Rear Right           */
 238         RLC = (1 <<  8),        /* Rear Left Center     */
 239         RRC = (1 <<  9),        /* Rear Right Center    */
 240         LFE = (1 << 10),        /* Low Frequency Effect */
 241         FLW = (1 << 11),        /* Front Left Wide      */
 242         FRW = (1 << 12),        /* Front Right Wide     */
 243         FLH = (1 << 13),        /* Front Left High      */
 244         FCH = (1 << 14),        /* Front Center High    */
 245         FRH = (1 << 15),        /* Front Right High     */
 246         TC  = (1 << 16),        /* Top Center           */
 247 };
 248
 249 /*
 250  * ELD SA bits in the CEA Speaker Allocation data block
 251  */
 252 static int eld_speaker_allocation_bits[] = {
 253         [0] = FL | FR,
 254         [1] = LFE,
 255         [2] = FC,
 256         [3] = RL | RR,
 257         [4] = RC,
 258         [5] = FLC | FRC,
 259         [6] = RLC | RRC,
 260         /* the following are not defined in ELD yet */
 261         [7] = FLW | FRW,
 262         [8] = FLH | FRH,
 263         [9] = TC,
 264         [10] = FCH,
 265 };
 266
 267 struct cea_channel_speaker_allocation {
 268         int ca_index;
 269         int speakers[8];
 270
 271         /* derived values, just for convenience */
 272         int channels;
 273         int spk_mask;
 274 };
 275
 276 /*
 277  * ALSA sequence is:
 278  *
 279  *       surround40   surround41   surround50   surround51   surround71
 280  * ch0   front left   =            =            =            =
 281  * ch1   front right  =            =            =            =
 282  * ch2   rear left    =            =            =            =
 283  * ch3   rear right   =            =            =            =
 284  * ch4                LFE          center       center       center
 285  * ch5                                          LFE          LFE
 286  * ch6                                                       side left
 287  * ch7                                                       side right
 288  *
 289  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 290  */
 291 static int hdmi_channel_mapping[0x32][8] = {
 292         /* stereo */
 293         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 294         /* 2.1 */
 295         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 296         /* Dolby Surround */
 297         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 298         /* surround40 */
 299         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 300         /* 4ch */
 301         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 302         /* surround41 */
 303         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 304         /* surround50 */
 305         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 306         /* surround51 */
 307         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 308         /* 7.1 */
 309         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 310 };
 311
 312 /*
 313  * This is an ordered list!
 314  *
 315  * The preceding ones have better chances to be selected by
 316  * hdmi_channel_allocation().
 317  */
 318 static struct cea_channel_speaker_allocation channel_allocations[] = {
 319 /*                        channel:   7     6    5    4    3     2    1    0  */
 320 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 321                                  /* 2.1 */
 322 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 323                                  /* Dolby Surround */
 324 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 325                                  /* surround40 */
 326 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 327                                  /* surround41 */
 328 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 329                                  /* surround50 */
 330 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 331                                  /* surround51 */
 332 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 333                                  /* 6.1 */
 334 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 335                                  /* surround71 */
 336 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 337
 338 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 339 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 340 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 341 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 342 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 343 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 344 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 345 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 346 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 347 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 348 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 349 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 350 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 351 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 352 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 353 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 354 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 355 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 356 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 357 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 358 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 359 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 360 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 361 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 362 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 363 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 364 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 365 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 366 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 367 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 368 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 369 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 370 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 371 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 372 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 373 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 374 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 375 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 376 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 377 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 378 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 379 };
 380
 381
 382 /*
 383  * HDMI routines
 384  */
 385
 386 #define get_pin(spec, idx) \
 387         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 388 #define get_cvt(spec, idx) \
 389         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 390 /* obtain hdmi_pcm object assigned to idx */
 391 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 392 /* obtain hda_pcm object assigned to idx */
 393 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 394
 395 static int pin_nid_to_pin_index(struct hda_codec *codec, hda_nid_t pin_nid)
 396 {
 397         struct hdmi_spec *spec = codec->spec;
 398         int pin_idx;
 399
 400         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 401                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
 402                         return pin_idx;
 403
 404         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 405         return -EINVAL;
 406 }
 407
 408 static int hinfo_to_pcm_index(struct hda_codec *codec,
 409                         struct hda_pcm_stream *hinfo)
 410 {
 411         struct hdmi_spec *spec = codec->spec;
 412         int pcm_idx;
 413
 414         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 415                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 416                         return pcm_idx;
 417
 418         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 419         return -EINVAL;
 420 }
 421
 422 static int hinfo_to_pin_index(struct hda_codec *codec,
 423                               struct hda_pcm_stream *hinfo)
 424 {
 425         struct hdmi_spec *spec = codec->spec;
 426         struct hdmi_spec_per_pin *per_pin;
 427         int pin_idx;
 428
 429         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 430                 per_pin = get_pin(spec, pin_idx);
 431                 if (per_pin->pcm &&
 432                         per_pin->pcm->pcm->stream == hinfo)
 433                         return pin_idx;
 434         }
 435
 436         codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
 437         return -EINVAL;
 438 }
 439
 440 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 441                                                 int pcm_idx)
 442 {
 443         int i;
 444         struct hdmi_spec_per_pin *per_pin;
 445
 446         for (i = 0; i < spec->num_pins; i++) {
 447                 per_pin = get_pin(spec, i);
 448                 if (per_pin->pcm_idx == pcm_idx)
 449                         return per_pin;
 450         }
 451         return NULL;
 452 }
 453
 454 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 455 {
 456         struct hdmi_spec *spec = codec->spec;
 457         int cvt_idx;
 458
 459         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 460                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 461                         return cvt_idx;
 462
 463         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 464         return -EINVAL;
 465 }
 466
 467 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 468                         struct snd_ctl_elem_info *uinfo)
 469 {
 470         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 471         struct hdmi_spec *spec = codec->spec;
 472         struct hdmi_spec_per_pin *per_pin;
 473         struct hdmi_eld *eld;
 474         int pin_idx;
 475
 476         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 477
 478         pin_idx = kcontrol->private_value;
 479         per_pin = get_pin(spec, pin_idx);
 480         eld = &per_pin->sink_eld;
 481
 482         mutex_lock(&per_pin->lock);
 483         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 484         mutex_unlock(&per_pin->lock);
 485
 486         return 0;
 487 }
 488
 489 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 490                         struct snd_ctl_elem_value *ucontrol)
 491 {
 492         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 493         struct hdmi_spec *spec = codec->spec;
 494         struct hdmi_spec_per_pin *per_pin;
 495         struct hdmi_eld *eld;
 496         int pin_idx;
 497
 498         pin_idx = kcontrol->private_value;
 499         per_pin = get_pin(spec, pin_idx);
 500         eld = &per_pin->sink_eld;
 501
 502         mutex_lock(&per_pin->lock);
 503         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
 504                 mutex_unlock(&per_pin->lock);
 505                 snd_BUG();
 506                 return -EINVAL;
 507         }
 508
 509         memset(ucontrol->value.bytes.data, 0,
 510                ARRAY_SIZE(ucontrol->value.bytes.data));
 511         if (eld->eld_valid)
 512                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 513                        eld->eld_size);
 514         mutex_unlock(&per_pin->lock);
 515
 516         return 0;
 517 }
 518
 519 static struct snd_kcontrol_new eld_bytes_ctl = {
 520         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 521         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 522         .name = "ELD",
 523         .info = hdmi_eld_ctl_info,
 524         .get = hdmi_eld_ctl_get,
 525 };
 526
 527 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
 528                         int device)
 529 {
 530         struct snd_kcontrol *kctl;
 531         struct hdmi_spec *spec = codec->spec;
 532         int err;
 533
 534         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 535         if (!kctl)
 536                 return -ENOMEM;
 537         kctl->private_value = pin_idx;
 538         kctl->id.device = device;
 539
 540         err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
 541         if (err < 0)
 542                 return err;
 543
 544         get_pin(spec, pin_idx)->eld_ctl = kctl;
 545         return 0;
 546 }
 547
 548 #ifdef BE_PARANOID
 549 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 550                                 int *packet_index, int *byte_index)
 551 {
 552         int val;
 553
 554         val = snd_hda_codec_read(codec, pin_nid, 0,
 555                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 556
 557         *packet_index = val >> 5;
 558         *byte_index = val & 0x1f;
 559 }
 560 #endif
 561
 562 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 563                                 int packet_index, int byte_index)
 564 {
 565         int val;
 566
 567         val = (packet_index << 5) | (byte_index & 0x1f);
 568
 569         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 570 }
 571
 572 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 573                                 unsigned char val)
 574 {
 575         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 576 }
 577
 578 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 579 {
 580         struct hdmi_spec *spec = codec->spec;
 581         int pin_out;
 582
 583         /* Unmute */
 584         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 585                 snd_hda_codec_write(codec, pin_nid, 0,
 586                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 587
 588         if (spec->dyn_pin_out)
 589                 /* Disable pin out until stream is active */
 590                 pin_out = 0;
 591         else
 592                 /* Enable pin out: some machines with GM965 gets broken output
 593                  * when the pin is disabled or changed while using with HDMI
 594                  */
 595                 pin_out = PIN_OUT;
 596
 597         snd_hda_codec_write(codec, pin_nid, 0,
 598                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 599 }
 600
 601 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
 602 {
 603         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
 604                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 605 }
 606
 607 static void hdmi_set_channel_count(struct hda_codec *codec,
 608                                    hda_nid_t cvt_nid, int chs)
 609 {
 610         if (chs != hdmi_get_channel_count(codec, cvt_nid))
 611                 snd_hda_codec_write(codec, cvt_nid, 0,
 612                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 613 }
 614
 615 /*
 616  * ELD proc files
 617  */
 618
 619 #ifdef CONFIG_SND_PROC_FS
 620 static void print_eld_info(struct snd_info_entry *entry,
 621                            struct snd_info_buffer *buffer)
 622 {
 623         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 624
 625         mutex_lock(&per_pin->lock);
 626         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 627         mutex_unlock(&per_pin->lock);
 628 }
 629
 630 static void write_eld_info(struct snd_info_entry *entry,
 631                            struct snd_info_buffer *buffer)
 632 {
 633         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 634
 635         mutex_lock(&per_pin->lock);
 636         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 637         mutex_unlock(&per_pin->lock);
 638 }
 639
 640 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 641 {
 642         char name[32];
 643         struct hda_codec *codec = per_pin->codec;
 644         struct snd_info_entry *entry;
 645         int err;
 646
 647         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 648         err = snd_card_proc_new(codec->card, name, &entry);
 649         if (err < 0)
 650                 return err;
 651
 652         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 653         entry->c.text.write = write_eld_info;
 654         entry->mode |= S_IWUSR;
 655         per_pin->proc_entry = entry;
 656
 657         return 0;
 658 }
 659
 660 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 661 {
 662         if (!per_pin->codec->bus->shutdown) {
 663                 snd_info_free_entry(per_pin->proc_entry);
 664                 per_pin->proc_entry = NULL;
 665         }
 666 }
 667 #else
 668 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 669                                int index)
 670 {
 671         return 0;
 672 }
 673 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 674 {
 675 }
 676 #endif
 677
 678 /*
 679  * Channel mapping routines
 680  */
 681
 682 /*
 683  * Compute derived values in channel_allocations[].
 684  */
 685 static void init_channel_allocations(void)
 686 {
 687         int i, j;
 688         struct cea_channel_speaker_allocation *p;
 689
 690         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 691                 p = channel_allocations + i;
 692                 p->channels = 0;
 693                 p->spk_mask = 0;
 694                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 695                         if (p->speakers[j]) {
 696                                 p->channels++;
 697                                 p->spk_mask |= p->speakers[j];
 698                         }
 699         }
 700 }
 701
 702 static int get_channel_allocation_order(int ca)
 703 {
 704         int i;
 705
 706         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 707                 if (channel_allocations[i].ca_index == ca)
 708                         break;
 709         }
 710         return i;
 711 }
 712
 713 /*
 714  * The transformation takes two steps:
 715  *
 716  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 717  *            spk_mask => (channel_allocations[])         => ai->CA
 718  *
 719  * TODO: it could select the wrong CA from multiple candidates.
 720 */
 721 static int hdmi_channel_allocation(struct hda_codec *codec,
 722                                    struct hdmi_eld *eld, int channels)
 723 {
 724         int i;
 725         int ca = 0;
 726         int spk_mask = 0;
 727         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 728
 729         /*
 730          * CA defaults to 0 for basic stereo audio
 731          */
 732         if (channels <= 2)
 733                 return 0;
 734
 735         /*
 736          * expand ELD's speaker allocation mask
 737          *
 738          * ELD tells the speaker mask in a compact(paired) form,
 739          * expand ELD's notions to match the ones used by Audio InfoFrame.
 740          */
 741         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 742                 if (eld->info.spk_alloc & (1 << i))
 743                         spk_mask |= eld_speaker_allocation_bits[i];
 744         }
 745
 746         /* search for the first working match in the CA table */
 747         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 748                 if (channels == channel_allocations[i].channels &&
 749                     (spk_mask & channel_allocations[i].spk_mask) ==
 750                                 channel_allocations[i].spk_mask) {
 751                         ca = channel_allocations[i].ca_index;
 752                         break;
 753                 }
 754         }
 755
 756         if (!ca) {
 757                 /* if there was no match, select the regular ALSA channel
 758                  * allocation with the matching number of channels */
 759                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 760                         if (channels == channel_allocations[i].channels) {
 761                                 ca = channel_allocations[i].ca_index;
 762                                 break;
 763                         }
 764                 }
 765         }
 766
 767         snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
 768         codec_dbg(codec, "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 769                     ca, channels, buf);
 770
 771         return ca;
 772 }
 773
 774 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 775                                        hda_nid_t pin_nid)
 776 {
 777 #ifdef CONFIG_SND_DEBUG_VERBOSE
 778         struct hdmi_spec *spec = codec->spec;
 779         int i;
 780         int channel;
 781
 782         for (i = 0; i < 8; i++) {
 783                 channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
 784                 codec_dbg(codec, "HDMI: ASP channel %d => slot %d\n",
 785                                                 channel, i);
 786         }
 787 #endif
 788 }
 789
 790 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
 791                                        hda_nid_t pin_nid,
 792                                        bool non_pcm,
 793                                        int ca)
 794 {
 795         struct hdmi_spec *spec = codec->spec;
 796         struct cea_channel_speaker_allocation *ch_alloc;
 797         int i;
 798         int err;
 799         int order;
 800         int non_pcm_mapping[8];
 801
 802         order = get_channel_allocation_order(ca);
 803         ch_alloc = &channel_allocations[order];
 804
 805         if (hdmi_channel_mapping[ca][1] == 0) {
 806                 int hdmi_slot = 0;
 807                 /* fill actual channel mappings in ALSA channel (i) order */
 808                 for (i = 0; i < ch_alloc->channels; i++) {
 809                         while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
 810                                 hdmi_slot++; /* skip zero slots */
 811
 812                         hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
 813                 }
 814                 /* fill the rest of the slots with ALSA channel 0xf */
 815                 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
 816                         if (!ch_alloc->speakers[7 - hdmi_slot])
 817                                 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
 818         }
 819
 820         if (non_pcm) {
 821                 for (i = 0; i < ch_alloc->channels; i++)
 822                         non_pcm_mapping[i] = (i << 4) | i;
 823                 for (; i < 8; i++)
 824                         non_pcm_mapping[i] = (0xf << 4) | i;
 825         }
 826
 827         for (i = 0; i < 8; i++) {
 828                 int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
 829                 int hdmi_slot = slotsetup & 0x0f;
 830                 int channel = (slotsetup & 0xf0) >> 4;
 831                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
 832                 if (err) {
 833                         codec_dbg(codec, "HDMI: channel mapping failed\n");
 834                         break;
 835                 }
 836         }
 837 }
 838
 839 struct channel_map_table {
 840         unsigned char map;              /* ALSA API channel map position */
 841         int spk_mask;                   /* speaker position bit mask */
 842 };
 843
 844 static struct channel_map_table map_tables[] = {
 845         { SNDRV_CHMAP_FL,       FL },
 846         { SNDRV_CHMAP_FR,       FR },
 847         { SNDRV_CHMAP_RL,       RL },
 848         { SNDRV_CHMAP_RR,       RR },
 849         { SNDRV_CHMAP_LFE,      LFE },
 850         { SNDRV_CHMAP_FC,       FC },
 851         { SNDRV_CHMAP_RLC,      RLC },
 852         { SNDRV_CHMAP_RRC,      RRC },
 853         { SNDRV_CHMAP_RC,       RC },
 854         { SNDRV_CHMAP_FLC,      FLC },
 855         { SNDRV_CHMAP_FRC,      FRC },
 856         { SNDRV_CHMAP_TFL,      FLH },
 857         { SNDRV_CHMAP_TFR,      FRH },
 858         { SNDRV_CHMAP_FLW,      FLW },
 859         { SNDRV_CHMAP_FRW,      FRW },
 860         { SNDRV_CHMAP_TC,       TC },
 861         { SNDRV_CHMAP_TFC,      FCH },
 862         {} /* terminator */
 863 };
 864
 865 /* from ALSA API channel position to speaker bit mask */
 866 static int to_spk_mask(unsigned char c)
 867 {
 868         struct channel_map_table *t = map_tables;
 869         for (; t->map; t++) {
 870                 if (t->map == c)
 871                         return t->spk_mask;
 872         }
 873         return 0;
 874 }
 875
 876 /* from ALSA API channel position to CEA slot */
 877 static int to_cea_slot(int ordered_ca, unsigned char pos)
 878 {
 879         int mask = to_spk_mask(pos);
 880         int i;
 881
 882         if (mask) {
 883                 for (i = 0; i < 8; i++) {
 884                         if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
 885                                 return i;
 886                 }
 887         }
 888
 889         return -1;
 890 }
 891
 892 /* from speaker bit mask to ALSA API channel position */
 893 static int spk_to_chmap(int spk)
 894 {
 895         struct channel_map_table *t = map_tables;
 896         for (; t->map; t++) {
 897                 if (t->spk_mask == spk)
 898                         return t->map;
 899         }
 900         return 0;
 901 }
 902
 903 /* from CEA slot to ALSA API channel position */
 904 static int from_cea_slot(int ordered_ca, unsigned char slot)
 905 {
 906         int mask = channel_allocations[ordered_ca].speakers[7 - slot];
 907
 908         return spk_to_chmap(mask);
 909 }
 910
 911 /* get the CA index corresponding to the given ALSA API channel map */
 912 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
 913 {
 914         int i, spks = 0, spk_mask = 0;
 915
 916         for (i = 0; i < chs; i++) {
 917                 int mask = to_spk_mask(map[i]);
 918                 if (mask) {
 919                         spk_mask |= mask;
 920                         spks++;
 921                 }
 922         }
 923
 924         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 925                 if ((chs == channel_allocations[i].channels ||
 926                      spks == channel_allocations[i].channels) &&
 927                     (spk_mask & channel_allocations[i].spk_mask) ==
 928                                 channel_allocations[i].spk_mask)
 929                         return channel_allocations[i].ca_index;
 930         }
 931         return -1;
 932 }
 933
 934 /* set up the channel slots for the given ALSA API channel map */
 935 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
 936                                              hda_nid_t pin_nid,
 937                                              int chs, unsigned char *map,
 938                                              int ca)
 939 {
 940         struct hdmi_spec *spec = codec->spec;
 941         int ordered_ca = get_channel_allocation_order(ca);
 942         int alsa_pos, hdmi_slot;
 943         int assignments[8] = {[0 ... 7] = 0xf};
 944
 945         for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
 946
 947                 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
 948
 949                 if (hdmi_slot < 0)
 950                         continue; /* unassigned channel */
 951
 952                 assignments[hdmi_slot] = alsa_pos;
 953         }
 954
 955         for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
 956                 int err;
 957
 958                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
 959                                                      assignments[hdmi_slot]);
 960                 if (err)
 961                         return -EINVAL;
 962         }
 963         return 0;
 964 }
 965
 966 /* store ALSA API channel map from the current default map */
 967 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
 968 {
 969         int i;
 970         int ordered_ca = get_channel_allocation_order(ca);
 971         for (i = 0; i < 8; i++) {
 972                 if (i < channel_allocations[ordered_ca].channels)
 973                         map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
 974                 else
 975                         map[i] = 0;
 976         }
 977 }
 978
 979 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 980                                        hda_nid_t pin_nid, bool non_pcm, int ca,
 981                                        int channels, unsigned char *map,
 982                                        bool chmap_set)
 983 {
 984         if (!non_pcm && chmap_set) {
 985                 hdmi_manual_setup_channel_mapping(codec, pin_nid,
 986                                                   channels, map, ca);
 987         } else {
 988                 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
 989                 hdmi_setup_fake_chmap(map, ca);
 990         }
 991
 992         hdmi_debug_channel_mapping(codec, pin_nid);
 993 }
 994
 995 static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 996                                      int asp_slot, int channel)
 997 {
 998         return snd_hda_codec_write(codec, pin_nid, 0,
 999                                    AC_VERB_SET_HDMI_CHAN_SLOT,
1000                                    (channel << 4) | asp_slot);
1001 }
1002
1003 static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
1004                                      int asp_slot)
1005 {
1006         return (snd_hda_codec_read(codec, pin_nid, 0,
1007                                    AC_VERB_GET_HDMI_CHAN_SLOT,
1008                                    asp_slot) & 0xf0) >> 4;
1009 }
1010
1011 /*
1012  * Audio InfoFrame routines
1013  */
1014
1015 /*
1016  * Enable Audio InfoFrame Transmission
1017  */
1018 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
1019                                        hda_nid_t pin_nid)
1020 {
1021         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1022         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
1023                                                 AC_DIPXMIT_BEST);
1024 }
1025
1026 /*
1027  * Disable Audio InfoFrame Transmission
1028  */
1029 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
1030                                       hda_nid_t pin_nid)
1031 {
1032         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1033         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
1034                                                 AC_DIPXMIT_DISABLE);
1035 }
1036
1037 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
1038 {
1039 #ifdef CONFIG_SND_DEBUG_VERBOSE
1040         int i;
1041         int size;
1042
1043         size = snd_hdmi_get_eld_size(codec, pin_nid);
1044         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
1045
1046         for (i = 0; i < 8; i++) {
1047                 size = snd_hda_codec_read(codec, pin_nid, 0,
1048                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
1049                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
1050         }
1051 #endif
1052 }
1053
1054 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
1055 {
1056 #ifdef BE_PARANOID
1057         int i, j;
1058         int size;
1059         int pi, bi;
1060         for (i = 0; i < 8; i++) {
1061                 size = snd_hda_codec_read(codec, pin_nid, 0,
1062                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
1063                 if (size == 0)
1064                         continue;
1065
1066                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
1067                 for (j = 1; j < 1000; j++) {
1068                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
1069                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
1070                         if (pi != i)
1071                                 codec_dbg(codec, "dip index %d: %d != %d\n",
1072                                                 bi, pi, i);
1073                         if (bi == 0) /* byte index wrapped around */
1074                                 break;
1075                 }
1076                 codec_dbg(codec,
1077                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
1078                         i, size, j);
1079         }
1080 #endif
1081 }
1082
1083 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
1084 {
1085         u8 *bytes = (u8 *)hdmi_ai;
1086         u8 sum = 0;
1087         int i;
1088
1089         hdmi_ai->checksum = 0;
1090
1091         for (i = 0; i < sizeof(*hdmi_ai); i++)
1092                 sum += bytes[i];
1093
1094         hdmi_ai->checksum = -sum;
1095 }
1096
1097 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
1098                                       hda_nid_t pin_nid,
1099                                       u8 *dip, int size)
1100 {
1101         int i;
1102
1103         hdmi_debug_dip_size(codec, pin_nid);
1104         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
1105
1106         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1107         for (i = 0; i < size; i++)
1108                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
1109 }
1110
1111 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
1112                                     u8 *dip, int size)
1113 {
1114         u8 val;
1115         int i;
1116
1117         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
1118                                                             != AC_DIPXMIT_BEST)
1119                 return false;
1120
1121         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1122         for (i = 0; i < size; i++) {
1123                 val = snd_hda_codec_read(codec, pin_nid, 0,
1124                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
1125                 if (val != dip[i])
1126                         return false;
1127         }
1128
1129         return true;
1130 }
1131
1132 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
1133                                      hda_nid_t pin_nid,
1134                                      int ca, int active_channels,
1135                                      int conn_type)
1136 {
1137         union audio_infoframe ai;
1138
1139         memset(&ai, 0, sizeof(ai));
1140         if (conn_type == 0) { /* HDMI */
1141                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1142
1143                 hdmi_ai->type           = 0x84;
1144                 hdmi_ai->ver            = 0x01;
1145                 hdmi_ai->len            = 0x0a;
1146                 hdmi_ai->CC02_CT47      = active_channels - 1;
1147                 hdmi_ai->CA             = ca;
1148                 hdmi_checksum_audio_infoframe(hdmi_ai);
1149         } else if (conn_type == 1) { /* DisplayPort */
1150                 struct dp_audio_infoframe *dp_ai = &ai.dp;
1151
1152                 dp_ai->type             = 0x84;
1153                 dp_ai->len              = 0x1b;
1154                 dp_ai->ver              = 0x11 << 2;
1155                 dp_ai->CC02_CT47        = active_channels - 1;
1156                 dp_ai->CA               = ca;
1157         } else {
1158                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
1159                             pin_nid);
1160                 return;
1161         }
1162
1163         /*
1164          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1165          * sizeof(*dp_ai) to avoid partial match/update problems when
1166          * the user switches between HDMI/DP monitors.
1167          */
1168         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1169                                         sizeof(ai))) {
1170                 codec_dbg(codec,
1171                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
1172                             pin_nid,
1173                             active_channels, ca);
1174                 hdmi_stop_infoframe_trans(codec, pin_nid);
1175                 hdmi_fill_audio_infoframe(codec, pin_nid,
1176                                             ai.bytes, sizeof(ai));
1177                 hdmi_start_infoframe_trans(codec, pin_nid);
1178         }
1179 }
1180
1181 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1182                                        struct hdmi_spec_per_pin *per_pin,
1183                                        bool non_pcm)
1184 {
1185         struct hdmi_spec *spec = codec->spec;
1186         hda_nid_t pin_nid = per_pin->pin_nid;
1187         int channels = per_pin->channels;
1188         int active_channels;
1189         struct hdmi_eld *eld;
1190         int ca, ordered_ca;
1191
1192         if (!channels)
1193                 return;
1194
1195         if (is_haswell_plus(codec))
1196                 snd_hda_codec_write(codec, pin_nid, 0,
1197                                             AC_VERB_SET_AMP_GAIN_MUTE,
1198                                             AMP_OUT_UNMUTE);
1199
1200         eld = &per_pin->sink_eld;
1201
1202         if (!non_pcm && per_pin->chmap_set)
1203                 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1204         else
1205                 ca = hdmi_channel_allocation(codec, eld, channels);
1206         if (ca < 0)
1207                 ca = 0;
1208
1209         ordered_ca = get_channel_allocation_order(ca);
1210         active_channels = channel_allocations[ordered_ca].channels;
1211
1212         hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1213
1214         /*
1215          * always configure channel mapping, it may have been changed by the
1216          * user in the meantime
1217          */
1218         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1219                                    channels, per_pin->chmap,
1220                                    per_pin->chmap_set);
1221
1222         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
1223                                       eld->info.conn_type);
1224
1225         per_pin->non_pcm = non_pcm;
1226 }
1227
1228 /*
1229  * Unsolicited events
1230  */
1231
1232 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1233
1234 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid)
1235 {
1236         struct hdmi_spec *spec = codec->spec;
1237         int pin_idx = pin_nid_to_pin_index(codec, nid);
1238
1239         if (pin_idx < 0)
1240                 return;
1241         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
1242                 snd_hda_jack_report_sync(codec);
1243 }
1244
1245 static void jack_callback(struct hda_codec *codec,
1246                           struct hda_jack_callback *jack)
1247 {
1248         check_presence_and_report(codec, jack->tbl->nid);
1249 }
1250
1251 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1252 {
1253         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1254         struct hda_jack_tbl *jack;
1255         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1256
1257         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1258         if (!jack)
1259                 return;
1260         jack->jack_dirty = 1;
1261
1262         codec_dbg(codec,
1263                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1264                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1265                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1266
1267         check_presence_and_report(codec, jack->nid);
1268 }
1269
1270 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1271 {
1272         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1273         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1274         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1275         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1276
1277         codec_info(codec,
1278                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1279                 codec->addr,
1280                 tag,
1281                 subtag,
1282                 cp_state,
1283                 cp_ready);
1284
1285         /* TODO */
1286         if (cp_state)
1287                 ;
1288         if (cp_ready)
1289                 ;
1290 }
1291
1292
1293 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1294 {
1295         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1296         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1297
1298         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1299                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
1300                 return;
1301         }
1302
1303         if (subtag == 0)
1304                 hdmi_intrinsic_event(codec, res);
1305         else
1306                 hdmi_non_intrinsic_event(codec, res);
1307 }
1308
1309 static void haswell_verify_D0(struct hda_codec *codec,
1310                 hda_nid_t cvt_nid, hda_nid_t nid)
1311 {
1312         int pwr;
1313
1314         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1315          * thus pins could only choose converter 0 for use. Make sure the
1316          * converters are in correct power state */
1317         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1318                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1319
1320         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1321                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1322                                     AC_PWRST_D0);
1323                 msleep(40);
1324                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1325                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1326                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1327         }
1328 }
1329
1330 /*
1331  * Callbacks
1332  */
1333
1334 /* HBR should be Non-PCM, 8 channels */
1335 #define is_hbr_format(format) \
1336         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1337
1338 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
1339                               bool hbr)
1340 {
1341         int pinctl, new_pinctl;
1342
1343         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1344                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1345                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1346
1347                 if (pinctl < 0)
1348                         return hbr ? -EINVAL : 0;
1349
1350                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1351                 if (hbr)
1352                         new_pinctl |= AC_PINCTL_EPT_HBR;
1353                 else
1354                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
1355
1356                 codec_dbg(codec,
1357                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
1358                             pin_nid,
1359                             pinctl == new_pinctl ? "" : "new-",
1360                             new_pinctl);
1361
1362                 if (pinctl != new_pinctl)
1363                         snd_hda_codec_write(codec, pin_nid, 0,
1364                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1365                                             new_pinctl);
1366         } else if (hbr)
1367                 return -EINVAL;
1368
1369         return 0;
1370 }
1371
1372 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1373                               hda_nid_t pin_nid, u32 stream_tag, int format)
1374 {
1375         struct hdmi_spec *spec = codec->spec;
1376         int err;
1377
1378         if (is_haswell_plus(codec))
1379                 haswell_verify_D0(codec, cvt_nid, pin_nid);
1380
1381         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
1382
1383         if (err) {
1384                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
1385                 return err;
1386         }
1387
1388         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1389         return 0;
1390 }
1391
1392 /* Try to find an available converter
1393  * If pin_idx is less then zero, just try to find an available converter.
1394  * Otherwise, try to find an available converter and get the cvt mux index
1395  * of the pin.
1396  */
1397 static int hdmi_choose_cvt(struct hda_codec *codec,
1398                         int pin_idx, int *cvt_id, int *mux_id)
1399 {
1400         struct hdmi_spec *spec = codec->spec;
1401         struct hdmi_spec_per_pin *per_pin;
1402         struct hdmi_spec_per_cvt *per_cvt = NULL;
1403         int cvt_idx, mux_idx = 0;
1404
1405         /* pin_idx < 0 means no pin will be bound to the converter */
1406         if (pin_idx < 0)
1407                 per_pin = NULL;
1408         else
1409                 per_pin = get_pin(spec, pin_idx);
1410
1411         /* Dynamically assign converter to stream */
1412         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1413                 per_cvt = get_cvt(spec, cvt_idx);
1414
1415                 /* Must not already be assigned */
1416                 if (per_cvt->assigned)
1417                         continue;
1418                 if (per_pin == NULL)
1419                         break;
1420                 /* Must be in pin's mux's list of converters */
1421                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1422                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1423                                 break;
1424                 /* Not in mux list */
1425                 if (mux_idx == per_pin->num_mux_nids)
1426                         continue;
1427                 break;
1428         }
1429
1430         /* No free converters */
1431         if (cvt_idx == spec->num_cvts)
1432                 return -EBUSY;
1433
1434         if (per_pin != NULL)
1435                 per_pin->mux_idx = mux_idx;
1436
1437         if (cvt_id)
1438                 *cvt_id = cvt_idx;
1439         if (mux_id)
1440                 *mux_id = mux_idx;
1441
1442         return 0;
1443 }
1444
1445 /* Assure the pin select the right convetor */
1446 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1447                         struct hdmi_spec_per_pin *per_pin)
1448 {
1449         hda_nid_t pin_nid = per_pin->pin_nid;
1450         int mux_idx, curr;
1451
1452         mux_idx = per_pin->mux_idx;
1453         curr = snd_hda_codec_read(codec, pin_nid, 0,
1454                                           AC_VERB_GET_CONNECT_SEL, 0);
1455         if (curr != mux_idx)
1456                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1457                                             AC_VERB_SET_CONNECT_SEL,
1458                                             mux_idx);
1459 }
1460
1461 /* get the mux index for the converter of the pins
1462  * converter's mux index is the same for all pins on Intel platform
1463  */
1464 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1465                         hda_nid_t cvt_nid)
1466 {
1467         int i;
1468
1469         for (i = 0; i < spec->num_cvts; i++)
1470                 if (spec->cvt_nids[i] == cvt_nid)
1471                         return i;
1472         return -EINVAL;
1473 }
1474
1475 /* Intel HDMI workaround to fix audio routing issue:
1476  * For some Intel display codecs, pins share the same connection list.
1477  * So a conveter can be selected by multiple pins and playback on any of these
1478  * pins will generate sound on the external display, because audio flows from
1479  * the same converter to the display pipeline. Also muting one pin may make
1480  * other pins have no sound output.
1481  * So this function assures that an assigned converter for a pin is not selected
1482  * by any other pins.
1483  */
1484 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1485                         hda_nid_t pin_nid, int mux_idx)
1486 {
1487         struct hdmi_spec *spec = codec->spec;
1488         hda_nid_t nid;
1489         int cvt_idx, curr;
1490         struct hdmi_spec_per_cvt *per_cvt;
1491
1492         /* configure all pins, including "no physical connection" ones */
1493         for_each_hda_codec_node(nid, codec) {
1494                 unsigned int wid_caps = get_wcaps(codec, nid);
1495                 unsigned int wid_type = get_wcaps_type(wid_caps);
1496
1497                 if (wid_type != AC_WID_PIN)
1498                         continue;
1499
1500                 if (nid == pin_nid)
1501                         continue;
1502
1503                 curr = snd_hda_codec_read(codec, nid, 0,
1504                                           AC_VERB_GET_CONNECT_SEL, 0);
1505                 if (curr != mux_idx)
1506                         continue;
1507
1508                 /* choose an unassigned converter. The conveters in the
1509                  * connection list are in the same order as in the codec.
1510                  */
1511                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1512                         per_cvt = get_cvt(spec, cvt_idx);
1513                         if (!per_cvt->assigned) {
1514                                 codec_dbg(codec,
1515                                           "choose cvt %d for pin nid %d\n",
1516                                         cvt_idx, nid);
1517                                 snd_hda_codec_write_cache(codec, nid, 0,
1518                                             AC_VERB_SET_CONNECT_SEL,
1519                                             cvt_idx);
1520                                 break;
1521                         }
1522                 }
1523         }
1524 }
1525
1526 /* A wrapper of intel_not_share_asigned_cvt() */
1527 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1528                         hda_nid_t pin_nid, hda_nid_t cvt_nid)
1529 {
1530         int mux_idx;
1531         struct hdmi_spec *spec = codec->spec;
1532
1533         if (!is_haswell_plus(codec) && !is_valleyview_plus(codec))
1534                 return;
1535
1536         /* On Intel platform, the mapping of converter nid to
1537          * mux index of the pins are always the same.
1538          * The pin nid may be 0, this means all pins will not
1539          * share the converter.
1540          */
1541         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1542         if (mux_idx >= 0)
1543                 intel_not_share_assigned_cvt(codec, pin_nid, mux_idx);
1544 }
1545
1546 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1547  * in dyn_pcm_assign mode.
1548  */
1549 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1550                          struct hda_codec *codec,
1551                          struct snd_pcm_substream *substream)
1552 {
1553         struct hdmi_spec *spec = codec->spec;
1554         struct snd_pcm_runtime *runtime = substream->runtime;
1555         int cvt_idx, pcm_idx;
1556         struct hdmi_spec_per_cvt *per_cvt = NULL;
1557         int err;
1558
1559         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1560         if (pcm_idx < 0)
1561                 return -EINVAL;
1562
1563         err = hdmi_choose_cvt(codec, -1, &cvt_idx, NULL);
1564         if (err)
1565                 return err;
1566
1567         per_cvt = get_cvt(spec, cvt_idx);
1568         per_cvt->assigned = 1;
1569         hinfo->nid = per_cvt->cvt_nid;
1570
1571         intel_not_share_assigned_cvt_nid(codec, 0, per_cvt->cvt_nid);
1572
1573         set_bit(pcm_idx, &spec->pcm_in_use);
1574         /* todo: setup spdif ctls assign */
1575
1576         /* Initially set the converter's capabilities */
1577         hinfo->channels_min = per_cvt->channels_min;
1578         hinfo->channels_max = per_cvt->channels_max;
1579         hinfo->rates = per_cvt->rates;
1580         hinfo->formats = per_cvt->formats;
1581         hinfo->maxbps = per_cvt->maxbps;
1582
1583         /* Store the updated parameters */
1584         runtime->hw.channels_min = hinfo->channels_min;
1585         runtime->hw.channels_max = hinfo->channels_max;
1586         runtime->hw.formats = hinfo->formats;
1587         runtime->hw.rates = hinfo->rates;
1588
1589         snd_pcm_hw_constraint_step(substream->runtime, 0,
1590                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1591         return 0;
1592 }
1593
1594 /*
1595  * HDA PCM callbacks
1596  */
1597 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1598                          struct hda_codec *codec,
1599                          struct snd_pcm_substream *substream)
1600 {
1601         struct hdmi_spec *spec = codec->spec;
1602         struct snd_pcm_runtime *runtime = substream->runtime;
1603         int pin_idx, cvt_idx, pcm_idx, mux_idx = 0;
1604         struct hdmi_spec_per_pin *per_pin;
1605         struct hdmi_eld *eld;
1606         struct hdmi_spec_per_cvt *per_cvt = NULL;
1607         int err;
1608
1609         /* Validate hinfo */
1610         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1611         if (pcm_idx < 0)
1612                 return -EINVAL;
1613
1614         mutex_lock(&spec->pcm_lock);
1615         pin_idx = hinfo_to_pin_index(codec, hinfo);
1616         if (!spec->dyn_pcm_assign) {
1617                 if (snd_BUG_ON(pin_idx < 0)) {
1618                         mutex_unlock(&spec->pcm_lock);
1619                         return -EINVAL;
1620                 }
1621         } else {
1622                 /* no pin is assigned to the PCM
1623                  * PA need pcm open successfully when probe
1624                  */
1625                 if (pin_idx < 0) {
1626                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1627                         mutex_unlock(&spec->pcm_lock);
1628                         return err;
1629                 }
1630         }
1631
1632         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1633         if (err < 0) {
1634                 mutex_unlock(&spec->pcm_lock);
1635                 return err;
1636         }
1637
1638         per_cvt = get_cvt(spec, cvt_idx);
1639         /* Claim converter */
1640         per_cvt->assigned = 1;
1641
1642         set_bit(pcm_idx, &spec->pcm_in_use);
1643         per_pin = get_pin(spec, pin_idx);
1644         per_pin->cvt_nid = per_cvt->cvt_nid;
1645         hinfo->nid = per_cvt->cvt_nid;
1646
1647         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1648                             AC_VERB_SET_CONNECT_SEL,
1649                             mux_idx);
1650
1651         /* configure unused pins to choose other converters */
1652         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
1653                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1654
1655         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1656
1657         /* Initially set the converter's capabilities */
1658         hinfo->channels_min = per_cvt->channels_min;
1659         hinfo->channels_max = per_cvt->channels_max;
1660         hinfo->rates = per_cvt->rates;
1661         hinfo->formats = per_cvt->formats;
1662         hinfo->maxbps = per_cvt->maxbps;
1663
1664         eld = &per_pin->sink_eld;
1665         /* Restrict capabilities by ELD if this isn't disabled */
1666         if (!static_hdmi_pcm && eld->eld_valid) {
1667                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1668                 if (hinfo->channels_min > hinfo->channels_max ||
1669                     !hinfo->rates || !hinfo->formats) {
1670                         per_cvt->assigned = 0;
1671                         hinfo->nid = 0;
1672                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1673                         mutex_unlock(&spec->pcm_lock);
1674                         return -ENODEV;
1675                 }
1676         }
1677
1678         mutex_unlock(&spec->pcm_lock);
1679         /* Store the updated parameters */
1680         runtime->hw.channels_min = hinfo->channels_min;
1681         runtime->hw.channels_max = hinfo->channels_max;
1682         runtime->hw.formats = hinfo->formats;
1683         runtime->hw.rates = hinfo->rates;
1684
1685         snd_pcm_hw_constraint_step(substream->runtime, 0,
1686                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1687         return 0;
1688 }
1689
1690 /*
1691  * HDA/HDMI auto parsing
1692  */
1693 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1694 {
1695         struct hdmi_spec *spec = codec->spec;
1696         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1697         hda_nid_t pin_nid = per_pin->pin_nid;
1698
1699         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1700                 codec_warn(codec,
1701                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1702                            pin_nid, get_wcaps(codec, pin_nid));
1703                 return -EINVAL;
1704         }
1705
1706         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1707                                                         per_pin->mux_nids,
1708                                                         HDA_MAX_CONNECTIONS);
1709
1710         return 0;
1711 }
1712
1713 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1714                                 struct hdmi_spec_per_pin *per_pin)
1715 {
1716         int i;
1717
1718         /* try the prefer PCM */
1719         if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1720                 return per_pin->pin_nid_idx;
1721
1722         /* have a second try; check the "reserved area" over num_pins */
1723         for (i = spec->num_pins; i < spec->pcm_used; i++) {
1724                 if (!test_bit(i, &spec->pcm_bitmap))
1725                         return i;
1726         }
1727
1728         /* the last try; check the empty slots in pins */
1729         for (i = 0; i < spec->num_pins; i++) {
1730                 if (!test_bit(i, &spec->pcm_bitmap))
1731                         return i;
1732         }
1733         return -EBUSY;
1734 }
1735
1736 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1737                                 struct hdmi_spec_per_pin *per_pin)
1738 {
1739         int idx;
1740
1741         /* pcm already be attached to the pin */
1742         if (per_pin->pcm)
1743                 return;
1744         idx = hdmi_find_pcm_slot(spec, per_pin);
1745         if (idx == -ENODEV)
1746                 return;
1747         per_pin->pcm_idx = idx;
1748         per_pin->pcm = get_hdmi_pcm(spec, idx);
1749         set_bit(idx, &spec->pcm_bitmap);
1750 }
1751
1752 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1753                                 struct hdmi_spec_per_pin *per_pin)
1754 {
1755         int idx;
1756
1757         /* pcm already be detached from the pin */
1758         if (!per_pin->pcm)
1759                 return;
1760         idx = per_pin->pcm_idx;
1761         per_pin->pcm_idx = -1;
1762         per_pin->pcm = NULL;
1763         if (idx >= 0 && idx < spec->pcm_used)
1764                 clear_bit(idx, &spec->pcm_bitmap);
1765 }
1766
1767 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1768                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1769 {
1770         int mux_idx;
1771
1772         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1773                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1774                         break;
1775         return mux_idx;
1776 }
1777
1778 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1779
1780 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1781                            struct hdmi_spec_per_pin *per_pin)
1782 {
1783         struct hda_codec *codec = per_pin->codec;
1784         struct hda_pcm *pcm;
1785         struct hda_pcm_stream *hinfo;
1786         struct snd_pcm_substream *substream;
1787         int mux_idx;
1788         bool non_pcm;
1789
1790         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1791                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1792         else
1793                 return;
1794         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1795                 return;
1796
1797         /* hdmi audio only uses playback and one substream */
1798         hinfo = pcm->stream;
1799         substream = pcm->pcm->streams[0].substream;
1800
1801         per_pin->cvt_nid = hinfo->nid;
1802
1803         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1804         if (mux_idx < per_pin->num_mux_nids)
1805                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1806                                 AC_VERB_SET_CONNECT_SEL,
1807                                 mux_idx);
1808         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1809
1810         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1811         if (substream->runtime)
1812                 per_pin->channels = substream->runtime->channels;
1813         per_pin->setup = true;
1814         per_pin->mux_idx = mux_idx;
1815
1816         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1817 }
1818
1819 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1820                            struct hdmi_spec_per_pin *per_pin)
1821 {
1822         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1823                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1824
1825         per_pin->chmap_set = false;
1826         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1827
1828         per_pin->setup = false;
1829         per_pin->channels = 0;
1830 }
1831
1832 /* update per_pin ELD from the given new ELD;
1833  * setup info frame and notification accordingly
1834  */
1835 static void update_eld(struct hda_codec *codec,
1836                        struct hdmi_spec_per_pin *per_pin,
1837                        struct hdmi_eld *eld)
1838 {
1839         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1840         struct hdmi_spec *spec = codec->spec;
1841         bool old_eld_valid = pin_eld->eld_valid;
1842         bool eld_changed;
1843
1844         if (spec->dyn_pcm_assign) {
1845                 if (eld->eld_valid) {
1846                         hdmi_attach_hda_pcm(spec, per_pin);
1847                         hdmi_pcm_setup_pin(spec, per_pin);
1848                 } else {
1849                         hdmi_pcm_reset_pin(spec, per_pin);
1850                         hdmi_detach_hda_pcm(spec, per_pin);
1851                 }
1852         }
1853
1854         if (eld->eld_valid)
1855                 snd_hdmi_show_eld(codec, &eld->info);
1856
1857         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1858         if (eld->eld_valid && pin_eld->eld_valid)
1859                 if (pin_eld->eld_size != eld->eld_size ||
1860                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1861                            eld->eld_size) != 0)
1862                         eld_changed = true;
1863
1864         pin_eld->eld_valid = eld->eld_valid;
1865         pin_eld->eld_size = eld->eld_size;
1866         if (eld->eld_valid)
1867                 memcpy(pin_eld->eld_buffer, eld->eld_buffer, eld->eld_size);
1868         pin_eld->info = eld->info;
1869
1870         /*
1871          * Re-setup pin and infoframe. This is needed e.g. when
1872          * - sink is first plugged-in
1873          * - transcoder can change during stream playback on Haswell
1874          *   and this can make HW reset converter selection on a pin.
1875          */
1876         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1877                 if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
1878                         intel_verify_pin_cvt_connect(codec, per_pin);
1879                         intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
1880                                                      per_pin->mux_idx);
1881                 }
1882
1883                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1884         }
1885
1886         if (eld_changed)
1887                 snd_ctl_notify(codec->card,
1888                                SNDRV_CTL_EVENT_MASK_VALUE |
1889                                SNDRV_CTL_EVENT_MASK_INFO,
1890                                &per_pin->eld_ctl->id);
1891 }
1892
1893 /* update ELD and jack state via HD-audio verbs */
1894 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1895                                          int repoll)
1896 {
1897         struct hda_jack_tbl *jack;
1898         struct hda_codec *codec = per_pin->codec;
1899         struct hdmi_spec *spec = codec->spec;
1900         struct hdmi_eld *eld = &spec->temp_eld;
1901         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1902         hda_nid_t pin_nid = per_pin->pin_nid;
1903         /*
1904          * Always execute a GetPinSense verb here, even when called from
1905          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1906          * response's PD bit is not the real PD value, but indicates that
1907          * the real PD value changed. An older version of the HD-audio
1908          * specification worked this way. Hence, we just ignore the data in
1909          * the unsolicited response to avoid custom WARs.
1910          */
1911         int present;
1912         bool ret;
1913         bool do_repoll = false;
1914
1915         snd_hda_power_up_pm(codec);
1916         present = snd_hda_pin_sense(codec, pin_nid);
1917
1918         mutex_lock(&per_pin->lock);
1919         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1920         if (pin_eld->monitor_present)
1921                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1922         else
1923                 eld->eld_valid = false;
1924
1925         codec_dbg(codec,
1926                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1927                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1928
1929         if (eld->eld_valid) {
1930                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1931                                                      &eld->eld_size) < 0)
1932                         eld->eld_valid = false;
1933                 else {
1934                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1935                                                     eld->eld_size) < 0)
1936                                 eld->eld_valid = false;
1937                 }
1938                 if (!eld->eld_valid && repoll)
1939                         do_repoll = true;
1940         }
1941
1942         if (do_repoll)
1943                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1944         else
1945                 update_eld(codec, per_pin, eld);
1946
1947         ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1948
1949         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1950         if (jack)
1951                 jack->block_report = !ret;
1952
1953         mutex_unlock(&per_pin->lock);
1954         snd_hda_power_down_pm(codec);
1955         return ret;
1956 }
1957
1958 /* update ELD and jack state via audio component */
1959 static void sync_eld_via_acomp(struct hda_codec *codec,
1960                                struct hdmi_spec_per_pin *per_pin)
1961 {
1962         struct hdmi_spec *spec = codec->spec;
1963         struct hdmi_eld *eld = &spec->temp_eld;
1964         struct snd_jack *jack = NULL;
1965         int size;
1966
1967         mutex_lock(&per_pin->lock);
1968         size = snd_hdac_acomp_get_eld(&codec->bus->core, per_pin->pin_nid,
1969                                       &eld->monitor_present, eld->eld_buffer,
1970                                       ELD_MAX_SIZE);
1971         if (size < 0)
1972                 goto unlock;
1973         if (size > 0) {
1974                 size = min(size, ELD_MAX_SIZE);
1975                 if (snd_hdmi_parse_eld(codec, &eld->info,
1976                                        eld->eld_buffer, size) < 0)
1977                         size = -EINVAL;
1978         }
1979
1980         if (size > 0) {
1981                 eld->eld_valid = true;
1982                 eld->eld_size = size;
1983         } else {
1984                 eld->eld_valid = false;
1985                 eld->eld_size = 0;
1986         }
1987
1988         /* pcm_idx >=0 before update_eld() means it is in monitor
1989          * disconnected event. Jack must be fetched before update_eld()
1990          */
1991         if (per_pin->pcm_idx >= 0)
1992                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1993         update_eld(codec, per_pin, eld);
1994         if (jack == NULL && per_pin->pcm_idx >= 0)
1995                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1996         if (jack == NULL)
1997                 goto unlock;
1998         snd_jack_report(jack,
1999                         eld->monitor_present ? SND_JACK_AVOUT : 0);
2000  unlock:
2001         mutex_unlock(&per_pin->lock);
2002 }
2003
2004 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
2005 {
2006         struct hda_codec *codec = per_pin->codec;
2007         struct hdmi_spec *spec = codec->spec;
2008         int ret;
2009
2010         mutex_lock(&spec->pcm_lock);
2011         if (codec_has_acomp(codec)) {
2012                 sync_eld_via_acomp(codec, per_pin);
2013                 ret = false; /* don't call snd_hda_jack_report_sync() */
2014         } else {
2015                 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
2016         }
2017         mutex_unlock(&spec->pcm_lock);
2018
2019         return ret;
2020 }
2021
2022 static void hdmi_repoll_eld(struct work_struct *work)
2023 {
2024         struct hdmi_spec_per_pin *per_pin =
2025         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
2026
2027         if (per_pin->repoll_count++ > 6)
2028                 per_pin->repoll_count = 0;
2029
2030         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
2031                 snd_hda_jack_report_sync(per_pin->codec);
2032 }
2033
2034 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2035                                              hda_nid_t nid);
2036
2037 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
2038 {
2039         struct hdmi_spec *spec = codec->spec;
2040         unsigned int caps, config;
2041         int pin_idx;
2042         struct hdmi_spec_per_pin *per_pin;
2043         int err;
2044
2045         caps = snd_hda_query_pin_caps(codec, pin_nid);
2046         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
2047                 return 0;
2048
2049         config = snd_hda_codec_get_pincfg(codec, pin_nid);
2050         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
2051                 return 0;
2052
2053         if (is_haswell_plus(codec))
2054                 intel_haswell_fixup_connect_list(codec, pin_nid);
2055
2056         pin_idx = spec->num_pins;
2057         per_pin = snd_array_new(&spec->pins);
2058         if (!per_pin)
2059                 return -ENOMEM;
2060
2061         per_pin->pin_nid = pin_nid;
2062         per_pin->non_pcm = false;
2063         if (spec->dyn_pcm_assign)
2064                 per_pin->pcm_idx = -1;
2065         else {
2066                 per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
2067                 per_pin->pcm_idx = pin_idx;
2068         }
2069         per_pin->pin_nid_idx = pin_idx;
2070
2071         err = hdmi_read_pin_conn(codec, pin_idx);
2072         if (err < 0)
2073                 return err;
2074
2075         spec->num_pins++;
2076
2077         return 0;
2078 }
2079
2080 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
2081 {
2082         struct hdmi_spec *spec = codec->spec;
2083         struct hdmi_spec_per_cvt *per_cvt;
2084         unsigned int chans;
2085         int err;
2086
2087         chans = get_wcaps(codec, cvt_nid);
2088         chans = get_wcaps_channels(chans);
2089
2090         per_cvt = snd_array_new(&spec->cvts);
2091         if (!per_cvt)
2092                 return -ENOMEM;
2093
2094         per_cvt->cvt_nid = cvt_nid;
2095         per_cvt->channels_min = 2;
2096         if (chans <= 16) {
2097                 per_cvt->channels_max = chans;
2098                 if (chans > spec->channels_max)
2099                         spec->channels_max = chans;
2100         }
2101
2102         err = snd_hda_query_supported_pcm(codec, cvt_nid,
2103                                           &per_cvt->rates,
2104                                           &per_cvt->formats,
2105                                           &per_cvt->maxbps);
2106         if (err < 0)
2107                 return err;
2108
2109         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
2110                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
2111         spec->num_cvts++;
2112
2113         return 0;
2114 }
2115
2116 static int hdmi_parse_codec(struct hda_codec *codec)
2117 {
2118         hda_nid_t nid;
2119         int i, nodes;
2120
2121         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
2122         if (!nid || nodes < 0) {
2123                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
2124                 return -EINVAL;
2125         }
2126
2127         for (i = 0; i < nodes; i++, nid++) {
2128                 unsigned int caps;
2129                 unsigned int type;
2130
2131                 caps = get_wcaps(codec, nid);
2132                 type = get_wcaps_type(caps);
2133
2134                 if (!(caps & AC_WCAP_DIGITAL))
2135                         continue;
2136
2137                 switch (type) {
2138                 case AC_WID_AUD_OUT:
2139                         hdmi_add_cvt(codec, nid);
2140                         break;
2141                 case AC_WID_PIN:
2142                         hdmi_add_pin(codec, nid);
2143                         break;
2144                 }
2145         }
2146
2147         return 0;
2148 }
2149
2150 /*
2151  */
2152 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
2153 {
2154         struct hda_spdif_out *spdif;
2155         bool non_pcm;
2156
2157         mutex_lock(&codec->spdif_mutex);
2158         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
2159         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
2160         mutex_unlock(&codec->spdif_mutex);
2161         return non_pcm;
2162 }
2163
2164 /*
2165  * HDMI callbacks
2166  */
2167
2168 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2169                                            struct hda_codec *codec,
2170                                            unsigned int stream_tag,
2171                                            unsigned int format,
2172                                            struct snd_pcm_substream *substream)
2173 {
2174         hda_nid_t cvt_nid = hinfo->nid;
2175         struct hdmi_spec *spec = codec->spec;
2176         int pin_idx;
2177         struct hdmi_spec_per_pin *per_pin;
2178         hda_nid_t pin_nid;
2179         struct snd_pcm_runtime *runtime = substream->runtime;
2180         bool non_pcm;
2181         int pinctl;
2182         int err;
2183
2184         mutex_lock(&spec->pcm_lock);
2185         pin_idx = hinfo_to_pin_index(codec, hinfo);
2186         if (spec->dyn_pcm_assign && pin_idx < 0) {
2187                 /* when dyn_pcm_assign and pcm is not bound to a pin
2188                  * skip pin setup and return 0 to make audio playback
2189                  * be ongoing
2190                  */
2191                 intel_not_share_assigned_cvt_nid(codec, 0, cvt_nid);
2192                 snd_hda_codec_setup_stream(codec, cvt_nid,
2193                                         stream_tag, 0, format);
2194                 mutex_unlock(&spec->pcm_lock);
2195                 return 0;
2196         }
2197
2198         if (snd_BUG_ON(pin_idx < 0)) {
2199                 mutex_unlock(&spec->pcm_lock);
2200                 return -EINVAL;
2201         }
2202         per_pin = get_pin(spec, pin_idx);
2203         pin_nid = per_pin->pin_nid;
2204         if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
2205                 /* Verify pin:cvt selections to avoid silent audio after S3.
2206                  * After S3, the audio driver restores pin:cvt selections
2207                  * but this can happen before gfx is ready and such selection
2208                  * is overlooked by HW. Thus multiple pins can share a same
2209                  * default convertor and mute control will affect each other,
2210                  * which can cause a resumed audio playback become silent
2211                  * after S3.
2212                  */
2213                 intel_verify_pin_cvt_connect(codec, per_pin);
2214                 intel_not_share_assigned_cvt(codec, pin_nid, per_pin->mux_idx);
2215         }
2216
2217         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
2218         /* Todo: add DP1.2 MST audio support later */
2219         snd_hdac_sync_audio_rate(&codec->bus->core, pin_nid, runtime->rate);
2220
2221         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
2222         mutex_lock(&per_pin->lock);
2223         per_pin->channels = substream->runtime->channels;
2224         per_pin->setup = true;
2225
2226         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
2227         mutex_unlock(&per_pin->lock);
2228         if (spec->dyn_pin_out) {
2229                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
2230                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2231                 snd_hda_codec_write(codec, pin_nid, 0,
2232                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
2233                                     pinctl | PIN_OUT);
2234         }
2235
2236         err = spec->ops.setup_stream(codec, cvt_nid, pin_nid,
2237                                  stream_tag, format);
2238         mutex_unlock(&spec->pcm_lock);
2239         return err;
2240 }
2241
2242 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2243                                              struct hda_codec *codec,
2244                                              struct snd_pcm_substream *substream)
2245 {
2246         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
2247         return 0;
2248 }
2249
2250 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
2251                           struct hda_codec *codec,
2252                           struct snd_pcm_substream *substream)
2253 {
2254         struct hdmi_spec *spec = codec->spec;
2255         int cvt_idx, pin_idx, pcm_idx;
2256         struct hdmi_spec_per_cvt *per_cvt;
2257         struct hdmi_spec_per_pin *per_pin;
2258         int pinctl;
2259
2260         if (hinfo->nid) {
2261                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
2262                 if (snd_BUG_ON(pcm_idx < 0))
2263                         return -EINVAL;
2264                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
2265                 if (snd_BUG_ON(cvt_idx < 0))
2266                         return -EINVAL;
2267                 per_cvt = get_cvt(spec, cvt_idx);
2268
2269                 snd_BUG_ON(!per_cvt->assigned);
2270                 per_cvt->assigned = 0;
2271                 hinfo->nid = 0;
2272
2273                 mutex_lock(&spec->pcm_lock);
2274                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2275                 clear_bit(pcm_idx, &spec->pcm_in_use);
2276                 pin_idx = hinfo_to_pin_index(codec, hinfo);
2277                 if (spec->dyn_pcm_assign && pin_idx < 0) {
2278                         mutex_unlock(&spec->pcm_lock);
2279                         return 0;
2280                 }
2281
2282                 if (snd_BUG_ON(pin_idx < 0)) {
2283                         mutex_unlock(&spec->pcm_lock);
2284                         return -EINVAL;
2285                 }
2286                 per_pin = get_pin(spec, pin_idx);
2287
2288                 if (spec->dyn_pin_out) {
2289                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2290                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2291                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2292                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
2293                                             pinctl & ~PIN_OUT);
2294                 }
2295
2296                 mutex_lock(&per_pin->lock);
2297                 per_pin->chmap_set = false;
2298                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2299
2300                 per_pin->setup = false;
2301                 per_pin->channels = 0;
2302                 mutex_unlock(&per_pin->lock);
2303                 mutex_unlock(&spec->pcm_lock);
2304         }
2305
2306         return 0;
2307 }
2308
2309 static const struct hda_pcm_ops generic_ops = {
2310         .open = hdmi_pcm_open,
2311         .close = hdmi_pcm_close,
2312         .prepare = generic_hdmi_playback_pcm_prepare,
2313         .cleanup = generic_hdmi_playback_pcm_cleanup,
2314 };
2315
2316 /*
2317  * ALSA API channel-map control callbacks
2318  */
2319 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
2320                                struct snd_ctl_elem_info *uinfo)
2321 {
2322         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2323         struct hda_codec *codec = info->private_data;
2324         struct hdmi_spec *spec = codec->spec;
2325         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2326         uinfo->count = spec->channels_max;
2327         uinfo->value.integer.min = 0;
2328         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
2329         return 0;
2330 }
2331
2332 static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
2333                                                   int channels)
2334 {
2335         /* If the speaker allocation matches the channel count, it is OK.*/
2336         if (cap->channels != channels)
2337                 return -1;
2338
2339         /* all channels are remappable freely */
2340         return SNDRV_CTL_TLVT_CHMAP_VAR;
2341 }
2342
2343 static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
2344                                         unsigned int *chmap, int channels)
2345 {
2346         int count = 0;
2347         int c;
2348
2349         for (c = 7; c >= 0; c--) {
2350                 int spk = cap->speakers[c];
2351                 if (!spk)
2352                         continue;
2353
2354                 chmap[count++] = spk_to_chmap(spk);
2355         }
2356
2357         WARN_ON(count != channels);
2358 }
2359
2360 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
2361                               unsigned int size, unsigned int __user *tlv)
2362 {
2363         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2364         struct hda_codec *codec = info->private_data;
2365         struct hdmi_spec *spec = codec->spec;
2366         unsigned int __user *dst;
2367         int chs, count = 0;
2368
2369         if (size < 8)
2370                 return -ENOMEM;
2371         if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
2372                 return -EFAULT;
2373         size -= 8;
2374         dst = tlv + 2;
2375         for (chs = 2; chs <= spec->channels_max; chs++) {
2376                 int i;
2377                 struct cea_channel_speaker_allocation *cap;
2378                 cap = channel_allocations;
2379                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
2380                         int chs_bytes = chs * 4;
2381                         int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
2382                         unsigned int tlv_chmap[8];
2383
2384                         if (type < 0)
2385                                 continue;
2386                         if (size < 8)
2387                                 return -ENOMEM;
2388                         if (put_user(type, dst) ||
2389                             put_user(chs_bytes, dst + 1))
2390                                 return -EFAULT;
2391                         dst += 2;
2392                         size -= 8;
2393                         count += 8;
2394                         if (size < chs_bytes)
2395                                 return -ENOMEM;
2396                         size -= chs_bytes;
2397                         count += chs_bytes;
2398                         spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
2399                         if (copy_to_user(dst, tlv_chmap, chs_bytes))
2400                                 return -EFAULT;
2401                         dst += chs;
2402                 }
2403         }
2404         if (put_user(count, tlv + 1))
2405                 return -EFAULT;
2406         return 0;
2407 }
2408
2409 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
2410                               struct snd_ctl_elem_value *ucontrol)
2411 {
2412         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2413         struct hda_codec *codec = info->private_data;
2414         struct hdmi_spec *spec = codec->spec;
2415         int pcm_idx = kcontrol->private_value;
2416         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2417         int i;
2418
2419         if (!per_pin) {
2420                 for (i = 0; i < spec->channels_max; i++)
2421                         ucontrol->value.integer.value[i] = 0;
2422                 return 0;
2423         }
2424
2425         for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
2426                 ucontrol->value.integer.value[i] = per_pin->chmap[i];
2427         return 0;
2428 }
2429
2430 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
2431                               struct snd_ctl_elem_value *ucontrol)
2432 {
2433         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2434         struct hda_codec *codec = info->private_data;
2435         struct hdmi_spec *spec = codec->spec;
2436         int pcm_idx = kcontrol->private_value;
2437         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2438         unsigned int ctl_idx;
2439         struct snd_pcm_substream *substream;
2440         unsigned char chmap[8];
2441         int i, err, ca, prepared = 0;
2442
2443         /* No monitor is connected in dyn_pcm_assign.
2444          * It's invalid to setup the chmap
2445          */
2446         if (!per_pin)
2447                 return 0;
2448
2449         ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2450         substream = snd_pcm_chmap_substream(info, ctl_idx);
2451         if (!substream || !substream->runtime)
2452                 return 0; /* just for avoiding error from alsactl restore */
2453         switch (substream->runtime->status->state) {
2454         case SNDRV_PCM_STATE_OPEN:
2455         case SNDRV_PCM_STATE_SETUP:
2456                 break;
2457         case SNDRV_PCM_STATE_PREPARED:
2458                 prepared = 1;
2459                 break;
2460         default:
2461                 return -EBUSY;
2462         }
2463         memset(chmap, 0, sizeof(chmap));
2464         for (i = 0; i < ARRAY_SIZE(chmap); i++)
2465                 chmap[i] = ucontrol->value.integer.value[i];
2466         if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
2467                 return 0;
2468         ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
2469         if (ca < 0)
2470                 return -EINVAL;
2471         if (spec->ops.chmap_validate) {
2472                 err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
2473                 if (err)
2474                         return err;
2475         }
2476         mutex_lock(&per_pin->lock);
2477         per_pin->chmap_set = true;
2478         memcpy(per_pin->chmap, chmap, sizeof(chmap));
2479         if (prepared)
2480                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2481         mutex_unlock(&per_pin->lock);
2482
2483         return 0;
2484 }
2485
2486 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2487 {
2488         struct hdmi_spec *spec = codec->spec;
2489         int pin_idx;
2490
2491         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2492                 struct hda_pcm *info;
2493                 struct hda_pcm_stream *pstr;
2494
2495                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", pin_idx);
2496                 if (!info)
2497                         return -ENOMEM;
2498
2499                 spec->pcm_rec[pin_idx].pcm = info;
2500                 spec->pcm_used++;
2501                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2502                 info->own_chmap = true;
2503
2504                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2505                 pstr->substreams = 1;
2506                 pstr->ops = generic_ops;
2507                 /* other pstr fields are set in open */
2508         }
2509
2510         return 0;
2511 }
2512
2513 static void free_hdmi_jack_priv(struct snd_jack *jack)
2514 {
2515         struct hdmi_pcm *pcm = jack->private_data;
2516
2517         pcm->jack = NULL;
2518 }
2519
2520 static int add_hdmi_jack_kctl(struct hda_codec *codec,
2521                                struct hdmi_spec *spec,
2522                                int pcm_idx,
2523                                const char *name)
2524 {
2525         struct snd_jack *jack;
2526         int err;
2527
2528         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
2529                            true, false);
2530         if (err < 0)
2531                 return err;
2532
2533         spec->pcm_rec[pcm_idx].jack = jack;
2534         jack->private_data = &spec->pcm_rec[pcm_idx];
2535         jack->private_free = free_hdmi_jack_priv;
2536         return 0;
2537 }
2538
2539 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2540 {
2541         char hdmi_str[32] = "HDMI/DP";
2542         struct hdmi_spec *spec = codec->spec;
2543         struct hdmi_spec_per_pin *per_pin;
2544         struct hda_jack_tbl *jack;
2545         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2546         bool phantom_jack;
2547         int ret;
2548
2549         if (pcmdev > 0)
2550                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2551
2552         if (spec->dyn_pcm_assign)
2553                 return add_hdmi_jack_kctl(codec, spec, pcm_idx, hdmi_str);
2554
2555         /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
2556         /* if !dyn_pcm_assign, it must be non-MST mode.
2557          * This means pcms and pins are statically mapped.
2558          * And pcm_idx is pin_idx.
2559          */
2560         per_pin = get_pin(spec, pcm_idx);
2561         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
2562         if (phantom_jack)
2563                 strncat(hdmi_str, " Phantom",
2564                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2565         ret = snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str,
2566                                     phantom_jack);
2567         if (ret < 0)
2568                 return ret;
2569         jack = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
2570         if (jack == NULL)
2571                 return 0;
2572         /* assign jack->jack to pcm_rec[].jack to
2573          * align with dyn_pcm_assign mode
2574          */
2575         spec->pcm_rec[pcm_idx].jack = jack->jack;
2576         return 0;
2577 }
2578
2579 static int generic_hdmi_build_controls(struct hda_codec *codec)
2580 {
2581         struct hdmi_spec *spec = codec->spec;
2582         int err;
2583         int pin_idx, pcm_idx;
2584
2585
2586         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2587                 err = generic_hdmi_build_jack(codec, pcm_idx);
2588                 if (err < 0)
2589                         return err;
2590
2591                 /* create the spdif for each pcm
2592                  * pin will be bound when monitor is connected
2593                  */
2594                 if (spec->dyn_pcm_assign)
2595                         err = snd_hda_create_dig_out_ctls(codec,
2596                                           0, spec->cvt_nids[0],
2597                                           HDA_PCM_TYPE_HDMI);
2598                 else {
2599                         struct hdmi_spec_per_pin *per_pin =
2600                                 get_pin(spec, pcm_idx);
2601                         err = snd_hda_create_dig_out_ctls(codec,
2602                                                   per_pin->pin_nid,
2603                                                   per_pin->mux_nids[0],
2604                                                   HDA_PCM_TYPE_HDMI);
2605                 }
2606                 if (err < 0)
2607                         return err;
2608                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2609         }
2610
2611         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2612                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2613
2614                 /* add control for ELD Bytes */
2615                 err = hdmi_create_eld_ctl(codec, pin_idx,
2616                                 get_pcm_rec(spec, pin_idx)->device);
2617
2618                 if (err < 0)
2619                         return err;
2620
2621                 hdmi_present_sense(per_pin, 0);
2622         }
2623
2624         /* add channel maps */
2625         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2626                 struct hda_pcm *pcm;
2627                 struct snd_pcm_chmap *chmap;
2628                 struct snd_kcontrol *kctl;
2629                 int i;
2630
2631                 pcm = get_pcm_rec(spec, pcm_idx);
2632                 if (!pcm || !pcm->pcm)
2633                         break;
2634                 err = snd_pcm_add_chmap_ctls(pcm->pcm,
2635                                              SNDRV_PCM_STREAM_PLAYBACK,
2636                                              NULL, 0, pcm_idx, &chmap);
2637                 if (err < 0)
2638                         return err;
2639                 /* override handlers */
2640                 chmap->private_data = codec;
2641                 kctl = chmap->kctl;
2642                 for (i = 0; i < kctl->count; i++)
2643                         kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
2644                 kctl->info = hdmi_chmap_ctl_info;
2645                 kctl->get = hdmi_chmap_ctl_get;
2646                 kctl->put = hdmi_chmap_ctl_put;
2647                 kctl->tlv.c = hdmi_chmap_ctl_tlv;
2648         }
2649
2650         return 0;
2651 }
2652
2653 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2654 {
2655         struct hdmi_spec *spec = codec->spec;
2656         int pin_idx;
2657
2658         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2659                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2660
2661                 per_pin->codec = codec;
2662                 mutex_init(&per_pin->lock);
2663                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2664                 eld_proc_new(per_pin, pin_idx);
2665         }
2666         return 0;
2667 }
2668
2669 static int generic_hdmi_init(struct hda_codec *codec)
2670 {
2671         struct hdmi_spec *spec = codec->spec;
2672         int pin_idx;
2673
2674         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2675                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2676                 hda_nid_t pin_nid = per_pin->pin_nid;
2677
2678                 hdmi_init_pin(codec, pin_nid);
2679                 if (!codec_has_acomp(codec))
2680                         snd_hda_jack_detect_enable_callback(codec, pin_nid,
2681                                 codec->jackpoll_interval > 0 ?
2682                                 jack_callback : NULL);
2683         }
2684         return 0;
2685 }
2686
2687 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2688 {
2689         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2690         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2691 }
2692
2693 static void hdmi_array_free(struct hdmi_spec *spec)
2694 {
2695         snd_array_free(&spec->pins);
2696         snd_array_free(&spec->cvts);
2697 }
2698
2699 static void generic_hdmi_free(struct hda_codec *codec)
2700 {
2701         struct hdmi_spec *spec = codec->spec;
2702         int pin_idx, pcm_idx;
2703
2704         if (codec_has_acomp(codec))
2705                 snd_hdac_i915_register_notifier(NULL);
2706
2707         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2708                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2709                 cancel_delayed_work_sync(&per_pin->work);
2710                 eld_proc_free(per_pin);
2711         }
2712
2713         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2714                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2715                         continue;
2716                 if (spec->dyn_pcm_assign)
2717                         snd_device_free(codec->card,
2718                                         spec->pcm_rec[pcm_idx].jack);
2719                 else
2720                         spec->pcm_rec[pcm_idx].jack = NULL;
2721         }
2722
2723         if (spec->i915_bound)
2724                 snd_hdac_i915_exit(&codec->bus->core);
2725         hdmi_array_free(spec);
2726         kfree(spec);
2727 }
2728
2729 #ifdef CONFIG_PM
2730 static int generic_hdmi_resume(struct hda_codec *codec)
2731 {
2732         struct hdmi_spec *spec = codec->spec;
2733         int pin_idx;
2734
2735         codec->patch_ops.init(codec);
2736         regcache_sync(codec->core.regmap);
2737
2738         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2739                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2740                 hdmi_present_sense(per_pin, 1);
2741         }
2742         return 0;
2743 }
2744 #endif
2745
2746 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2747         .init                   = generic_hdmi_init,
2748         .free                   = generic_hdmi_free,
2749         .build_pcms             = generic_hdmi_build_pcms,
2750         .build_controls         = generic_hdmi_build_controls,
2751         .unsol_event            = hdmi_unsol_event,
2752 #ifdef CONFIG_PM
2753         .resume                 = generic_hdmi_resume,
2754 #endif
2755 };
2756
2757 static const struct hdmi_ops generic_standard_hdmi_ops = {
2758         .pin_get_eld                            = snd_hdmi_get_eld,
2759         .pin_get_slot_channel                   = hdmi_pin_get_slot_channel,
2760         .pin_set_slot_channel                   = hdmi_pin_set_slot_channel,
2761         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2762         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2763         .setup_stream                           = hdmi_setup_stream,
2764         .chmap_cea_alloc_validate_get_type      = hdmi_chmap_cea_alloc_validate_get_type,
2765         .cea_alloc_to_tlv_chmap                 = hdmi_cea_alloc_to_tlv_chmap,
2766 };
2767
2768
2769 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2770                                              hda_nid_t nid)
2771 {
2772         struct hdmi_spec *spec = codec->spec;
2773         hda_nid_t conns[4];
2774         int nconns;
2775
2776         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2777         if (nconns == spec->num_cvts &&
2778             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2779                 return;
2780
2781         /* override pins connection list */
2782         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2783         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2784 }
2785
2786 #define INTEL_VENDOR_NID 0x08
2787 #define INTEL_GET_VENDOR_VERB 0xf81
2788 #define INTEL_SET_VENDOR_VERB 0x781
2789 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2790 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2791
2792 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2793                                           bool update_tree)
2794 {
2795         unsigned int vendor_param;
2796
2797         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2798                                 INTEL_GET_VENDOR_VERB, 0);
2799         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2800                 return;
2801
2802         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2803         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2804                                 INTEL_SET_VENDOR_VERB, vendor_param);
2805         if (vendor_param == -1)
2806                 return;
2807
2808         if (update_tree)
2809                 snd_hda_codec_update_widgets(codec);
2810 }
2811
2812 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2813 {
2814         unsigned int vendor_param;
2815
2816         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2817                                 INTEL_GET_VENDOR_VERB, 0);
2818         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2819                 return;
2820
2821         /* enable DP1.2 mode */
2822         vendor_param |= INTEL_EN_DP12;
2823         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2824         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2825                                 INTEL_SET_VENDOR_VERB, vendor_param);
2826 }
2827
2828 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2829  * Otherwise you may get severe h/w communication errors.
2830  */
2831 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2832                                 unsigned int power_state)
2833 {
2834         if (power_state == AC_PWRST_D0) {
2835                 intel_haswell_enable_all_pins(codec, false);
2836                 intel_haswell_fixup_enable_dp12(codec);
2837         }
2838
2839         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2840         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2841 }
2842
2843 static void intel_pin_eld_notify(void *audio_ptr, int port)
2844 {
2845         struct hda_codec *codec = audio_ptr;
2846         int pin_nid = port + 0x04;
2847
2848         /* skip notification during system suspend (but not in runtime PM);
2849          * the state will be updated at resume
2850          */
2851         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2852                 return;
2853         /* ditto during suspend/resume process itself */
2854         if (atomic_read(&(codec)->core.in_pm))
2855                 return;
2856
2857         check_presence_and_report(codec, pin_nid);
2858 }
2859
2860 static int patch_generic_hdmi(struct hda_codec *codec)
2861 {
2862         struct hdmi_spec *spec;
2863
2864         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2865         if (spec == NULL)
2866                 return -ENOMEM;
2867
2868         spec->ops = generic_standard_hdmi_ops;
2869         mutex_init(&spec->pcm_lock);
2870         codec->spec = spec;
2871         hdmi_array_init(spec, 4);
2872
2873         /* Try to bind with i915 for any Intel codecs (if not done yet) */
2874         if (!codec_has_acomp(codec) &&
2875             (codec->core.vendor_id >> 16) == 0x8086)
2876                 if (!snd_hdac_i915_init(&codec->bus->core))
2877                         spec->i915_bound = true;
2878
2879         if (is_haswell_plus(codec)) {
2880                 intel_haswell_enable_all_pins(codec, true);
2881                 intel_haswell_fixup_enable_dp12(codec);
2882         }
2883
2884         /* For Valleyview/Cherryview, only the display codec is in the display
2885          * power well and can use link_power ops to request/release the power.
2886          * For Haswell/Broadwell, the controller is also in the power well and
2887          * can cover the codec power request, and so need not set this flag.
2888          * For previous platforms, there is no such power well feature.
2889          */
2890         if (is_valleyview_plus(codec) || is_skylake(codec) ||
2891                         is_broxton(codec))
2892                 codec->core.link_power_control = 1;
2893
2894         if (codec_has_acomp(codec)) {
2895                 codec->depop_delay = 0;
2896                 spec->i915_audio_ops.audio_ptr = codec;
2897                 spec->i915_audio_ops.pin_eld_notify = intel_pin_eld_notify;
2898                 snd_hdac_i915_register_notifier(&spec->i915_audio_ops);
2899         }
2900
2901         if (hdmi_parse_codec(codec) < 0) {
2902                 if (spec->i915_bound)
2903                         snd_hdac_i915_exit(&codec->bus->core);
2904                 codec->spec = NULL;
2905                 kfree(spec);
2906                 return -EINVAL;
2907         }
2908         codec->patch_ops = generic_hdmi_patch_ops;
2909         if (is_haswell_plus(codec)) {
2910                 codec->patch_ops.set_power_state = haswell_set_power_state;
2911                 codec->dp_mst = true;
2912         }
2913
2914         /* Enable runtime pm for HDMI audio codec of HSW/BDW/SKL/BYT/BSW */
2915         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
2916                 codec->auto_runtime_pm = 1;
2917
2918         generic_hdmi_init_per_pins(codec);
2919
2920         init_channel_allocations();
2921
2922         WARN_ON(spec->dyn_pcm_assign && !codec_has_acomp(codec));
2923         return 0;
2924 }
2925
2926 /*
2927  * Shared non-generic implementations
2928  */
2929
2930 static int simple_playback_build_pcms(struct hda_codec *codec)
2931 {
2932         struct hdmi_spec *spec = codec->spec;
2933         struct hda_pcm *info;
2934         unsigned int chans;
2935         struct hda_pcm_stream *pstr;
2936         struct hdmi_spec_per_cvt *per_cvt;
2937
2938         per_cvt = get_cvt(spec, 0);
2939         chans = get_wcaps(codec, per_cvt->cvt_nid);
2940         chans = get_wcaps_channels(chans);
2941
2942         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2943         if (!info)
2944                 return -ENOMEM;
2945         spec->pcm_rec[0].pcm = info;
2946         info->pcm_type = HDA_PCM_TYPE_HDMI;
2947         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2948         *pstr = spec->pcm_playback;
2949         pstr->nid = per_cvt->cvt_nid;
2950         if (pstr->channels_max <= 2 && chans && chans <= 16)
2951                 pstr->channels_max = chans;
2952
2953         return 0;
2954 }
2955
2956 /* unsolicited event for jack sensing */
2957 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2958                                     unsigned int res)
2959 {
2960         snd_hda_jack_set_dirty_all(codec);
2961         snd_hda_jack_report_sync(codec);
2962 }
2963
2964 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2965  * as long as spec->pins[] is set correctly
2966  */
2967 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2968
2969 static int simple_playback_build_controls(struct hda_codec *codec)
2970 {
2971         struct hdmi_spec *spec = codec->spec;
2972         struct hdmi_spec_per_cvt *per_cvt;
2973         int err;
2974
2975         per_cvt = get_cvt(spec, 0);
2976         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2977                                           per_cvt->cvt_nid,
2978                                           HDA_PCM_TYPE_HDMI);
2979         if (err < 0)
2980                 return err;
2981         return simple_hdmi_build_jack(codec, 0);
2982 }
2983
2984 static int simple_playback_init(struct hda_codec *codec)
2985 {
2986         struct hdmi_spec *spec = codec->spec;
2987         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2988         hda_nid_t pin = per_pin->pin_nid;
2989
2990         snd_hda_codec_write(codec, pin, 0,
2991                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2992         /* some codecs require to unmute the pin */
2993         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2994                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2995                                     AMP_OUT_UNMUTE);
2996         snd_hda_jack_detect_enable(codec, pin);
2997         return 0;
2998 }
2999
3000 static void simple_playback_free(struct hda_codec *codec)
3001 {
3002         struct hdmi_spec *spec = codec->spec;
3003
3004         hdmi_array_free(spec);
3005         kfree(spec);
3006 }
3007
3008 /*
3009  * Nvidia specific implementations
3010  */
3011
3012 #define Nv_VERB_SET_Channel_Allocation          0xF79
3013 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
3014 #define Nv_VERB_SET_Audio_Protection_On         0xF98
3015 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
3016
3017 #define nvhdmi_master_con_nid_7x        0x04
3018 #define nvhdmi_master_pin_nid_7x        0x05
3019
3020 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
3021         /*front, rear, clfe, rear_surr */
3022         0x6, 0x8, 0xa, 0xc,
3023 };
3024
3025 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
3026         /* set audio protect on */
3027         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3028         /* enable digital output on pin widget */
3029         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3030         {} /* terminator */
3031 };
3032
3033 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
3034         /* set audio protect on */
3035         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3036         /* enable digital output on pin widget */
3037         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3038         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3039         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3040         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3041         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3042         {} /* terminator */
3043 };
3044
3045 #ifdef LIMITED_RATE_FMT_SUPPORT
3046 /* support only the safe format and rate */
3047 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
3048 #define SUPPORTED_MAXBPS        16
3049 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
3050 #else
3051 /* support all rates and formats */
3052 #define SUPPORTED_RATES \
3053         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
3054         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
3055          SNDRV_PCM_RATE_192000)
3056 #define SUPPORTED_MAXBPS        24
3057 #define SUPPORTED_FORMATS \
3058         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
3059 #endif
3060
3061 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
3062 {
3063         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
3064         return 0;
3065 }
3066
3067 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
3068 {
3069         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
3070         return 0;
3071 }
3072
3073 static unsigned int channels_2_6_8[] = {
3074         2, 6, 8
3075 };
3076
3077 static unsigned int channels_2_8[] = {
3078         2, 8
3079 };
3080
3081 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
3082         .count = ARRAY_SIZE(channels_2_6_8),
3083         .list = channels_2_6_8,
3084         .mask = 0,
3085 };
3086
3087 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
3088         .count = ARRAY_SIZE(channels_2_8),
3089         .list = channels_2_8,
3090         .mask = 0,
3091 };
3092
3093 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
3094                                     struct hda_codec *codec,
3095                                     struct snd_pcm_substream *substream)
3096 {
3097         struct hdmi_spec *spec = codec->spec;
3098         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
3099
3100         switch (codec->preset->vendor_id) {
3101         case 0x10de0002:
3102         case 0x10de0003:
3103         case 0x10de0005:
3104         case 0x10de0006:
3105                 hw_constraints_channels = &hw_constraints_2_8_channels;
3106                 break;
3107         case 0x10de0007:
3108                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
3109                 break;
3110         default:
3111                 break;
3112         }
3113
3114         if (hw_constraints_channels != NULL) {
3115                 snd_pcm_hw_constraint_list(substream->runtime, 0,
3116                                 SNDRV_PCM_HW_PARAM_CHANNELS,
3117                                 hw_constraints_channels);
3118         } else {
3119                 snd_pcm_hw_constraint_step(substream->runtime, 0,
3120                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
3121         }
3122
3123         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3124 }
3125
3126 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
3127                                      struct hda_codec *codec,
3128                                      struct snd_pcm_substream *substream)
3129 {
3130         struct hdmi_spec *spec = codec->spec;
3131         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3132 }
3133
3134 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3135                                        struct hda_codec *codec,
3136                                        unsigned int stream_tag,
3137                                        unsigned int format,
3138                                        struct snd_pcm_substream *substream)
3139 {
3140         struct hdmi_spec *spec = codec->spec;
3141         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3142                                              stream_tag, format, substream);
3143 }
3144
3145 static const struct hda_pcm_stream simple_pcm_playback = {
3146         .substreams = 1,
3147         .channels_min = 2,
3148         .channels_max = 2,
3149         .ops = {
3150                 .open = simple_playback_pcm_open,
3151                 .close = simple_playback_pcm_close,
3152                 .prepare = simple_playback_pcm_prepare
3153         },
3154 };
3155
3156 static const struct hda_codec_ops simple_hdmi_patch_ops = {
3157         .build_controls = simple_playback_build_controls,
3158         .build_pcms = simple_playback_build_pcms,
3159         .init = simple_playback_init,
3160         .free = simple_playback_free,
3161         .unsol_event = simple_hdmi_unsol_event,
3162 };
3163
3164 static int patch_simple_hdmi(struct hda_codec *codec,
3165                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
3166 {
3167         struct hdmi_spec *spec;
3168         struct hdmi_spec_per_cvt *per_cvt;
3169         struct hdmi_spec_per_pin *per_pin;
3170
3171         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3172         if (!spec)
3173                 return -ENOMEM;
3174
3175         codec->spec = spec;
3176         hdmi_array_init(spec, 1);
3177
3178         spec->multiout.num_dacs = 0;  /* no analog */
3179         spec->multiout.max_channels = 2;
3180         spec->multiout.dig_out_nid = cvt_nid;
3181         spec->num_cvts = 1;
3182         spec->num_pins = 1;
3183         per_pin = snd_array_new(&spec->pins);
3184         per_cvt = snd_array_new(&spec->cvts);
3185         if (!per_pin || !per_cvt) {
3186                 simple_playback_free(codec);
3187                 return -ENOMEM;
3188         }
3189         per_cvt->cvt_nid = cvt_nid;
3190         per_pin->pin_nid = pin_nid;
3191         spec->pcm_playback = simple_pcm_playback;
3192
3193         codec->patch_ops = simple_hdmi_patch_ops;
3194
3195         return 0;
3196 }
3197
3198 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3199                                                     int channels)
3200 {
3201         unsigned int chanmask;
3202         int chan = channels ? (channels - 1) : 1;
3203
3204         switch (channels) {
3205         default:
3206         case 0:
3207         case 2:
3208                 chanmask = 0x00;
3209                 break;
3210         case 4:
3211                 chanmask = 0x08;
3212                 break;
3213         case 6:
3214                 chanmask = 0x0b;
3215                 break;
3216         case 8:
3217                 chanmask = 0x13;
3218                 break;
3219         }
3220
3221         /* Set the audio infoframe channel allocation and checksum fields.  The
3222          * channel count is computed implicitly by the hardware. */
3223         snd_hda_codec_write(codec, 0x1, 0,
3224                         Nv_VERB_SET_Channel_Allocation, chanmask);
3225
3226         snd_hda_codec_write(codec, 0x1, 0,
3227                         Nv_VERB_SET_Info_Frame_Checksum,
3228                         (0x71 - chan - chanmask));
3229 }
3230
3231 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3232                                    struct hda_codec *codec,
3233                                    struct snd_pcm_substream *substream)
3234 {
3235         struct hdmi_spec *spec = codec->spec;
3236         int i;
3237
3238         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3239                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3240         for (i = 0; i < 4; i++) {
3241                 /* set the stream id */
3242                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3243                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
3244                 /* set the stream format */
3245                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3246                                 AC_VERB_SET_STREAM_FORMAT, 0);
3247         }
3248
3249         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3250          * streams are disabled. */
3251         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3252
3253         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3254 }
3255
3256 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3257                                      struct hda_codec *codec,
3258                                      unsigned int stream_tag,
3259                                      unsigned int format,
3260                                      struct snd_pcm_substream *substream)
3261 {
3262         int chs;
3263         unsigned int dataDCC2, channel_id;
3264         int i;
3265         struct hdmi_spec *spec = codec->spec;
3266         struct hda_spdif_out *spdif;
3267         struct hdmi_spec_per_cvt *per_cvt;
3268
3269         mutex_lock(&codec->spdif_mutex);
3270         per_cvt = get_cvt(spec, 0);
3271         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3272
3273         chs = substream->runtime->channels;
3274
3275         dataDCC2 = 0x2;
3276
3277         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3278         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3279                 snd_hda_codec_write(codec,
3280                                 nvhdmi_master_con_nid_7x,
3281                                 0,
3282                                 AC_VERB_SET_DIGI_CONVERT_1,
3283                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3284
3285         /* set the stream id */
3286         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3287                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3288
3289         /* set the stream format */
3290         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3291                         AC_VERB_SET_STREAM_FORMAT, format);
3292
3293         /* turn on again (if needed) */
3294         /* enable and set the channel status audio/data flag */
3295         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3296                 snd_hda_codec_write(codec,
3297                                 nvhdmi_master_con_nid_7x,
3298                                 0,
3299                                 AC_VERB_SET_DIGI_CONVERT_1,
3300                                 spdif->ctls & 0xff);
3301                 snd_hda_codec_write(codec,
3302                                 nvhdmi_master_con_nid_7x,
3303                                 0,
3304                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3305         }
3306
3307         for (i = 0; i < 4; i++) {
3308                 if (chs == 2)
3309                         channel_id = 0;
3310                 else
3311                         channel_id = i * 2;
3312
3313                 /* turn off SPDIF once;
3314                  *otherwise the IEC958 bits won't be updated
3315                  */
3316                 if (codec->spdif_status_reset &&
3317                 (spdif->ctls & AC_DIG1_ENABLE))
3318                         snd_hda_codec_write(codec,
3319                                 nvhdmi_con_nids_7x[i],
3320                                 0,
3321                                 AC_VERB_SET_DIGI_CONVERT_1,
3322                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3323                 /* set the stream id */
3324                 snd_hda_codec_write(codec,
3325                                 nvhdmi_con_nids_7x[i],
3326                                 0,
3327                                 AC_VERB_SET_CHANNEL_STREAMID,
3328                                 (stream_tag << 4) | channel_id);
3329                 /* set the stream format */
3330                 snd_hda_codec_write(codec,
3331                                 nvhdmi_con_nids_7x[i],
3332                                 0,
3333                                 AC_VERB_SET_STREAM_FORMAT,
3334                                 format);
3335                 /* turn on again (if needed) */
3336                 /* enable and set the channel status audio/data flag */
3337                 if (codec->spdif_status_reset &&
3338                 (spdif->ctls & AC_DIG1_ENABLE)) {
3339                         snd_hda_codec_write(codec,
3340                                         nvhdmi_con_nids_7x[i],
3341                                         0,
3342                                         AC_VERB_SET_DIGI_CONVERT_1,
3343                                         spdif->ctls & 0xff);
3344                         snd_hda_codec_write(codec,
3345                                         nvhdmi_con_nids_7x[i],
3346                                         0,
3347                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3348                 }
3349         }
3350
3351         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3352
3353         mutex_unlock(&codec->spdif_mutex);
3354         return 0;
3355 }
3356
3357 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3358         .substreams = 1,
3359         .channels_min = 2,
3360         .channels_max = 8,
3361         .nid = nvhdmi_master_con_nid_7x,
3362         .rates = SUPPORTED_RATES,
3363         .maxbps = SUPPORTED_MAXBPS,
3364         .formats = SUPPORTED_FORMATS,
3365         .ops = {
3366                 .open = simple_playback_pcm_open,
3367                 .close = nvhdmi_8ch_7x_pcm_close,
3368                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3369         },
3370 };
3371
3372 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3373 {
3374         struct hdmi_spec *spec;
3375         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3376                                     nvhdmi_master_pin_nid_7x);
3377         if (err < 0)
3378                 return err;
3379
3380         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3381         /* override the PCM rates, etc, as the codec doesn't give full list */
3382         spec = codec->spec;
3383         spec->pcm_playback.rates = SUPPORTED_RATES;
3384         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3385         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3386         return 0;
3387 }
3388
3389 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3390 {
3391         struct hdmi_spec *spec = codec->spec;
3392         int err = simple_playback_build_pcms(codec);
3393         if (!err) {
3394                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3395                 info->own_chmap = true;
3396         }
3397         return err;
3398 }
3399
3400 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3401 {
3402         struct hdmi_spec *spec = codec->spec;
3403         struct hda_pcm *info;
3404         struct snd_pcm_chmap *chmap;
3405         int err;
3406
3407         err = simple_playback_build_controls(codec);
3408         if (err < 0)
3409                 return err;
3410
3411         /* add channel maps */
3412         info = get_pcm_rec(spec, 0);
3413         err = snd_pcm_add_chmap_ctls(info->pcm,
3414                                      SNDRV_PCM_STREAM_PLAYBACK,
3415                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3416         if (err < 0)
3417                 return err;
3418         switch (codec->preset->vendor_id) {
3419         case 0x10de0002:
3420         case 0x10de0003:
3421         case 0x10de0005:
3422         case 0x10de0006:
3423                 chmap->channel_mask = (1U << 2) | (1U << 8);
3424                 break;
3425         case 0x10de0007:
3426                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3427         }
3428         return 0;
3429 }
3430
3431 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3432 {
3433         struct hdmi_spec *spec;
3434         int err = patch_nvhdmi_2ch(codec);
3435         if (err < 0)
3436                 return err;
3437         spec = codec->spec;
3438         spec->multiout.max_channels = 8;
3439         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3440         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3441         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3442         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3443
3444         /* Initialize the audio infoframe channel mask and checksum to something
3445          * valid */
3446         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3447
3448         return 0;
3449 }
3450
3451 /*
3452  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3453  * - 0x10de0015
3454  * - 0x10de0040
3455  */
3456 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3457                                                     int channels)
3458 {
3459         if (cap->ca_index == 0x00 && channels == 2)
3460                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3461
3462         return hdmi_chmap_cea_alloc_validate_get_type(cap, channels);
3463 }
3464
3465 static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map)
3466 {
3467         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3468                 return -EINVAL;
3469
3470         return 0;
3471 }
3472
3473 static int patch_nvhdmi(struct hda_codec *codec)
3474 {
3475         struct hdmi_spec *spec;
3476         int err;
3477
3478         err = patch_generic_hdmi(codec);
3479         if (err)
3480                 return err;
3481
3482         spec = codec->spec;
3483         spec->dyn_pin_out = true;
3484
3485         spec->ops.chmap_cea_alloc_validate_get_type =
3486                 nvhdmi_chmap_cea_alloc_validate_get_type;
3487         spec->ops.chmap_validate = nvhdmi_chmap_validate;
3488
3489         return 0;
3490 }
3491
3492 /*
3493  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3494  * accessed using vendor-defined verbs. These registers can be used for
3495  * interoperability between the HDA and HDMI drivers.
3496  */
3497
3498 /* Audio Function Group node */
3499 #define NVIDIA_AFG_NID 0x01
3500
3501 /*
3502  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3503  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3504  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3505  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3506  * additional bit (at position 30) to signal the validity of the format.
3507  *
3508  * | 31      | 30    | 29  16 | 15   0 |
3509  * +---------+-------+--------+--------+
3510  * | TRIGGER | VALID | UNUSED | FORMAT |
3511  * +-----------------------------------|
3512  *
3513  * Note that for the trigger bit to take effect it needs to change value
3514  * (i.e. it needs to be toggled).
3515  */
3516 #define NVIDIA_GET_SCRATCH0             0xfa6
3517 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3518 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3519 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3520 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3521 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3522 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3523
3524 #define NVIDIA_GET_SCRATCH1             0xfab
3525 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3526 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3527 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3528 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3529
3530 /*
3531  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3532  * the format is invalidated so that the HDMI codec can be disabled.
3533  */
3534 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3535 {
3536         unsigned int value;
3537
3538         /* bits [31:30] contain the trigger and valid bits */
3539         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3540                                    NVIDIA_GET_SCRATCH0, 0);
3541         value = (value >> 24) & 0xff;
3542
3543         /* bits [15:0] are used to store the HDA format */
3544         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3545                             NVIDIA_SET_SCRATCH0_BYTE0,
3546                             (format >> 0) & 0xff);
3547         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3548                             NVIDIA_SET_SCRATCH0_BYTE1,
3549                             (format >> 8) & 0xff);
3550
3551         /* bits [16:24] are unused */
3552         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3553                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3554
3555         /*
3556          * Bit 30 signals that the data is valid and hence that HDMI audio can
3557          * be enabled.
3558          */
3559         if (format == 0)
3560                 value &= ~NVIDIA_SCRATCH_VALID;
3561         else
3562                 value |= NVIDIA_SCRATCH_VALID;
3563
3564         /*
3565          * Whenever the trigger bit is toggled, an interrupt is raised in the
3566          * HDMI codec. The HDMI driver will use that as trigger to update its
3567          * configuration.
3568          */
3569         value ^= NVIDIA_SCRATCH_TRIGGER;
3570
3571         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3572                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3573 }
3574
3575 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3576                                   struct hda_codec *codec,
3577                                   unsigned int stream_tag,
3578                                   unsigned int format,
3579                                   struct snd_pcm_substream *substream)
3580 {
3581         int err;
3582
3583         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3584                                                 format, substream);
3585         if (err < 0)
3586                 return err;
3587
3588         /* notify the HDMI codec of the format change */
3589         tegra_hdmi_set_format(codec, format);
3590
3591         return 0;
3592 }
3593
3594 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3595                                   struct hda_codec *codec,
3596                                   struct snd_pcm_substream *substream)
3597 {
3598         /* invalidate the format in the HDMI codec */
3599         tegra_hdmi_set_format(codec, 0);
3600
3601         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3602 }
3603
3604 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3605 {
3606         struct hdmi_spec *spec = codec->spec;
3607         unsigned int i;
3608
3609         for (i = 0; i < spec->num_pins; i++) {
3610                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3611
3612                 if (pcm->pcm_type == type)
3613                         return pcm;
3614         }
3615
3616         return NULL;
3617 }
3618
3619 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3620 {
3621         struct hda_pcm_stream *stream;
3622         struct hda_pcm *pcm;
3623         int err;
3624
3625         err = generic_hdmi_build_pcms(codec);
3626         if (err < 0)
3627                 return err;
3628
3629         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3630         if (!pcm)
3631                 return -ENODEV;
3632
3633         /*
3634          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3635          * codec about format changes.
3636          */
3637         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3638         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3639         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3640
3641         return 0;
3642 }
3643
3644 static int patch_tegra_hdmi(struct hda_codec *codec)
3645 {
3646         int err;
3647
3648         err = patch_generic_hdmi(codec);
3649         if (err)
3650                 return err;
3651
3652         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3653
3654         return 0;
3655 }
3656
3657 /*
3658  * ATI/AMD-specific implementations
3659  */
3660
3661 #define is_amdhdmi_rev3_or_later(codec) \
3662         ((codec)->core.vendor_id == 0x1002aa01 && \
3663          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3664 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3665
3666 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3667 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3668 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3669 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3670 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3671 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3672 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3673 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3674 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3675 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3676 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3677 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3678 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3679 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3680 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3681 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3682 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3683 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3684 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3685 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3686 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3687 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3688 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3689 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3690 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3691
3692 /* AMD specific HDA cvt verbs */
3693 #define ATI_VERB_SET_RAMP_RATE          0x770
3694 #define ATI_VERB_GET_RAMP_RATE          0xf70
3695
3696 #define ATI_OUT_ENABLE 0x1
3697
3698 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3699 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3700
3701 #define ATI_HBR_CAPABLE 0x01
3702 #define ATI_HBR_ENABLE 0x10
3703
3704 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3705                            unsigned char *buf, int *eld_size)
3706 {
3707         /* call hda_eld.c ATI/AMD-specific function */
3708         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3709                                     is_amdhdmi_rev3_or_later(codec));
3710 }
3711
3712 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
3713                                         int active_channels, int conn_type)
3714 {
3715         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3716 }
3717
3718 static int atihdmi_paired_swap_fc_lfe(int pos)
3719 {
3720         /*
3721          * ATI/AMD have automatic FC/LFE swap built-in
3722          * when in pairwise mapping mode.
3723          */
3724
3725         switch (pos) {
3726                 /* see channel_allocations[].speakers[] */
3727                 case 2: return 3;
3728                 case 3: return 2;
3729                 default: break;
3730         }
3731
3732         return pos;
3733 }
3734
3735 static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
3736 {
3737         struct cea_channel_speaker_allocation *cap;
3738         int i, j;
3739
3740         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3741
3742         cap = &channel_allocations[get_channel_allocation_order(ca)];
3743         for (i = 0; i < chs; ++i) {
3744                 int mask = to_spk_mask(map[i]);
3745                 bool ok = false;
3746                 bool companion_ok = false;
3747
3748                 if (!mask)
3749                         continue;
3750
3751                 for (j = 0 + i % 2; j < 8; j += 2) {
3752                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3753                         if (cap->speakers[chan_idx] == mask) {
3754                                 /* channel is in a supported position */
3755                                 ok = true;
3756
3757                                 if (i % 2 == 0 && i + 1 < chs) {
3758                                         /* even channel, check the odd companion */
3759                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3760                                         int comp_mask_req = to_spk_mask(map[i+1]);
3761                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3762
3763                                         if (comp_mask_req == comp_mask_act)
3764                                                 companion_ok = true;
3765                                         else
3766                                                 return -EINVAL;
3767                                 }
3768                                 break;
3769                         }
3770                 }
3771
3772                 if (!ok)
3773                         return -EINVAL;
3774
3775                 if (companion_ok)
3776                         i++; /* companion channel already checked */
3777         }
3778
3779         return 0;
3780 }
3781
3782 static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3783                                         int hdmi_slot, int stream_channel)
3784 {
3785         int verb;
3786         int ati_channel_setup = 0;
3787
3788         if (hdmi_slot > 7)
3789                 return -EINVAL;
3790
3791         if (!has_amd_full_remap_support(codec)) {
3792                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3793
3794                 /* In case this is an odd slot but without stream channel, do not
3795                  * disable the slot since the corresponding even slot could have a
3796                  * channel. In case neither have a channel, the slot pair will be
3797                  * disabled when this function is called for the even slot. */
3798                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3799                         return 0;
3800
3801                 hdmi_slot -= hdmi_slot % 2;
3802
3803                 if (stream_channel != 0xf)
3804                         stream_channel -= stream_channel % 2;
3805         }
3806
3807         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3808
3809         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3810
3811         if (stream_channel != 0xf)
3812                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3813
3814         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3815 }
3816
3817 static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3818                                         int asp_slot)
3819 {
3820         bool was_odd = false;
3821         int ati_asp_slot = asp_slot;
3822         int verb;
3823         int ati_channel_setup;
3824
3825         if (asp_slot > 7)
3826                 return -EINVAL;
3827
3828         if (!has_amd_full_remap_support(codec)) {
3829                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3830                 if (ati_asp_slot % 2 != 0) {
3831                         ati_asp_slot -= 1;
3832                         was_odd = true;
3833                 }
3834         }
3835
3836         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3837
3838         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3839
3840         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3841                 return 0xf;
3842
3843         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3844 }
3845
3846 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3847                                                             int channels)
3848 {
3849         int c;
3850
3851         /*
3852          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3853          * we need to take that into account (a single channel may take 2
3854          * channel slots if we need to carry a silent channel next to it).
3855          * On Rev3+ AMD codecs this function is not used.
3856          */
3857         int chanpairs = 0;
3858
3859         /* We only produce even-numbered channel count TLVs */
3860         if ((channels % 2) != 0)
3861                 return -1;
3862
3863         for (c = 0; c < 7; c += 2) {
3864                 if (cap->speakers[c] || cap->speakers[c+1])
3865                         chanpairs++;
3866         }
3867
3868         if (chanpairs * 2 != channels)
3869                 return -1;
3870
3871         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3872 }
3873
3874 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
3875                                                   unsigned int *chmap, int channels)
3876 {
3877         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3878         int count = 0;
3879         int c;
3880
3881         for (c = 7; c >= 0; c--) {
3882                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3883                 int spk = cap->speakers[chan];
3884                 if (!spk) {
3885                         /* add N/A channel if the companion channel is occupied */
3886                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3887                                 chmap[count++] = SNDRV_CHMAP_NA;
3888
3889                         continue;
3890                 }
3891
3892                 chmap[count++] = spk_to_chmap(spk);
3893         }
3894
3895         WARN_ON(count != channels);
3896 }
3897
3898 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3899                                  bool hbr)
3900 {
3901         int hbr_ctl, hbr_ctl_new;
3902
3903         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3904         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3905                 if (hbr)
3906                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3907                 else
3908                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3909
3910                 codec_dbg(codec,
3911                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3912                                 pin_nid,
3913                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3914                                 hbr_ctl_new);
3915
3916                 if (hbr_ctl != hbr_ctl_new)
3917                         snd_hda_codec_write(codec, pin_nid, 0,
3918                                                 ATI_VERB_SET_HBR_CONTROL,
3919                                                 hbr_ctl_new);
3920
3921         } else if (hbr)
3922                 return -EINVAL;
3923
3924         return 0;
3925 }
3926
3927 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3928                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3929 {
3930
3931         if (is_amdhdmi_rev3_or_later(codec)) {
3932                 int ramp_rate = 180; /* default as per AMD spec */
3933                 /* disable ramp-up/down for non-pcm as per AMD spec */
3934                 if (format & AC_FMT_TYPE_NON_PCM)
3935                         ramp_rate = 0;
3936
3937                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3938         }
3939
3940         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3941 }
3942
3943
3944 static int atihdmi_init(struct hda_codec *codec)
3945 {
3946         struct hdmi_spec *spec = codec->spec;
3947         int pin_idx, err;
3948
3949         err = generic_hdmi_init(codec);
3950
3951         if (err)
3952                 return err;
3953
3954         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3955                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3956
3957                 /* make sure downmix information in infoframe is zero */
3958                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3959
3960                 /* enable channel-wise remap mode if supported */
3961                 if (has_amd_full_remap_support(codec))
3962                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3963                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3964                                             ATI_MULTICHANNEL_MODE_SINGLE);
3965         }
3966
3967         return 0;
3968 }
3969
3970 static int patch_atihdmi(struct hda_codec *codec)
3971 {
3972         struct hdmi_spec *spec;
3973         struct hdmi_spec_per_cvt *per_cvt;
3974         int err, cvt_idx;
3975
3976         err = patch_generic_hdmi(codec);
3977
3978         if (err)
3979                 return err;
3980
3981         codec->patch_ops.init = atihdmi_init;
3982
3983         spec = codec->spec;
3984
3985         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3986         spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3987         spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3988         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3989         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3990         spec->ops.setup_stream = atihdmi_setup_stream;
3991
3992         if (!has_amd_full_remap_support(codec)) {
3993                 /* override to ATI/AMD-specific versions with pairwise mapping */
3994                 spec->ops.chmap_cea_alloc_validate_get_type =
3995                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3996                 spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
3997                 spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
3998         }
3999
4000         /* ATI/AMD converters do not advertise all of their capabilities */
4001         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
4002                 per_cvt = get_cvt(spec, cvt_idx);
4003                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
4004                 per_cvt->rates |= SUPPORTED_RATES;
4005                 per_cvt->formats |= SUPPORTED_FORMATS;
4006                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
4007         }
4008
4009         spec->channels_max = max(spec->channels_max, 8u);
4010
4011         return 0;
4012 }
4013
4014 /* VIA HDMI Implementation */
4015 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
4016 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
4017
4018 static int patch_via_hdmi(struct hda_codec *codec)
4019 {
4020         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
4021 }
4022
4023 /*
4024  * patch entries
4025  */
4026 static const struct hda_device_id snd_hda_id_hdmi[] = {
4027 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
4028 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
4029 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
4030 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
4031 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
4032 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
4033 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
4034 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4035 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4036 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4037 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4038 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
4039 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi),
4040 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi),
4041 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi),
4042 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi),
4043 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi),
4044 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi),
4045 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi),
4046 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi),
4047 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi),
4048 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi),
4049 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi),
4050 /* 17 is known to be absent */
4051 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi),
4052 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi),
4053 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi),
4054 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi),
4055 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi),
4056 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
4057 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
4058 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
4059 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
4060 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
4061 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
4062 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
4063 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
4064 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
4065 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
4066 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
4067 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
4068 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
4069 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
4070 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
4071 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
4072 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4073 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
4074 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
4075 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
4076 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
4077 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_generic_hdmi),
4078 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
4079 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
4080 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
4081 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_generic_hdmi),
4082 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_generic_hdmi),
4083 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_generic_hdmi),
4084 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_generic_hdmi),
4085 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_generic_hdmi),
4086 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_generic_hdmi),
4087 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_generic_hdmi),
4088 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_generic_hdmi),
4089 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
4090 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_generic_hdmi),
4091 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_generic_hdmi),
4092 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
4093 /* special ID for generic HDMI */
4094 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
4095 {} /* terminator */
4096 };
4097 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
4098
4099 MODULE_LICENSE("GPL");
4100 MODULE_DESCRIPTION("HDMI HD-audio codec");
4101 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4102 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4103 MODULE_ALIAS("snd-hda-codec-atihdmi");
4104
4105 static struct hda_codec_driver hdmi_driver = {
4106         .id = snd_hda_id_hdmi,
4107 };
4108
4109 module_hda_codec_driver(hdmi_driver);