sound/pci/hda/hda_tegra.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  *
   4  * Implementation of primary ALSA driver code base for NVIDIA Tegra HDA.
   5  */
   6
   7 #include <linux/clk.h>
   8 #include <linux/clocksource.h>
   9 #include <linux/completion.h>
  10 #include <linux/delay.h>
  11 #include <linux/dma-mapping.h>
  12 #include <linux/init.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/io.h>
  15 #include <linux/kernel.h>
  16 #include <linux/module.h>
  17 #include <linux/moduleparam.h>
  18 #include <linux/mutex.h>
  19 #include <linux/of_device.h>
  20 #include <linux/slab.h>
  21 #include <linux/time.h>
  22 #include <linux/string.h>
  23 #include <linux/pm_runtime.h>
  24
  25 #include <sound/core.h>
  26 #include <sound/initval.h>
  27
  28 #include <sound/hda_codec.h>
  29 #include "hda_controller.h"
  30
  31 /* Defines for Nvidia Tegra HDA support */
  32 #define HDA_BAR0           0x8000
  33
  34 #define HDA_CFG_CMD        0x1004
  35 #define HDA_CFG_BAR0       0x1010
  36
  37 #define HDA_ENABLE_IO_SPACE       (1 << 0)
  38 #define HDA_ENABLE_MEM_SPACE      (1 << 1)
  39 #define HDA_ENABLE_BUS_MASTER     (1 << 2)
  40 #define HDA_ENABLE_SERR           (1 << 8)
  41 #define HDA_DISABLE_INTR          (1 << 10)
  42 #define HDA_BAR0_INIT_PROGRAM     0xFFFFFFFF
  43 #define HDA_BAR0_FINAL_PROGRAM    (1 << 14)
  44
  45 /* IPFS */
  46 #define HDA_IPFS_CONFIG           0x180
  47 #define HDA_IPFS_EN_FPCI          0x1
  48
  49 #define HDA_IPFS_FPCI_BAR0        0x80
  50 #define HDA_FPCI_BAR0_START       0x40
  51
  52 #define HDA_IPFS_INTR_MASK        0x188
  53 #define HDA_IPFS_EN_INTR          (1 << 16)
  54
  55 /* max number of SDs */
  56 #define NUM_CAPTURE_SD 1
  57 #define NUM_PLAYBACK_SD 1
  58
  59 struct hda_tegra {
  60         struct azx chip;
  61         struct device *dev;
  62         struct clk *hda_clk;
  63         struct clk *hda2codec_2x_clk;
  64         struct clk *hda2hdmi_clk;
  65         void __iomem *regs;
  66         struct work_struct probe_work;
  67 };
  68
  69 #ifdef CONFIG_PM
  70 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
  71 module_param(power_save, bint, 0644);
  72 MODULE_PARM_DESC(power_save,
  73                  "Automatic power-saving timeout (in seconds, 0 = disable).");
  74 #else
  75 #define power_save      0
  76 #endif
  77
  78 static const struct hda_controller_ops hda_tegra_ops; /* nothing special */
  79
  80 static void hda_tegra_init(struct hda_tegra *hda)
  81 {
  82         u32 v;
  83
  84         /* Enable PCI access */
  85         v = readl(hda->regs + HDA_IPFS_CONFIG);
  86         v |= HDA_IPFS_EN_FPCI;
  87         writel(v, hda->regs + HDA_IPFS_CONFIG);
  88
  89         /* Enable MEM/IO space and bus master */
  90         v = readl(hda->regs + HDA_CFG_CMD);
  91         v &= ~HDA_DISABLE_INTR;
  92         v |= HDA_ENABLE_MEM_SPACE | HDA_ENABLE_IO_SPACE |
  93                 HDA_ENABLE_BUS_MASTER | HDA_ENABLE_SERR;
  94         writel(v, hda->regs + HDA_CFG_CMD);
  95
  96         writel(HDA_BAR0_INIT_PROGRAM, hda->regs + HDA_CFG_BAR0);
  97         writel(HDA_BAR0_FINAL_PROGRAM, hda->regs + HDA_CFG_BAR0);
  98         writel(HDA_FPCI_BAR0_START, hda->regs + HDA_IPFS_FPCI_BAR0);
  99
 100         v = readl(hda->regs + HDA_IPFS_INTR_MASK);
 101         v |= HDA_IPFS_EN_INTR;
 102         writel(v, hda->regs + HDA_IPFS_INTR_MASK);
 103 }
 104
 105 static int hda_tegra_enable_clocks(struct hda_tegra *data)
 106 {
 107         int rc;
 108
 109         rc = clk_prepare_enable(data->hda_clk);
 110         if (rc)
 111                 return rc;
 112         rc = clk_prepare_enable(data->hda2codec_2x_clk);
 113         if (rc)
 114                 goto disable_hda;
 115         rc = clk_prepare_enable(data->hda2hdmi_clk);
 116         if (rc)
 117                 goto disable_codec_2x;
 118
 119         return 0;
 120
 121 disable_codec_2x:
 122         clk_disable_unprepare(data->hda2codec_2x_clk);
 123 disable_hda:
 124         clk_disable_unprepare(data->hda_clk);
 125         return rc;
 126 }
 127
 128 static void hda_tegra_disable_clocks(struct hda_tegra *data)
 129 {
 130         clk_disable_unprepare(data->hda2hdmi_clk);
 131         clk_disable_unprepare(data->hda2codec_2x_clk);
 132         clk_disable_unprepare(data->hda_clk);
 133 }
 134
 135 /*
 136  * power management
 137  */
 138 static int __maybe_unused hda_tegra_suspend(struct device *dev)
 139 {
 140         struct snd_card *card = dev_get_drvdata(dev);
 141         int rc;
 142
 143         rc = pm_runtime_force_suspend(dev);
 144         if (rc < 0)
 145                 return rc;
 146         snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
 147
 148         return 0;
 149 }
 150
 151 static int __maybe_unused hda_tegra_resume(struct device *dev)
 152 {
 153         struct snd_card *card = dev_get_drvdata(dev);
 154         int rc;
 155
 156         rc = pm_runtime_force_resume(dev);
 157         if (rc < 0)
 158                 return rc;
 159         snd_power_change_state(card, SNDRV_CTL_POWER_D0);
 160
 161         return 0;
 162 }
 163
 164 static int __maybe_unused hda_tegra_runtime_suspend(struct device *dev)
 165 {
 166         struct snd_card *card = dev_get_drvdata(dev);
 167         struct azx *chip = card->private_data;
 168         struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
 169         struct hdac_bus *bus = azx_bus(chip);
 170
 171         if (chip && chip->running) {
 172                 azx_stop_chip(chip);
 173                 azx_enter_link_reset(chip);
 174         }
 175         hda_tegra_disable_clocks(hda);
 176
 177         return 0;
 178 }
 179
 180 static int __maybe_unused hda_tegra_runtime_resume(struct device *dev)
 181 {
 182         struct snd_card *card = dev_get_drvdata(dev);
 183         struct azx *chip = card->private_data;
 184         struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
 185         int rc;
 186
 187         rc = hda_tegra_enable_clocks(hda);
 188         if (rc != 0)
 189                 return rc;
 190         if (chip && chip->running) {
 191                 hda_tegra_init(hda);
 192                 azx_init_chip(chip, 1);
 193         }
 194
 195         return 0;
 196 }
 197
 198 static const struct dev_pm_ops hda_tegra_pm = {
 199         SET_SYSTEM_SLEEP_PM_OPS(hda_tegra_suspend, hda_tegra_resume)
 200         SET_RUNTIME_PM_OPS(hda_tegra_runtime_suspend,
 201                            hda_tegra_runtime_resume,
 202                            NULL)
 203 };
 204
 205 static int hda_tegra_dev_disconnect(struct snd_device *device)
 206 {
 207         struct azx *chip = device->device_data;
 208
 209         chip->bus.shutdown = 1;
 210         return 0;
 211 }
 212
 213 /*
 214  * destructor
 215  */
 216 static int hda_tegra_dev_free(struct snd_device *device)
 217 {
 218         struct azx *chip = device->device_data;
 219         struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
 220
 221         cancel_work_sync(&hda->probe_work);
 222         if (azx_bus(chip)->chip_init) {
 223                 azx_stop_all_streams(chip);
 224                 azx_stop_chip(chip);
 225         }
 226
 227         azx_free_stream_pages(chip);
 228         azx_free_streams(chip);
 229         snd_hdac_bus_exit(azx_bus(chip));
 230
 231         return 0;
 232 }
 233
 234 static int hda_tegra_init_chip(struct azx *chip, struct platform_device *pdev)
 235 {
 236         struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
 237         struct hdac_bus *bus = azx_bus(chip);
 238         struct device *dev = hda->dev;
 239         struct resource *res;
 240
 241         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 242         hda->regs = devm_ioremap_resource(dev, res);
 243         if (IS_ERR(hda->regs))
 244                 return PTR_ERR(hda->regs);
 245
 246         bus->remap_addr = hda->regs + HDA_BAR0;
 247         bus->addr = res->start + HDA_BAR0;
 248
 249         hda_tegra_init(hda);
 250
 251         return 0;
 252 }
 253
 254 static int hda_tegra_init_clk(struct hda_tegra *hda)
 255 {
 256         struct device *dev = hda->dev;
 257
 258         hda->hda_clk = devm_clk_get(dev, "hda");
 259         if (IS_ERR(hda->hda_clk)) {
 260                 dev_err(dev, "failed to get hda clock\n");
 261                 return PTR_ERR(hda->hda_clk);
 262         }
 263         hda->hda2codec_2x_clk = devm_clk_get(dev, "hda2codec_2x");
 264         if (IS_ERR(hda->hda2codec_2x_clk)) {
 265                 dev_err(dev, "failed to get hda2codec_2x clock\n");
 266                 return PTR_ERR(hda->hda2codec_2x_clk);
 267         }
 268         hda->hda2hdmi_clk = devm_clk_get(dev, "hda2hdmi");
 269         if (IS_ERR(hda->hda2hdmi_clk)) {
 270                 dev_err(dev, "failed to get hda2hdmi clock\n");
 271                 return PTR_ERR(hda->hda2hdmi_clk);
 272         }
 273
 274         return 0;
 275 }
 276
 277 static int hda_tegra_first_init(struct azx *chip, struct platform_device *pdev)
 278 {
 279         struct hdac_bus *bus = azx_bus(chip);
 280         struct snd_card *card = chip->card;
 281         int err;
 282         unsigned short gcap;
 283         int irq_id = platform_get_irq(pdev, 0);
 284         const char *sname, *drv_name = "tegra-hda";
 285         struct device_node *np = pdev->dev.of_node;
 286
 287         err = hda_tegra_init_chip(chip, pdev);
 288         if (err)
 289                 return err;
 290
 291         err = devm_request_irq(chip->card->dev, irq_id, azx_interrupt,
 292                              IRQF_SHARED, KBUILD_MODNAME, chip);
 293         if (err) {
 294                 dev_err(chip->card->dev,
 295                         "unable to request IRQ %d, disabling device\n",
 296                         irq_id);
 297                 return err;
 298         }
 299         bus->irq = irq_id;
 300         card->sync_irq = bus->irq;
 301
 302         gcap = azx_readw(chip, GCAP);
 303         dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
 304
 305         /* read number of streams from GCAP register instead of using
 306          * hardcoded value
 307          */
 308         chip->capture_streams = (gcap >> 8) & 0x0f;
 309         chip->playback_streams = (gcap >> 12) & 0x0f;
 310         if (!chip->playback_streams && !chip->capture_streams) {
 311                 /* gcap didn't give any info, switching to old method */
 312                 chip->playback_streams = NUM_PLAYBACK_SD;
 313                 chip->capture_streams = NUM_CAPTURE_SD;
 314         }
 315         chip->capture_index_offset = 0;
 316         chip->playback_index_offset = chip->capture_streams;
 317         chip->num_streams = chip->playback_streams + chip->capture_streams;
 318
 319         /* initialize streams */
 320         err = azx_init_streams(chip);
 321         if (err < 0) {
 322                 dev_err(card->dev, "failed to initialize streams: %d\n", err);
 323                 return err;
 324         }
 325
 326         err = azx_alloc_stream_pages(chip);
 327         if (err < 0) {
 328                 dev_err(card->dev, "failed to allocate stream pages: %d\n",
 329                         err);
 330                 return err;
 331         }
 332
 333         /* initialize chip */
 334         azx_init_chip(chip, 1);
 335
 336         /* codec detection */
 337         if (!bus->codec_mask) {
 338                 dev_err(card->dev, "no codecs found!\n");
 339                 return -ENODEV;
 340         }
 341
 342         /* driver name */
 343         strncpy(card->driver, drv_name, sizeof(card->driver));
 344         /* shortname for card */
 345         sname = of_get_property(np, "nvidia,model", NULL);
 346         if (!sname)
 347                 sname = drv_name;
 348         if (strlen(sname) > sizeof(card->shortname))
 349                 dev_info(card->dev, "truncating shortname for card\n");
 350         strncpy(card->shortname, sname, sizeof(card->shortname));
 351
 352         /* longname for card */
 353         snprintf(card->longname, sizeof(card->longname),
 354                  "%s at 0x%lx irq %i",
 355                  card->shortname, bus->addr, bus->irq);
 356
 357         return 0;
 358 }
 359
 360 /*
 361  * constructor
 362  */
 363
 364 static void hda_tegra_probe_work(struct work_struct *work);
 365
 366 static int hda_tegra_create(struct snd_card *card,
 367                             unsigned int driver_caps,
 368                             struct hda_tegra *hda)
 369 {
 370         static struct snd_device_ops ops = {
 371                 .dev_disconnect = hda_tegra_dev_disconnect,
 372                 .dev_free = hda_tegra_dev_free,
 373         };
 374         struct azx *chip;
 375         int err;
 376
 377         chip = &hda->chip;
 378
 379         mutex_init(&chip->open_mutex);
 380         chip->card = card;
 381         chip->ops = &hda_tegra_ops;
 382         chip->driver_caps = driver_caps;
 383         chip->driver_type = driver_caps & 0xff;
 384         chip->dev_index = 0;
 385         INIT_LIST_HEAD(&chip->pcm_list);
 386
 387         chip->codec_probe_mask = -1;
 388
 389         chip->single_cmd = false;
 390         chip->snoop = true;
 391
 392         INIT_WORK(&hda->probe_work, hda_tegra_probe_work);
 393
 394         err = azx_bus_init(chip, NULL);
 395         if (err < 0)
 396                 return err;
 397
 398         chip->bus.needs_damn_long_delay = 1;
 399
 400         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
 401         if (err < 0) {
 402                 dev_err(card->dev, "Error creating device\n");
 403                 return err;
 404         }
 405
 406         return 0;
 407 }
 408
 409 static const struct of_device_id hda_tegra_match[] = {
 410         { .compatible = "nvidia,tegra30-hda" },
 411         {},
 412 };
 413 MODULE_DEVICE_TABLE(of, hda_tegra_match);
 414
 415 static int hda_tegra_probe(struct platform_device *pdev)
 416 {
 417         const unsigned int driver_flags = AZX_DCAPS_CORBRP_SELF_CLEAR |
 418                                           AZX_DCAPS_PM_RUNTIME;
 419         struct snd_card *card;
 420         struct azx *chip;
 421         struct hda_tegra *hda;
 422         int err;
 423
 424         hda = devm_kzalloc(&pdev->dev, sizeof(*hda), GFP_KERNEL);
 425         if (!hda)
 426                 return -ENOMEM;
 427         hda->dev = &pdev->dev;
 428         chip = &hda->chip;
 429
 430         err = snd_card_new(&pdev->dev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
 431                            THIS_MODULE, 0, &card);
 432         if (err < 0) {
 433                 dev_err(&pdev->dev, "Error creating card!\n");
 434                 return err;
 435         }
 436
 437         err = hda_tegra_init_clk(hda);
 438         if (err < 0)
 439                 goto out_free;
 440
 441         err = hda_tegra_create(card, driver_flags, hda);
 442         if (err < 0)
 443                 goto out_free;
 444         card->private_data = chip;
 445
 446         dev_set_drvdata(&pdev->dev, card);
 447
 448         pm_runtime_enable(hda->dev);
 449         if (!azx_has_pm_runtime(chip))
 450                 pm_runtime_forbid(hda->dev);
 451
 452         schedule_work(&hda->probe_work);
 453
 454         return 0;
 455
 456 out_free:
 457         snd_card_free(card);
 458         return err;
 459 }
 460
 461 static void hda_tegra_probe_work(struct work_struct *work)
 462 {
 463         struct hda_tegra *hda = container_of(work, struct hda_tegra, probe_work);
 464         struct azx *chip = &hda->chip;
 465         struct platform_device *pdev = to_platform_device(hda->dev);
 466         int err;
 467
 468         pm_runtime_get_sync(hda->dev);
 469         err = hda_tegra_first_init(chip, pdev);
 470         if (err < 0)
 471                 goto out_free;
 472
 473         /* create codec instances */
 474         err = azx_probe_codecs(chip, 8);
 475         if (err < 0)
 476                 goto out_free;
 477
 478         err = azx_codec_configure(chip);
 479         if (err < 0)
 480                 goto out_free;
 481
 482         err = snd_card_register(chip->card);
 483         if (err < 0)
 484                 goto out_free;
 485
 486         chip->running = 1;
 487         snd_hda_set_power_save(&chip->bus, power_save * 1000);
 488
 489  out_free:
 490         pm_runtime_put(hda->dev);
 491         return; /* no error return from async probe */
 492 }
 493
 494 static int hda_tegra_remove(struct platform_device *pdev)
 495 {
 496         int ret;
 497
 498         ret = snd_card_free(dev_get_drvdata(&pdev->dev));
 499         pm_runtime_disable(&pdev->dev);
 500
 501         return ret;
 502 }
 503
 504 static void hda_tegra_shutdown(struct platform_device *pdev)
 505 {
 506         struct snd_card *card = dev_get_drvdata(&pdev->dev);
 507         struct azx *chip;
 508
 509         if (!card)
 510                 return;
 511         chip = card->private_data;
 512         if (chip && chip->running)
 513                 azx_stop_chip(chip);
 514 }
 515
 516 static struct platform_driver tegra_platform_hda = {
 517         .driver = {
 518                 .name = "tegra-hda",
 519                 .pm = &hda_tegra_pm,
 520                 .of_match_table = hda_tegra_match,
 521         },
 522         .probe = hda_tegra_probe,
 523         .remove = hda_tegra_remove,
 524         .shutdown = hda_tegra_shutdown,
 525 };
 526 module_platform_driver(tegra_platform_hda);
 527
 528 MODULE_DESCRIPTION("Tegra HDA bus driver");
 529 MODULE_LICENSE("GPL v2");