1 // SPDX-License-Identifier: GPL-2.0-only
4 * Implementation of primary ALSA driver code base for NVIDIA Tegra HDA.
8 #include <linux/clocksource.h>
9 #include <linux/completion.h>
10 #include <linux/delay.h>
11 #include <linux/dma-mapping.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <linux/mutex.h>
19 #include <linux/of_device.h>
20 #include <linux/slab.h>
21 #include <linux/time.h>
22 #include <linux/string.h>
23 #include <linux/pm_runtime.h>
25 #include <sound/core.h>
26 #include <sound/initval.h>
28 #include <sound/hda_codec.h>
29 #include "hda_controller.h"
31 /* Defines for Nvidia Tegra HDA support */
32 #define HDA_BAR0 0x8000
34 #define HDA_CFG_CMD 0x1004
35 #define HDA_CFG_BAR0 0x1010
37 #define HDA_ENABLE_IO_SPACE (1 << 0)
38 #define HDA_ENABLE_MEM_SPACE (1 << 1)
39 #define HDA_ENABLE_BUS_MASTER (1 << 2)
40 #define HDA_ENABLE_SERR (1 << 8)
41 #define HDA_DISABLE_INTR (1 << 10)
42 #define HDA_BAR0_INIT_PROGRAM 0xFFFFFFFF
43 #define HDA_BAR0_FINAL_PROGRAM (1 << 14)
46 #define HDA_IPFS_CONFIG 0x180
47 #define HDA_IPFS_EN_FPCI 0x1
49 #define HDA_IPFS_FPCI_BAR0 0x80
50 #define HDA_FPCI_BAR0_START 0x40
52 #define HDA_IPFS_INTR_MASK 0x188
53 #define HDA_IPFS_EN_INTR (1 << 16)
55 /* max number of SDs */
56 #define NUM_CAPTURE_SD 1
57 #define NUM_PLAYBACK_SD 1
63 struct clk *hda2codec_2x_clk;
64 struct clk *hda2hdmi_clk;
66 struct work_struct probe_work;
70 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
71 module_param(power_save, bint, 0644);
72 MODULE_PARM_DESC(power_save,
73 "Automatic power-saving timeout (in seconds, 0 = disable).");
78 static const struct hda_controller_ops hda_tegra_ops; /* nothing special */
80 static void hda_tegra_init(struct hda_tegra *hda)
84 /* Enable PCI access */
85 v = readl(hda->regs + HDA_IPFS_CONFIG);
86 v |= HDA_IPFS_EN_FPCI;
87 writel(v, hda->regs + HDA_IPFS_CONFIG);
89 /* Enable MEM/IO space and bus master */
90 v = readl(hda->regs + HDA_CFG_CMD);
91 v &= ~HDA_DISABLE_INTR;
92 v |= HDA_ENABLE_MEM_SPACE | HDA_ENABLE_IO_SPACE |
93 HDA_ENABLE_BUS_MASTER | HDA_ENABLE_SERR;
94 writel(v, hda->regs + HDA_CFG_CMD);
96 writel(HDA_BAR0_INIT_PROGRAM, hda->regs + HDA_CFG_BAR0);
97 writel(HDA_BAR0_FINAL_PROGRAM, hda->regs + HDA_CFG_BAR0);
98 writel(HDA_FPCI_BAR0_START, hda->regs + HDA_IPFS_FPCI_BAR0);
100 v = readl(hda->regs + HDA_IPFS_INTR_MASK);
101 v |= HDA_IPFS_EN_INTR;
102 writel(v, hda->regs + HDA_IPFS_INTR_MASK);
105 static int hda_tegra_enable_clocks(struct hda_tegra *data)
109 rc = clk_prepare_enable(data->hda_clk);
112 rc = clk_prepare_enable(data->hda2codec_2x_clk);
115 rc = clk_prepare_enable(data->hda2hdmi_clk);
117 goto disable_codec_2x;
122 clk_disable_unprepare(data->hda2codec_2x_clk);
124 clk_disable_unprepare(data->hda_clk);
128 static void hda_tegra_disable_clocks(struct hda_tegra *data)
130 clk_disable_unprepare(data->hda2hdmi_clk);
131 clk_disable_unprepare(data->hda2codec_2x_clk);
132 clk_disable_unprepare(data->hda_clk);
138 static int __maybe_unused hda_tegra_suspend(struct device *dev)
140 struct snd_card *card = dev_get_drvdata(dev);
143 rc = pm_runtime_force_suspend(dev);
146 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
151 static int __maybe_unused hda_tegra_resume(struct device *dev)
153 struct snd_card *card = dev_get_drvdata(dev);
156 rc = pm_runtime_force_resume(dev);
159 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
164 static int __maybe_unused hda_tegra_runtime_suspend(struct device *dev)
166 struct snd_card *card = dev_get_drvdata(dev);
167 struct azx *chip = card->private_data;
168 struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
170 if (chip && chip->running) {
172 azx_enter_link_reset(chip);
174 hda_tegra_disable_clocks(hda);
179 static int __maybe_unused hda_tegra_runtime_resume(struct device *dev)
181 struct snd_card *card = dev_get_drvdata(dev);
182 struct azx *chip = card->private_data;
183 struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
186 rc = hda_tegra_enable_clocks(hda);
189 if (chip && chip->running) {
191 azx_init_chip(chip, 1);
197 static const struct dev_pm_ops hda_tegra_pm = {
198 SET_SYSTEM_SLEEP_PM_OPS(hda_tegra_suspend, hda_tegra_resume)
199 SET_RUNTIME_PM_OPS(hda_tegra_runtime_suspend,
200 hda_tegra_runtime_resume,
204 static int hda_tegra_dev_disconnect(struct snd_device *device)
206 struct azx *chip = device->device_data;
208 chip->bus.shutdown = 1;
215 static int hda_tegra_dev_free(struct snd_device *device)
217 struct azx *chip = device->device_data;
218 struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
220 cancel_work_sync(&hda->probe_work);
221 if (azx_bus(chip)->chip_init) {
222 azx_stop_all_streams(chip);
226 azx_free_stream_pages(chip);
227 azx_free_streams(chip);
228 snd_hdac_bus_exit(azx_bus(chip));
233 static int hda_tegra_init_chip(struct azx *chip, struct platform_device *pdev)
235 struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
236 struct hdac_bus *bus = azx_bus(chip);
237 struct device *dev = hda->dev;
238 struct resource *res;
240 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
241 hda->regs = devm_ioremap_resource(dev, res);
242 if (IS_ERR(hda->regs))
243 return PTR_ERR(hda->regs);
245 bus->remap_addr = hda->regs + HDA_BAR0;
246 bus->addr = res->start + HDA_BAR0;
253 static int hda_tegra_init_clk(struct hda_tegra *hda)
255 struct device *dev = hda->dev;
257 hda->hda_clk = devm_clk_get(dev, "hda");
258 if (IS_ERR(hda->hda_clk)) {
259 dev_err(dev, "failed to get hda clock\n");
260 return PTR_ERR(hda->hda_clk);
262 hda->hda2codec_2x_clk = devm_clk_get(dev, "hda2codec_2x");
263 if (IS_ERR(hda->hda2codec_2x_clk)) {
264 dev_err(dev, "failed to get hda2codec_2x clock\n");
265 return PTR_ERR(hda->hda2codec_2x_clk);
267 hda->hda2hdmi_clk = devm_clk_get(dev, "hda2hdmi");
268 if (IS_ERR(hda->hda2hdmi_clk)) {
269 dev_err(dev, "failed to get hda2hdmi clock\n");
270 return PTR_ERR(hda->hda2hdmi_clk);
276 static int hda_tegra_first_init(struct azx *chip, struct platform_device *pdev)
278 struct hdac_bus *bus = azx_bus(chip);
279 struct snd_card *card = chip->card;
282 int irq_id = platform_get_irq(pdev, 0);
283 const char *sname, *drv_name = "tegra-hda";
284 struct device_node *np = pdev->dev.of_node;
286 err = hda_tegra_init_chip(chip, pdev);
290 err = devm_request_irq(chip->card->dev, irq_id, azx_interrupt,
291 IRQF_SHARED, KBUILD_MODNAME, chip);
293 dev_err(chip->card->dev,
294 "unable to request IRQ %d, disabling device\n",
299 card->sync_irq = bus->irq;
301 gcap = azx_readw(chip, GCAP);
302 dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
304 /* read number of streams from GCAP register instead of using
307 chip->capture_streams = (gcap >> 8) & 0x0f;
308 chip->playback_streams = (gcap >> 12) & 0x0f;
309 if (!chip->playback_streams && !chip->capture_streams) {
310 /* gcap didn't give any info, switching to old method */
311 chip->playback_streams = NUM_PLAYBACK_SD;
312 chip->capture_streams = NUM_CAPTURE_SD;
314 chip->capture_index_offset = 0;
315 chip->playback_index_offset = chip->capture_streams;
316 chip->num_streams = chip->playback_streams + chip->capture_streams;
318 /* initialize streams */
319 err = azx_init_streams(chip);
321 dev_err(card->dev, "failed to initialize streams: %d\n", err);
325 err = azx_alloc_stream_pages(chip);
327 dev_err(card->dev, "failed to allocate stream pages: %d\n",
332 /* initialize chip */
333 azx_init_chip(chip, 1);
335 /* codec detection */
336 if (!bus->codec_mask) {
337 dev_err(card->dev, "no codecs found!\n");
342 strncpy(card->driver, drv_name, sizeof(card->driver));
343 /* shortname for card */
344 sname = of_get_property(np, "nvidia,model", NULL);
347 if (strlen(sname) > sizeof(card->shortname))
348 dev_info(card->dev, "truncating shortname for card\n");
349 strncpy(card->shortname, sname, sizeof(card->shortname));
351 /* longname for card */
352 snprintf(card->longname, sizeof(card->longname),
353 "%s at 0x%lx irq %i",
354 card->shortname, bus->addr, bus->irq);
363 static void hda_tegra_probe_work(struct work_struct *work);
365 static int hda_tegra_create(struct snd_card *card,
366 unsigned int driver_caps,
367 struct hda_tegra *hda)
369 static struct snd_device_ops ops = {
370 .dev_disconnect = hda_tegra_dev_disconnect,
371 .dev_free = hda_tegra_dev_free,
378 mutex_init(&chip->open_mutex);
380 chip->ops = &hda_tegra_ops;
381 chip->driver_caps = driver_caps;
382 chip->driver_type = driver_caps & 0xff;
384 INIT_LIST_HEAD(&chip->pcm_list);
386 chip->codec_probe_mask = -1;
388 chip->single_cmd = false;
391 INIT_WORK(&hda->probe_work, hda_tegra_probe_work);
393 err = azx_bus_init(chip, NULL);
397 chip->bus.needs_damn_long_delay = 1;
399 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
401 dev_err(card->dev, "Error creating device\n");
408 static const struct of_device_id hda_tegra_match[] = {
409 { .compatible = "nvidia,tegra30-hda" },
412 MODULE_DEVICE_TABLE(of, hda_tegra_match);
414 static int hda_tegra_probe(struct platform_device *pdev)
416 const unsigned int driver_flags = AZX_DCAPS_CORBRP_SELF_CLEAR |
417 AZX_DCAPS_PM_RUNTIME;
418 struct snd_card *card;
420 struct hda_tegra *hda;
423 hda = devm_kzalloc(&pdev->dev, sizeof(*hda), GFP_KERNEL);
426 hda->dev = &pdev->dev;
429 err = snd_card_new(&pdev->dev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
430 THIS_MODULE, 0, &card);
432 dev_err(&pdev->dev, "Error creating card!\n");
436 err = hda_tegra_init_clk(hda);
440 err = hda_tegra_create(card, driver_flags, hda);
443 card->private_data = chip;
445 dev_set_drvdata(&pdev->dev, card);
447 pm_runtime_enable(hda->dev);
448 if (!azx_has_pm_runtime(chip))
449 pm_runtime_forbid(hda->dev);
451 schedule_work(&hda->probe_work);
460 static void hda_tegra_probe_work(struct work_struct *work)
462 struct hda_tegra *hda = container_of(work, struct hda_tegra, probe_work);
463 struct azx *chip = &hda->chip;
464 struct platform_device *pdev = to_platform_device(hda->dev);
467 pm_runtime_get_sync(hda->dev);
468 err = hda_tegra_first_init(chip, pdev);
472 /* create codec instances */
473 err = azx_probe_codecs(chip, 8);
477 err = azx_codec_configure(chip);
481 err = snd_card_register(chip->card);
486 snd_hda_set_power_save(&chip->bus, power_save * 1000);
489 pm_runtime_put(hda->dev);
490 return; /* no error return from async probe */
493 static int hda_tegra_remove(struct platform_device *pdev)
497 ret = snd_card_free(dev_get_drvdata(&pdev->dev));
498 pm_runtime_disable(&pdev->dev);
503 static void hda_tegra_shutdown(struct platform_device *pdev)
505 struct snd_card *card = dev_get_drvdata(&pdev->dev);
510 chip = card->private_data;
511 if (chip && chip->running)
515 static struct platform_driver tegra_platform_hda = {
519 .of_match_table = hda_tegra_match,
521 .probe = hda_tegra_probe,
522 .remove = hda_tegra_remove,
523 .shutdown = hda_tegra_shutdown,
525 module_platform_driver(tegra_platform_hda);
527 MODULE_DESCRIPTION("Tegra HDA bus driver");
528 MODULE_LICENSE("GPL v2");