sound/pci/cs46xx/dsp_spos.c

   1 /*
   2  *   This program is free software; you can redistribute it and/or modify
   3  *   it under the terms of the GNU General Public License as published by
   4  *   the Free Software Foundation; either version 2 of the License, or
   5  *   (at your option) any later version.
   6  *
   7  *   This program is distributed in the hope that it will be useful,
   8  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  *   GNU General Public License for more details.
  11  *
  12  *   You should have received a copy of the GNU General Public License
  13  *   along with this program; if not, write to the Free Software
  14  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  15  *
  16  */
  17
  18 /*
  19  * 2002-07 Benny Sjostrand benny@hostmobility.com
  20  */
  21
  22
  23 #include <linux/io.h>
  24 #include <linux/delay.h>
  25 #include <linux/pm.h>
  26 #include <linux/init.h>
  27 #include <linux/slab.h>
  28 #include <linux/vmalloc.h>
  29 #include <linux/mutex.h>
  30
  31 #include <sound/core.h>
  32 #include <sound/control.h>
  33 #include <sound/info.h>
  34 #include <sound/asoundef.h>
  35 #include "cs46xx.h"
  36
  37 #include "cs46xx_lib.h"
  38 #include "dsp_spos.h"
  39
  40 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
  41                                   struct dsp_scb_descriptor * fg_entry);
  42
  43 static enum wide_opcode wide_opcodes[] = {
  44         WIDE_FOR_BEGIN_LOOP,
  45         WIDE_FOR_BEGIN_LOOP2,
  46         WIDE_COND_GOTO_ADDR,
  47         WIDE_COND_GOTO_CALL,
  48         WIDE_TBEQ_COND_GOTO_ADDR,
  49         WIDE_TBEQ_COND_CALL_ADDR,
  50         WIDE_TBEQ_NCOND_GOTO_ADDR,
  51         WIDE_TBEQ_NCOND_CALL_ADDR,
  52         WIDE_TBEQ_COND_GOTO1_ADDR,
  53         WIDE_TBEQ_COND_CALL1_ADDR,
  54         WIDE_TBEQ_NCOND_GOTOI_ADDR,
  55         WIDE_TBEQ_NCOND_CALL1_ADDR
  56 };
  57
  58 static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size,
  59                                        u32 overlay_begin_address)
  60 {
  61         unsigned int i = 0, j, nreallocated = 0;
  62         u32 hival,loval,address;
  63         u32 mop_operands,mop_type,wide_op;
  64         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
  65
  66         if (snd_BUG_ON(size %2))
  67                 return -EINVAL;
  68
  69         while (i < size) {
  70                 loval = data[i++];
  71                 hival = data[i++];
  72
  73                 if (ins->code.offset > 0) {
  74                         mop_operands = (hival >> 6) & 0x03fff;
  75                         mop_type = mop_operands >> 10;
  76
  77                         /* check for wide type instruction */
  78                         if (mop_type == 0 &&
  79                             (mop_operands & WIDE_LADD_INSTR_MASK) == 0 &&
  80                             (mop_operands & WIDE_INSTR_MASK) != 0) {
  81                                 wide_op = loval & 0x7f;
  82                                 for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) {
  83                                         if (wide_opcodes[j] == wide_op) {
  84                                                 /* need to reallocate instruction */
  85                                                 address  = (hival & 0x00FFF) << 5;
  86                                                 address |=  loval >> 15;
  87
  88                                                 dev_dbg(chip->card->dev,
  89                                                         "handle_wideop[1]: %05x:%05x addr %04x\n",
  90                                                         hival, loval, address);
  91
  92                                                 if ( !(address & 0x8000) ) {
  93                                                         address += (ins->code.offset / 2) - overlay_begin_address;
  94                                                 } else {
  95                                                         dev_dbg(chip->card->dev,
  96                                                                 "handle_wideop[1]: ROM symbol not reallocated\n");
  97                                                 }
  98
  99                                                 hival &= 0xFF000;
 100                                                 loval &= 0x07FFF;
 101
 102                                                 hival |= ( (address >> 5)  & 0x00FFF);
 103                                                 loval |= ( (address << 15) & 0xF8000);
 104
 105                                                 address  = (hival & 0x00FFF) << 5;
 106                                                 address |=  loval >> 15;
 107
 108                                                 dev_dbg(chip->card->dev,
 109                                                         "handle_wideop:[2] %05x:%05x addr %04x\n",
 110                                                         hival, loval, address);
 111                                                 nreallocated++;
 112                                         } /* wide_opcodes[j] == wide_op */
 113                                 } /* for */
 114                         } /* mod_type == 0 ... */
 115                 } /* ins->code.offset > 0 */
 116
 117                 ins->code.data[ins->code.size++] = loval;
 118                 ins->code.data[ins->code.size++] = hival;
 119         }
 120
 121         dev_dbg(chip->card->dev,
 122                 "dsp_spos: %d instructions reallocated\n", nreallocated);
 123         return nreallocated;
 124 }
 125
 126 static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type)
 127 {
 128         int i;
 129         for (i = 0;i < module->nsegments; ++i) {
 130                 if (module->segments[i].segment_type == seg_type) {
 131                         return (module->segments + i);
 132                 }
 133         }
 134
 135         return NULL;
 136 };
 137
 138 static int find_free_symbol_index (struct dsp_spos_instance * ins)
 139 {
 140         int index = ins->symbol_table.nsymbols,i;
 141
 142         for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) {
 143                 if (ins->symbol_table.symbols[i].deleted) {
 144                         index = i;
 145                         break;
 146                 }
 147         }
 148
 149         return index;
 150 }
 151
 152 static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module)
 153 {
 154         int i;
 155         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 156
 157         if (module->symbol_table.nsymbols > 0) {
 158                 if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") &&
 159                     module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) {
 160                         module->overlay_begin_address = module->symbol_table.symbols[0].address;
 161                 }
 162         }
 163
 164         for (i = 0;i < module->symbol_table.nsymbols; ++i) {
 165                 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
 166                         dev_err(chip->card->dev,
 167                                 "dsp_spos: symbol table is full\n");
 168                         return -ENOMEM;
 169                 }
 170
 171
 172                 if (cs46xx_dsp_lookup_symbol(chip,
 173                                              module->symbol_table.symbols[i].symbol_name,
 174                                              module->symbol_table.symbols[i].symbol_type) == NULL) {
 175
 176                         ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i];
 177                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address);
 178                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module;
 179                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0;
 180
 181                         if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index)
 182                                 ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols;
 183
 184                         ins->symbol_table.nsymbols++;
 185                 } else {
 186 #if 0
 187                         dev_dbg(chip->card->dev,
 188                                 "dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n",
 189                                 module->symbol_table.symbols[i].symbol_name); */
 190 #endif
 191                 }
 192         }
 193
 194         return 0;
 195 }
 196
 197 static struct dsp_symbol_entry *
 198 add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type)
 199 {
 200         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 201         struct dsp_symbol_entry * symbol = NULL;
 202         int index;
 203
 204         if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
 205                 dev_err(chip->card->dev, "dsp_spos: symbol table is full\n");
 206                 return NULL;
 207         }
 208
 209         if (cs46xx_dsp_lookup_symbol(chip,
 210                                      symbol_name,
 211                                      type) != NULL) {
 212                 dev_err(chip->card->dev,
 213                         "dsp_spos: symbol <%s> duplicated\n", symbol_name);
 214                 return NULL;
 215         }
 216
 217         index = find_free_symbol_index (ins);
 218
 219         strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name);
 220         ins->symbol_table.symbols[index].address = address;
 221         ins->symbol_table.symbols[index].symbol_type = type;
 222         ins->symbol_table.symbols[index].module = NULL;
 223         ins->symbol_table.symbols[index].deleted = 0;
 224         symbol = (ins->symbol_table.symbols + index);
 225
 226         if (index > ins->symbol_table.highest_frag_index)
 227                 ins->symbol_table.highest_frag_index = index;
 228
 229         if (index == ins->symbol_table.nsymbols)
 230                 ins->symbol_table.nsymbols++; /* no frag. in list */
 231
 232         return symbol;
 233 }
 234
 235 struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip)
 236 {
 237         struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL);
 238
 239         if (ins == NULL)
 240                 return NULL;
 241
 242         /* better to use vmalloc for this big table */
 243         ins->symbol_table.symbols = vmalloc(sizeof(struct dsp_symbol_entry) *
 244                                             DSP_MAX_SYMBOLS);
 245         ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL);
 246         ins->modules = kmalloc(sizeof(struct dsp_module_desc) * DSP_MAX_MODULES, GFP_KERNEL);
 247         if (!ins->symbol_table.symbols || !ins->code.data || !ins->modules) {
 248                 cs46xx_dsp_spos_destroy(chip);
 249                 goto error;
 250         }
 251         ins->symbol_table.nsymbols = 0;
 252         ins->symbol_table.highest_frag_index = 0;
 253         ins->code.offset = 0;
 254         ins->code.size = 0;
 255         ins->nscb = 0;
 256         ins->ntask = 0;
 257         ins->nmodules = 0;
 258
 259         /* default SPDIF input sample rate
 260            to 48000 khz */
 261         ins->spdif_in_sample_rate = 48000;
 262
 263         /* maximize volume */
 264         ins->dac_volume_right = 0x8000;
 265         ins->dac_volume_left = 0x8000;
 266         ins->spdif_input_volume_right = 0x8000;
 267         ins->spdif_input_volume_left = 0x8000;
 268
 269         /* set left and right validity bits and
 270            default channel status */
 271         ins->spdif_csuv_default =
 272                 ins->spdif_csuv_stream =
 273          /* byte 0 */  ((unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF        & 0xff)) << 24) |
 274          /* byte 1 */  ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) |
 275          /* byte 3 */   (unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) |
 276          /* left and right validity bits */ (1 << 13) | (1 << 12);
 277
 278         return ins;
 279
 280 error:
 281         kfree(ins->modules);
 282         kfree(ins->code.data);
 283         vfree(ins->symbol_table.symbols);
 284         kfree(ins);
 285         return NULL;
 286 }
 287
 288 void  cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip)
 289 {
 290         int i;
 291         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 292
 293         if (snd_BUG_ON(!ins))
 294                 return;
 295
 296         mutex_lock(&chip->spos_mutex);
 297         for (i = 0; i < ins->nscb; ++i) {
 298                 if (ins->scbs[i].deleted) continue;
 299
 300                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
 301 #ifdef CONFIG_PM_SLEEP
 302                 kfree(ins->scbs[i].data);
 303 #endif
 304         }
 305
 306         kfree(ins->code.data);
 307         vfree(ins->symbol_table.symbols);
 308         kfree(ins->modules);
 309         kfree(ins);
 310         mutex_unlock(&chip->spos_mutex);
 311 }
 312
 313 static int dsp_load_parameter(struct snd_cs46xx *chip,
 314                               struct dsp_segment_desc *parameter)
 315 {
 316         u32 doffset, dsize;
 317
 318         if (!parameter) {
 319                 dev_dbg(chip->card->dev,
 320                         "dsp_spos: module got no parameter segment\n");
 321                 return 0;
 322         }
 323
 324         doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET);
 325         dsize   = parameter->size * 4;
 326
 327         dev_dbg(chip->card->dev,
 328                 "dsp_spos: downloading parameter data to chip (%08x-%08x)\n",
 329                     doffset,doffset + dsize);
 330         if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) {
 331                 dev_err(chip->card->dev,
 332                         "dsp_spos: failed to download parameter data to DSP\n");
 333                 return -EINVAL;
 334         }
 335         return 0;
 336 }
 337
 338 static int dsp_load_sample(struct snd_cs46xx *chip,
 339                            struct dsp_segment_desc *sample)
 340 {
 341         u32 doffset, dsize;
 342
 343         if (!sample) {
 344                 dev_dbg(chip->card->dev,
 345                         "dsp_spos: module got no sample segment\n");
 346                 return 0;
 347         }
 348
 349         doffset = (sample->offset * 4  + DSP_SAMPLE_BYTE_OFFSET);
 350         dsize   =  sample->size * 4;
 351
 352         dev_dbg(chip->card->dev,
 353                 "dsp_spos: downloading sample data to chip (%08x-%08x)\n",
 354                     doffset,doffset + dsize);
 355
 356         if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) {
 357                 dev_err(chip->card->dev,
 358                         "dsp_spos: failed to sample data to DSP\n");
 359                 return -EINVAL;
 360         }
 361         return 0;
 362 }
 363
 364 int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module)
 365 {
 366         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 367         struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM);
 368         u32 doffset, dsize;
 369         int err;
 370
 371         if (ins->nmodules == DSP_MAX_MODULES - 1) {
 372                 dev_err(chip->card->dev,
 373                         "dsp_spos: to many modules loaded into DSP\n");
 374                 return -ENOMEM;
 375         }
 376
 377         dev_dbg(chip->card->dev,
 378                 "dsp_spos: loading module %s into DSP\n", module->module_name);
 379
 380         if (ins->nmodules == 0) {
 381                 dev_dbg(chip->card->dev, "dsp_spos: clearing parameter area\n");
 382                 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE);
 383         }
 384
 385         err = dsp_load_parameter(chip, get_segment_desc(module,
 386                                                         SEGTYPE_SP_PARAMETER));
 387         if (err < 0)
 388                 return err;
 389
 390         if (ins->nmodules == 0) {
 391                 dev_dbg(chip->card->dev, "dsp_spos: clearing sample area\n");
 392                 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE);
 393         }
 394
 395         err = dsp_load_sample(chip, get_segment_desc(module,
 396                                                      SEGTYPE_SP_SAMPLE));
 397         if (err < 0)
 398                 return err;
 399
 400         if (ins->nmodules == 0) {
 401                 dev_dbg(chip->card->dev, "dsp_spos: clearing code area\n");
 402                 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
 403         }
 404
 405         if (code == NULL) {
 406                 dev_dbg(chip->card->dev,
 407                         "dsp_spos: module got no code segment\n");
 408         } else {
 409                 if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) {
 410                         dev_err(chip->card->dev,
 411                                 "dsp_spos: no space available in DSP\n");
 412                         return -ENOMEM;
 413                 }
 414
 415                 module->load_address = ins->code.offset;
 416                 module->overlay_begin_address = 0x000;
 417
 418                 /* if module has a code segment it must have
 419                    symbol table */
 420                 if (snd_BUG_ON(!module->symbol_table.symbols))
 421                         return -ENOMEM;
 422                 if (add_symbols(chip,module)) {
 423                         dev_err(chip->card->dev,
 424                                 "dsp_spos: failed to load symbol table\n");
 425                         return -ENOMEM;
 426                 }
 427
 428                 doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET);
 429                 dsize   = code->size * 4;
 430                 dev_dbg(chip->card->dev,
 431                         "dsp_spos: downloading code to chip (%08x-%08x)\n",
 432                             doffset,doffset + dsize);
 433
 434                 module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address);
 435
 436                 if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) {
 437                         dev_err(chip->card->dev,
 438                                 "dsp_spos: failed to download code to DSP\n");
 439                         return -EINVAL;
 440                 }
 441
 442                 ins->code.offset += code->size;
 443         }
 444
 445         /* NOTE: module segments and symbol table must be
 446            statically allocated. Case that module data is
 447            not generated by the ospparser */
 448         ins->modules[ins->nmodules] = *module;
 449         ins->nmodules++;
 450
 451         return 0;
 452 }
 453
 454 struct dsp_symbol_entry *
 455 cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type)
 456 {
 457         int i;
 458         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 459
 460         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 461
 462                 if (ins->symbol_table.symbols[i].deleted)
 463                         continue;
 464
 465                 if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) &&
 466                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
 467                         return (ins->symbol_table.symbols + i);
 468                 }
 469         }
 470
 471 #if 0
 472         dev_err(chip->card->dev, "dsp_spos: symbol <%s> type %02x not found\n",
 473                 symbol_name,symbol_type);
 474 #endif
 475
 476         return NULL;
 477 }
 478
 479
 480 #ifdef CONFIG_SND_PROC_FS
 481 static struct dsp_symbol_entry *
 482 cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type)
 483 {
 484         int i;
 485         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 486
 487         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 488
 489                 if (ins->symbol_table.symbols[i].deleted)
 490                         continue;
 491
 492                 if (ins->symbol_table.symbols[i].address == address &&
 493                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
 494                         return (ins->symbol_table.symbols + i);
 495                 }
 496         }
 497
 498
 499         return NULL;
 500 }
 501
 502
 503 static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry,
 504                                                struct snd_info_buffer *buffer)
 505 {
 506         struct snd_cs46xx *chip = entry->private_data;
 507         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 508         int i;
 509
 510         snd_iprintf(buffer, "SYMBOLS:\n");
 511         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 512                 char *module_str = "system";
 513
 514                 if (ins->symbol_table.symbols[i].deleted)
 515                         continue;
 516
 517                 if (ins->symbol_table.symbols[i].module != NULL) {
 518                         module_str = ins->symbol_table.symbols[i].module->module_name;
 519                 }
 520
 521
 522                 snd_iprintf(buffer, "%04X <%02X> %s [%s]\n",
 523                             ins->symbol_table.symbols[i].address,
 524                             ins->symbol_table.symbols[i].symbol_type,
 525                             ins->symbol_table.symbols[i].symbol_name,
 526                             module_str);
 527         }
 528 }
 529
 530
 531 static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry,
 532                                           struct snd_info_buffer *buffer)
 533 {
 534         struct snd_cs46xx *chip = entry->private_data;
 535         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 536         int i,j;
 537
 538         mutex_lock(&chip->spos_mutex);
 539         snd_iprintf(buffer, "MODULES:\n");
 540         for ( i = 0; i < ins->nmodules; ++i ) {
 541                 snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name);
 542                 snd_iprintf(buffer, "   %d symbols\n", ins->modules[i].symbol_table.nsymbols);
 543                 snd_iprintf(buffer, "   %d fixups\n", ins->modules[i].nfixups);
 544
 545                 for (j = 0; j < ins->modules[i].nsegments; ++ j) {
 546                         struct dsp_segment_desc * desc = (ins->modules[i].segments + j);
 547                         snd_iprintf(buffer, "   segment %02x offset %08x size %08x\n",
 548                                     desc->segment_type,desc->offset, desc->size);
 549                 }
 550         }
 551         mutex_unlock(&chip->spos_mutex);
 552 }
 553
 554 static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry,
 555                                             struct snd_info_buffer *buffer)
 556 {
 557         struct snd_cs46xx *chip = entry->private_data;
 558         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 559         int i, j, col;
 560         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
 561
 562         mutex_lock(&chip->spos_mutex);
 563         snd_iprintf(buffer, "TASK TREES:\n");
 564         for ( i = 0; i < ins->ntask; ++i) {
 565                 snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name);
 566
 567                 for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) {
 568                         u32 val;
 569                         if (col == 4) {
 570                                 snd_iprintf(buffer,"\n");
 571                                 col = 0;
 572                         }
 573                         val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32));
 574                         snd_iprintf(buffer,"%08x ",val);
 575                 }
 576         }
 577
 578         snd_iprintf(buffer,"\n");
 579         mutex_unlock(&chip->spos_mutex);
 580 }
 581
 582 static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry,
 583                                       struct snd_info_buffer *buffer)
 584 {
 585         struct snd_cs46xx *chip = entry->private_data;
 586         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 587         int i;
 588
 589         mutex_lock(&chip->spos_mutex);
 590         snd_iprintf(buffer, "SCB's:\n");
 591         for ( i = 0; i < ins->nscb; ++i) {
 592                 if (ins->scbs[i].deleted)
 593                         continue;
 594                 snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name);
 595
 596                 if (ins->scbs[i].parent_scb_ptr != NULL) {
 597                         snd_iprintf(buffer,"parent [%s:%04x] ",
 598                                     ins->scbs[i].parent_scb_ptr->scb_name,
 599                                     ins->scbs[i].parent_scb_ptr->address);
 600                 } else snd_iprintf(buffer,"parent [none] ");
 601
 602                 snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x]  task_entry [%s:%04x]\n",
 603                             ins->scbs[i].sub_list_ptr->scb_name,
 604                             ins->scbs[i].sub_list_ptr->address,
 605                             ins->scbs[i].next_scb_ptr->scb_name,
 606                             ins->scbs[i].next_scb_ptr->address,
 607                             ins->scbs[i].task_entry->symbol_name,
 608                             ins->scbs[i].task_entry->address);
 609         }
 610
 611         snd_iprintf(buffer,"\n");
 612         mutex_unlock(&chip->spos_mutex);
 613 }
 614
 615 static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry,
 616                                                  struct snd_info_buffer *buffer)
 617 {
 618         struct snd_cs46xx *chip = entry->private_data;
 619         /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */
 620         unsigned int i, col = 0;
 621         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
 622         struct dsp_symbol_entry * symbol;
 623
 624         for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) {
 625                 if (col == 4) {
 626                         snd_iprintf(buffer,"\n");
 627                         col = 0;
 628                 }
 629
 630                 if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) {
 631                         col = 0;
 632                         snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name);
 633                 }
 634
 635                 if (col == 0) {
 636                         snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32));
 637                 }
 638
 639                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 640         }
 641 }
 642
 643 static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry,
 644                                               struct snd_info_buffer *buffer)
 645 {
 646         struct snd_cs46xx *chip = entry->private_data;
 647         int i,col = 0;
 648         void __iomem *dst = chip->region.idx[2].remap_addr;
 649
 650         snd_iprintf(buffer,"PCMREADER:\n");
 651         for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) {
 652                 if (col == 4) {
 653                         snd_iprintf(buffer,"\n");
 654                         col = 0;
 655                 }
 656
 657                 if (col == 0) {
 658                         snd_iprintf(buffer, "%04X ",i);
 659                 }
 660
 661                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 662         }
 663
 664         snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n");
 665
 666         col = 0;
 667         for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) {
 668                 if (col == 4) {
 669                         snd_iprintf(buffer,"\n");
 670                         col = 0;
 671                 }
 672
 673                 if (col == 0) {
 674                         snd_iprintf(buffer, "%04X ",i);
 675                 }
 676
 677                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 678         }
 679
 680         snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n");
 681         col = 0;
 682         for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) {
 683                 if (col == 4) {
 684                         snd_iprintf(buffer,"\n");
 685                         col = 0;
 686                 }
 687
 688                 if (col == 0) {
 689                         snd_iprintf(buffer, "%04X ",i);
 690                 }
 691
 692                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 693         }
 694
 695
 696         snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n");
 697         col = 0;
 698         for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) {
 699                 if (col == 4) {
 700                         snd_iprintf(buffer,"\n");
 701                         col = 0;
 702                 }
 703
 704                 if (col == 0) {
 705                         snd_iprintf(buffer, "%04X ",i);
 706                 }
 707
 708                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 709         }
 710
 711         snd_iprintf(buffer,"\n...\n");
 712         col = 0;
 713
 714         for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) {
 715                 if (col == 4) {
 716                         snd_iprintf(buffer,"\n");
 717                         col = 0;
 718                 }
 719
 720                 if (col == 0) {
 721                         snd_iprintf(buffer, "%04X ",i);
 722                 }
 723
 724                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 725         }
 726
 727
 728         snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n");
 729         col = 0;
 730         for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) {
 731                 if (col == 4) {
 732                         snd_iprintf(buffer,"\n");
 733                         col = 0;
 734                 }
 735
 736                 if (col == 0) {
 737                         snd_iprintf(buffer, "%04X ",i);
 738                 }
 739
 740                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 741         }
 742
 743         snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n");
 744         col = 0;
 745         for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) {
 746                 if (col == 4) {
 747                         snd_iprintf(buffer,"\n");
 748                         col = 0;
 749                 }
 750
 751                 if (col == 0) {
 752                         snd_iprintf(buffer, "%04X ",i);
 753                 }
 754
 755                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 756         }
 757 #if 0
 758         snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n");
 759         col = 0;
 760         for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) {
 761                 if (col == 4) {
 762                         snd_iprintf(buffer,"\n");
 763                         col = 0;
 764                 }
 765
 766                 if (col == 0) {
 767                         snd_iprintf(buffer, "%04X ",i);
 768                 }
 769
 770                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 771         }
 772 #endif
 773
 774         snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n");
 775         col = 0;
 776         for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) {
 777                 if (col == 4) {
 778                         snd_iprintf(buffer,"\n");
 779                         col = 0;
 780                 }
 781
 782                 if (col == 0) {
 783                         snd_iprintf(buffer, "%04X ",i);
 784                 }
 785
 786                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 787         }
 788         snd_iprintf(buffer,"\n");
 789 }
 790
 791 int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip)
 792 {
 793         struct snd_info_entry *entry;
 794         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 795         int i;
 796
 797         ins->snd_card = card;
 798
 799         if ((entry = snd_info_create_card_entry(card, "dsp", card->proc_root)) != NULL) {
 800                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 801                 entry->mode = S_IFDIR | S_IRUGO | S_IXUGO;
 802
 803                 if (snd_info_register(entry) < 0) {
 804                         snd_info_free_entry(entry);
 805                         entry = NULL;
 806                 }
 807         }
 808
 809         ins->proc_dsp_dir = entry;
 810
 811         if (!ins->proc_dsp_dir)
 812                 return -ENOMEM;
 813
 814         if ((entry = snd_info_create_card_entry(card, "spos_symbols", ins->proc_dsp_dir)) != NULL) {
 815                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 816                 entry->private_data = chip;
 817                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 818                 entry->c.text.read = cs46xx_dsp_proc_symbol_table_read;
 819                 if (snd_info_register(entry) < 0) {
 820                         snd_info_free_entry(entry);
 821                         entry = NULL;
 822                 }
 823         }
 824         ins->proc_sym_info_entry = entry;
 825
 826         if ((entry = snd_info_create_card_entry(card, "spos_modules", ins->proc_dsp_dir)) != NULL) {
 827                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 828                 entry->private_data = chip;
 829                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 830                 entry->c.text.read = cs46xx_dsp_proc_modules_read;
 831                 if (snd_info_register(entry) < 0) {
 832                         snd_info_free_entry(entry);
 833                         entry = NULL;
 834                 }
 835         }
 836         ins->proc_modules_info_entry = entry;
 837
 838         if ((entry = snd_info_create_card_entry(card, "parameter", ins->proc_dsp_dir)) != NULL) {
 839                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 840                 entry->private_data = chip;
 841                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 842                 entry->c.text.read = cs46xx_dsp_proc_parameter_dump_read;
 843                 if (snd_info_register(entry) < 0) {
 844                         snd_info_free_entry(entry);
 845                         entry = NULL;
 846                 }
 847         }
 848         ins->proc_parameter_dump_info_entry = entry;
 849
 850         if ((entry = snd_info_create_card_entry(card, "sample", ins->proc_dsp_dir)) != NULL) {
 851                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 852                 entry->private_data = chip;
 853                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 854                 entry->c.text.read = cs46xx_dsp_proc_sample_dump_read;
 855                 if (snd_info_register(entry) < 0) {
 856                         snd_info_free_entry(entry);
 857                         entry = NULL;
 858                 }
 859         }
 860         ins->proc_sample_dump_info_entry = entry;
 861
 862         if ((entry = snd_info_create_card_entry(card, "task_tree", ins->proc_dsp_dir)) != NULL) {
 863                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 864                 entry->private_data = chip;
 865                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 866                 entry->c.text.read = cs46xx_dsp_proc_task_tree_read;
 867                 if (snd_info_register(entry) < 0) {
 868                         snd_info_free_entry(entry);
 869                         entry = NULL;
 870                 }
 871         }
 872         ins->proc_task_info_entry = entry;
 873
 874         if ((entry = snd_info_create_card_entry(card, "scb_info", ins->proc_dsp_dir)) != NULL) {
 875                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 876                 entry->private_data = chip;
 877                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 878                 entry->c.text.read = cs46xx_dsp_proc_scb_read;
 879                 if (snd_info_register(entry) < 0) {
 880                         snd_info_free_entry(entry);
 881                         entry = NULL;
 882                 }
 883         }
 884         ins->proc_scb_info_entry = entry;
 885
 886         mutex_lock(&chip->spos_mutex);
 887         /* register/update SCB's entries on proc */
 888         for (i = 0; i < ins->nscb; ++i) {
 889                 if (ins->scbs[i].deleted) continue;
 890
 891                 cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i));
 892         }
 893         mutex_unlock(&chip->spos_mutex);
 894
 895         return 0;
 896 }
 897
 898 int cs46xx_dsp_proc_done (struct snd_cs46xx *chip)
 899 {
 900         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 901         int i;
 902
 903         snd_info_free_entry(ins->proc_sym_info_entry);
 904         ins->proc_sym_info_entry = NULL;
 905
 906         snd_info_free_entry(ins->proc_modules_info_entry);
 907         ins->proc_modules_info_entry = NULL;
 908
 909         snd_info_free_entry(ins->proc_parameter_dump_info_entry);
 910         ins->proc_parameter_dump_info_entry = NULL;
 911
 912         snd_info_free_entry(ins->proc_sample_dump_info_entry);
 913         ins->proc_sample_dump_info_entry = NULL;
 914
 915         snd_info_free_entry(ins->proc_scb_info_entry);
 916         ins->proc_scb_info_entry = NULL;
 917
 918         snd_info_free_entry(ins->proc_task_info_entry);
 919         ins->proc_task_info_entry = NULL;
 920
 921         mutex_lock(&chip->spos_mutex);
 922         for (i = 0; i < ins->nscb; ++i) {
 923                 if (ins->scbs[i].deleted) continue;
 924                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
 925         }
 926         mutex_unlock(&chip->spos_mutex);
 927
 928         snd_info_free_entry(ins->proc_dsp_dir);
 929         ins->proc_dsp_dir = NULL;
 930
 931         return 0;
 932 }
 933 #endif /* CONFIG_SND_PROC_FS */
 934
 935 static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data,
 936                                    u32  dest, int size)
 937 {
 938         void __iomem *spdst = chip->region.idx[1].remap_addr +
 939                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
 940         int i;
 941
 942         for (i = 0; i < size; ++i) {
 943                 dev_dbg(chip->card->dev, "addr %p, val %08x\n",
 944                         spdst, task_data[i]);
 945                 writel(task_data[i],spdst);
 946                 spdst += sizeof(u32);
 947         }
 948 }
 949
 950 static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest)
 951 {
 952         void __iomem *spdst = chip->region.idx[1].remap_addr +
 953                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
 954         int i;
 955
 956         for (i = 0; i < 0x10; ++i) {
 957                 dev_dbg(chip->card->dev, "addr %p, val %08x\n",
 958                         spdst, scb_data[i]);
 959                 writel(scb_data[i],spdst);
 960                 spdst += sizeof(u32);
 961         }
 962 }
 963
 964 static int find_free_scb_index (struct dsp_spos_instance * ins)
 965 {
 966         int index = ins->nscb, i;
 967
 968         for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) {
 969                 if (ins->scbs[i].deleted) {
 970                         index = i;
 971                         break;
 972                 }
 973         }
 974
 975         return index;
 976 }
 977
 978 static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest)
 979 {
 980         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 981         struct dsp_scb_descriptor * desc = NULL;
 982         int index;
 983
 984         if (ins->nscb == DSP_MAX_SCB_DESC - 1) {
 985                 dev_err(chip->card->dev,
 986                         "dsp_spos: got no place for other SCB\n");
 987                 return NULL;
 988         }
 989
 990         index = find_free_scb_index (ins);
 991
 992         memset(&ins->scbs[index], 0, sizeof(ins->scbs[index]));
 993         strcpy(ins->scbs[index].scb_name, name);
 994         ins->scbs[index].address = dest;
 995         ins->scbs[index].index = index;
 996         ins->scbs[index].ref_count = 1;
 997
 998         desc = (ins->scbs + index);
 999         ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER);
1000
1001         if (index > ins->scb_highest_frag_index)
1002                 ins->scb_highest_frag_index = index;
1003
1004         if (index == ins->nscb)
1005                 ins->nscb++;
1006
1007         return desc;
1008 }
1009
1010 static struct dsp_task_descriptor *
1011 _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size)
1012 {
1013         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1014         struct dsp_task_descriptor * desc = NULL;
1015
1016         if (ins->ntask == DSP_MAX_TASK_DESC - 1) {
1017                 dev_err(chip->card->dev,
1018                         "dsp_spos: got no place for other TASK\n");
1019                 return NULL;
1020         }
1021
1022         if (name)
1023                 strcpy(ins->tasks[ins->ntask].task_name, name);
1024         else
1025                 strcpy(ins->tasks[ins->ntask].task_name, "(NULL)");
1026         ins->tasks[ins->ntask].address = dest;
1027         ins->tasks[ins->ntask].size = size;
1028
1029         /* quick find in list */
1030         ins->tasks[ins->ntask].index = ins->ntask;
1031         desc = (ins->tasks + ins->ntask);
1032         ins->ntask++;
1033
1034         if (name)
1035                 add_symbol (chip,name,dest,SYMBOL_PARAMETER);
1036         return desc;
1037 }
1038
1039 #define SCB_BYTES       (0x10 * 4)
1040
1041 struct dsp_scb_descriptor *
1042 cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest)
1043 {
1044         struct dsp_scb_descriptor * desc;
1045
1046 #ifdef CONFIG_PM_SLEEP
1047         /* copy the data for resume */
1048         scb_data = kmemdup(scb_data, SCB_BYTES, GFP_KERNEL);
1049         if (!scb_data)
1050                 return NULL;
1051 #endif
1052
1053         desc = _map_scb (chip,name,dest);
1054         if (desc) {
1055                 desc->data = scb_data;
1056                 _dsp_create_scb(chip,scb_data,dest);
1057         } else {
1058                 dev_err(chip->card->dev, "dsp_spos: failed to map SCB\n");
1059 #ifdef CONFIG_PM_SLEEP
1060                 kfree(scb_data);
1061 #endif
1062         }
1063
1064         return desc;
1065 }
1066
1067
1068 static struct dsp_task_descriptor *
1069 cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data,
1070                              u32 dest, int size)
1071 {
1072         struct dsp_task_descriptor * desc;
1073
1074         desc = _map_task_tree (chip,name,dest,size);
1075         if (desc) {
1076                 desc->data = task_data;
1077                 _dsp_create_task_tree(chip,task_data,dest,size);
1078         } else {
1079                 dev_err(chip->card->dev, "dsp_spos: failed to map TASK\n");
1080         }
1081
1082         return desc;
1083 }
1084
1085 int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip)
1086 {
1087         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1088         struct dsp_symbol_entry * fg_task_tree_header_code;
1089         struct dsp_symbol_entry * task_tree_header_code;
1090         struct dsp_symbol_entry * task_tree_thread;
1091         struct dsp_symbol_entry * null_algorithm;
1092         struct dsp_symbol_entry * magic_snoop_task;
1093
1094         struct dsp_scb_descriptor * timing_master_scb;
1095         struct dsp_scb_descriptor * codec_out_scb;
1096         struct dsp_scb_descriptor * codec_in_scb;
1097         struct dsp_scb_descriptor * src_task_scb;
1098         struct dsp_scb_descriptor * master_mix_scb;
1099         struct dsp_scb_descriptor * rear_mix_scb;
1100         struct dsp_scb_descriptor * record_mix_scb;
1101         struct dsp_scb_descriptor * write_back_scb;
1102         struct dsp_scb_descriptor * vari_decimate_scb;
1103         struct dsp_scb_descriptor * rear_codec_out_scb;
1104         struct dsp_scb_descriptor * clfe_codec_out_scb;
1105         struct dsp_scb_descriptor * magic_snoop_scb;
1106
1107         int fifo_addr, fifo_span, valid_slots;
1108
1109         static struct dsp_spos_control_block sposcb = {
1110                 /* 0 */ HFG_TREE_SCB,HFG_STACK,
1111                 /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR,
1112                 /* 2 */ DSP_SPOS_DC,0,
1113                 /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC,
1114                 /* 4 */ 0,0,
1115                 /* 5 */ DSP_SPOS_UU,0,
1116                 /* 6 */ FG_TASK_HEADER_ADDR,0,
1117                 /* 7 */ 0,0,
1118                 /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC,
1119                 /* 9 */ 0,
1120                 /* A */ 0,HFG_FIRST_EXECUTE_MODE,
1121                 /* B */ DSP_SPOS_UU,DSP_SPOS_UU,
1122                 /* C */ DSP_SPOS_DC_DC,
1123                 /* D */ DSP_SPOS_DC_DC,
1124                 /* E */ DSP_SPOS_DC_DC,
1125                 /* F */ DSP_SPOS_DC_DC
1126         };
1127
1128         cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10);
1129
1130         null_algorithm  = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE);
1131         if (null_algorithm == NULL) {
1132                 dev_err(chip->card->dev,
1133                         "dsp_spos: symbol NULLALGORITHM not found\n");
1134                 return -EIO;
1135         }
1136
1137         fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE);
1138         if (fg_task_tree_header_code == NULL) {
1139                 dev_err(chip->card->dev,
1140                         "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n");
1141                 return -EIO;
1142         }
1143
1144         task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE);
1145         if (task_tree_header_code == NULL) {
1146                 dev_err(chip->card->dev,
1147                         "dsp_spos: symbol TASKTREEHEADERCODE not found\n");
1148                 return -EIO;
1149         }
1150
1151         task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE);
1152         if (task_tree_thread == NULL) {
1153                 dev_err(chip->card->dev,
1154                         "dsp_spos: symbol TASKTREETHREAD not found\n");
1155                 return -EIO;
1156         }
1157
1158         magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE);
1159         if (magic_snoop_task == NULL) {
1160                 dev_err(chip->card->dev,
1161                         "dsp_spos: symbol MAGICSNOOPTASK not found\n");
1162                 return -EIO;
1163         }
1164
1165         {
1166                 /* create the null SCB */
1167                 static struct dsp_generic_scb null_scb = {
1168                         { 0, 0, 0, 0 },
1169                         { 0, 0, 0, 0, 0 },
1170                         NULL_SCB_ADDR, NULL_SCB_ADDR,
1171                         0, 0, 0, 0, 0,
1172                         {
1173                                 0,0,
1174                                 0,0,
1175                         }
1176                 };
1177
1178                 null_scb.entry_point = null_algorithm->address;
1179                 ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR);
1180                 ins->the_null_scb->task_entry = null_algorithm;
1181                 ins->the_null_scb->sub_list_ptr = ins->the_null_scb;
1182                 ins->the_null_scb->next_scb_ptr = ins->the_null_scb;
1183                 ins->the_null_scb->parent_scb_ptr = NULL;
1184                 cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb);
1185         }
1186
1187         {
1188                 /* setup foreground task tree */
1189                 static struct dsp_task_tree_control_block fg_task_tree_hdr =  {
1190                         { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10),
1191                           DSP_SPOS_DC_DC,
1192                           DSP_SPOS_DC_DC,
1193                           0x0000,DSP_SPOS_DC,
1194                           DSP_SPOS_DC, DSP_SPOS_DC,
1195                           DSP_SPOS_DC_DC,
1196                           DSP_SPOS_DC_DC,
1197                           DSP_SPOS_DC_DC,
1198                           DSP_SPOS_DC,DSP_SPOS_DC },
1199
1200                         {
1201                                 BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR,
1202                                 0,
1203                                 FG_TASK_HEADER_ADDR + TCBData,
1204                         },
1205
1206                         {
1207                                 4,0,
1208                                 1,0,
1209                                 2,SPOSCB_ADDR + HFGFlags,
1210                                 0,0,
1211                                 FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK
1212                         },
1213
1214                         {
1215                                 DSP_SPOS_DC,0,
1216                                 DSP_SPOS_DC,DSP_SPOS_DC,
1217                                 DSP_SPOS_DC,DSP_SPOS_DC,
1218                                 DSP_SPOS_DC,DSP_SPOS_DC,
1219                                 DSP_SPOS_DC,DSP_SPOS_DC,
1220                                 DSP_SPOS_DCDC,
1221                                 DSP_SPOS_UU,1,
1222                                 DSP_SPOS_DCDC,
1223                                 DSP_SPOS_DCDC,
1224                                 DSP_SPOS_DCDC,
1225                                 DSP_SPOS_DCDC,
1226                                 DSP_SPOS_DCDC,
1227                                 DSP_SPOS_DCDC,
1228                                 DSP_SPOS_DCDC,
1229                                 DSP_SPOS_DCDC,
1230                                 DSP_SPOS_DCDC,
1231                                 DSP_SPOS_DCDC,
1232                                 DSP_SPOS_DCDC,
1233                                 DSP_SPOS_DCDC,
1234                                 DSP_SPOS_DCDC,
1235                                 DSP_SPOS_DCDC,
1236                                 DSP_SPOS_DCDC,
1237                                 DSP_SPOS_DCDC,
1238                                 DSP_SPOS_DCDC,
1239                                 DSP_SPOS_DCDC,
1240                                 DSP_SPOS_DCDC,
1241                                 DSP_SPOS_DCDC,
1242                                 DSP_SPOS_DCDC,
1243                                 DSP_SPOS_DCDC,
1244                                 DSP_SPOS_DCDC,
1245                                 DSP_SPOS_DCDC,
1246                                 DSP_SPOS_DCDC,
1247                                 DSP_SPOS_DCDC,
1248                                 DSP_SPOS_DCDC,
1249                                 DSP_SPOS_DCDC
1250                         },
1251                         {
1252                                 FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1253                                 0,0
1254                         }
1255                 };
1256
1257                 fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address;
1258                 fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1259                 cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35);
1260         }
1261
1262
1263         {
1264                 /* setup foreground task tree */
1265                 static struct dsp_task_tree_control_block bg_task_tree_hdr =  {
1266                         { DSP_SPOS_DC_DC,
1267                           DSP_SPOS_DC_DC,
1268                           DSP_SPOS_DC_DC,
1269                           DSP_SPOS_DC, DSP_SPOS_DC,
1270                           DSP_SPOS_DC, DSP_SPOS_DC,
1271                           DSP_SPOS_DC_DC,
1272                           DSP_SPOS_DC_DC,
1273                           DSP_SPOS_DC_DC,
1274                           DSP_SPOS_DC,DSP_SPOS_DC },
1275
1276                         {
1277                                 NULL_SCB_ADDR,NULL_SCB_ADDR,  /* Set up the background to do nothing */
1278                                 0,
1279                                 BG_TREE_SCB_ADDR + TCBData,
1280                         },
1281
1282                         {
1283                                 9999,0,
1284                                 0,1,
1285                                 0,SPOSCB_ADDR + HFGFlags,
1286                                 0,0,
1287                                 BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK
1288                         },
1289
1290                         {
1291                                 DSP_SPOS_DC,0,
1292                                 DSP_SPOS_DC,DSP_SPOS_DC,
1293                                 DSP_SPOS_DC,DSP_SPOS_DC,
1294                                 DSP_SPOS_DC,DSP_SPOS_DC,
1295                                 DSP_SPOS_DC,DSP_SPOS_DC,
1296                                 DSP_SPOS_DCDC,
1297                                 DSP_SPOS_UU,1,
1298                                 DSP_SPOS_DCDC,
1299                                 DSP_SPOS_DCDC,
1300                                 DSP_SPOS_DCDC,
1301                                 DSP_SPOS_DCDC,
1302                                 DSP_SPOS_DCDC,
1303                                 DSP_SPOS_DCDC,
1304                                 DSP_SPOS_DCDC,
1305                                 DSP_SPOS_DCDC,
1306                                 DSP_SPOS_DCDC,
1307                                 DSP_SPOS_DCDC,
1308                                 DSP_SPOS_DCDC,
1309                                 DSP_SPOS_DCDC,
1310                                 DSP_SPOS_DCDC,
1311                                 DSP_SPOS_DCDC,
1312                                 DSP_SPOS_DCDC,
1313                                 DSP_SPOS_DCDC,
1314                                 DSP_SPOS_DCDC,
1315                                 DSP_SPOS_DCDC,
1316                                 DSP_SPOS_DCDC,
1317                                 DSP_SPOS_DCDC,
1318                                 DSP_SPOS_DCDC,
1319                                 DSP_SPOS_DCDC,
1320                                 DSP_SPOS_DCDC,
1321                                 DSP_SPOS_DCDC,
1322                                 DSP_SPOS_DCDC,
1323                                 DSP_SPOS_DCDC,
1324                                 DSP_SPOS_DCDC,
1325                                 DSP_SPOS_DCDC
1326                         },
1327                         {
1328                                 BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1329                                 0,0
1330                         }
1331                 };
1332
1333                 bg_task_tree_hdr.links.entry_point = task_tree_header_code->address;
1334                 bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1335                 cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35);
1336         }
1337
1338         /* create timing master SCB */
1339         timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip);
1340
1341         /* create the CODEC output task */
1342         codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000,
1343                                                         MASTERMIX_SCB_ADDR,
1344                                                         CODECOUT_SCB_ADDR,timing_master_scb,
1345                                                         SCB_ON_PARENT_SUBLIST_SCB);
1346
1347         if (!codec_out_scb) goto _fail_end;
1348         /* create the master mix SCB */
1349         master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB",
1350                                                         MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR,
1351                                                         codec_out_scb,
1352                                                         SCB_ON_PARENT_SUBLIST_SCB);
1353         ins->master_mix_scb = master_mix_scb;
1354
1355         if (!master_mix_scb) goto _fail_end;
1356
1357         /* create codec in */
1358         codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0,
1359                                                       CODEC_INPUT_BUF1,
1360                                                       CODECIN_SCB_ADDR,codec_out_scb,
1361                                                       SCB_ON_PARENT_NEXT_SCB);
1362         if (!codec_in_scb) goto _fail_end;
1363         ins->codec_in_scb = codec_in_scb;
1364
1365         /* create write back scb */
1366         write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB",
1367                                                               WRITE_BACK_BUF1,WRITE_BACK_SPB,
1368                                                               WRITEBACK_SCB_ADDR,
1369                                                               timing_master_scb,
1370                                                               SCB_ON_PARENT_NEXT_SCB);
1371         if (!write_back_scb) goto _fail_end;
1372
1373         {
1374                 static struct dsp_mix2_ostream_spb mix2_ostream_spb = {
1375                         0x00020000,
1376                         0x0000ffff
1377                 };
1378
1379                 if (!cs46xx_dsp_create_task_tree(chip, NULL,
1380                                                  (u32 *)&mix2_ostream_spb,
1381                                                  WRITE_BACK_SPB, 2))
1382                         goto _fail_end;
1383         }
1384
1385         /* input sample converter */
1386         vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB",
1387                                                                 VARI_DECIMATE_BUF0,
1388                                                                 VARI_DECIMATE_BUF1,
1389                                                                 VARIDECIMATE_SCB_ADDR,
1390                                                                 write_back_scb,
1391                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1392         if (!vari_decimate_scb) goto _fail_end;
1393
1394         /* create the record mixer SCB */
1395         record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB",
1396                                                         MIX_SAMPLE_BUF2,
1397                                                         RECORD_MIXER_SCB_ADDR,
1398                                                         vari_decimate_scb,
1399                                                         SCB_ON_PARENT_SUBLIST_SCB);
1400         ins->record_mixer_scb = record_mix_scb;
1401
1402         if (!record_mix_scb) goto _fail_end;
1403
1404         valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV);
1405
1406         if (snd_BUG_ON(chip->nr_ac97_codecs != 1 && chip->nr_ac97_codecs != 2))
1407                 goto _fail_end;
1408
1409         if (chip->nr_ac97_codecs == 1) {
1410                 /* output on slot 5 and 11
1411                    on primary CODEC */
1412                 fifo_addr = 0x20;
1413                 fifo_span = 0x60;
1414
1415                 /* enable slot 5 and 11 */
1416                 valid_slots |= ACOSV_SLV5 | ACOSV_SLV11;
1417         } else {
1418                 /* output on slot 7 and 8
1419                    on secondary CODEC */
1420                 fifo_addr = 0x40;
1421                 fifo_span = 0x10;
1422
1423                 /* enable slot 7 and 8 */
1424                 valid_slots |= ACOSV_SLV7 | ACOSV_SLV8;
1425         }
1426         /* create CODEC tasklet for rear speakers output*/
1427         rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr,
1428                                                              REAR_MIXER_SCB_ADDR,
1429                                                              REAR_CODECOUT_SCB_ADDR,codec_in_scb,
1430                                                              SCB_ON_PARENT_NEXT_SCB);
1431         if (!rear_codec_out_scb) goto _fail_end;
1432
1433
1434         /* create the rear PCM channel  mixer SCB */
1435         rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB",
1436                                                       MIX_SAMPLE_BUF3,
1437                                                       REAR_MIXER_SCB_ADDR,
1438                                                       rear_codec_out_scb,
1439                                                       SCB_ON_PARENT_SUBLIST_SCB);
1440         ins->rear_mix_scb = rear_mix_scb;
1441         if (!rear_mix_scb) goto _fail_end;
1442
1443         if (chip->nr_ac97_codecs == 2) {
1444                 /* create CODEC tasklet for rear Center/LFE output
1445                    slot 6 and 9 on secondary CODEC */
1446                 clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030,
1447                                                                      CLFE_MIXER_SCB_ADDR,
1448                                                                      CLFE_CODEC_SCB_ADDR,
1449                                                                      rear_codec_out_scb,
1450                                                                      SCB_ON_PARENT_NEXT_SCB);
1451                 if (!clfe_codec_out_scb) goto _fail_end;
1452
1453
1454                 /* create the rear PCM channel  mixer SCB */
1455                 ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB",
1456                                                                          MIX_SAMPLE_BUF4,
1457                                                                          CLFE_MIXER_SCB_ADDR,
1458                                                                          clfe_codec_out_scb,
1459                                                                          SCB_ON_PARENT_SUBLIST_SCB);
1460                 if (!ins->center_lfe_mix_scb) goto _fail_end;
1461
1462                 /* enable slot 6 and 9 */
1463                 valid_slots |= ACOSV_SLV6 | ACOSV_SLV9;
1464         } else {
1465                 clfe_codec_out_scb = rear_codec_out_scb;
1466                 ins->center_lfe_mix_scb = rear_mix_scb;
1467         }
1468
1469         /* enable slots depending on CODEC configuration */
1470         snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots);
1471
1472         /* the magic snooper */
1473         magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR,
1474                                                              OUTPUT_SNOOP_BUFFER,
1475                                                              codec_out_scb,
1476                                                              clfe_codec_out_scb,
1477                                                              SCB_ON_PARENT_NEXT_SCB);
1478
1479
1480         if (!magic_snoop_scb) goto _fail_end;
1481         ins->ref_snoop_scb = magic_snoop_scb;
1482
1483         /* SP IO access */
1484         if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR,
1485                                               magic_snoop_scb,
1486                                               SCB_ON_PARENT_NEXT_SCB))
1487                 goto _fail_end;
1488
1489         /* SPDIF input sampel rate converter */
1490         src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI",
1491                                                       ins->spdif_in_sample_rate,
1492                                                       SRC_OUTPUT_BUF1,
1493                                                       SRC_DELAY_BUF1,SRCTASK_SCB_ADDR,
1494                                                       master_mix_scb,
1495                                                       SCB_ON_PARENT_SUBLIST_SCB,1);
1496
1497         if (!src_task_scb) goto _fail_end;
1498         cs46xx_src_unlink(chip,src_task_scb);
1499
1500         /* NOTE: when we now how to detect the SPDIF input
1501            sample rate we will use this SRC to adjust it */
1502         ins->spdif_in_src = src_task_scb;
1503
1504         cs46xx_dsp_async_init(chip,timing_master_scb);
1505         return 0;
1506
1507  _fail_end:
1508         dev_err(chip->card->dev, "dsp_spos: failed to setup SCB's in DSP\n");
1509         return -EINVAL;
1510 }
1511
1512 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
1513                                   struct dsp_scb_descriptor * fg_entry)
1514 {
1515         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1516         struct dsp_symbol_entry * s16_async_codec_input_task;
1517         struct dsp_symbol_entry * spdifo_task;
1518         struct dsp_symbol_entry * spdifi_task;
1519         struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc;
1520
1521         s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE);
1522         if (s16_async_codec_input_task == NULL) {
1523                 dev_err(chip->card->dev,
1524                         "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n");
1525                 return -EIO;
1526         }
1527         spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE);
1528         if (spdifo_task == NULL) {
1529                 dev_err(chip->card->dev,
1530                         "dsp_spos: symbol SPDIFOTASK not found\n");
1531                 return -EIO;
1532         }
1533
1534         spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE);
1535         if (spdifi_task == NULL) {
1536                 dev_err(chip->card->dev,
1537                         "dsp_spos: symbol SPDIFITASK not found\n");
1538                 return -EIO;
1539         }
1540
1541         {
1542                 /* 0xBC0 */
1543                 struct dsp_spdifoscb spdifo_scb = {
1544                         /* 0 */ DSP_SPOS_UUUU,
1545                         {
1546                                 /* 1 */ 0xb0,
1547                                 /* 2 */ 0,
1548                                 /* 3 */ 0,
1549                                 /* 4 */ 0,
1550                         },
1551                         /* NOTE: the SPDIF output task read samples in mono
1552                            format, the AsynchFGTxSCB task writes to buffer
1553                            in stereo format
1554                         */
1555                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256,
1556                         /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 )  |  0xFFFC,
1557                         /* 7 */ 0,0,
1558                         /* 8 */ 0,
1559                         /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR,
1560                         /* A */ spdifo_task->address,
1561                         SPDIFO_SCB_INST + SPDIFOFIFOPointer,
1562                         {
1563                                 /* B */ 0x0040, /*DSP_SPOS_UUUU,*/
1564                                 /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/
1565                         },
1566                         /* D */ 0x804c,0,                                                         /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */
1567                         /* E */ 0x0108,0x0001,                                    /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */
1568                         /* F */ DSP_SPOS_UUUU                                     /* SPDIFOFree; */
1569                 };
1570
1571                 /* 0xBB0 */
1572                 struct dsp_spdifiscb spdifi_scb = {
1573                         /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI,
1574                         /* 1 */ 0,
1575                         /* 2 */ 0,
1576                         /* 3 */ 1,4000,        /* SPDIFICountLimit SPDIFICount */
1577                         /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */
1578                         /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */
1579                         /* 6 */ DSP_SPOS_UUUU,  /* Free3 */
1580                         /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC,  /* Free2 BitCount*/
1581                         /* 8 */ DSP_SPOS_UUUU,  /* TempStatus */
1582                         /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR,
1583                         /* A */ spdifi_task->address,
1584                         SPDIFI_SCB_INST + SPDIFIFIFOPointer,
1585                         /* NOTE: The SPDIF input task write the sample in mono
1586                            format from the HW FIFO, the AsynchFGRxSCB task  reads
1587                            them in stereo
1588                         */
1589                         /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128,
1590                         /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1591                         /* D */ 0x8048,0,
1592                         /* E */ 0x01f0,0x0001,
1593                         /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */
1594                 };
1595
1596                 /* 0xBA0 */
1597                 struct dsp_async_codec_input_scb async_codec_input_scb = {
1598                         /* 0 */ DSP_SPOS_UUUU,
1599                         /* 1 */ 0,
1600                         /* 2 */ 0,
1601                         /* 3 */ 1,4000,
1602                         /* 4 */ 0x0118,0x0001,
1603                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64,
1604                         /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1605                         /* 7 */ DSP_SPOS_UU,0x3,
1606                         /* 8 */ DSP_SPOS_UUUU,
1607                         /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR,
1608                         /* A */ s16_async_codec_input_task->address,
1609                         HFG_TREE_SCB + AsyncCIOFIFOPointer,
1610
1611                         /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,
1612                         /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10),  /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/
1613
1614 #ifdef UseASER1Input
1615                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1616                            Init. 0000:8042: for ASER1
1617                            0000:8044: for ASER2 */
1618                         /* D */ 0x8042,0,
1619
1620                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1621                            Init 1 stero:8050 ASER1
1622                            Init 0  mono:8070 ASER2
1623                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1624                         /* E */ 0x0100,0x0001,
1625
1626 #endif
1627
1628 #ifdef UseASER2Input
1629                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1630                            Init. 0000:8042: for ASER1
1631                            0000:8044: for ASER2 */
1632                         /* D */ 0x8044,0,
1633
1634                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1635                            Init 1 stero:8050 ASER1
1636                            Init 0  mono:8070 ASER2
1637                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1638                         /* E */ 0x0110,0x0001,
1639
1640 #endif
1641
1642                         /* short AsyncCIOutputBufModulo:AsyncCIFree;
1643                            AsyncCIOutputBufModulo: The modulo size for
1644                            the output buffer of this task */
1645                         /* F */ 0, /* DSP_SPOS_UUUU */
1646                 };
1647
1648                 spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST);
1649
1650                 if (snd_BUG_ON(!spdifo_scb_desc))
1651                         return -EIO;
1652                 spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST);
1653                 if (snd_BUG_ON(!spdifi_scb_desc))
1654                         return -EIO;
1655                 async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB);
1656                 if (snd_BUG_ON(!async_codec_scb_desc))
1657                         return -EIO;
1658
1659                 async_codec_scb_desc->parent_scb_ptr = NULL;
1660                 async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc;
1661                 async_codec_scb_desc->sub_list_ptr = ins->the_null_scb;
1662                 async_codec_scb_desc->task_entry = s16_async_codec_input_task;
1663
1664                 spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc;
1665                 spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc;
1666                 spdifi_scb_desc->sub_list_ptr = ins->the_null_scb;
1667                 spdifi_scb_desc->task_entry = spdifi_task;
1668
1669                 spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc;
1670                 spdifo_scb_desc->next_scb_ptr = fg_entry;
1671                 spdifo_scb_desc->sub_list_ptr = ins->the_null_scb;
1672                 spdifo_scb_desc->task_entry = spdifo_task;
1673
1674                 /* this one is faked, as the parnet of SPDIFO task
1675                    is the FG task tree */
1676                 fg_entry->parent_scb_ptr = spdifo_scb_desc;
1677
1678                 /* for proc fs */
1679                 cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc);
1680                 cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc);
1681                 cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc);
1682
1683                 /* Async MASTER ENABLE, affects both SPDIF input and output */
1684                 snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 );
1685         }
1686
1687         return 0;
1688 }
1689
1690 static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip)
1691 {
1692         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1693
1694         /* set SPDIF output FIFO slot */
1695         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0);
1696
1697         /* SPDIF output MASTER ENABLE */
1698         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0);
1699
1700         /* right and left validate bit */
1701         /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/
1702         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0);
1703
1704         /* clear fifo pointer */
1705         cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);
1706
1707         /* monitor state */
1708         ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED;
1709 }
1710
1711 int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip)
1712 {
1713         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1714
1715         /* if hw-ctrl already enabled, turn off to reset logic ... */
1716         cs46xx_dsp_disable_spdif_hw (chip);
1717         udelay(50);
1718
1719         /* set SPDIF output FIFO slot */
1720         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) ));
1721
1722         /* SPDIF output MASTER ENABLE */
1723         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000);
1724
1725         /* right and left validate bit */
1726         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);
1727
1728         /* monitor state */
1729         ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED;
1730
1731         return 0;
1732 }
1733
1734 int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip)
1735 {
1736         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1737
1738         /* turn on amplifier */
1739         chip->active_ctrl(chip, 1);
1740         chip->amplifier_ctrl(chip, 1);
1741
1742         if (snd_BUG_ON(ins->asynch_rx_scb))
1743                 return -EINVAL;
1744         if (snd_BUG_ON(!ins->spdif_in_src))
1745                 return -EINVAL;
1746
1747         mutex_lock(&chip->spos_mutex);
1748
1749         if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) {
1750                 /* time countdown enable */
1751                 cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005);
1752                 /* NOTE: 80000005 value is just magic. With all values
1753                    that I've tested this one seem to give the best result.
1754                    Got no explication why. (Benny) */
1755
1756                 /* SPDIF input MASTER ENABLE */
1757                 cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff);
1758
1759                 ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED;
1760         }
1761
1762         /* create and start the asynchronous receiver SCB */
1763         ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB",
1764                                                                 ASYNCRX_SCB_ADDR,
1765                                                                 SPDIFI_SCB_INST,
1766                                                                 SPDIFI_IP_OUTPUT_BUFFER1,
1767                                                                 ins->spdif_in_src,
1768                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1769
1770         spin_lock_irq(&chip->reg_lock);
1771
1772         /* reset SPDIF input sample buffer pointer */
1773         /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2,
1774           (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/
1775
1776         /* reset FIFO ptr */
1777         /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/
1778         cs46xx_src_link(chip,ins->spdif_in_src);
1779
1780         /* unmute SRC volume */
1781         cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff);
1782
1783         spin_unlock_irq(&chip->reg_lock);
1784
1785         /* set SPDIF input sample rate and unmute
1786            NOTE: only 48khz support for SPDIF input this time */
1787         /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */
1788
1789         /* monitor state */
1790         ins->spdif_status_in = 1;
1791         mutex_unlock(&chip->spos_mutex);
1792
1793         return 0;
1794 }
1795
1796 int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip)
1797 {
1798         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1799
1800         if (snd_BUG_ON(!ins->asynch_rx_scb))
1801                 return -EINVAL;
1802         if (snd_BUG_ON(!ins->spdif_in_src))
1803                 return -EINVAL;
1804
1805         mutex_lock(&chip->spos_mutex);
1806
1807         /* Remove the asynchronous receiver SCB */
1808         cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb);
1809         ins->asynch_rx_scb = NULL;
1810
1811         cs46xx_src_unlink(chip,ins->spdif_in_src);
1812
1813         /* monitor state */
1814         ins->spdif_status_in = 0;
1815         mutex_unlock(&chip->spos_mutex);
1816
1817         /* restore amplifier */
1818         chip->active_ctrl(chip, -1);
1819         chip->amplifier_ctrl(chip, -1);
1820
1821         return 0;
1822 }
1823
1824 int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip)
1825 {
1826         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1827
1828         if (snd_BUG_ON(ins->pcm_input))
1829                 return -EINVAL;
1830         if (snd_BUG_ON(!ins->ref_snoop_scb))
1831                 return -EINVAL;
1832
1833         mutex_lock(&chip->spos_mutex);
1834         ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR,
1835                                                   "PCMSerialInput_Wave");
1836         mutex_unlock(&chip->spos_mutex);
1837
1838         return 0;
1839 }
1840
1841 int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip)
1842 {
1843         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1844
1845         if (snd_BUG_ON(!ins->pcm_input))
1846                 return -EINVAL;
1847
1848         mutex_lock(&chip->spos_mutex);
1849         cs46xx_dsp_remove_scb (chip,ins->pcm_input);
1850         ins->pcm_input = NULL;
1851         mutex_unlock(&chip->spos_mutex);
1852
1853         return 0;
1854 }
1855
1856 int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip)
1857 {
1858         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1859
1860         if (snd_BUG_ON(ins->adc_input))
1861                 return -EINVAL;
1862         if (snd_BUG_ON(!ins->codec_in_scb))
1863                 return -EINVAL;
1864
1865         mutex_lock(&chip->spos_mutex);
1866         ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR,
1867                                                   "PCMSerialInput_ADC");
1868         mutex_unlock(&chip->spos_mutex);
1869
1870         return 0;
1871 }
1872
1873 int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip)
1874 {
1875         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1876
1877         if (snd_BUG_ON(!ins->adc_input))
1878                 return -EINVAL;
1879
1880         mutex_lock(&chip->spos_mutex);
1881         cs46xx_dsp_remove_scb (chip,ins->adc_input);
1882         ins->adc_input = NULL;
1883         mutex_unlock(&chip->spos_mutex);
1884
1885         return 0;
1886 }
1887
1888 int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data)
1889 {
1890         u32 temp;
1891         int  i;
1892
1893         /* santiy check the parameters.  (These numbers are not 100% correct.  They are
1894            a rough guess from looking at the controller spec.) */
1895         if (address < 0x8000 || address >= 0x9000)
1896                 return -EINVAL;
1897
1898         /* initialize the SP_IO_WRITE SCB with the data. */
1899         temp = ( address << 16 ) | ( address & 0x0000FFFF);   /* offset 0 <-- address2 : address1 */
1900
1901         snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR      << 2), temp);
1902         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */
1903         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */
1904
1905         /* Poke this location to tell the task to start */
1906         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10);
1907
1908         /* Verify that the task ran */
1909         for (i=0; i<25; i++) {
1910                 udelay(125);
1911
1912                 temp =  snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2));
1913                 if (temp == 0x00000000)
1914                         break;
1915         }
1916
1917         if (i == 25) {
1918                 dev_err(chip->card->dev,
1919                         "dsp_spos: SPIOWriteTask not responding\n");
1920                 return -EBUSY;
1921         }
1922
1923         return 0;
1924 }
1925
1926 int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1927 {
1928         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1929         struct dsp_scb_descriptor * scb;
1930
1931         mutex_lock(&chip->spos_mutex);
1932
1933         /* main output */
1934         scb = ins->master_mix_scb->sub_list_ptr;
1935         while (scb != ins->the_null_scb) {
1936                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1937                 scb = scb->next_scb_ptr;
1938         }
1939
1940         /* rear output */
1941         scb = ins->rear_mix_scb->sub_list_ptr;
1942         while (scb != ins->the_null_scb) {
1943                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1944                 scb = scb->next_scb_ptr;
1945         }
1946
1947         ins->dac_volume_left = left;
1948         ins->dac_volume_right = right;
1949
1950         mutex_unlock(&chip->spos_mutex);
1951
1952         return 0;
1953 }
1954
1955 int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1956 {
1957         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1958
1959         mutex_lock(&chip->spos_mutex);
1960
1961         if (ins->asynch_rx_scb != NULL)
1962                 cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb,
1963                                            left,right);
1964
1965         ins->spdif_input_volume_left = left;
1966         ins->spdif_input_volume_right = right;
1967
1968         mutex_unlock(&chip->spos_mutex);
1969
1970         return 0;
1971 }
1972
1973 #ifdef CONFIG_PM_SLEEP
1974 int cs46xx_dsp_resume(struct snd_cs46xx * chip)
1975 {
1976         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1977         int i, err;
1978
1979         /* clear parameter, sample and code areas */
1980         snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET,
1981                              DSP_PARAMETER_BYTE_SIZE);
1982         snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET,
1983                              DSP_SAMPLE_BYTE_SIZE);
1984         snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
1985
1986         for (i = 0; i < ins->nmodules; i++) {
1987                 struct dsp_module_desc *module = &ins->modules[i];
1988                 struct dsp_segment_desc *seg;
1989                 u32 doffset, dsize;
1990
1991                 seg = get_segment_desc(module, SEGTYPE_SP_PARAMETER);
1992                 err = dsp_load_parameter(chip, seg);
1993                 if (err < 0)
1994                         return err;
1995
1996                 seg = get_segment_desc(module, SEGTYPE_SP_SAMPLE);
1997                 err = dsp_load_sample(chip, seg);
1998                 if (err < 0)
1999                         return err;
2000
2001                 seg = get_segment_desc(module, SEGTYPE_SP_PROGRAM);
2002                 if (!seg)
2003                         continue;
2004
2005                 doffset = seg->offset * 4 + module->load_address * 4
2006                         + DSP_CODE_BYTE_OFFSET;
2007                 dsize   = seg->size * 4;
2008                 err = snd_cs46xx_download(chip,
2009                                           ins->code.data + module->load_address,
2010                                           doffset, dsize);
2011                 if (err < 0)
2012                         return err;
2013         }
2014
2015         for (i = 0; i < ins->ntask; i++) {
2016                 struct dsp_task_descriptor *t = &ins->tasks[i];
2017                 _dsp_create_task_tree(chip, t->data, t->address, t->size);
2018         }
2019
2020         for (i = 0; i < ins->nscb; i++) {
2021                 struct dsp_scb_descriptor *s = &ins->scbs[i];
2022                 if (s->deleted)
2023                         continue;
2024                 _dsp_create_scb(chip, s->data, s->address);
2025         }
2026         for (i = 0; i < ins->nscb; i++) {
2027                 struct dsp_scb_descriptor *s = &ins->scbs[i];
2028                 if (s->deleted)
2029                         continue;
2030                 if (s->updated)
2031                         cs46xx_dsp_spos_update_scb(chip, s);
2032                 if (s->volume_set)
2033                         cs46xx_dsp_scb_set_volume(chip, s,
2034                                                   s->volume[0], s->volume[1]);
2035         }
2036         if (ins->spdif_status_out & DSP_SPDIF_STATUS_HW_ENABLED) {
2037                 cs46xx_dsp_enable_spdif_hw(chip);
2038                 snd_cs46xx_poke(chip, (ins->ref_snoop_scb->address + 2) << 2,
2039                                 (OUTPUT_SNOOP_BUFFER + 0x10) << 0x10);
2040                 if (ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN)
2041                         cs46xx_poke_via_dsp(chip, SP_SPDOUT_CSUV,
2042                                             ins->spdif_csuv_stream);
2043         }
2044         if (chip->dsp_spos_instance->spdif_status_in) {
2045                 cs46xx_poke_via_dsp(chip, SP_ASER_COUNTDOWN, 0x80000005);
2046                 cs46xx_poke_via_dsp(chip, SP_SPDIN_CONTROL, 0x800003ff);
2047         }
2048         return 0;
2049 }
2050 #endif